CN101877162A - Security system - Google Patents
Security system Download PDFInfo
- Publication number
- CN101877162A CN101877162A CN2009101391764A CN200910139176A CN101877162A CN 101877162 A CN101877162 A CN 101877162A CN 2009101391764 A CN2009101391764 A CN 2009101391764A CN 200910139176 A CN200910139176 A CN 200910139176A CN 101877162 A CN101877162 A CN 101877162A
- Authority
- CN
- China
- Prior art keywords
- host module
- node
- perceptron
- security system
- state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Alarm Systems (AREA)
Abstract
The invention discloses a security system, comprising a perceptor, a terminal resistor and a host module. The preceptor is provided with a first state and a second state. The terminal resistor is connected with the preceptor. The host module is connected with the preceptor and sets a loop failure time, wherein when the set loop failure time is longer than or equal to a loop failure time and the preceptor does not turn into a second state, the host module generates a loop failure signal. The security system can solve the problem that the security system cannot work normally when the circuit of the security system is damaged, and moreover, the host module of the security system also sets the loop failure time, which ensures that when alarm cannot be given after the loop failure time is over, and a security company can be notified to send a worker to check the security system.
Description
Technical field
The present invention is about a kind of security system, has a security system that lost efficacy and detect in the loop especially in regard to a kind of.
Background technology
At present, the circuit in the security system sees also Fig. 1 a and Fig. 1 b.Fig. 1 a is under the general normal condition, node switch unit 114 in the perceptron 110 remains on first state, to connect first node 111 and Section Point 112, and when the invador invades security system, see also Fig. 1 b, 114 of node switch units in the perceptron 110 transfer second state of open circuit to, and this moment, host module 101 became the open circuit infinity because of detecting terminal resistance 102, and the signal that gives the alarm.But there are some problems in present security system circuit, and for example the effractor can utilize the short circuit mode to destroy circuit along dotted line 103, makes host module 101 can't detect the terminal resistance 102 that the variation because of node switch unit 114 states changes.
In addition, present security system also has a problem to be, as the long-time no alarms and no surprises signal of security system, this situation may be not have the invador to invade, also might be perceptron 110 long neglected and in disrepair breaking down, make node switch unit 114 normally transfer second state to, or the circuit of security system suffers artificial destruction, make host module 101 can't detect the effractor and invade by first state.But present security system there is no effective solution, and this reports the method for full doubt.
Summary of the invention
In view of this, be necessary to provide a kind of security system, destroyed to solve the security system circuit, and make the problem that security system can't operate as normal, and the host module of security system is also set the loop out-of-service time, make surpass the loop during out-of-service time all acomia responding give the correct time, can notify and save company from damage and dispatch officers to check security system.
A kind of security system, it comprises a perceptron, a terminal resistance, a host module.Wherein, perceptron also comprises a first node, a Section Point, one the 3rd node and a node switch unit.This node switch unit has first state and second state, when the node switch unit is first state, the node switch unit connects first node and Section Point, and when the node switch unit was second state, the node switch unit connected first node and the 3rd node.Terminal resistance connects Section Point and the 3rd node.Host module connects first node and the 3rd node, and wherein when the node switch unit was second state, host module produced the alarm signal.
A kind of security system, it comprises a perceptron, a terminal resistance, a host module.Perceptron has first state and second state.Terminal resistance connects perceptron.Host module connects perceptron, and sets the loop out-of-service time, and wherein, when more than or equal to the loop out-of-service time, and perceptron is not when all becoming second state, and then host module produces loop inefficacy signal.
And, a kind of security system, it comprises a perceptron, a terminal resistance, a host module.Perceptron has first state and second state.Terminal resistance connects perceptron, to produce a termination resistance value.Host module is set a preset resistance value, and the output voltage signal corresponding with the preset resistance value, makes terminal resistance according to voltage signal, to produce termination resistance value.Wherein, host module detecting termination resistance value, when perceptron was second state, host module system produced the alarm signal, and when perceptron is first state, and termination resistance value is when being not equal to the preset resistance value, and then host module produces the alarm signal.
Compared with prior art, above-mentioned security system has one or more following advantage:
(1) prevents the security system circuit by short circuit, and security system can't operate as normal be given the alarm.
(2) save company from damage and dispatch officers to check security system when surpassing the loop out-of-service time all during no alarms and no surprises, can notifying.
(3) can dynamically adjust terminal resistance, prevent to be obtained termination resistance value, and carry out the security system circuit damage by the effractor.
Description of drawings
Fig. 1 a is the synoptic diagram of existing security system when first state;
Fig. 1 b is the synoptic diagram of existing security system when second state;
Fig. 2 a is node switch unit synoptic diagram when first state of security system first embodiment of the present invention;
Fig. 2 b is node switch unit synoptic diagram when second state of security system first embodiment of the present invention;
Fig. 2 c is the embodiment synoptic diagram of three perceptron connected modes of the present invention;
Fig. 3 is the security system second embodiment synoptic diagram of the present invention;
Fig. 4 is a security system inspection method flow chart of steps of the present invention; And
Fig. 5 is a security system inspection method process flow diagram of the present invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
See also Fig. 2 a and Fig. 2 b, it is the security system first embodiment synoptic diagram of the present invention.Among the figure, security system 1 comprises a perceptron 210, a terminal resistance 202 and a host module 201.Perceptron 210 comprises a first node 211, a Section Point 212, one the 3rd node 213, a node switch unit 214.Node switch unit 214 can have first state and second state, sees also Fig. 2 a, and when node switch unit 214 was first state, node switch unit 214 can connect first node 211 and Section Point 212.See also Fig. 2 b, when node switch unit 214 was second state, node switch unit 214 can connect first node 211 and the 3rd node 213.
In general normal condition, the detection signal that host module 201 sends can be passed through first node 211, Section Point 212, terminal resistance 202 and the 3rd node 213 in regular turn, and in the abnormality of being invaded, then the detection signal sent of host module 201 can be passed through first node 211 and the 3rd node 213 in regular turn.So host module 201 can be according to the voltage drop of detection signal of output with input, and learn that detection signal has or not through terminal resistance 202, security system can be judged and be normal or abnormality in view of the above.
In addition, the invador may see through the destruction circuit and invade, for example utilize the mode of short circuit to destroy circuit at primary importance dotted line 2031 or second place dotted line 2032 places, these two kinds of failure modes are owing to making detection signal can't pass through terminal resistance 202, so host module 201 can give the alarm as usual.The failure mode of the 3rd position dotted line 2033 places short circuit is not owing to influence the start of node switch unit 214, so when security system was invaded, node switch unit 214 can transfer second state in the same old way, and the signal that gives the alarm.
Security system also can comprise a plurality of perceptrons, sees also Fig. 2 c, and it is an example with 3 perceptrons.Each perceptron can be arranged in the possible intrusion route of invador.The first node 2111 of first perceptron 2101 can be connected host module 201 with the 3rd node 2131, the first node 2112 of second perceptron 2102 and the 3rd node 2132 can be connected the Section Point 2121 and the 3rd node 2131 of first perceptron 2101, the Section Point 2122 of second perceptron 2102 can be connected the first node 2113 of the 3rd perceptron 2103 and the Section Point 2123 and the 3rd node 2133 connectable terminal resistance 202 of 2133, the three perceptrons 2103 of the 3rd node with the 3rd node 2132.
Security system of the present invention is not limited to one or three perceptrons, can utilize same Anknupfungskeregriff to extend to a plurality of perceptrons.N perceptron for example, N is the integer greater than 1.The first node of first perceptron is connected host module with the 3rd node, the Section Point of N perceptron and the 3rd node be connecting terminal resistance then, wherein the first node of M perceptron is connected the Section Point and the 3rd node of M-1 perceptron with the 3rd node, and the Section Point of M perceptron is connected the first node and the 3rd node of M+1 perceptron with the 3rd node, M be between 1 and N between integer.
See also Fig. 3, it is the security system second embodiment synoptic diagram of the present invention.More comprise a frequency generation module 3013, preset resistance value selection module 3011 and a microcontroller module 3012 with the difference of Fig. 2 a-c at the host module 301 of Fig. 3.Host module 301 can be set a loop out-of-service time, and by microcontroller according to frequency generation module 3013 counting, when more than or equal to the loop out-of-service time, node switch unit 314 all remains on first state, do not transfer second state to, security system might be fault or be destroyed this moment, and this moment, host module 301 can produce a loop inefficacy signal, saved company from damage with notice and dispatched officers to check that security system has no problem.
The preset resistance value selects module 3011 can provide host module 301 dynamically to set the preset resistance value of a normal condition, host module 301 can be according to this preset resistance value afterwards, select the voltage signal 3014 of corresponding preset resistance value, and export this voltage signal 3014 to terminal resistance 302, make terminal resistance 302 produce terminal resistance 302 values according to voltage signal 3014.This can dynamically adjust the method for terminal resistance 302, can prevent the invador to connect identical terminal resistance 302 because of learning terminal resistance 302 values at primary importance dotted line 3031 places, and destroys first circuit point 304 and second circuit point 305 is invaded.
The terminal resistance detecting value of detecting terminal resistances 302 when host module 301 is not equal to the preset resistance value, and then host module 301 can produce the alarm signal.
When host module 301 detects terminal resistance 302 is an open-circuit condition, and then host module 301 sends a loop and destroys signal.
To detect terminal resistance 302 be a short-circuit condition and when host module 301, node switch unit 314 in the expression perceptron 310 may be triggered and transfer second state to by first state, show that security system function is normal, then host module 301 can be reset the loop out-of-service time.
See also Fig. 4, it is a security system inspection method flow chart of steps of the present invention.Among the figure, at first, step S401 sets a preset resistance value and a loop out-of-service time by a host module.Step S402 uses host module to detect the termination resistance value that a terminal resistance produces.The termination resistance value that step S403 detects when host module equals the preset resistance value, and more than or equal to the loop out-of-service time, perceptron is not all changed state, and then host module produces a loop inefficacy signal.
Wherein be not equal under the prerequisite of preset resistance value in the termination resistance value that host module detects, when host module is a state of alert, then host module can send an alarm signal, and when host module is a non-state of alert, detect termination resistance value as host module this moment is an open-circuit condition, then host module sends a loop and destroys signal, is a short-circuit condition and detect termination resistance value as host module, then the host module replacement loop out-of-service time.See also Fig. 5, it is a security system inspection method flow chart of steps of the present invention.Among the figure, when security system is started working, can set the preset resistance value 502 of normal range earlier, how long do not have action promptly to send the loop out-of-service time 503 of the caution of losing efficacy with the setting perceptron, security system main frame sense terminals resistance value 504 afterwards, to judge that termination resistance value is setting value, open circuit, non-setting value or short circuit 505.Judge that when main frame termination resistance value equals setting value (being that termination resistance value is the preset resistance value), then then judge whether to arrive the loop out-of-service time 506.When reaching the loop during out-of-service time, send loop inefficacy caution 507, and save company from damage and dispatch officers to handle 511, if not, continue detecting detection resistance value 504.When main frame judges that terminal resistance is open-circuit condition, then send the loop and destroy caution 512, and save company from damage and dispatch officers to handle 511.When main frame judges that termination resistance value is not setting value or short circuit, then reset the loop out-of-service time 508, then judge whether to be the state of alert 509, if be the state of alert this moment, then send safety alarm 510, and save company from damage and dispatch officers to handle 511, if not, then host module continues the sense terminals resistance value.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. security system is characterized in that it comprises:
One perceptron comprises:
One first node;
One Section Point;
One the 3rd node; And
One node switch unit, it has first state and second state, when described node switch unit is described first state, described node switch unit connects described first node and described Section Point, when described node switch unit was described second state, described node switch unit connected described first node and described the 3rd node;
One terminal resistance connects described Section Point and described the 3rd node; And
One host module connects described first node and described the 3rd node, and when described node switch unit was described second state, described host module produced the alarm signal.
2. security system as claimed in claim 1, it is characterized in that, further comprising N perceptron is arranged between described host module and the described perceptron, N is the integer greater than 1, described host module connects the described first node and described the 3rd node of first perceptron, the described Section Point of N perceptron and described the 3rd node then are connected the described first node and described the 3rd node of described perceptron, wherein the described first node of M perceptron is connected the described Section Point and described the 3rd node of M-1 perceptron with described the 3rd node, and the described Section Point of M perceptron is connected the described first node and described the 3rd node of M+1 perceptron with described the 3rd node, M be between 1 and N between integer.
3. security system as claimed in claim 1, it is characterized in that, described host module is further set the loop out-of-service time, when microprocessor is counted according to the frequency generation module, described gate time is more than or equal to the described loop out-of-service time, and described node switch unit does not all transfer described second state to, and then described host module produces loop inefficacy signal.
4. security system as claimed in claim 1, it is characterized in that, described host module is further set the preset resistance value, detects one of described terminal resistance terminal resistance detecting value when described host module and is not equal to described preset resistance value, and then described host module produces described alarm signal.
5. security system as claimed in claim 1, it is characterized in that, detecting described terminal resistance when described host module is open-circuit condition or short-circuit condition, when described terminal electricity group is described open-circuit condition, then described host module sends the loop and destroys signal, detecting described terminal resistance when described host module is described short-circuit condition, and then described host module is reset the described loop out-of-service time.
6. security system is characterized in that it comprises:
One perceptron, it has first state and second state;
One terminal resistance connects described perceptron; And
One host module connects described perceptron, and sets the loop out-of-service time;
When microprocessor is counted according to the frequency generation module, described gate time is more than or equal to the described loop out-of-service time, and described perceptron is not when all becoming described second state, and then described host module produces loop inefficacy signal.
7. security system as claimed in claim 6, it is characterized in that, described host module is further set the preset resistance value, described gate time is less than the described loop out-of-service time, and when described host module was detected one of described terminal resistance terminal resistance detecting value and is not equal to described preset resistance value, then described host module produced described alarm signal.
8. security system as claimed in claim 6, it is characterized in that, detecting described terminal resistance when described host module is open-circuit condition or short-circuit condition, when described terminal electricity group is described open-circuit condition, then described host module sends the loop and destroys signal, detecting described terminal resistance when described host module is described short-circuit condition, and then described host module is reset the described loop out-of-service time.
9. security system is characterized in that it comprises:
One perceptron, it has first state and second state;
One terminal resistance connects described perceptron, to produce a termination resistance value; And
One host module is to set the preset resistance value, and output and the corresponding voltage signal of described preset resistance value, makes described terminal resistance according to described voltage signal, to produce described termination resistance value;
Described host module is detected described termination resistance value, when described perceptron is described second state, described host module produces an alarm signal, when described perceptron is described first state, and when described termination resistance value was not equal to described preset resistance value, then described host module produced described alarm signal.
10. security system as claimed in claim 9, it is characterized in that, detecting described terminal resistance when described host module is open-circuit condition or short-circuit condition, when described terminal electricity group is described open-circuit condition, then described host module sends the loop and destroys signal, detecting described terminal resistance when described host module is described short-circuit condition, and then described host module is reset the described loop out-of-service time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101391764A CN101877162B (en) | 2009-04-30 | 2009-04-30 | Security system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101391764A CN101877162B (en) | 2009-04-30 | 2009-04-30 | Security system |
Related Child Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110273136.6A Division CN102324175B (en) | 2009-04-30 | 2009-04-30 | Security system |
| CN201110273229.9A Division CN102324176B (en) | 2009-04-30 | 2009-04-30 | Security system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101877162A true CN101877162A (en) | 2010-11-03 |
| CN101877162B CN101877162B (en) | 2012-08-22 |
Family
ID=43019707
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009101391764A Expired - Fee Related CN101877162B (en) | 2009-04-30 | 2009-04-30 | Security system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101877162B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107003260A (en) * | 2014-10-21 | 2017-08-01 | 亩部建设株式会社 | Structure monitoring arrangement and structure monitoring method |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2256122Y (en) * | 1995-05-16 | 1997-06-11 | 杨旺生 | Three line safeguard alarm against thieves |
| CN2914211Y (en) * | 2006-04-07 | 2007-06-20 | 季钢焰 | Highway flexible guard-rail electronic caution device |
| JP2009048383A (en) * | 2007-08-18 | 2009-03-05 | Kiyoto Yui | Wire with built-in n resistors |
| CN201138504Y (en) * | 2008-01-02 | 2008-10-22 | 沈阳美宝控制有限公司 | Parallel line type temperature-sensing fire disaster detector with discrete temperature sensing switch serially connected with resistor |
| CN201191437Y (en) * | 2008-02-19 | 2009-02-04 | 陈名强 | Circuit anti-theft alarm device |
-
2009
- 2009-04-30 CN CN2009101391764A patent/CN101877162B/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107003260A (en) * | 2014-10-21 | 2017-08-01 | 亩部建设株式会社 | Structure monitoring arrangement and structure monitoring method |
| CN107003260B (en) * | 2014-10-21 | 2019-12-03 | 亩部建设株式会社 | Structure monitoring arrangement and structure monitor method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101877162B (en) | 2012-08-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100906304B1 (en) | Leakage current isolating control device of the surge voltage protecting circuit | |
| US20070241875A1 (en) | Alarm system sensor topology apparatus and method | |
| CN100379168C (en) | Apparatus and method for diagnosis of line shunting and grounding fault | |
| US20070002511A1 (en) | Meter-base surge protector | |
| CN110967617B (en) | High-voltage interlocking circuit and detection method thereof | |
| CN206515675U (en) | A kind of LED display intellectual monitoring management system | |
| CN103794034A (en) | Full-line electric power facility fault and intrusion alarm system | |
| WO2007121162A1 (en) | Alarm system sensor topology apparatus and method | |
| RU2472266C2 (en) | Safety device | |
| JP2003281639A (en) | Fire and abnormality discrimination method for sensor line and fire reporting system | |
| CN100401826C (en) | Fault detection method for transmission link | |
| CN101981777B (en) | Protection device | |
| CN106647351A (en) | Redundancy switching circuit | |
| CN101877162B (en) | Security system | |
| CN102324175B (en) | Security system | |
| US8289030B2 (en) | Reliable signaling of fault conditions in battery systems with series-connected cells | |
| CN102376148B (en) | From the keying circuit monitored and affiliated supervision method | |
| CN102324176B (en) | Security system | |
| CN107294758A (en) | A kind of method of Board Protection Switching, apparatus and system | |
| KR100959896B1 (en) | Security unit for a ground wire | |
| KR20210047657A (en) | Anti-theft and Monitoring System for Ground wire | |
| JP2013109627A (en) | Fire alarm facility and relay using the same | |
| CN101750527A (en) | Unbalanced current detection device | |
| CN208539573U (en) | A kind of phase-change switch that can prevent detection automatically | |
| JP2011010407A (en) | Surge protection circuit and method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120822 Termination date: 20210430 |