CN101859603B - Method and device for enhancing persistence of EEPROM - Google Patents

Method and device for enhancing persistence of EEPROM Download PDF

Info

Publication number
CN101859603B
CN101859603B CN200910106539A CN200910106539A CN101859603B CN 101859603 B CN101859603 B CN 101859603B CN 200910106539 A CN200910106539 A CN 200910106539A CN 200910106539 A CN200910106539 A CN 200910106539A CN 101859603 B CN101859603 B CN 101859603B
Authority
CN
China
Prior art keywords
eeprom
electric field
signal
controllable high
field intensity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN200910106539A
Other languages
Chinese (zh)
Other versions
CN101859603A (en
Inventor
邓锦辉
刘阳
胡小波
施爱群
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huimang Microelectronics Shenzhen Co ltd
Original Assignee
Fremont Micro Devices Shenzhen Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fremont Micro Devices Shenzhen Ltd filed Critical Fremont Micro Devices Shenzhen Ltd
Priority to CN200910106539A priority Critical patent/CN101859603B/en
Publication of CN101859603A publication Critical patent/CN101859603A/en
Application granted granted Critical
Publication of CN101859603B publication Critical patent/CN101859603B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The invention relates to a method and a device for enhancing persistence of EEPROM. The method comprises the step of: controlling the electric field strength of a gate oxide layer to be within the range from 10 to 15MV/cm by using a controllable high-voltage signal during the erasing or writing for an EEPROM with a floating gate tunnel oxide structure. The device comprises a clock generating drive circuit and a charge pump, wherein the clock generating drive circuit is used for generating a clock drive signal; the charge pump is used for generating a controllable high voltage signal according to the clock drive signal; and the controllable high voltage signal is used for controlling the electric field strength of the gate oxide layer to be within the range from 10 to 15MV/cm during the erasing or writing of the EEPROM with the floating gate tunnel oxide structure. By controlling the electric field strength on the gate oxide layer to be within a reasonable range, the device for enhancing the persistence of the EEPROM reduces the peak value so as to effectively enhance the persistence; and the writing and erasing time can also be shortened by using different controllable high voltage signal rising velocities.

Description

Strengthen the persistent method and apparatus of EEPROM
Technical field
The present invention relates to the memory circuitry design field, more particularly, relate to the persistent method and apparatus of a kind of enhancing EEPROM.
Background technology
Electrically Erasable Read Only Memory (EEPROM) adopts floating boom tunnel oxide (FLOTOX, floating gate tunneling oxide) structure usually, and is as shown in Figure 1.It is erasable that the FLOTOX structure adopts electron stream that F-N (Fowler-Nordheim) tunnel effect produces that floating boom is carried out data.Under the voltage difference effect, the barrier width attenuation between silicon and the oxide layer makes electronics see through barrier layer and between the conduction band of silicon conduction band and oxide layer, passes through, and realizes that electronics to floating boom injects and wipes.Electronics inject and the process of wiping respectively shown in Fig. 2 a and Fig. 2 b.Wherein, the electric field strength E relation on EEPROM persistence T and the gate oxide is shown in formula (1), and wherein β is the electric field intensity speedup factor:
T∝exp(-βE) (1)
Therefore, the electric field intensity on the gate oxide is controlled in the reasonable range, reduces its peak value, can strengthen the persistence of EEPROM.
Summary of the invention
The technical matters that the present invention will solve is; Persistence defect of insufficient to the EEPROM of prior art; Provide a kind of and can the electric field intensity on the gate oxide be controlled in the reasonable range, reduce its peak value, and then strengthen persistent method of EEPROM.
The technical solution adopted for the present invention to solve the technical problems is: construct a kind of persistent method that strengthens EEPROM; Comprise for the EEPROM that adopts floating boom tunnel oxide structure, during it is wiped or writes, adopt the controllable high-voltage signal that the electric field intensity of gate oxide is controlled between 10MV/cm~15MV/cm.
In persistent method of enhancing EEPROM of the present invention, said method is included between the erasing period of EEPROM, comes the electric field intensity of control gate oxide layer through the ascending velocity of regulating voltage on the control gate; During the writing of EEPROM, come the electric field intensity of control gate oxide layer through the ascending velocity of regulating drain voltage.
In persistent method of enhancing of the present invention EEPROM, when the electric field intensity of gate oxide during less than 10MV/cm, said controllable high-voltage signal rises with first speed; Otherwise said controllable high-voltage signal rises with second speed and the electric field intensity of gate oxide is controlled between 10MV/cm~15MV/cm, and wherein said second speed is lower than first speed.
In persistent method of enhancing EEPROM of the present invention, said controllable high-voltage signal is produced by charge pump.
In persistent method of enhancing of the present invention EEPROM, the load through regulating said charge pump or the incoming frequency of charge pump are regulated said controllable high-voltage signal.
Another method that the present invention solves its technical matters employing is that persistent device of a kind of EEPROM of enhancing of structure comprises:
The clock generating driving circuit is used to generate the clock drive signal;
Charge pump is used for producing the controllable high-voltage signal according to said clock drive signal; Wherein
Said controllable high-voltage signal is used for during the wiping or write of the EEPROM that adopts floating boom tunnel oxide structure the electric field intensity of its gate oxide is controlled between 10MV/cm~15MV/cm.
In persistent device of enhancing of the present invention EEPROM, further comprise Signal Conditioning Equipment, when the electric field intensity of gate oxide during less than 10MV/cm, said Signal Conditioning Equipment is regulated said controllable high-voltage signal and is risen with first speed; Otherwise said Signal Conditioning Equipment is regulated that said controllable high-voltage signal rises with second speed and the electric field intensity of gate oxide is controlled between 10MV/cm~15MV/cm, and wherein said second speed is lower than first speed.
In persistent device of enhancing EEPROM of the present invention, said Signal Conditioning Equipment is the load that is connected with charge pump.
In persistent device of enhancing EEPROM of the present invention, said load is adjustable resistance or controllable current trap.
In persistent device of enhancing EEPROM of the present invention, said Signal Conditioning Equipment comprises: voltage offset electric circuit is used to provide the different voltages with different offset signal; Timer is used to produce timing signal; MUX is used for selecting the different voltages with different offset signal to offer the clock generating driving circuit according to said timing signal;
Said clock generating driving circuit produces different clock drive signals offering charge pump according to said voltage bias signal, thereby controls the ascending velocity of said controllable high-voltage signal.
The device of persistent method of the enhancing EEPROM of embodiment of the present invention; Through the electric field intensity on the gate oxide being controlled in the reasonable range; Reduce its peak value; Thereby strengthened its persistence effectively, and, can also shorten write and erase time through adopting different controllable high-voltage signal ascending velocity.
Description of drawings
To combine accompanying drawing and embodiment that the present invention is described further below, in the accompanying drawing:
Fig. 1 is the structural representation of EEPROM storage tube;
Fig. 2 carries out erase operation (threshold voltage increase) to EEPROM;
Fig. 3 carries out write operation (threshold voltage reduction) to EEPROM;
Fig. 4 is the process flow diagram of first embodiment of persistent method of enhancing of the present invention EEPROM;
Fig. 5 is the theory diagram of first embodiment of persistent device of enhancing of the present invention EEPROM;
Fig. 6 is the theory diagram of second embodiment of persistent device of enhancing of the present invention EEPROM;
Fig. 7 is the theory diagram of the 3rd embodiment of persistent device of enhancing of the present invention EEPROM;
Fig. 8 is the controllable high-voltage signal ascending velocity synoptic diagram according to persistent device of enhancing EEPROM of the present invention;
Fig. 9 is the electric field intensity variation synoptic diagram according to the tunnel oxidation layer of persistent device of enhancing EEPROM of the present invention;
Figure 10 is the equivalent capacity model of EEPROM storage tube.
Embodiment
Key of the present invention is for the EEPROM that adopts floating boom tunnel oxide structure, during it is wiped or writes, adopts the controllable high-voltage signal that the electric field intensity of gate oxide is controlled between 10MV/cm~15MV/cm.For this high pressure controllable signal, the speed of its rising, concrete size can be confirmed according to actual conditions.
In one embodiment of the invention, when the electric field intensity of gate oxide during less than 10MV/cm, said controllable high-voltage signal rises with first speed; When the electric field intensity of said gate oxide equals 10MV/cm; Said controllable high-voltage signal rises with second speed and the electric field intensity of gate oxide is controlled between 10MV/cm~15MV/cm; Wherein said second speed is lower than first speed in one embodiment of the invention, can be that the every just electric field intensity of gate oxide the sampling at a distance from the time of setting judged once.
In another embodiment of the present invention; Also can be directly equaling 10MV/cm with the electric field intensity of gate oxide is separation; Before the electric field intensity of gate oxide equals 10MV/cm; Control controllable high-voltage signal rises with first speed, and when the electric field intensity of gate oxide was equal to and greater than 10MV/cm, control controllable high-voltage signal rose with second speed.Those skilled in the art can set said first speed and second speed according to actual conditions voluntarily, as long as make said first speed greater than said second speed.
In a preferred embodiment of the invention, for the shortening time, first speed can be provided with ground, and The faster the better; Second speed then can be according to the parameter of the electronic devices and components that adopt, and electric field intensity is provided with in real time.In the follow-up embodiment of the present invention, show the formula that is provided with of this second speed.
In other embodiments of the invention, also can comprise other combination and variation, as long as this controllable high-voltage signal is controlled at the electric field intensity of gate oxide between 10MV/cm~15MV/cm.For example, when the electric field intensity of oxide layer during less than 10MV/cm, control controllable high-voltage signal rises with first speed; When the electric field intensity of oxide layer when 10MV/cm is between 12MV/cm, control controllable high-voltage signal rises with second speed; When the electric field intensity of oxide layer was equal to and greater than 12MV/cm, control controllable high-voltage signal rose with third speed, wherein first speed>second speed>third speed.
In another embodiment of the present invention; When the electric field intensity of oxide layer during less than 9MV/cm; Control controllable high-voltage signal rises with third speed, when the electric field intensity of oxide layer when 9MV/cm is between 10MV/cm, control controllable high-voltage signal rises with first speed; When the electric field intensity of gate oxide was equal to and greater than 10MV/cm, control controllable high-voltage signal rose with second speed.Third speed>first speed>second speed wherein.
In other embodiments of the invention, can also adopt the form of other velocity composition.Under instruction of the present invention, it will be appreciated by those skilled in the art that also and can adopt such array configuration.
Fig. 4 is the process flow diagram of first embodiment of persistent method of enhancing of the present invention EEPROM.As shown in Figure 4, this method flow starts from step S1, at step S2; Whether the electric field intensity of judging said gate oxide less than 10MV/cm, if execution in step S3 then controls said controllable high-voltage signal with the first speed rise time t1; And return step S2, judge once more.If the electric field intensity of in step S2, judging said gate oxide, controls that said controllable high-voltage signal rises with second speed more than or equal to 10MV/cm and the electric field intensity of gate oxide is controlled between 10MV/cm~15MV/cm.In specific embodiment of the present invention, said time t1 and said first speed and second speed can be set as required.In a preferred embodiment of the invention, said t1, said first speed, second speed is all adjustable, and said first speed is greater than said second speed.
Fig. 5 is the theory diagram of first embodiment of persistent device of enhancing of the present invention EEPROM.As shown in Figure 5, this device comprises clock generating driving circuit 501, is used to generate the clock drive signal.Charge pump 502 is used for producing the controllable high-voltage signal according to said clock drive signal; Wherein said controllable high-voltage signal is used for during the wiping or write of the EEPROM that adopts floating boom tunnel oxide structure the electric field intensity of its gate oxide is controlled between 10MV/cm~15MV/cm.
Fig. 6 is the theory diagram of second embodiment of persistent device of enhancing of the present invention EEPROM.As shown in Figure 6, this device comprises: clock generating driving circuit 601 is used to generate the clock drive signal.Charge pump 602 is used for producing the controllable high-voltage signal according to said clock drive signal; And Signal Conditioning Equipment 603, when the electric field intensity of gate oxide during less than 10MV/cm, said Signal Conditioning Equipment is regulated said controllable high-voltage signal and is risen with first speed; Otherwise said Signal Conditioning Equipment regulates that said controllable high-voltage signal rises with second speed and the electric field intensity of gate oxide is controlled between 10MV/cm~15MV/cm, and wherein said second speed is lower than first speed.
Fig. 7 is the theory diagram of the 3rd embodiment of persistent device of enhancing of the present invention EEPROM.As shown in Figure 7, in this embodiment, this device comprises: clock generating driving circuit 701 is used to generate the clock drive signal.Charge pump 702 is used for producing the controllable high-voltage signal according to said clock drive signal; And Signal Conditioning Equipment; Wherein said Signal Conditioning Equipment comprises: voltage offset electric circuit 705 is used to provide the different voltages with different offset signal; Timer 707 is used to produce timing signal; MUX 706 is used for selecting the different voltages with different offset signal to offer clock generating driving circuit 701 according to said timing signal; Thereby said clock generating driving circuit 701 produces different clock drive signals according to said voltage bias signal and controls the ascending velocity of said controllable high-voltage signal to offer charge pump 702.Its principle is following,
For a certain fixing charge pump 702,, can regulate the ascending velocity of the controllable high-voltage signal of charge pump 702 outputs keeping changing the voltage swing of clock drive signal under the constant situation of its clock driving signal frequency.Voltage offset electric circuit 705 provides a plurality of bias voltages, and is input to MUX 706.MUX 706 selects different bias voltage to send clock generating driving circuit 701 in the different time section under the control of timer 707.Clock generating driving circuit 701 is under different bias voltage control, and the clock drive signal that provides different voltage swings is to drive charge pump 702.Finally, reach the purpose of control charge pump 702 in different time sections output level ascending velocity.
The ascending velocity of charge pump output level can be divided into a plurality of stages as required.Usually can select pattern as shown in Figure 8: it is before tunneling effect does not produce that the electric field intensity between floating boom and drain electrode does not reach 10MV/cm; The biasing of selection higher voltage; Make the controllable high-voltage voltage of signals amplitude of oscillation of clock generating driving circuit output bigger; The output Vpp that drives charge pump rises with fast speeds, to save the erasable time.Surpassing 10MV/cm in electric field intensity is after tunnelling current produces; Select lower voltage bias; Make the voltage clock signal amplitude of oscillation of clock generating driving circuit output less; The output Vpp that drives charge pump rises with speed slowly, with control electric field intensity between 10MV/cm~15MV/cm, thereby strengthen the persistence of EEPROM storage tube.In this embodiment, the electric field intensity of tunnel oxidation layer changes as shown in Figure 9.
In another preferred embodiment of the present invention, can for example come said controllable high-voltage signal is controlled through directly charge pump being regulated the controllable high-voltage signal of controlling its output through the load size or the incoming frequency of regulating said charge pump.In this embodiment, said Signal Conditioning Equipment is the load that is connected with charge pump.Said load is adjustable resistance or controllable current trap.
Figure 10 is the equivalent capacity model of EEPROM storage tube.Regulate the ascending velocity of the output Vpp of charge pump, can control the electric field intensity of the gate oxide of EEPROM storage tube, thereby strengthen its persistence.The relation of the output Vpp of the electric field intensity of gate oxide and charge pump can be derived out by the equivalent capacity model of EEPROM storage tube.In Figure 10, G is a control gate, and B is the ground connection substrate, and Cpp is the electric capacity between the two-layer polysilicon, and Cd and the equivalence of Ct sum are the electric capacity between floating boom and the drain region.Wherein, Ct is the electric capacity of reflection tunnel oxidation layer segment, and Cs is the electric capacity between floating boom and the source region, and Cg is the electric capacity between floating boom and the substrate channel.When carrying out erase operation, control gate meets Vpp, drain electrode and source electrode connecting to neutral current potential.Therefore, floating boom voltage mainly is to be determined by the capacitive coupling effect between control-grid voltage and control gate and the floating boom.When on the floating boom during no electric charge, the voltage that floating boom voltage promptly is applied on the tunnel oxidation layer is:
V FG = C pp C pp + C d + C s + C t + C g × Vpp
= C pp C T × Vpp - - - ( 2 )
Wherein, total capacitance C T=C Pp+ C d+ C s+ C t+ C gWhen charge Q (t) accumulated on floating boom, floating boom voltage became:
V FG = C pp C T × ( Vpp - Q C pp )
= C pp C T Vpp - Q C T - - - ( 3 )
If the electric field intensity between floating boom and the drain electrode is E=V FG/ X 0, X wherein 0Be the thickness of tunnel oxidation layer, the electric field intensity that can obtain between floating boom and the drain electrode is:
E = C pp C T X 0 Vpp ( t ) - Q ( t ) C T X 0 - - - ( 4 )
Wherein, Q (t)=It=Jst, the relation of F-N current density and electric field intensity is: J=AE 2(B/E), s is the tunnel oxidation layer area to exp.Suppose that electric field intensity does not change in time, can obtain formula (4) to the time differentiate relation of Vpp ascending velocity and electric field intensity:
dVpp ( t ) dt = AE 2 exp ( - B / E ) · s · 1 C pp - - - ( 5 )
Visible by following formula, as to regulate Vpp ascending velocity can be controlled the electric field intensity of the gate oxide of EEPROM storage tube.For write operation, in like manner can obtain above-mentioned conclusion.
When those skilled in the art knew that electric field intensity when oxide layer is less than 10MV/cm, the output Vpp of may command charge pump rose with fast as far as possible speed, and then saves time.When the electric field intensity of oxide layer during greater than 10MV/cm, the output Vpp of may command charge pump rises according to formula (5).
Therefore; The device of persistent method of the enhancing EEPROM of embodiment of the present invention; Through the electric field intensity on the gate oxide is controlled in the reasonable range, reduce its peak value, thereby strengthened its persistence effectively; And, write and erase time can also be shortened through adopting different controllable high-voltage signal ascending velocity.
Though the present invention describes through specific embodiment, it will be appreciated by those skilled in the art that, without departing from the present invention, can also carry out various conversion and be equal to alternative the present invention.Therefore, the present invention is not limited to disclosed specific embodiment, and should comprise the whole embodiments that fall in the claim scope of the present invention.

Claims (7)

1. persistent method that strengthens EEPROM; It is characterized in that; Comprise for the EEPROM that adopts floating boom tunnel oxide structure, during it is wiped or writes, adopt the controllable high-voltage signal that the electric field intensity of gate oxide is controlled between 10MV/cm~15MV/cm;
Said method further comprises: between the erasing period of EEPROM, come the electric field intensity of control gate oxide layer through the ascending velocity of regulating voltage on the control gate; During the writing of EEPROM, come the electric field intensity of control gate oxide layer through the ascending velocity of regulating drain voltage;
Wherein, when the electric field intensity of gate oxide during less than 10MV/cm, said controllable high-voltage signal rises with first speed; Otherwise said controllable high-voltage signal rises with second speed and the electric field intensity of gate oxide is controlled between 10MV/cm~15MV/cm, and wherein said second speed is lower than first speed.
2. persistent method of enhancing EEPROM according to claim 1 is characterized in that said controllable high-voltage signal is produced by charge pump.
3. persistent method of enhancing according to claim 2 EEPROM is characterized in that, the load through regulating said charge pump or the incoming frequency of charge pump are regulated said controllable high-voltage signal.
4. a persistent device that strengthens EEPROM is characterized in that, comprising:
The clock generating driving circuit is used to generate the clock drive signal;
Charge pump is used for producing the controllable high-voltage signal according to said clock drive signal; Wherein
Said controllable high-voltage signal is used for during the wiping or write of the EEPROM that adopts floating boom tunnel oxide structure the electric field intensity of its gate oxide is controlled between 10MV/cm~15MV/cm;
Persistent device of said enhancing EEPROM further comprises Signal Conditioning Equipment, and when the electric field intensity of gate oxide during less than 10MV/cm, said Signal Conditioning Equipment is regulated said controllable high-voltage signal and risen with first speed; Otherwise said Signal Conditioning Equipment regulates that said controllable high-voltage signal rises with second speed and the electric field intensity of gate oxide is controlled between 10MV/cm~15MV/cm, and wherein said second speed is lower than first speed.
5. persistent device of enhancing EEPROM according to claim 4 is characterized in that said Signal Conditioning Equipment is the load that is connected with charge pump.
6. persistent device of enhancing EEPROM according to claim 5 is characterized in that said load is adjustable resistance or controllable current trap.
7. persistent device of enhancing EEPROM according to claim 4, it is characterized in that said Signal Conditioning Equipment comprises: voltage offset electric circuit is used to provide the different voltages with different offset signal; Timer is used to produce timing signal; MUX is used for selecting the different voltages with different offset signal to offer the clock generating driving circuit according to said timing signal;
Said clock generating driving circuit produces different clock drive signals offering charge pump according to said voltage bias signal, thereby controls the ascending velocity of said controllable high-voltage signal.
CN200910106539A 2009-04-07 2009-04-07 Method and device for enhancing persistence of EEPROM Active CN101859603B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200910106539A CN101859603B (en) 2009-04-07 2009-04-07 Method and device for enhancing persistence of EEPROM

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200910106539A CN101859603B (en) 2009-04-07 2009-04-07 Method and device for enhancing persistence of EEPROM

Publications (2)

Publication Number Publication Date
CN101859603A CN101859603A (en) 2010-10-13
CN101859603B true CN101859603B (en) 2012-10-24

Family

ID=42945436

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200910106539A Active CN101859603B (en) 2009-04-07 2009-04-07 Method and device for enhancing persistence of EEPROM

Country Status (1)

Country Link
CN (1) CN101859603B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112017720A (en) * 2020-07-09 2020-12-01 广东美的白色家电技术创新中心有限公司 MOS (Metal oxide semiconductor) tube, storage unit, memory and electronic equipment

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1193819A (en) * 1997-03-18 1998-09-23 日本电气株式会社 Erasing method in nonvolatile semiconductor memory device
CN1351380A (en) * 2001-12-06 2002-05-29 彭泽忠 Programmable non-volatile memory using ultra-thin medium breakdown phenomenon
CN1381883A (en) * 2001-04-13 2002-11-27 华邦电子股份有限公司 EEPROM unit and its preparing process
CN101174654A (en) * 2006-11-01 2008-05-07 旺宏电子股份有限公司 Cylindrical channel charge trapping devices with effectively high coupling ratios
CN101188196A (en) * 2006-11-17 2008-05-28 上海华虹Nec电子有限公司 A making method of EEPROM for increasing coupling voltage of float grating
CN101207153A (en) * 2006-12-20 2008-06-25 三星电子株式会社 Nonvolatile memory device and method of operating the same
CN101364602A (en) * 2007-08-09 2009-02-11 旺宏电子股份有限公司 Blocking dielectric engineered charge trapping memory cell with high speed erase

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1193819A (en) * 1997-03-18 1998-09-23 日本电气株式会社 Erasing method in nonvolatile semiconductor memory device
CN1381883A (en) * 2001-04-13 2002-11-27 华邦电子股份有限公司 EEPROM unit and its preparing process
CN1351380A (en) * 2001-12-06 2002-05-29 彭泽忠 Programmable non-volatile memory using ultra-thin medium breakdown phenomenon
CN101174654A (en) * 2006-11-01 2008-05-07 旺宏电子股份有限公司 Cylindrical channel charge trapping devices with effectively high coupling ratios
CN101188196A (en) * 2006-11-17 2008-05-28 上海华虹Nec电子有限公司 A making method of EEPROM for increasing coupling voltage of float grating
CN101207153A (en) * 2006-12-20 2008-06-25 三星电子株式会社 Nonvolatile memory device and method of operating the same
CN101364602A (en) * 2007-08-09 2009-02-11 旺宏电子股份有限公司 Blocking dielectric engineered charge trapping memory cell with high speed erase

Also Published As

Publication number Publication date
CN101859603A (en) 2010-10-13

Similar Documents

Publication Publication Date Title
CN100468567C (en) Floating gate analog voltage level shift circuit and method for producing a voltage reference that operates on a low supply voltage
KR101348847B1 (en) Nonvolatile semiconductor memory device
CN101847437B (en) Operation method of semiconductor memory device
US5598368A (en) Batch erasable nonvolatile memory device and erasing method
KR100311109B1 (en) Erasing method in nonvolatile semiconductor memory device
JP2008243347A (en) Flash memory device and erase method thereof
US5703807A (en) EEPROM with enhanced reliability by selectable VPP for write and erase
CN1754228B (en) Differential dual floating gate circuit and method for programming
CN101859603B (en) Method and device for enhancing persistence of EEPROM
CN106251821A (en) Gate driver circuit
CN100595923C (en) Control method of integrated semiconductor non-volatile memory device
CN103390427A (en) Semiconductor memory device and method of driving semiconductor memory device
TWI470635B (en) Nonvolatile memory device and method of programming a nonvolatile memory cell
CN101937642B (en) Method for outputting driving current and circuit device
US9627074B2 (en) Method for determining an optimal voltage pulse for programming a flash memory cell
CN101501839A (en) Method for driving semiconductor device, and semiconductor device
CN101477835A (en) Erasing method for memory
CN100437820C (en) Data erasing method, and memory apparatus having data erasing circuit using such method
CN203520831U (en) Drive circuit, and shift register and pixel unit comprising same, and display device
CN100407576C (en) Analog floating gate voltage sense during dual conduction programming
US6621737B2 (en) Circuit and associated method for the erasure or programming of a memory cell
CN101447228B (en) Method for performing operations on a memory cell
CN100468778C (en) Method and apparatus for dual conduction analog programming
CN102479546A (en) Circuit used for programming resistance memory
JP3945652B2 (en) Nonvolatile memory device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP03 Change of name, title or address

Address after: 518057, room 10, building 5-8, Changhong science and technology building, twelve South tech Road, Nanshan District Science Park, Shenzhen, Guangdong

Patentee after: Huimang Microelectronics (Shenzhen) Co.,Ltd.

Address before: 518057 Guangdong city of Shenzhen province science and Technology Park of Nanshan District high SSMEC building 4 floor

Patentee before: FREMONT MICRO DEVICES (SZ) Ltd.

CP03 Change of name, title or address