CN101820254B

CN101820254B - D-class power amplifier with novel PWM (Pulse-Width Modulation) circuit

Info

Publication number: CN101820254B
Application number: CN2010101552330A
Authority: CN
Inventors: 李文昌; 于廷江; 黄国辉; 向本才
Original assignee: Chengdu Chengdian Guihai Science & Technology Co Ltd
Current assignee: Chengdu cloud Network Technology Co., Ltd.
Priority date: 2010-04-22
Filing date: 2010-04-22
Publication date: 2012-02-15
Anticipated expiration: 2030-04-22
Also published as: CN101820254A

Abstract

The invention provides a D-class power amplifier with a novel PWM (Pulse-Width Modulation) circuit, which relates to electron technology. The D-class power amplifier with the novel PWM circuit comprises an integrator, a PWM circuit and an output stage, wherein the input end of the integrator is connected with a system input end, the output end of the integrator is connected with the control end of the PWM circuit, the input end of the PWM circuit is connected with a clock signal, and the output end of the PWM circuit is fed back to the input end of the integrator through the output stage. The invention has simple structure, is suitable for large-scale digital integration, does not need an internal oscillator to generate saw-tooth waves or triangular waves and has strong disturbance resistance capacity.

Description

The D power-like amplifier that has pwm circuit

Technical field

The present invention relates to electronic technology.

Background technology

The D power-like amplifier is also claimed PWM (pulse width modulation) amplifier, can be used for amplifying audio signal.The D power-like amplifier comprises integrator and comparator usually, and the sawtooth waveforms of the output of integrator and oscillator output or triangular wave are relatively exported the PWM ripple.Traditional D power-like amplifier is owing to contain comparator and the oscillator of output sawtooth waveforms or triangular wave, complicated circuit and receive noise jamming serious.When the output signal slope of integrator changed, the output of PWM ripple may be exported two pulses at one-period, produced the modulation mistake.

Summary of the invention

Technical problem to be solved by this invention is, a kind of new D class A amplifier A is provided, and has stronger anti-interference.

The technical scheme that the present invention solve the technical problem employing is; The D power-like amplifier that has pwm circuit; Comprise integrator, pwm circuit and output stage, the input welding system input of integrator, the control end of output termination pwm circuit; The input termination clock signal of pwm circuit; The output of pwm circuit feeds back to the input of integrator through output stage, and said pwm circuit is made up of metal-oxide-semiconductor, and PMOS pipe, the 2nd PMOS pipe and NMOS pipe, the 2nd NMOS pipe are series between power supply and the ground successively; The grid tie point of the one PMOS pipe and the 2nd NMOS pipe is the voltage controling end of pwm circuit, and the grid tie point of the 2nd PMOS pipe and NMOS pipe is the input of pwm circuit; The tie point of the 2nd PMOS pipe and NMOS pipe connects the 3rd PMOS pipe of series connection and the control end of the 3rd NMOS pipe, and the tie point of the 3rd PMOS pipe and the 3rd NMOS pipe is the output of pwm circuit.

The invention has the beneficial effects as follows that simple in structure, it is integrated to be fit to large scale digital, do not need internal oscillator to produce sawtooth waveforms or triangular wave, antijamming capability is strong.

Below in conjunction with accompanying drawing and embodiment the present invention is further described.

Description of drawings

Fig. 1 is the circuit diagram of prior art.

Fig. 2 is a circuit diagram of the present invention.

Fig. 3 is pwm circuit figure of the present invention.

Embodiment

Prior art such as Fig. 1, circuit is made up of integrator, comparator 2 and output stage 3.Integrator is made up of amplifier 1 and electric capacity 8.Electric capacity 8 connects the output and the reverse input end of amplifier 1.The reverse input end of amplifier 1 is exactly the input of integrator, and output is exactly the output of integrator.Integrator is received the input INPUT of system through a resistance 16.The reverse input end of comparator 2 is directly received the output of amplifier 1, the output of positive input connection oscillator 17.The input of output stage 3 connects the output of comparator 2, and output is the output OUTPUT of system.The output of system is connected to filter 4, and filter output is connected to load 5.Load 5 is generally loud speaker.The output OUTPUT of resistance 9 connected systems and the reverse input end of amplifier 1.

The voltage of the duty ratio of OUTPUT output signal and the reverse input end of comparator 2 is proportional.As voltage V of system input INPUT input _In, output signal that duty ratio is stable of system's output.The voltage of the reverse input end of this hint comparator 2 is stable, and the input current of integrator is zero, promptly

\frac{V_{in}}{R_{in}} + \frac{V_{out}}{R_{f}} = 0

System's output can be expressed as

V_{out} = - \frac{R_{f}}{R_{in}} V_{in}

V wherein _OutBe the equivalent output voltage of system, V _InBe the output voltage of system, R _fBe the resistance value of feedback resistance 9, R _InResistance value for input resistance 16.

Structure of the present invention such as Fig. 2, circuit is made up of amplifier 1, pwm circuit 6 and output stage 3.The input INPUT of the system that is input as of amplifier 1, output meets the control end CTR of pwm circuit 6.The input of output stage 3 connects the output of pwm circuit 6, and output is the output OUTPUT of system.The output of system is connected to filter 4, and filter output is connected to load 5.Load 5 is generally loud speaker.A feedback branch is arranged between output OUTPUT of system and the integrator.For example, the reverse input end of the output OUTPUT of resistance 9 connected systems and amplifier 1.Amplifier circuit inserts an input resistance 16 between the reverse input end of amplifier 1 and system's input.Amplifier circuit inserts an electric capacity 8 between the reverse input end of amplifier 1 and output, amplifier 1 constitutes integrators with electric capacity 8.The reverse input end that is input as amplifier 1 of integrator, output are the output of amplifier 1, the external square-wave signal of the input of pwm circuit 6 (CLK).

Fig. 3 is a kind of concrete realization of pwm circuit.Pwm circuit 6 is made up of voltage control edge delay circuit 69 and reverser.The one PMOS pipe the 61, the 2nd PMOS pipe the 62 and the one NMOS pipe the 63, the 2nd NMOS pipe 64 constitutes voltage control edge delay circuit 69.The one PMOS pipe the 61, the 2nd PMOS pipe the 62 and the one NMOS pipe the 63, the 2nd NMOS pipe 64 is series between power supply and the ground successively.The grid of the one PMOS pipe the 61 and the 2nd NMOS pipe 64 meets voltage controling end CTR, and the grid of the 2nd PMOS pipe the 62 and the one NMOS pipe 63 meets input IN.The tie point of the 2nd PMOS pipe the 62 and the one NMOS pipe 63 is the output of voltage control edge delay circuit 69.The output of voltage control edge delay circuit 69 connects the input of inverter, and inverter is output as the output of pwm circuit 6.Pwm circuit 6 can have one or more circuits cascadings shown in Figure 3.

Pwm circuit 6 input duty cycles are 0.5 square wave, and CTR raises when control voltage, and the resistance of PMOS pipe 61 increases, and the resistance of NMOS pipe 64 reduces, and the output rate of climb of voltage control edge delay circuit 69 is slack-off, and decrease speed increases.Increase through the duty cycle square wave behind the inverter.When the reduction of control voltage, the duty ratio of output square wave reduces.

As voltage V of system input INPUT input _In, output signal that duty ratio is stable of system's output.The voltage of the output of integrator is stable at this moment, and the input current of integrator is zero, promptly

\frac{V_{in}}{R_{in}} + \frac{V_{out}}{R_{f}} = 0

System's output can be expressed as

V_{out} = - \frac{R_{f}}{R_{in}} V_{in}

Claims

1. the D power-like amplifier that has pwm circuit; It is characterized in that; Comprise integrator, pwm circuit (6) and output stage (3), the input welding system input of integrator, the control end of output termination pwm circuit (6); The input termination clock signal of pwm circuit (6); The output of pwm circuit (6) feeds back to the input of integrator through output stage, and said pwm circuit is made up of metal-oxide-semiconductor (61～66), and PMOS pipe (61), the 2nd PMOS pipe (62) and NMOS pipe (63), the 2nd NMOS manage (64) and be series at successively between power supply and the ground; The grid tie point of the one PMOS pipe (61) and the 2nd NMOS pipe (64) is the voltage controling end of pwm circuit, and the grid tie point of the 2nd PMOS pipe (62) and NMOS pipe (63) is the input of pwm circuit; The tie point of the 2nd PMOS pipe (62) and NMOS pipe (63) connects the 3rd PMOS pipe (65) of series connection and the control end of the 3rd NMOS pipe (66), and the tie point of the 3rd PMOS pipe (65) and the 3rd NMOS pipe (66) is the output of pwm circuit.