CN101819995B - GaN-based MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and preparation method thereof - Google Patents
GaN-based MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and preparation method thereof Download PDFInfo
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- CN101819995B CN101819995B CN2010101477217A CN201010147721A CN101819995B CN 101819995 B CN101819995 B CN 101819995B CN 2010101477217 A CN2010101477217 A CN 2010101477217A CN 201010147721 A CN201010147721 A CN 201010147721A CN 101819995 B CN101819995 B CN 101819995B
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Abstract
The invention relates to a GaN-based MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and a preparation method thereof. The GaN-based MOSFET can effectively regulate the energy band compensation between a (La2O3)x(SiO2)1-x thin film and a GaN substrate and reduce the leakage current. The GaN-based MOSFET is provided with a (La2O3)x(SiO2)1-x gate dielectric layer on the GaN substrate and an SiO2 buffering layer with the thickness of 0.5-2 nm between the GaN substrate and the (La2O3)x(SiO2)1-x gate dielectric layer. The preparation method of the GaN-based MOSFET comprises the following steps of: depositing the SiO2 buffering layer on the GaN substrate, and then depositing the (La2O3)x(SiO2)1-x gate dielectric layer. The invention can effectively reduce the leakage current in a system and is applied to a gate dielectric material for preparing an information-storage and metal-oxide-semiconductor field effect transistor.
Description
Technical field
The present invention relates to a kind of GaN base MOSFET and preparation method thereof, belong to the microelectronic material field.
Background technology
In decades, development of integrated circuits has been followed the Moore's Law of doctor's GordonE.Moore prophesy in 1964 of one of founder of Intel Company substantially: on the single chip of integrated circuit integrated parts number, it is the integrated level of integrated circuit, doubled in per 12 to 18 months, characteristic size is dwindled
Doubly.Along with the characteristic size of device is more and more littler, traditional SiO
2The thickness of gate dielectric layer is also more and more thinner along with constantly dwindling of grid live width, because the tunnelling current that quantum tunneling effect causes increases sharply, the result causes SiO
2Layer can not play the effect of dielectric, and the leakage current of device has reached unaffordable stage.Adopt high-k (high-k) material guaranteeing that raceway groove is had under the condition of identical control ability, the physical thickness of gate dielectric layer increases, so the direct Tunneling electric current between grid layer and raceway groove will reduce greatly.
The GaN material has that band gap is wide, luminous efficiency is high, electron drift saturated velocity height, thermal conductivity height, hardness is big, dielectric constant is little, the stable characteristics such as radioresistance, high temperature resistance that reach of chemical property, become the most preferably material of short-wavelength light electronic device and high frequency, high pressure, the preparation of high temperature microelectronic component, be described as third generation semi-conducting material.In recent years, because operating reliability at high temperature and lower leakage current characteristic, GaN base MOSFET has also obtained to pay close attention to widely and study.And (La
2O
3)
x(SiO
2)
1-xMaterial is considered to substitute the high-k material of future generation of Hf base high-k material owing to have higher dielectric constant.Therefore, at GaN Grown (La
2O
3)
x(SiO
2)
1-xThe film gate dielectric material is significant on High temperature MOSFET is used.
Yet, because the bigger energy gap (E of GaN
g=3.42eV), (La
2O
3)
x(SiO
2)
1-xThe medium energy gap of high-k material (~5.7eV), will cause (La
2O
3)
x(SiO
2)
1-xBarrier height between film and GaN interface is on the low side, causes the increase of leakage current.So from being with the angle of skew, an only gate dielectric material at first will have big dielectric constant and big band gap, with respect to the channel semiconductor material symmetrical valence band and conduction band offset is arranged simultaneously, thereby reduces leakage current.
Summary of the invention
The invention provides a kind of GaN base MOSFET, can effectively regulate (La
2O
3)
x(SiO
2)
1-xCan be with compensation between film and the GaN substrate, reduce leakage current.
The present invention also provides the preparation method of above-mentioned GaN base MOSFET.
Described GaN base MOSFET is provided with (La at the GaN substrate
2O
3)
x(SiO
2)
1-xGate dielectric layer, GaN substrate and (La
2O
3)
x(SiO
2)
1-xBe provided with the SiO that thickness is 0.5-2nm between the gate dielectric layer
2Cushion.
Described (La
2O
3)
x(SiO
2)
1-xGate dielectric layer and GaN substrate are known features, as preferred version, and described (La
2O
3)
x(SiO
2)
1-xGate dielectric layer thickness is 10-100nm, 0.4<x<0.6; The thickness of GaN substrate is 10-50 μ m.
The preparation method of described GaN base MOSFET comprises the steps:
A) after being cleaned, dry up, the GaN substrate puts into reaction chamber in order to deposit film;
B) with SiO
2Ceramic target and (La
2O
3)
x(SiO
2)
1-xCeramic target is separately fixed at the rotatable of deposition film making system of pulse laser, has on the target platform of many target position, and the GaN substrate is fixed on the substrate table, and they are placed in the growth room of deposition film making system of pulse laser;
C) growth room is evacuated down to 8.0 * 10
-5Below the Pa, heated substrate temperature to 400 ℃;
D) start the KrF excimer laser, make laser beam pass through condenser lens, successively focus on SiO
2Ceramic target and (La
2O
3)
x(SiO
2)
1-xOn the ceramic target, at substrate deposition one deck SiO
2Cushion, the bobbing target platform deposits (La then
2O
3)
x(SiO
2)
1-xGate dielectric layer.
As preferred version, steps d) in, the single pulse energy 50-700mJ of KrF excimer laser, energy density is 0.1-10J/cm
2, deposition SiO
2Buffer layer thickness is 0.5-2nm, only by bobbing target platform 5, makes laser beam focus on (La
2O
3)
x(SiO
2)
1-xCeramic target, other conditions are constant lower, (the La of deposition 10-100nm
2O
3)
x(SiO
2)
1-xFilm.
The preparation method of GaN substrate and (La
2O
3)
x(SiO
2)
1-xThe method for cooking of ceramic target is prior art, is specially respectively: the method that adopts the hydrogen phase epitaxy at the GaN film of 2-4 inch Sapphire Substrate growth 10-50 μ m as substrate; With La
2O
3And SiO
2Powder, it is abundant in ball mill that being cold-pressed into diameter under 12-15MPa pressure is 20-25mm after ball milling 24-36 hour, thickness is the disk of 3-5mm, fires under 1400-1600 ℃ 6-8 hour again, obtains (La
2O
3)
x(SiO
2)
1-xCeramic target.La
2O
3And SiO
2Mol ratio and (La
2O
3)
x(SiO
2)
1-xThe ratio of chemical structural formula is identical in the ceramic target, i.e. La
2O
3And SiO
2Mol ratio be x:(1-x), 0.4<x<0.6.
The present invention is at (La
2O
3)
x(SiO
2)
1-xIntroduce one deck SiO as thin as a wafer between film and the GaN substrate
2Cushion forms (La
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN structure can effectively reduce the leakage current of system, and is applied in the grid dielectric material of the storage of preparation information and Metal-oxide-semicondutor FET.
Described (La
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN structure has following beneficial effect:
A) energy gap (E of GaN
g GaN) be 3.42eV, the energy gap of high-k material can be by determining with its distance of energy loss peak original position.Fig. 3 (a) can obtain (La
2O
3)
x(SiO
2)
1-xEnergy gap be 5.70eV, SiO
2The energy gap at cushion interface is 6.94eV.
B) by introducing one deck ultra-thin Si O
2, (La
2O
3)
x(SiO
2)
1-xValence band compensation and conduction band compensation with respect to the GaN substrate are more symmetrical, and higher conduction band and valence band compensation can be arranged, thereby obtain lower leakage current.
The Computing Principle of valence band compensation is based on (La
2O
3)
x(SiO
2)
1-xFilm and different these hypothesis GaN substrate XPS rump electron and valence band edge energy.In the experiment, we adopt Ga 2p3/2 rump electron as a reference.Can be obtained by Fig. 3 (a), the top of valence band value of GaN substrate is 1.98eV (E
VBM GaN), (La
2O
3)
x(SiO
2)
1-xFilm and (La
2O
3)
x(SiO
2)
1-xThe top of valence band at/GaN interface is consistent, is 2.86
So, (La
2O
3)
x(SiO
2)
1-xValence band compensation with respect to GaN
Be 0.88eV, can be calculated by following formula:
(La
2O
3)
x(SiO
2)
1-xThe conduction band compensation computational methods of film and GaN are:
Can calculate (La
2O
3)
x(SiO
2)
1-x/ GaN conduction band is compensated for as 1.40eV.
Can draw (La from Fig. 3 (b)
2O
3)
x(SiO
2)
1-xThe top of valence band of film is still 2.86eV, SiO
2/ GaN and (La
2O
3)
x(SiO
2)
1-xWith SiO
2The at the interface top of valence band position of cushion is respectively 3.99eV and 3.67eV.Same method can be regarded as (La
2O
3)
x(SiO
2)
1-x/ SiO
2Valence band compensation and the conduction band compensation of/GaN are respectively 1.69eV and 1.83eV.Based on The above results, can obtain (La
2O
3)
x(SiO
2)
1-x/ GaN and (La
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN can be with compensation image, as shown in Figure 4.
C) (La
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN is than (La
2O
3)
x(SiO
2)
1-x/ GaN membrane structure has better electric property, has littler leakage current density.
That shown in Figure 5 is (La
2O
3)
x(SiO
2)
1-x/ GaN and (La
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN body structure surface and the figure of O1s x-ray photoelectron power spectrum (XPS) at the interface.In the surface, introduce SiO
2Before and after the characteristic peak of O 1s consistent, be formed by stacking by three characteristic peaks, the strongest peak is in conjunction with being 531.6eV, corresponding is the silicate of La, in conjunction with can for 530.1eV corresponding be La
2O
3, and in conjunction with can for 533.1eV corresponding be SiO
2At the interface, because SiO
2The introducing of cushion is in conjunction with being the SiO of 533.1eV
2The intensity of characteristic peak obviously increases, and the characteristic peak of the silicate of La (531-6eV) significantly reduces.
Fig. 6 has shown (La
2O
3)
x(SiO
2)
1-xAnd introducing a layer thickness is the ultra-thin Si O of about 1 nanometer between GaN
2Cushion can effectively reduce the leakage current of film.At room temperature, at 1V bias voltage (La
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN is (La
2O
3)
x(SiO
2)
1-x/ GaN has littler leakage current density.Along with the rising of temperature, (La
2O
3)
x(SiO
2)
1-xThe leakage current density of/GaN sharply increases, and (La
2O
3)
x(SiO
2)
1-x/ SiO
2The leakage current density of/GaN is comparatively slow with the increase of temperature, in the time of 300 ℃, and (La
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN is than (La
2O
3)
x(SiO
2)
1-xLittle two orders of magnitude of the leakage current density of/GaN system.
Description of drawings
Fig. 1: (a) (La
2O
3)
x(SiO
2)
1-xThe structural representation of/GaN, (b) (La
2O
3)
x(SiO
2)
1-x/ SiO
2The structural representation of/GaN.
Fig. 2: preparation (La
2O
3)
x(SiO
2)
1-x/ SiO
2The structural representation of the pld (pulsed laser deposition) growing system of/GaN film,
The 1-backing material; The 2-KrF excimer laser; The 3-condenser lens; 4 (a)-SiO
24 (b)-(La
2O
3)
x(SiO
2)
1-x5-target platform; The 6-growth room; The interface valve of 7-mechanical pump and molecular pump; The 8-substrate table.
Fig. 3: (a) comparative examples 1 gained (La
2O
3)
x(SiO
2)
1-x/ GaN body structure surface and O 1s energy loss spectroscopy at the interface; (b) embodiment 1 gained (La
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN body structure surface and O 1s energy loss spectroscopy at the interface, wherein x axle presentation surface and O 1s electron binding energy at the interface (unit be electron-volt), the y axle represents photoelectronic counting rate.By the constituent structure at XPS analysis detection film surface and interface, for structure at the interface, need through the ar-ion beam etching, wherein the argon ion energy is 3keV.
Fig. 4: (a)) comparative examples 1 gained (La
2O
3)
x(SiO
2)
1-xThe GaN substrate of/GaN structure, (La
2O
3)
x(SiO
2)
1-xFilm surface and (La
2O
3)
x(SiO
2)
1-xThe valence band spectrum at/GaN interface; (b) embodiment 1 gained (La
2O
3)
x(SiO
2)
1-x/ SiO
2The SiO of/GaN structure
2/ GaN, (La
2O
3)
x(SiO
2)
1-xFilm surface and (La
2O
3)
x(SiO
2)
1-xWith SiO
2The valence band spectrum at the interface of cushion.Wherein x axle presentation surface and O 1s electron binding energy at the interface (unit be electron-volt), the y axle represents photoelectronic counting rate.
Fig. 5: (a) (La in the comparative examples 1
2O
3)
x(SiO
2)
1-x/ GaN can be with the compensation schematic diagram; (b) (La among the embodiment 1
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN can be with the compensation schematic diagram.
Fig. 6: (a) (La in the comparative examples 1
2O
3)
x(SiO
2)
1-xThe O 1s spectrum at/GaN surface and interface place; (b) (La among the embodiment 1
2O
3)
x(SiO
2)
1-x/ SiO
2The O 1s spectrum at/GaN surface and interface place.Wherein x axle presentation surface and O 1s electron binding energy at the interface (unit be electron-volt), the y axle represents photoelectronic counting rate.
Fig. 7: (a) comparative examples 1 (La
2O
3)
x(SiO
2)
1-x(La among/GaN and the embodiment 1
2O
3)
x(SiO
2)
1-x/ SiO
2(it is 3.14 * 1O that electrode adopts diameter to alternating temperature leakage current characteristic (J-T) curve of/GaN structure
-4Cm
2The Pt electrode), dotted line is illustrated in (La under the 1v voltage
2O
3)
x(SiO
2)
1-xAlternating temperature leakage current characteristic (J-T) curve of/GaN structure, solid line is illustrated in (La under the 1v voltage
2O
3)
x(SiO
2)
1-x/ SiO
2Alternating temperature leakage current characteristic (J-T) curve of/GaN structure, wherein the x axle represents temperature (unit for degree centigrade), the y axle represents leakage current density (unit is every square centimeter of ampere); (b) (La in the comparative examples 1
2O
3)
x(SiO
2)
1-x(La among/GaN and the embodiment 1
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN structure oppositely and (ii) can be with schematic diagram under the forward bias at (i).LSO is (La among the figure
2O
3)
x(SiO
2)
1-xAbbreviation.
Embodiment
Comparative examples 1.
Based on GaN substrate, (La
2O
3)
x(SiO
2)
1-xThe preparation process of/GaN membrane structure is specific as follows:
A) (La
2O
3)
x(SiO
2)
1-xFiring of ceramic target: La
2O
3And SiO
2Behind the abundant ball milling, fired 6 hours at 1400 ℃ again by dry rear compression moulding under 13MPa in ball mill for powder.
B) method that adopts hydrogen phase epitaxy (HVPE) is grown the GaN film of about 20 μ m as substrate 2 inches Sapphire Substrate.Substrate is put into proper amount of acetone, after the ultrasonic cleaning, use the deionized water ultrasonic cleaning, rinse the substrate surface remaining impurities, put into reaction chamber after drying up with high pure nitrogen then in order to deposit film.
C) with (La
2O
3)
x(SiO
2)
1-xCeramic target 4 (b) is fixed on the target platform 5 of deposition film making system of pulse laser as shown in Figure 2, and substrate 1 is fixed on the substrate table 8, and they are placed in the growth room 6 of deposition film making system of pulse laser.
D) with the interface valve 7 of vacuum pump by mechanical pump and molecular pump growth room 6 is evacuated down to 8.0 * 10
-5Below the Pa, underlayer temperature is 400 ℃.
E) start KrF excimer laser 2, make laser beam focus on (La by condenser lens 3
2O
3)
x(SiO
2)
1-xOn the ceramic target 4 (b).
F) deposit one deck (La at substrate 1
2O
3)
x(SiO
2)
1-xFilm forms (La
2O
3)
x(SiO
2)
1-x/ GaN membrane structure.Single pulse energy 300mJ, energy density is 2J/cm
2, deposition (La
2O
3)
x(SiO
2)
1-xLayer thickness is 20nm.
Gained (La
2O
3)
x(SiO
2)
1-x/ GaN membrane structure is sapphire 9, GaN substrate 10, (La shown in Fig. 1 (a) from bottom to up successively
2O
3)
x(SiO
2)
1-xGate dielectric layer 11.
Based on the GaN substrate, introduce SiO
2Cushion forms (La
2O
3)
x(SiO
2)
1-x/ SiO
2The preparation process of/GaN membrane structure is specific as follows:
A) with La
2O
3And SiO
2Powder, behind the ball milling, dry later on compression moulding under 13MPa was fired 6 hours, and was made (La for last 1400 ℃ in ball mill
2O
3)
x(SiO
2)
1-xCeramic target.
B) method that adopts hydrogen phase epitaxy (HVPE) is grown the GaN film of about 20 μ m as substrate 2 inches Sapphire Substrate.Substrate is put into proper amount of acetone, after the ultrasonic cleaning, use the deionized water ultrasonic cleaning, rinse the substrate surface remaining impurities, put into reaction chamber after drying up with high pure nitrogen then in order to deposit film.
C) with SiO
2Ceramic target 4 (a) and (La
2O
3)
x(SiO
2)
1-xCeramic target 4 (b) is fixed on the target platform 5 of deposition film making system of pulse laser (as shown in Figure 2), and substrate 1 is fixed on the substrate table 8, and they are placed in the growth room 6 of deposition film making system of pulse laser.
D) with the interface valve 7 of vacuum pump by mechanical pump and molecular pump growth room 6 is evacuated down to 8.0 * 10
-5Below the Pa, underlayer temperature is 400 ℃.
E) start KrF excimer laser 2, make laser beam focus on SiO by condenser lens 3
2On the ceramic target 4 (a).
F) deposition one deck SiO on substrate 1
2Buffer layer thin film forms SiO
2/ GaN structure.Single pulse energy is 300mJ, and energy density is 2J/cm
2, deposition SiO
2Buffer layer thickness is 1nm;
G) the bobbing target platform 5, make laser beam focus on (La by condenser lens 3
2O
3)
x(SiO
2)
1-xOn the ceramic target 4 (b), at SiO
2Deposit one deck (La on the/GaN structure
2O
3)
x(SiO
2)
1-x, form (La
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN structure.Single pulse energy is 300mJ, and energy density is 2J/cm
2, deposition (La
2O
3)
x(SiO
2)
1-xLayer thickness is 20nm.
Gained (La
2O
3)
x(SiO
2)
1-x/ SiO
2/ GaN membrane structure is sapphire 9, GaN substrate 10, SiO shown in Fig. 1 (b) from bottom to up successively
2Cushion 12 and (La
2O
3)
x(SiO
2)
1-xGate dielectric layer 11.
Claims (5)
1. the preparation method of a GaN base MOSFET is characterized in that, the structure of described GaN base MOSFET is: be provided with (La at the GaN substrate
2O
3)
x(SiO
2)
1-xGate dielectric layer, GaN substrate and (La
2O
3)
x(SiO
2)
1-xBe provided with the SiO that thickness is 0.5-2nm between the gate dielectric layer
2Cushion, described preparation method comprises the steps:
A) after being cleaned, dry up, the GaN substrate puts into reaction chamber in order to deposit film;
B) with SiO
2Ceramic target and (La
2O
3)
x(SiO
2)
1-xCeramic target is separately fixed at the rotatable of deposition film making system of pulse laser, has on the target platform of many target position, and the GaN substrate is fixed on the substrate table, and they are placed in the growth room of deposition film making system of pulse laser;
C) growth room is evacuated down to 8.0 * 10
-5Below the Pa, heated substrate temperature to 400 ℃;
D) start the KrF excimer laser, make laser beam pass through condenser lens, successively focus on SiO
2Ceramic target and (La
2O
3)
x(SiO
2)
1-xOn the ceramic target, at substrate deposition one deck SiO
2Cushion, the bobbing target platform deposits (La then
2O
3)
x(SiO
2)
1-xGate dielectric layer.
2. the preparation method of GaN base MOSFET as claimed in claim 1 is characterized in that, in the step d), and the single pulse energy 50-700 mJ of KrF excimer laser, energy density is 0.1-10 J/cm
2, deposition SiO
2Buffer layer thickness is 0.5-2nm, only by bobbing target platform 5, makes laser beam focus on (La
2O
3)
x(SiO
2)
1-xCeramic target, in the constant situation of other conditions, (the La of deposition 10-100nm
2O
3)
x(SiO
2)
1-xFilm.
3. the preparation method of GaN base MOSFET as claimed in claim 1 or 2 is characterized in that described (La
2O
3)
x(SiO
2)
1-x0.4<x in the gate dielectric layer<0.6.
4. the preparation method of GaN base MOSFET as claimed in claim 1 or 2 is characterized in that the thickness of GaN substrate is 10-50 μ m.
5. the preparation method of GaN as claimed in claim 1 or 2 base MOSFET is characterized in that the preparation method of GaN substrate is: the method that adopts the hydrogen phase epitaxy at the GaN film of 2-4 inch Sapphire Substrate growth 10-50 μ m as substrate; (La
2O
3)
x(SiO
2)
1-xThe method for cooking of ceramic target is: with La
2O
3And SiO
2Powder, it is abundant in ball mill that being cold-pressed into diameter under 12-15MPa pressure is 20-25mm after ball milling 24-36 hour, thickness is the disk of 3-5mm, fires under 1400-1600 ℃ 6-8 hour again.
Priority Applications (1)
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US6531354B2 (en) * | 2000-01-19 | 2003-03-11 | North Carolina State University | Lanthanum oxide-based gate dielectrics for integrated circuit field effect transistors |
US6580101B2 (en) * | 2000-04-25 | 2003-06-17 | The Furukawa Electric Co., Ltd. | GaN-based compound semiconductor device |
CN100587965C (en) * | 2008-09-24 | 2010-02-03 | 南京大学 | Gate dielectric material lanthanum silicate film with high dielectric coefficient as well as preparation method and use thereof |
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