CN101814317A - Phase change storage - Google Patents
Phase change storage Download PDFInfo
- Publication number
- CN101814317A CN101814317A CN200910007576A CN200910007576A CN101814317A CN 101814317 A CN101814317 A CN 101814317A CN 200910007576 A CN200910007576 A CN 200910007576A CN 200910007576 A CN200910007576 A CN 200910007576A CN 101814317 A CN101814317 A CN 101814317A
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- phase change
- memory cell
- signal
- pulse
- ovonics unified
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Abstract
The invention discloses a phase change storage, which comprises a shunt switching circuit, a phase change storage unit, a position selection switch, a pulse generation module and a counting module, wherein the shunt switching circuit comprises a plurality of switches and is used for coupling a plurality of shut paths to the output end of a reference current power; the position selection switch is responsible for conducting the phase change storage unit with the output end of the reference current power; the pulse generation module is responsible for outputting a pulse signal; the counting module is used for counting pulse of the pulse signal during enabling; and counting results are a group of digital signals coupled with the shunt switching circuit for controlling the switches.
Description
Technical field
The invention relates to a kind of Ovonics unified memory (Pha se Change Memory, PCM).
Background technology
Phase change material (Phase Change Material) comprises two kinds of phases: one for crystalline phase (crystalline), another is amorphous phase (amorphous).Emerging storer-Ovonics unified memory (PCM)-use phase change material is as storage element (to call phase change memory cell in the following text), with its crystalline phase state band epi-position value ' 0 ', its amorphous state ' 1 ' of representing place value.
According to the action current of flowing through wherein, phase change memory cell switches between crystalline phase, amorphous phase.Below with the form action current characteristic of crystalline phase, amorphous phase relatively:
Wherein, be difficult to control most with the crystalline phase conversion again.Unsuitable action current will make can't completely change into crystalline phase by the phase change memory cell imperfect crystal.
Summary of the invention
The present invention discloses a kind of Ovonics unified memory, comprising: switch, pulse generation module and counting module are chosen in shunting commutation circuit, phase change memory cell, position.The shunting commutation circuit comprises a plurality of switches, in order to couple the output terminal of a plurality of shunt paths to reference current source.This output terminal that switch is responsible for this phase change memory cell of conducting and this reference current source is chosen in the position.Pulse generator is responsible for output pulse signal.Counter is counted the pulse of this pulse signal when activation; Its count results is first group of digital signal, couples above-mentioned shunting commutation circuit and controls above-mentioned switch.
For above-mentioned and further feature of the present invention and advantage can be become apparent, cited below particularlyly go out preferred embodiment, and cooperate appended graphicly, elaborate.
Description of drawings
The embodiment of switch and phase change memory cell is chosen in action current generation circuit, position in Fig. 1 diagram Ovonics unified memory;
Fig. 2 discloses a kind of embodiment of Ovonics unified memory of the present invention;
Fig. 3 implements formula for the another kind of Ovonics unified memory of the present invention;
Fig. 4 is the another kind of embodiment of Ovonics unified memory of the present invention;
Fig. 5 is the another kind of embodiment of Ovonics unified memory of the present invention;
Fig. 6 diagram action current of the present invention produces a kind of enforcement circuit of circuit;
Fig. 7 A is a kind of embodiment of counting module of the present invention; And
Fig. 7 B diagram signal WE, EN
u, EN
d, with action current I
wBetween relation.
[main element label declaration]
100～action current produces circuit; Switch is chosen in 102～position;
104～phase change memory cell; Signal is chosen in 106～position;
108～shunting commutation circuit; 202～pulse generation module;
204～counting module; 206～pulse signal;
302～voltage-controlled oscillator; 402～proof scheme;
404～digital analog converter; 406～voltage-controlled oscillator;
408～test phase change memory cell; 410～current source;
412～comparator circuit; The phase inverter of 502～serial connection;
504～inverter driving circuit; 506～test phase change memory cell;
602～bias circuit; 604～shunting commutation circuit;
702～upward counter; 704～following counter;
706～multiplexer circuit; C
1... C
k～control signal;
EN～counting enable signal; En
d, EN
u～upper and lower counting number enable signal;
I
1... I
k～partial current; I
b～reference current source electric current;
I
d～inverter drive electric current; I
Ref～reference current;
I
w～action current; N
1The output terminal of～reference current source;
M
1... M
2, M
B1, M
B2～transistor; R～resistance;
SW
1... SW
2～switch; t
1, t
2～first, second time point;
WE～multiplexer is selected signal;
V
In, V
t～magnitude of voltage; And V
Ref, V
Ref1, V
Ref2～reference voltage.
Embodiment
Fig. 1 diagram action current produces circuit 100, switch 102 and phase change memory cell 104 are chosen in the position.Switch 102 serial connection phase change memory cells 104 are chosen in the position, by signal 106 controls, transfer function electric current I when conducting
wTo phase change memory cell 104.Action current produces circuit 100 and is responsible for producing action current I
w
Action current produces circuit 100 and comprises reference current source I
B, a plurality of shuntings source I
1, I
2..., I
k, and one the shunting commutation circuit 108.Shunting commutation circuit 108 comprises a plurality of switch SW
1, SW
2..., SW
k, be C by control signal respectively
1, C
2..., C
kControl is in order to couple shunting source I
1, I
2..., I
kTo reference current source I
BOutput terminal N
1, the corrective action electric current I
wSize.
Fig. 2 discloses a kind of embodiment of Ovonics unified memory of the present invention; Wherein produce control signal C with pulse generation module 202 and counting module 204
1, C
2..., C
k, with the switch SW in the control chart 1 shunting commutation circuit 108
1, SW
2..., SW
k Pulse generation module 202 is responsible for output pulse signal 206 to counting module 204.Under counting enable signal EN activation, counting module 204 is counted the pulse of these pulse signals 204 and count results is exported with the set of number signal, as control signal C
1, C
2..., C
kUse.
Fig. 3 implements formula for the another kind of Ovonics unified memory of the present invention, and wherein pulse generation module 202 is realized by voltage-controlled oscillator 302.Voltage-controlled oscillator 302 will be according to magnitude of voltage V
InAdjust the frequency of pulse signal 206, and then influence the following number of counting module 204 or go up number speed.Action current I
wStepping increase or stepping underspeeds along with control signal C
1... C
kPace of change is adjusted.
The embodiment of Fig. 3 provides a kind of Ovonics unified memory, and the user can pass through magnitude of voltage V
InThe corrective action electric current I
wStepping increase or stepping underspeeds, help the phase place of phase change memory cell 104 to transform.
Fig. 4 is the another kind of embodiment of Ovonics unified memory of the present invention, and wherein pulse generation module 202 comprises proof scheme 402, digital analog converter 404 and voltage-controlled oscillator 406.Proof scheme 402 comprises test phase change memory cell 408.Under test pattern, current source 410 provides test with phase change memory cell 408 1 measuring currents, attempts setting its phase.Under Validation Mode, current source 410 provides test to read electric current with phase change memory cell 408 1, to produce magnitude of voltage V
t Input comparator circuit 412 and reference potential V
Ref1With V
Ref2Compare, judge the resistance value of phase change memory cell 408.Test circuit 412 is output as the set of number signal, will be converted to voltage signal V by digital analog converter 404
In406 of voltage-controlled oscillators are according to voltage signal V
In Output pulse signal 206.
Fig. 5 is the another kind of embodiment of Ovonics unified memory of the present invention, and wherein pulse generation module 202 comprises a plurality of phase inverters (shown in the label 502) and an inverter driving circuit 504 of serial connection.Shown in circuit 502, the output terminal of afterbody phase inverter couples the input end of first order phase inverter.Circuit 502 output pulse signals 206.Magnitude of voltage V
RefBe definite value; Test will influence the drive current I that inverter driving circuit 504 is provided with the resistance value of phase change memory cell 506
d, and then influence the frequency of pulse signal 206, change action current I
wStepping increase or stepping underspeeds.Test can be coupled to inverter driving circuit 504 in advance by measuring current effect (attempting its phase of conversion) again with phase change memory cell 506.Resistance R will be guaranteed drive current I among the figure
dMinimum, it is slow to avoid pulse signal 206 to vibrate, action time I
wLong; Other embodiment also can not use resistance R.
Compared to Fig. 3, the embodiment shown in Fig. 4 and 5 provides a kind of judgment mechanism with test with phase change memory cell 408 and 506, makes action current I
wAccording to the phase conversion capability fine setting of present Ovonics unified memory, transform to finish better phase.
Fig. 6 diagram action current of the present invention produces a kind of enforcement circuit of circuit.Action current produces circuit 600 and comprises bias circuit 602, in order to bias transistor M
B1With M
B2Form reference current source supply of current I
bAction current produces circuit 600 more with four transistor M
1, M
2, M
3With M
4Four shunt paths are provided.Under bias circuit 602 bias voltages, transistor M
1, M
2, M
3With M
4According to electric current I
RefShunting I is provided
1, I
2, I
3With I
4Transistor size in the circuit 600 can make electric current I through special design
b: I
1: I
2: I
3: I
4: I
RefIt is 16: 1: 2: 4: 8: 1.Shunting commutation circuit 604 is with a plurality of switch SW
1, SW
2, SW
3, and SW
4Couple those transistors M
1, M
2, M
3With M
4To end points N
1, to shunt above-mentioned electric current I
b, form action current I
wThose switch SW
1, SW
2, SW
3, and SW
4Control signal be C
1, C
2, C
3With C
4Control signal is (as C
1) when being high-voltage level, switch (SW
1) conducting; Control signal is (as C
1) when being low voltage level, switch (SW
1) not conducting.
Below action current is produced in the embodiment that circuit 600 is applied to Fig. 4, and wherein counting module 204 comprises counter, being operating as-magnitude of voltage V of voltage-controlled oscillator 406
InBigger, pulse signal 206 vibrations are faster.Below be converted into example with crystalline phase.Under the test pattern, the measuring current value can be made as I
b(with the I of Fig. 6
b), attempt conversion testing and use phase change memory cell 408 to crystalline phase.Under the Validation Mode, current source 410 provides test to read electric current with phase change memory cell 408 1, and the resistance value of test with phase change memory cell 408 is reflected in this group numeral output of proof scheme 402.If test is then tested and used the resistance value of phase change memory cell 408 excessive with phase change memory cell 408 crystalline phase degree deficiencies, the data signal groups that numerical value is hanged down in proof scheme 402 output representatives drags down voltage V
InWith voltage V
InDrag down, pulse signal 206 vibrations are slack-off, data signal groups C
1, C
2, C
3With C
4It is slack-off to increase progressively (increasing to 1111 by 0000) speed, and then slow this action current I
wBy 16.I
RefBe decremented to 1.I
RefSpeed, improve the ability of this phase change memory cell 104 of crystalline phaseization.
Below action current is produced in the embodiment that circuit 600 is applied to Fig. 5, and wherein counting module 204 comprises counter.Below be converted into example with crystalline phase.At first, can make that the measuring current value is I
b(with the I of Fig. 6
b), attempt conversion testing and use phase change memory cell 506 to crystalline phase.Then, will test with phase change memory cell 506 and be installed on inverter driving circuit 504.If test is then tested and is used the resistance value of phase change memory cell 506 excessive, electric current I with phase change memory cell 506 crystalline phase degree deficiencies
dDrag down, pulse signal 206 vibrations are slow, data signal groups C
1, C
2, C
3With C
4It is slack-off to increase (increasing to 1111 by 0000) speed, and then slow this action current I
wBy 16.I
RefBe decremented to 1.I
RefSpeed, improve the ability of this phase change memory cell 104 of crystalline phaseization.
Fig. 7 A is a kind of embodiment of counting module 204, wherein comprises counter 702 and following counter 704 simultaneously, respectively by counter enable signal EN
uOr EN
d Activation.Multiplexer circuit 706 is selected signal WE to switch according to multiplexer and is exported upward number or number result down.
Below the action current of Fig. 6 is produced circuit 600 and Fig. 7 A counting module be applied in the Ovonics unified memory of Fig. 2, and the order position is chosen signal 106 conducting positions and is chosen switch 102; Signal WE, EN
u, EN
d, with action current I
wBetween relation shown in Fig. 7 B.Time point t
1, multiplexer is selected signal WE to switch to noble potential and is descended counter 704 by counting enable signal EN
dStart, the data of successively decreasing are by multiplexer circuit 706 output (C
1, C
2, C
3With C
4Be decremented to 0000 by 1111).Switch SW in Fig. 6 branch commutation circuit 604
1, SW
2, SW
3, and SW
4With C
1, C
2, C
3With C
4Switch, make action current I
wIncrease progressively.Time point t
2, multiplexer is selected signal WE to switch to electronegative potential and is gone up counter 702 by counting enable signal EN
uStart, the data that increase progressively are by multiplexer circuit 706 output (C
1, C
2, C
3With C
4Be incremented to 1111 by 0000).Switch SW in Fig. 6 branch commutation circuit 604
1, SW
2, SW
3, and SW
4With C
1, C
2, C
3With C
4Switch, make action current I
wSuccessively decrease.
Shown in Fig. 7 B, Ovonics unified memory provided by the invention can be walked unhurriedly and be increased progressively or successively decrease action current I
w, the phase transforming degree of phase change memory cell is much better than conventional art.In addition, the present invention also discloses action current I
wIncrease progressively, the control technology of rate of decline.
The various embodiments described above are not to be used for limiting scope of the present invention.Have change or the retouching of knowing that usually the knowledgeable does content of the present invention in the technical field under any, all belong to the scope of this instructions institute desire protection.Scope of patent protection of the present invention when with appended claim scope the person of being defined be as the criterion.
Claims (7)
1. Ovonics unified memory comprises:
The shunting commutation circuit comprises a plurality of switches, in order to couple the output terminal of a plurality of shunt paths to reference current source;
Phase change memory cell;
Switch is chosen in the position, in order to the above-mentioned output terminal of this phase change memory cell of conducting and this reference current source;
The pulse generation module, output pulse signal; And
Counting module is counted the pulse of this pulse signal and count results is exported with first group of digital signal when activation;
Wherein, above-mentioned first group of digital signal couples this shunting commutation circuit and controls these switches.
2. Ovonics unified memory according to claim 1, wherein this pulse generation module is a voltage-controlled oscillator.
3. Ovonics unified memory according to claim 1, wherein this pulse generation module comprises:
Proof scheme, validation test is with the resistance value of phase change memory cell after the measuring current effect, to export second group of group digital signal;
Digital analog converter, changing above-mentioned second group of digital signal is voltage signal; And
Voltage-controlled oscillator is exported above-mentioned pulse signal according to this voltage signal.
4. Ovonics unified memory according to claim 1, wherein this pulse generation module comprises:
A plurality of phase inverters of serial connection, in order to produce above-mentioned pulse signal, wherein, the afterbody phase inverter is output as the input of first order phase inverter; And
Inverter driving circuit produces a plurality of drive currents according to test with the resistance value of phase change memory cell after the measuring current effect and drives these phase inverters.
5. Ovonics unified memory according to claim 1, wherein, above-mentioned switch has a control end and conducting when this control end is high-voltage level separately, not conducting during for low voltage level.
6. Ovonics unified memory according to claim 5, wherein this counting module is used to promote this action current for following counter.
7. Ovonics unified memory according to claim 5, wherein this counting module is last counter, is used to drag down this action current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910007576A CN101814317A (en) | 2009-02-23 | 2009-02-23 | Phase change storage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910007576A CN101814317A (en) | 2009-02-23 | 2009-02-23 | Phase change storage |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101814317A true CN101814317A (en) | 2010-08-25 |
Family
ID=42621544
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200910007576A Pending CN101814317A (en) | 2009-02-23 | 2009-02-23 | Phase change storage |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101814317A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107293327A (en) * | 2016-03-30 | 2017-10-24 | 中芯国际集成电路制造(上海)有限公司 | Reference current obtains circuit, read-only storage and electronic equipment |
| US20170364471A1 (en) * | 2016-06-21 | 2017-12-21 | Novatek Microelectronics Corp. | Display apparatus, signal transmitter, and data transmitting method |
| WO2020000231A1 (en) * | 2018-06-27 | 2020-01-02 | 江苏时代全芯存储科技股份有限公司 | Memory drive device |
-
2009
- 2009-02-23 CN CN200910007576A patent/CN101814317A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107293327A (en) * | 2016-03-30 | 2017-10-24 | 中芯国际集成电路制造(上海)有限公司 | Reference current obtains circuit, read-only storage and electronic equipment |
| US20170364471A1 (en) * | 2016-06-21 | 2017-12-21 | Novatek Microelectronics Corp. | Display apparatus, signal transmitter, and data transmitting method |
| CN107528756A (en) * | 2016-06-21 | 2017-12-29 | 联咏科技股份有限公司 | The method of display device, signal transmitter and data transfer |
| TWI651943B (en) * | 2016-06-21 | 2019-02-21 | 聯詠科技股份有限公司 | Display device, signal transmitter, and method of data transmission |
| US10445284B2 (en) | 2016-06-21 | 2019-10-15 | Novatek Microelectronics Corp. | Display apparatus, signal transmitter, and data transmitting method for display apparatus |
| CN107528756B (en) * | 2016-06-21 | 2020-09-22 | 联咏科技股份有限公司 | Display device, signal transmitter and data transmission method |
| WO2020000231A1 (en) * | 2018-06-27 | 2020-01-02 | 江苏时代全芯存储科技股份有限公司 | Memory drive device |
| US11315632B2 (en) | 2018-06-27 | 2022-04-26 | Jiangsu Advanced Memory Technology Co., Ltd. | Memory drive device |
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| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| AD01 | Patent right deemed abandoned |
Effective date of abandoning: 20100825 |
|
| C20 | Patent right or utility model deemed to be abandoned or is abandoned |