CN101794129A - Main controller for sewage discharge of intelligent type sewage discharge monitoring system - Google Patents
Main controller for sewage discharge of intelligent type sewage discharge monitoring system Download PDFInfo
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- CN101794129A CN101794129A CN 201010126630 CN201010126630A CN101794129A CN 101794129 A CN101794129 A CN 101794129A CN 201010126630 CN201010126630 CN 201010126630 CN 201010126630 A CN201010126630 A CN 201010126630A CN 101794129 A CN101794129 A CN 101794129A
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Abstract
The invention relates to a main controller for the sewage discharge of an intelligent type sewage discharge monitoring system, which is used for the control of the sewage discharge of the intelligent type sewage discharge monitoring system. The main controller (1) comprises a processor module (11), an I/O expansion module (12), a keyboard circuit (13), an indicating lamp circuit (14), a control circuit (15), a serial port expansion module (16), a flowmeter transmission module (17), a wireless terminal transmission module (18) and a liquid crystal interface module (19). The main controller for the sewage discharge of the intelligent type sewage discharge monitoring system can remotely monitor the flow rate of sewage and can remotely operate and control the discharging and the closing of the sewage.
Description
(1) technical field
The present invention relates to a kind of master controller, especially relate to a kind of main controller for sewage discharge of intelligent type sewage discharge monitoring system, be used for intelligent sewage discharge discharge monitoring system control.
(2) background technology
At present, in sewage discharge monitoring field, the supervisory system that adopts is commonly one-of-a-kind system, can't control sewage emissions in real time or closes according to actual conditions.
(3) summary of the invention
The objective of the invention is to overcome above-mentioned deficiency, provide a kind of can the remote monitoring discharge of sewage and can the remote control sewage emissions and the main controller for sewage discharge of intelligent type sewage discharge monitoring system of closing.
The object of the present invention is achieved like this: a kind of main controller for sewage discharge of intelligent type sewage discharge monitoring system is characterized in that: described master controller includes processor module, I/O expansion module, keyboard circuit, indicator light circuit, control circuit, serial ports expansion module, flowmeter transport module, wireless terminal transport module, liquid crystal interface module;
Described processor module includes single-chip microcomputer U1 and latch U2, the P0 mouth of described single-chip microcomputer U1 (i.e. 32～39 pin) is as the data transmission mouth, the P0 mouth of described single-chip microcomputer U1 links to each other with the signal input of latch U2, be 32 of single-chip microcomputer U1,33,34,35,36,37,38 and 39 pin respectively with 18 of latch U2,17,14,13,8,7,4 link to each other with 3 pin, the input end of clock X1 of described single-chip microcomputer U1 and X2 are serially connected with a crystal oscillator Y1, be that 18 of single-chip microcomputer U1 links to each other with the two ends of crystal oscillator Y1 respectively with 19 pin, described capacitor C 22 and C21 serial connection back are in parallel with crystal oscillator Y1, the contact place of described capacitor C 22 and C21 is provided with an earth point (referring to the GND corresponding with VCC) describedly, the 1 pin ground connection of described latch U2,11 pin link to each other with 30 pin of U1;
The I/O expansion module includes one 8255 chip U3, data transmission mouth 27～34 pin of described 8255 chip U3 link to each other with data transmission mouth 32～39 pin of single-chip microcomputer U1 respectively, read data end 5 pin of described 8255 chip U3, write data end 36 pin and reset terminal 35 pin respectively with 17 pin of single-chip microcomputer U1,16 pin, 25 pin link to each other, address end 8 pin of described 8255 chip U3, address end 9 pin and sheet choosing end 6 pin respectively with 6 pin of latch U2,5 pin link to each other with 16 pin, 1～4 pin of described 8255 chip U3 as the alignment of keyboard respectively through pull-up resistor R12, R11, R10 links to each other with high level with R42,18～20 pin of described 8255 chip U3 as the line of keyboard respectively through pull-up resistor R15, R16 links to each other with high level with R17; Described trigger switch S1～4 one ends link to each other with 18 pin of 8255 chip U3, the other end links to each other with 1 pin with 4,3,2 of 8255 chip U3 respectively, described trigger switch S5～8 one ends link to each other with 19 pin of 8255 chip U3, the other end links to each other with 1 pin with 4,3,2 of 8255 chip U3 respectively, described trigger switch S9～12 1 ends link to each other with 20 pin of 8255 chip U3, and the other end links to each other with 1 pin with 4,3,2 of 8255 chip U3 respectively; 22,23,24 of described 8255 chip U3 link to each other with high level VCC through LED 1, LED2, LED3 and LED4 respectively as the signal lamp mouth with 25 pin;
Civil power through Switching Power Supply be transformed to+introduce control circuit by joint J1 behind the 12V, after described live wire inserts respectively with resistance R 5, resistance R 6 links to each other with the positive pole of diode D1, the other end of described resistance R 5 and R6 links to each other with 1 pin of photoelectrical coupler U4 and the base stage of triode Q1 respectively, 4 pin of described photoelectrical coupler U4 link to each other with high level through pull-up resistor R22, and 4 pin of photoelectrical coupler U4 link to each other with 27 pin of single-chip microcomputer U1,2 pin of described photoelectrical coupler U4 link to each other with the 12GND of joint J1,3 pin ground connection, the base stage of described triode Q1 links to each other with 3 pin of photoelectrical coupler U5 through resistance R 7,1 pin of described photoelectrical coupler U5 links to each other through 14 pin of resistance R 1 with 8255 chip U3, the 2 pin ground connection of described photoelectrical coupler U5,4 pin of described photoelectrical coupler U5 link to each other with the negative pole of diode D1, the negative pole of its described diode D1 links to each other with the negative pole of diode D5, the positive pole of described diode D5 links to each other with the 12V power supply, the emitter of described triode Q1 links to each other with the 12GND of joint J1, collector links to each other with 2 pin of relay J DQ1, and 2 pin of described relay J DQ1 link to each other with the positive pole of diode D2, the negative pole of described diode D2 links to each other with the negative pole of diode D1,1 pin of described relay J DQ1 links to each other with the negative pole of diode D2, the negative pole of described diode D5 links to each other with 1 pin of photoelectrical coupler U6 through resistance R 3,2 pin of described photoelectrical coupler U6 and the equal ground connection of 3 pin, 4 pin of described photoelectrical coupler U6 link to each other with high level through pull-up resistor R23, and 4 pin of described photoelectrical coupler U6 link to each other with 28 pin of single-chip microcomputer U1, described diode D5 links to each other with the negative pole of diode D3, the positive pole of described diode D3 is connected to 2 pin of relay J DQ2 and the collector of triode Q2,1 pin of described relay J DQ2 is connected to the negative pole of diode D5, the emitter of described triode Q2 links to each other with the 12GND of joint J1, base stage links to each other with 4 pin of photoelectrical coupler U7 through resistance R 29, and 4 pin of described photoelectrical coupler U7 link to each other with the 12V power supply through resistance R 28,4 pin of described photoelectrical coupler U7 link to each other with the 12GND of joint J1 through a filter capacitor C19 simultaneously, the 2 pin ground connection of described photoelectrical coupler U7,3 pin link to each other with the 12GND of joint J1, and 1 pin of described photoelectrical coupler U7 is connected to 16 pin of 8255 chip U3 through resistance R 2;
Described serial ports expansion module is made of GM8123 chip U8, input end of clock 1 pin of described GM8123 chip U8 links to each other with the two ends of crystal oscillator Y2 respectively with 2 pin, described capacitor C 23 and C24 serial connection back are in parallel with crystal oscillator Y2, the joining of described crystal oscillator C23 and C24 is provided with an earth point, 10 pin of described GM8123 chip U8,11 pin and the equal ground connection of 19 pin, 20 of described GM8123 chip U8 is connected with high level, and 12～18 pin of described GM8123 chip U8 link to each other with 14 pin with 10,11,26,8,7,15 of single-chip microcomputer U1 respectively;
The photoelectrical coupler U11 of flowmeter transport module and the 3rd pin of U12 link to each other with 23 pin of single-chip microcomputer U1 and 8 pin of GM8123 chip U8 with R32 through resistance R 31 respectively, 5 pin of described photoelectrical coupler U11 and U12 all connect and+ground that VOUT is corresponding, 2 pin of described photoelectrical coupler U11 and U12 all link to each other with high level, and 2 pin of described photoelectrical coupler U11 and U12 link to each other with 6 pin of photoelectrical coupler U10 through resistance R 37, and 6 pin of described photoelectrical coupler U10 link to each other with 9 pin of GM8123 chip U8, the 5 pin ground connection of described photoelectrical coupler U10,8 pin link to each other with high level, 3 pin of described photoelectrical coupler U10 link to each other through 1 pin of resistance R 33 with 485 communication transceiver U15,2 pin of described photoelectrical coupler U10 respectively with capacitor C 3,8 pin of 485 communication transceiver U15 link to each other with 8 pin of photoelectrical coupler U11, another termination of described capacitor C 3 and+ground that VOUT is corresponding, 8 pin of described photoelectrical coupler U11 link to each other with 8 pin of photoelectrical coupler U12,6 pin of described photoelectrical coupler U11 link to each other with 8 pin of this chip through resistance R 24,6 pin of described photoelectrical coupler U12 link to each other with 8 pin of this chip through resistance R 25,6 pin of described photoelectrical coupler U11 and U12 are connected to 3 pin and 4 pin of 485 communication transceiver U15 respectively, 2 pin of described 485 communication transceiver U15 link to each other with 3 pin of this chip, 5 pin of described 485 communication transceiver U15 connect and+ground that VOUT is corresponding, 6 pin link to each other with R8 one end with resistance R 9 respectively with 7 pin, the described R8 other end connects and+ground that VOUT is corresponding through resistance R 44 and diode D6 respectively, and the positive pole of described diode D6 connects and+ground that VOUT is corresponding, the other end of described R9 links to each other with resistance R 45 1 ends with the negative pole of diode D7 respectively, described resistance R 45 other ends are connected to high level, and the positive pole of described diode D7 connects and+ground that VOUT is corresponding;
The photoelectrical coupler U13 of wireless terminal transport module and the 3rd pin of U14 link to each other with 22 pin of single-chip microcomputer U1 and 3 pin of GM8123 chip U8 with R35 through resistance R 34 respectively, 5 pin of described photoelectrical coupler U13 and U14 all connect and+ground that VOUT is corresponding, 2 pin of described photoelectrical coupler U13 and U14 all link to each other with high level, and 2 pin of described photoelectrical coupler U13 and U14 link to each other with 6 pin of photoelectrical coupler U9 through resistance R 38, and 6 pin of described photoelectrical coupler U9 link to each other with 4 pin of GM8123 chip U8, the 5 pin ground connection of described photoelectrical coupler U9,8 pin link to each other with high level, 3 pin of described photoelectrical coupler U9 link to each other through 1 pin of resistance R 36 with 485 communication transceiver U16,2 pin of described photoelectrical coupler U9 respectively with capacitor C 4,8 pin of 485 communication transceiver U16 link to each other with 8 pin of photoelectrical coupler U13, another termination of described capacitor C 4 and+ground that VOUT is corresponding, 8 pin of described photoelectrical coupler U13 link to each other with 8 pin of photoelectrical coupler U14,6 pin of described photoelectrical coupler U13 link to each other with 8 pin of this chip through resistance R 26,6 pin of described photoelectrical coupler U14 link to each other with 8 pin of this chip through resistance R 27,6 pin of described photoelectrical coupler U13 and U14 are connected to 3 pin and 4 pin of 485 communication transceiver U16 respectively, 2 pin of described 485 communication transceiver U16 link to each other with 3 pin of this chip, 5 pin of described 485 communication transceiver U16 connect and+ground that VOUT is corresponding, 6 pin link to each other with R13 one end with resistance R 14 respectively with 7 pin, the described R13 other end connects and+ground that VOUT is corresponding through resistance R 46 and diode D8 respectively, and the positive pole of described diode D8 connects and+ground that VOUT is corresponding, the other end of described R14 links to each other with resistance R 47 1 ends with the negative pole of diode D9 respectively, described resistance R 47 other ends are connected to high level, and the positive pole of described diode D9 connects and+ground that VOUT is corresponding;
The liquid crystal interface module is an interface circuit, JP1 is a double interface structure, 9～16 pin of described JP1 link to each other with 39～32 pin of single-chip microcomputer U1 respectively, 4 pin are held in writing of described JP1, read end 5 pin and reset end 8 pin respectively with 16 pin of single-chip microcomputer U1,17 pin link to each other with 6 pin, address end 6 pin of described JP1 link to each other with 2 pin with 19 pin of latch U2 respectively with 7 pin, 2 pin of described JP1 all link to each other with high level with 19 pin, the 8 foot meridian capacitor C30 of described JP1 link to each other with 2 pin with capacitor C 29 backs, the contact mutually of described capacitor C 30 and capacitor C 29 is provided with an earth point, the 1 pin ground connection of described JP1, and 1 pin of JP1 links to each other with 18 pin through slide rheostat RP1,2 pin of described JP1 link to each other with the slide plate of slide rheostat RP1,20 pin of described JP1 link to each other with the collector of triode Q4, the grounded emitter of described triode Q4, base stage links to each other with 3 pin of photoelectrical coupler U17 through resistance R 41,4 pin of described photoelectrical coupler U17 link to each other with high level, 2 pin ground connection, 1 pin links to each other with 5 pin of single-chip microcomputer U1 through resistance R 40.
During application, flowmeter and wireless transmission terminal are inserted master controller through the RS485 interface, control the solenoid valve of UPS and water pump simultaneously by relay J PQ1 and JPQ2 respectively.
Principle of work of the present invention is:
(1) remote monitoring: flowmeter transfers to data on flows after single-chip microcomputer handles through the flowmeter transport module by the RS485 port, by the RS485 port communication data transmission to wireless transmission terminal is re-send to main equipment room through the wireless terminal transport module by single-chip microcomputer, for supervisor's monitoring.
(2) Long-distance Control sewage emissions and closing: utilize master controller that the water pump electromagnetic valve controls realization to the sewage discharge and the control of cutting out.When operate as normal, 16 pin of 8255 chip U3 are high level, and this moment is through photoelectrical coupler U7, the C of U7, E end (i.e. 3,4 pin) is connected, C19 is by C, E end (i.e. 3, the 4 pin) discharge of U7, and triode Q2 is in cut-off state, and DQ2 opens solenoid valve by relay J; Have a power failure or discharge capacity when exceeding standard when detecting, 16 of 8255 chip U3 are changed to low level by single-chip microcomputer U1, Q2 conducting this moment, relay J DQ2 action, normally closed contact is opened, thereby makes closed electromagnetic valve, thereby stops blowdown.
The invention has the beneficial effects as follows:
Can long-range realization to the monitoring of blowdown flow rate, and can be long-range reach and realize the Long-distance Control sewage emissions and close by control electromagnetic valve.
(4) description of drawings
Fig. 1 is a processor module circuit diagram of the present invention.
Fig. 2 is an I/O mouth expansion module circuit diagram of the present invention.
Fig. 3 is a control module circuit diagram of the present invention.
Fig. 4 is a Keysheet module circuit diagram of the present invention.
Fig. 5 is an indicating lamp module circuit diagram of the present invention.
Fig. 6 is a serial ports expansion module circuit diagram of the present invention.
Fig. 7 is a flowmeter transport module circuit diagram of the present invention.
Fig. 8 is a wireless terminal transport module circuit diagram of the present invention.
Fig. 9 is a liquid crystal interface module circuit diagram of the present invention.
Figure 10 is a circuit block diagram of the present invention.
Figure 11 uses synoptic diagram for the present invention.
Table 1 is a major function device table of the present invention.
Among the figure:
(5) embodiment
Referring to Figure 10, the present invention relates to a kind of main controller for sewage discharge of intelligent type sewage discharge monitoring system, described master controller 1 includes processor module 11, I/O expansion module 12, keyboard circuit 13, indicator light circuit 14, control circuit 15, serial ports expansion module 16, flowmeter transport module 17, wireless terminal transport module 18, liquid crystal interface module 19;
Referring to Fig. 1, described processor module 11 includes single-chip microcomputer U1 and latch U2, the P0 mouth of described single-chip microcomputer U1 (i.e. 32～39 pin) is as the data transmission mouth, the P0 mouth of described single-chip microcomputer U1 links to each other with the signal input of latch U2, be 32 of single-chip microcomputer U1,33,34,35,36,37,38 and 39 pin respectively with 18 of latch U2,17,14,13,8,7,4 link to each other with 3 pin, the input end of clock X1 of described single-chip microcomputer U1 and X2 are serially connected with a crystal oscillator Y1, be that 18 of single-chip microcomputer U1 links to each other with the two ends of crystal oscillator Y1 respectively with 19 pin, described capacitor C 22 and C21 serial connection back are in parallel with crystal oscillator Y1, the contact place of described capacitor C 22 and C21 is provided with an earth point (referring to the GND corresponding with VCC) describedly, the 1 pin ground connection of described latch U2,11 pin link to each other with 30 pin of U1;
Referring to Fig. 2, I/O expansion module 12 includes one 8255 chip U3, data transmission mouth 27～34 pin of described 8255 chip U3 link to each other with data transmission mouth 32～39 pin of single-chip microcomputer U1 respectively, read data end 5 pin of described 8255 chip U3, write data end 36 pin and reset terminal 35 pin respectively with 17 pin of single-chip microcomputer U1,16 pin, 25 pin link to each other, address end 8 pin of described 8255 chip U3, address end 9 pin and sheet choosing end 6 pin respectively with 6 pin of latch U2,5 pin link to each other with 16 pin, 1～4 pin of described 8255 chip U3 as the alignment of keyboard respectively through pull-up resistor R12, R11, R10 links to each other with high level with R42,18～20 pin of described 8255 chip U3 as the line of keyboard respectively through pull-up resistor R15, R16 links to each other with high level with R17; Described trigger switch S1～4 one ends link to each other with 18 pin of 8255 chip U3, the other end links to each other with 1 pin with 4,3,2 of 8255 chip U3 respectively, described trigger switch S5～8 one ends link to each other with 19 pin of 8255 chip U3, the other end links to each other with 1 pin with 4,3,2 of 8255 chip U3 respectively, described trigger switch S9～12 1 ends link to each other with 20 pin of 8255 chip U3, the other end links to each other with 1 pin with 4,3,2 of 8255 chip U3 respectively, as shown in Figure 4; 22,23,24 of described 8255 chip U3 link to each other with high level VCC through LED 1, LED2, LED3 and LED4 respectively as the signal lamp mouth with 25 pin, as shown in Figure 5;
Referring to Fig. 3, civil power through Switching Power Supply be transformed to+introduce control circuit 15 by joint J1 behind the 12V, after described live wire inserts respectively with resistance R 5, resistance R 6 links to each other with the positive pole of diode D1, the other end of described resistance R 5 and R6 links to each other with 1 pin of photoelectrical coupler U4 and the base stage of triode Q1 respectively, 4 pin of described photoelectrical coupler U4 link to each other with high level through pull-up resistor R22, and 4 pin of photoelectrical coupler U4 link to each other with 27 pin of single-chip microcomputer U1,2 pin of described photoelectrical coupler U4 link to each other with the 12GND of joint J1,3 pin ground connection, the base stage of described triode Q1 links to each other with 3 pin of photoelectrical coupler U5 through resistance R 7,1 pin of described photoelectrical coupler U5 links to each other through 14 pin of resistance R 1 with 8255 chip U3, the 2 pin ground connection of described photoelectrical coupler U5,4 pin of described photoelectrical coupler U5 link to each other with the negative pole of diode D1, the negative pole of its described diode D1 links to each other with the negative pole of diode D5, the positive pole of described diode D5 links to each other with the 12V power supply, the emitter of described triode Q1 links to each other with the 12GND of joint J1, collector links to each other with 2 pin of relay J DQ1, and 2 pin of described relay J DQ1 link to each other with the positive pole of diode D2, the negative pole of described diode D2 links to each other with the negative pole of diode D1,1 pin of described relay J DQ1 links to each other with the negative pole of diode D2, the negative pole of described diode D5 links to each other with 1 pin of photoelectrical coupler U6 through resistance R 3,2 pin of described photoelectrical coupler U6 and the equal ground connection of 3 pin, 4 pin of described photoelectrical coupler U6 link to each other with high level through pull-up resistor R23, and 4 pin of described photoelectrical coupler U6 link to each other with 28 pin of single-chip microcomputer U1, described diode D5 links to each other with the negative pole of diode D3, the positive pole of described diode D3 is connected to 2 pin of relay J DQ2 and the collector of triode Q2,1 pin of described relay J DQ2 is connected to the negative pole of diode D5, the emitter of described triode Q2 links to each other with the 12GND of joint J1, base stage links to each other with 4 pin of photoelectrical coupler U7 through resistance R 29, and 4 pin of described photoelectrical coupler U7 link to each other with the 12V power supply through resistance R 28,4 pin of described photoelectrical coupler U7 link to each other with the 12GND of joint J1 through a filter capacitor C19 simultaneously, the 2 pin ground connection of described photoelectrical coupler U7,3 pin link to each other with the 12GND of joint J1, and 1 pin of described photoelectrical coupler U7 is connected to 16 pin of 8255 chip U3 through resistance R 2;
Referring to Fig. 6, described serial ports expansion module 16 is made of GM8123 chip U8, input end of clock 1 pin of described GM8123 chip U8 links to each other with the two ends of crystal oscillator Y2 respectively with 2 pin, described capacitor C 23 and C24 serial connection back are in parallel with crystal oscillator Y2, the joining of described crystal oscillator C23 and C24 is provided with an earth point, 10 pin of described GM8123 chip U8,11 pin and the equal ground connection of 19 pin, 20 of described GM8123 chip U8 is connected with high level, and 12～18 pin of described GM8123 chip U8 link to each other with 14 pin with 10,11,26,8,7,15 of single-chip microcomputer U1 respectively;
Referring to Fig. 7, the photoelectrical coupler U11 of flowmeter transport module 17 and the 3rd pin of U12 link to each other with 23 pin of single-chip microcomputer U1 and 8 pin of GM8123 chip U8 with R32 through resistance R 31 respectively, 5 pin of described photoelectrical coupler U11 and U12 all connect and+ground that VOUT is corresponding, 2 pin of described photoelectrical coupler U11 and U12 all link to each other with high level, and 2 pin of described photoelectrical coupler U11 and U12 link to each other with 6 pin of photoelectrical coupler U10 through resistance R 37, and 6 pin of described photoelectrical coupler U10 link to each other with 9 pin of GM8123 chip U8, the 5 pin ground connection of described photoelectrical coupler U10,8 pin link to each other with high level, 3 pin of described photoelectrical coupler U10 link to each other through 1 pin of resistance R 33 with 485 communication transceiver U15,2 pin of described photoelectrical coupler U10 respectively with capacitor C 3,8 pin of 485 communication transceiver U15 link to each other with 8 pin of photoelectrical coupler U11, another termination of described capacitor C 3 and+ground that VOUT is corresponding, 8 pin of described photoelectrical coupler U11 link to each other with 8 pin of photoelectrical coupler U12,6 pin of described photoelectrical coupler U11 link to each other with 8 pin of this chip through resistance R 24,6 pin of described photoelectrical coupler U12 link to each other with 8 pin of this chip through resistance R 25,6 pin of described photoelectrical coupler U11 and U12 are connected to 3 pin and 4 pin of 485 communication transceiver U15 respectively, 2 pin of described 485 communication transceiver U15 link to each other with 3 pin of this chip, 5 pin of described 485 communication transceiver U15 connect and+ground that VOUT is corresponding, 6 pin link to each other with R8 one end with resistance R 9 respectively with 7 pin, the described R8 other end connects and+ground that VOUT is corresponding through resistance R 44 and diode D6 respectively, and the positive pole of described diode D6 connects and+ground that VOUT is corresponding, the other end of described R9 links to each other with resistance R 45 1 ends with the negative pole of diode D7 respectively, described resistance R 45 other ends are connected to high level, and the positive pole of described diode D7 connects and+ground that VOUT is corresponding;
Referring to Fig. 8, the photoelectrical coupler U13 of wireless terminal transport module 18 and the 3rd pin of U14 link to each other with 22 pin of single-chip microcomputer U1 and 3 pin of GM8123 chip U8 with R35 through resistance R 34 respectively, 5 pin of described photoelectrical coupler U13 and U14 all connect and+ground that VOUT is corresponding, 2 pin of described photoelectrical coupler U13 and U14 all link to each other with high level, and 2 pin of described photoelectrical coupler U13 and U14 link to each other with 6 pin of photoelectrical coupler U9 through resistance R 38, and 6 pin of described photoelectrical coupler U9 link to each other with 4 pin of GM8123 chip U8, the 5 pin ground connection of described photoelectrical coupler U9,8 pin link to each other with high level, 3 pin of described photoelectrical coupler U9 link to each other through 1 pin of resistance R 36 with 485 communication transceiver U16,2 pin of described photoelectrical coupler U9 respectively with capacitor C 4,8 pin of 485 communication transceiver U16 link to each other with 8 pin of photoelectrical coupler U13, another termination of described capacitor C 4 and+ground that VOUT is corresponding, 8 pin of described photoelectrical coupler U13 link to each other with 8 pin of photoelectrical coupler U14,6 pin of described photoelectrical coupler U13 link to each other with 8 pin of this chip through resistance R 26,6 pin of described photoelectrical coupler U14 link to each other with 8 pin of this chip through resistance R 27,6 pin of described photoelectrical coupler U13 and U14 are connected to 3 pin and 4 pin of 485 communication transceiver U16 respectively, 2 pin of described 485 communication transceiver U16 link to each other with 3 pin of this chip, 5 pin of described 485 communication transceiver U16 connect and+ground that VOUT is corresponding, 6 pin link to each other with R13 one end with resistance R 14 respectively with 7 pin, the described R13 other end connects and+ground that VOUT is corresponding through resistance R 46 and diode D8 respectively, and the positive pole of described diode D8 connects and+ground that VOUT is corresponding, the other end of described R14 links to each other with resistance R 47 1 ends with the negative pole of diode D9 respectively, described resistance R 47 other ends are connected to high level, and the positive pole of described diode D9 connects and+ground that VOUT is corresponding;
Referring to Fig. 9, liquid crystal interface module 19 is an interface circuit, JP1 is a double interface structure, 9～16 pin of described JP1 link to each other with 39～32 pin of single-chip microcomputer U1 respectively, 4 pin are held in writing of described JP1, read end 5 pin and reset end 8 pin respectively with 16 pin of single-chip microcomputer U1,17 pin link to each other with 6 pin, address end 6 pin of described JP1 link to each other with 2 pin with 19 pin of latch U2 respectively with 7 pin, 2 pin of described JP1 all link to each other with high level with 19 pin, the 8 foot meridian capacitor C30 of described JP1 link to each other with 2 pin with capacitor C 29 backs, the contact mutually of described capacitor C 30 and capacitor C 29 is provided with an earth point, the 1 pin ground connection of described JP1, and 1 pin of JP1 links to each other with 18 pin through slide rheostat RP1,2 pin of described JP1 link to each other with the slide plate of slide rheostat RP1,20 pin of described JP1 link to each other with the collector of triode Q4, the grounded emitter of described triode Q4, base stage links to each other with 3 pin of photoelectrical coupler U17 through resistance R 41,4 pin of described photoelectrical coupler U17 link to each other with high level, 2 pin ground connection, 1 pin links to each other with 5 pin of single-chip microcomputer U1 through resistance R 40.
Claims (1)
1. main controller for sewage discharge of intelligent type sewage discharge monitoring system, it is characterized in that: described master controller (1) includes processor module (11), I/O expansion module (12), keyboard circuit (13), indicator light circuit (14), control circuit (15), serial ports expansion module (16), flowmeter transport module (17), wireless terminal transport module (18), liquid crystal interface module (19);
Described processor module (11) includes single-chip microcomputer U1 and latch U2, the P0 mouth of described single-chip microcomputer U1 (i.e. 32～39 pin) is as the data transmission mouth, the P0 mouth of described single-chip microcomputer U1 links to each other with the signal input of latch U2, be 32 of single-chip microcomputer U1,33,34,35,36,37,38 and 39 pin respectively with 18 of latch U2,17,14,13,8,7,4 link to each other with 3 pin, the input end of clock X1 of described single-chip microcomputer U1 and X2 are serially connected with a crystal oscillator Y1, be that 18 of single-chip microcomputer U1 links to each other with the two ends of crystal oscillator Y1 respectively with 19 pin, described capacitor C 22 and C21 serial connection back are in parallel with crystal oscillator Y1, the contact place of described capacitor C 22 and C21 is provided with an earth point (referring to the GND corresponding with VCC) describedly, the 1 pin ground connection of described latch U2,11 pin link to each other with 30 pin of U1;
I/O expansion module (12) includes one 8255 chip U3, data transmission mouth 27～34 pin of described 8255 chip U3 link to each other with data transmission mouth 32～39 pin of single-chip microcomputer U1 respectively, read data end 5 pin of described 8255 chip U3, write data end 36 pin and reset terminal 35 pin respectively with 17 pin of single-chip microcomputer U1,16 pin, 25 pin link to each other, address end 8 pin of described 8255 chip U3, address end 9 pin and sheet choosing end 6 pin respectively with 6 pin of latch U2,5 pin link to each other with 16 pin, 1～4 pin of described 8255 chip U3 as the alignment of keyboard respectively through pull-up resistor R12, R11, R10 links to each other with high level with R42,18～20 pin of described 8255 chip U3 as the line of keyboard respectively through pull-up resistor R15, R16 links to each other with high level with R17; Described trigger switch S1～4 one ends link to each other with 18 pin of 8255 chip U3, the other end links to each other with 1 pin with 4,3,2 of 8255 chip U3 respectively, described trigger switch S5～8 one ends link to each other with 19 pin of 8255 chip U3, the other end links to each other with 1 pin with 4,3,2 of 8255 chip U3 respectively, described trigger switch S9～12 1 ends link to each other with 20 pin of 8255 chip U3, the other end links to each other with 1 pin with 4,3,2 of 8255 chip U3 respectively, as shown in Figure 4; 22,23,24 of described 8255 chip U3 link to each other with high level VCC through LED 1, LED2, LED3 and LED4 respectively as the signal lamp mouth with 25 pin;
Civil power through Switching Power Supply be transformed to+introduce control circuit (15) by joint J1 behind the 12V, after described live wire inserts respectively with resistance R 5, resistance R 6 links to each other with the positive pole of diode D1, the other end of described resistance R 5 and R6 links to each other with 1 pin of photoelectrical coupler U4 and the base stage of triode Q1 respectively, 4 pin of described photoelectrical coupler U4 link to each other with high level through pull-up resistor R22, and 4 pin of photoelectrical coupler U4 link to each other with 27 pin of single-chip microcomputer U1,2 pin of described photoelectrical coupler U4 link to each other with the 12GND of joint J1,3 pin ground connection, the base stage of described triode Q1 links to each other with 3 pin of photoelectrical coupler U5 through resistance R 7,1 pin of described photoelectrical coupler U5 links to each other through 14 pin of resistance R 1 with 8255 chip U3, the 2 pin ground connection of described photoelectrical coupler U5,4 pin of described photoelectrical coupler U5 link to each other with the negative pole of diode D1, the negative pole of its described diode D1 links to each other with the negative pole of diode D5, the positive pole of described diode D5 links to each other with the 12V power supply, the emitter of described triode Q1 links to each other with the 12GND of joint J1, collector links to each other with 2 pin of relay J DQ1, and 2 pin of described relay J DQ1 link to each other with the positive pole of diode D2, the negative pole of described diode D2 links to each other with the negative pole of diode D1,1 pin of described relay J DQ1 links to each other with the negative pole of diode D2, the negative pole of described diode D5 links to each other with 1 pin of photoelectrical coupler U6 through resistance R 3,2 pin of described photoelectrical coupler U6 and the equal ground connection of 3 pin, 4 pin of described photoelectrical coupler U6 link to each other with high level through pull-up resistor R23, and 4 pin of described photoelectrical coupler U6 link to each other with 28 pin of single-chip microcomputer U1, described diode D5 links to each other with the negative pole of diode D3, the positive pole of described diode D3 is connected to 2 pin of relay J DQ2 and the collector of triode Q2,1 pin of described relay J DQ2 is connected to the negative pole of diode D5, the emitter of described triode Q2 links to each other with the 12GND of joint J1, base stage links to each other with 4 pin of photoelectrical coupler U7 through resistance R 29, and 4 pin of described photoelectrical coupler U7 link to each other with the 12V power supply through resistance R 28,4 pin of described photoelectrical coupler U7 link to each other with the 12GND of joint J1 through a filter capacitor C19 simultaneously, the 2 pin ground connection of described photoelectrical coupler U7,3 pin link to each other with the 12GND of joint J1, and 1 pin of described photoelectrical coupler U7 is connected to 16 pin of 8255 chip U3 through resistance R 2;
Described serial ports expansion module (16) is made of GM8123 chip U8, input end of clock 1 pin of described GM8123 chip U8 links to each other with the two ends of crystal oscillator Y2 respectively with 2 pin, described capacitor C 23 and C24 serial connection back are in parallel with crystal oscillator Y2, the joining of described crystal oscillator C23 and C24 is provided with an earth point, 10 pin of described GM8123 chip U8,11 pin and the equal ground connection of 19 pin, 20 of described GM8123 chip U8 is connected with high level, and 12～18 pin of described GM8123 chip U8 link to each other with 14 pin with 10,11,26,8,7,15 of single-chip microcomputer U1 respectively;
The photoelectrical coupler U11 of flowmeter transport module (17) and the 3rd pin of U12 link to each other with 23 pin of single-chip microcomputer U1 and 8 pin of GM8123 chip U8 with R32 through resistance R 31 respectively, 5 pin of described photoelectrical coupler U11 and U12 all connect and+ground that VOUT is corresponding, 2 pin of described photoelectrical coupler U11 and U12 all link to each other with high level, and 2 pin of described photoelectrical coupler U11 and U12 link to each other with 6 pin of photoelectrical coupler U10 through resistance R 37, and 6 pin of described photoelectrical coupler U10 link to each other with 9 pin of GM8123 chip U8, the 5 pin ground connection of described photoelectrical coupler U10,8 pin link to each other with high level, 3 pin of described photoelectrical coupler U10 link to each other through 1 pin of resistance R 33 with 485 communication transceiver U15,2 pin of described photoelectrical coupler U10 respectively with capacitor C 3,8 pin of 485 communication transceiver U15 link to each other with 8 pin of photoelectrical coupler U11, another termination of described capacitor C 3 and+ground that VOUT is corresponding, 8 pin of described photoelectrical coupler U11 link to each other with 8 pin of photoelectrical coupler U12,6 pin of described photoelectrical coupler U11 link to each other with 8 pin of this chip through resistance R 24,6 pin of described photoelectrical coupler U12 link to each other with 8 pin of this chip through resistance R 25,6 pin of described photoelectrical coupler U11 and U12 are connected to 3 pin and 4 pin of 485 communication transceiver U15 respectively, 2 pin of described 485 communication transceiver U15 link to each other with 3 pin of this chip, 5 pin of described 485 communication transceiver U15 connect and+ground that VOUT is corresponding, 6 pin link to each other with R8 one end with resistance R 9 respectively with 7 pin, the described R8 other end connects and+ground that VOUT is corresponding through resistance R 44 and diode D6 respectively, and the positive pole of described diode D6 connects and+ground that VOUT is corresponding, the other end of described R9 links to each other with resistance R 45 1 ends with the negative pole of diode D7 respectively, described resistance R 45 other ends are connected to high level, and the positive pole of described diode D7 connects and+ground that VOUT is corresponding;
The photoelectrical coupler U13 of wireless terminal transport module (18) and the 3rd pin of U14 link to each other with 22 pin of single-chip microcomputer U1 and 3 pin of GM8123 chip U8 with R35 through resistance R 34 respectively, 5 pin of described photoelectrical coupler U13 and U14 all connect and+ground that VOUT is corresponding, 2 pin of described photoelectrical coupler U13 and U14 all link to each other with high level, and 2 pin of described photoelectrical coupler U13 and U14 link to each other with 6 pin of photoelectrical coupler U9 through resistance R 38, and 6 pin of described photoelectrical coupler U9 link to each other with 4 pin of GM8123 chip U8, the 5 pin ground connection of described photoelectrical coupler U9,8 pin link to each other with high level, 3 pin of described photoelectrical coupler U9 link to each other through 1 pin of resistance R 36 with 485 communication transceiver U16,2 pin of described photoelectrical coupler U9 respectively with capacitor C 4,8 pin of 485 communication transceiver U16 link to each other with 8 pin of photoelectrical coupler U13, another termination of described capacitor C 4 and+ground that VOUT is corresponding, 8 pin of described photoelectrical coupler U13 link to each other with 8 pin of photoelectrical coupler U14,6 pin of described photoelectrical coupler U13 link to each other with 8 pin of this chip through resistance R 26,6 pin of described photoelectrical coupler U14 link to each other with 8 pin of this chip through resistance R 27,6 pin of described photoelectrical coupler U13 and U14 are connected to 3 pin and 4 pin of 485 communication transceiver U16 respectively, 2 pin of described 485 communication transceiver U16 link to each other with 3 pin of this chip, 5 pin of described 485 communication transceiver U16 connect and+ground that VOUT is corresponding, 6 pin link to each other with R13 one end with resistance R 14 respectively with 7 pin, the described R13 other end connects and+ground that VOUT is corresponding through resistance R 46 and diode D8 respectively, and the positive pole of described diode D8 connects and+ground that VOUT is corresponding, the other end of described R14 links to each other with resistance R 47 1 ends with the negative pole of diode D9 respectively, described resistance R 47 other ends are connected to high level, and the positive pole of described diode D9 connects and+ground that VOUT is corresponding;
Liquid crystal interface module (19) is an interface circuit, JP1 is a double interface structure, 9～16 pin of described JP1 link to each other with 39～32 pin of single-chip microcomputer U1 respectively, 4 pin are held in writing of described JP1, read end 5 pin and reset end 8 pin respectively with 16 pin of single-chip microcomputer U1,17 pin link to each other with 6 pin, address end 6 pin of described JP1 link to each other with 2 pin with 19 pin of latch U2 respectively with 7 pin, 2 pin of described JP1 all link to each other with high level with 19 pin, the 8 foot meridian capacitor C30 of described JP1 link to each other with 2 pin with capacitor C 29 backs, the contact mutually of described capacitor C 30 and capacitor C 29 is provided with an earth point, the 1 pin ground connection of described JP1, and 1 pin of JP1 links to each other with 18 pin through slide rheostat RP1,2 pin of described JP1 link to each other with the slide plate of slide rheostat RP1,20 pin of described JP1 link to each other with the collector of triode Q4, the grounded emitter of described triode Q4, base stage links to each other with 3 pin of photoelectrical coupler U17 through resistance R 41,4 pin of described photoelectrical coupler U17 link to each other with high level, 2 pin ground connection, 1 pin links to each other with 5 pin of single-chip microcomputer U1 through resistance R 40.
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