CN101783165A - Semiconductor memory, semiconductor memory system and corresponding programming method - Google Patents
Semiconductor memory, semiconductor memory system and corresponding programming method Download PDFInfo
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Abstract
The invention discloses a semiconductor memory, a semiconductor memory system and a corresponding programming method. The semiconductor memory is used to store user data and comprises a storage array and a bit reversal device connected with the storage array, wherein the storage array contains a large number of storage units. When user data is written in the memory to store, the bit reversal device can perform bit reversal treatment to the user data and output the user data to the storage units for storage. The semiconductor memory and memory system of the invention uses the bit reversal device to selectively perform bit reversal treatment to the user data according to the nature of the user data and output the user data into the storage units, thus reducing the number of the storage units to be charged and effectively lowering the power consumption of the semiconductor memory.
Description
Technical field
The present invention relates to memory area, relate in particular to a kind of semiconductor memory, semiconducter memory system and corresponding programmed method thereof of data on file data.
Background technology
Semiconductor memory (memory) needs to charge for the storage unit (memory cell) in the storer when storage subscriber data data usually, thereby with in the user data write storage unit.The storage unit of write-once data correspondence is many more, need be many more to the number of storage unit charging, and the power consumption of storer is then big more.Supposing once needs simultaneously 8 storage unit to be carried out the user data read-write, writes 10100000 in storer.The original state of storer is 11111111, and the storage unit of writing " 0 " needs charging, and the storage unit of one writing does not need charging.Wherein, the store status of storer, and one writing or " 0 " charges to storage unit is provided with decision by the attribute own or the user of storer.2 " 1 " and 6 " 0 " are arranged in 10100000, thereby write at 10100000 o'clock, need be to 6 storage unit chargings, 2 storage unit need not charged in addition, and power consumption is bigger.
The bit reversal technology can solve the above-mentioned power consumption that a plurality of " 0 " are caused that writes simultaneously preferably.As write at 10100000 o'clock, reversing to 10100000 earlier obtains only containing in 01011111,01,010,000 two " 0 ", only needs this moment 2 storage unit are charged, and saves power consumption greatly.Reading above-mentioned 10100000 o'clock of writing, need to 01011111 once more counter-rotating obtain the original user data 10100000 that writes.This shows that the bit reversal Technology Need carries out bit reversal respectively when writing user data and read data in the storage, thereby save power consumption.If what begin to write is 01011111, only needing does not then need to carry out bit reversal to two storage unit chargings, and writing direct gets final product.Though the bit reversal technology can effectively be saved power consumption, can storer is carried out user data when read-write, how distinguishing which storage unit needs or has been inverted, and which storage unit does not need or is not inverted, and is still a technical barrier.
As shown in Figure 1, traditional accumulator system (memory system) 1 is provided with controller (controller) 2 and flash memory (flash memory) 3, be provided with transmission line and sign bit line (flag bit line) between controller 2 and the flash memory 3, the built-in a large amount of storage unit of flash memory.When 2 pairs of flash memories of controller 3 carried out the user data read-write, transmission line was used for transfer instruction or data.Suppose that controller 2 desires write 8 storage unit in the flash memory 3 with 8 bits in the user data 10100000, controller 2 is judged the number of " 0 " and " 1 " in this document 10100000, draw the number of the number of " 0 " greater than " 1 ", then zone bit (flag bit) is made as high level " 1 ", after 10100000 counter-rotatings 01011111 are stored in the flash memory 3, simultaneously zone bit " 1 " are stored in the flash memory 3 in the lump by the sign bit line; If write user data is 01011111, controller 2 is judged the number of the number of " 0 " less than " 1 ", it is low level " 0 " that zone bit then is set, and directly is stored in the flash memory 3 01011111, simultaneously zone bit " 0 " is stored in the flash memory 3 in the lump by the sign bit line.When reading data, controller 2 is according to zone bit " 1 " or " 0 " of storage, and judging needs counter-rotating or directly export user data.
Traditional bit reversal technology is to increase the sign bit line between controller and flash memory, judge by controller whether the data that writes needs counter-rotating, and utilize the sign bit line to write the counter-rotating mark to indicate the data of writing in the storer and whether reverse, can effectively reduce the storage unit number that needs charging, reach the effect that reduces power consumption.But controller need judge that every writes data and whether needs counter-rotating, increased controller the processing burden, reduce the read or write speed of controller; And one of extra increase indicates bit line between controller and flash memory, has greatly increased the manufacturing cost of semiconducter memory system.
Summary of the invention
The object of the present invention is to provide a kind of semiconductor memory, semiconducter memory system and corresponding programmed method thereof that reduces power consumption of memory.
The invention provides a kind of semiconductor memory, this semiconductor memory is used to store the subscriber data data, the bit reversal device that has storage array and link to each other with storage array, and storage array has a large amount of storage unit.When writing user data to memory stores, the bit reversal device can carry out this user data outputing to after bit reversal is handled the storage bit storage in the storage array.
Further, above-mentioned bit reversal device has judging unit and the counter-rotating unit that links to each other with judging unit.Wherein, judging unit is used for judging whether write user data needs counter-rotating, and the counter-rotating mark of output judged result; The counter-rotating unit is used for will writing user data according to the counter-rotating mark to carry out outputing to storage unit after bit reversal is handled.
Further, when above-mentioned counter-rotating was labeled as high level, the counter-rotating unit was used for carrying out outputing to storage unit behind the bit reversal with writing user data; When above-mentioned counter-rotating was labeled as low level, the counter-rotating unit was used for directly writing user data and outputs to storage unit.
Semiconductor memory of the present invention optionally carries out bit reversal to writing user data by the bit reversal device, reduces the number of the storage unit that needs charging, effectively reduces the power consumption of storer.
The invention provides a kind of semiconducter memory system, the bit reversal device that the storer that it comprises controller and is connected with controller, storer have storage array and be connected with storage array.The bit reversal device is used for user's user data is carried out outputing to after bit reversal is handled storage unit in the storage array.
Further, above-mentioned bit reversal device has judging unit and counter-rotating unit, and wherein, judging unit is used for judging whether write user data needs counter-rotating, and the counter-rotating mark of output judged result; The counter-rotating unit is connected in judging unit, is used for will writing user data according to the counter-rotating mark and carries out outputing to the interior storage unit of storage array after bit reversal is handled.
Semiconducter memory system of the present invention, the bit reversal device by memory built-in optionally carries out bit reversal to writing user data, reduces the number of the storage unit that needs charging, effectively reduces the power consumption of storer; Compare with traditional accumulator system, need not increases the sign bit line between controller and storer, effectively lower the manufacturing cost of accumulator system; And utilize the bit reversal device of memory built-in to judge and carry out the work of bit reversal, need not expend the processing resource of controller, can reach the effect of effective quickening controller processing speed.
The present invention also provides a kind of programmed method of semiconductor memory, storer has storage array, storage array has a plurality of storage unit, and storer has the bit reversal device, and described programmed method comprises step: utilize the bit reversal device will write user data and carry out outputing to storage unit after bit reversal is handled.
Further, the above-mentioned user data that writes is carried out bit reversal and handles and specifically to comprise step: judge whether write user data needs counter-rotating, and the counter-rotating mark of output judged result; According to the counter-rotating mark, carry out bit reversal or directly export this writing user data to writing user data.
The programmed method of semiconductor memory of the present invention mainly utilizes the bit reversal device will write user data and carries out outputing to storage unit after bit reversal is handled, and reduces the number of the storage unit that needs charging, thereby effectively reduces the power consumption of storer.
Description of drawings
Fig. 1 is the functional framework figure of conventional memory systems;
Fig. 2 is the functional structure chart of a kind of storer in the specific embodiment of the invention;
Fig. 3 is the functional structure chart of another kind of storer in the specific embodiment of the invention;
Fig. 4 is the functional structure chart of another storer in the specific embodiment of the invention;
Fig. 5 is the functional structure chart of a kind of accumulator system in the specific embodiment of the invention;
Fig. 6 is the illustrative view of functional configuration of the judging unit among Fig. 3, Fig. 4 and Fig. 5.
Embodiment
When carrying out bit reversal, need expend the defective of a large amount of controller resources, the invention provides a kind of semiconductor memory of built-in bit reversal device at above-mentioned traditional accumulator system.
As shown in Figure 2, semiconductor memory provided by the invention comprises bit reversal device and storage array, and wherein the bit reversal device is connected with storage array, and storage array has a large amount of storage unit.When the subscriber data writing data into memory, storer utilizes built-in bit reversal device that user data is carried out outputing to after bit reversal is handled cell stores in the storage array.When the bit reversal device carried out the bit reversal processing to data, its concrete bit reversal was handled the following multiple situation that comprises: can output to cell stores after the whole counter-rotatings of bit of data correspondence; Can directly data directly be outputed to cell stores, and data not carried out bit reversal; Can also carry out bit reversal to partial data, and other data are not carried out bit reversal.
Compare with traditional accumulator system, the storer of above-mentioned specific embodiment carries out being input to cell stores behind the bit reversal to the subscriber data data by built-in bit reversal device, make to save the controller resource, accelerate the processing speed of controller, and can reduce power consumption of memory simultaneously by bit reversal.
As shown in Figure 3, the invention provides another kind of semiconductor memory, comprise bit reversal device and storage array.Wherein the bit reversal device has judging unit and counter-rotating unit, and connects by data line and sign bit line between bit reversal device and the storage array.When the user data write store, judging unit in the bit reversal device judges that at first this writes user data and whether needs counter-rotating, and the counter-rotating mark of judged result outputed to the counter-rotating unit, the counter-rotating unit carries out the bit reversal processing according to this counter-rotating mark to user data.Wherein, this bit reversal is handled the following 2 kinds of situations that comprise: one for carrying out bit reversal according to the counter-rotating mark to user data, and two for not carrying out directly output of bit reversal to user data according to the counter-rotating mark.As the number that writes " 0 " bit in the user data than " 1 " bit number for a long time, and judging unit output counter-rotating is labeled as the high level of " 1 ", indicating data and need carry out bit reversal, and the counter-rotating unit then reverses and outputs to cell stores after these data; Otherwise, the number of " 0 " bit than " 1 " bit number after a little while in the user data, judging unit output counter-rotating is labeled as the low level of " 0 ", and indicating user data does not need counter-rotating, and the counter-rotating unit does not then carry out bit reversal to these data and directly exports this user data and store in storage unit.
Here it is emphasized that for the data of storing in can recognition memory cell whether pass through bit reversal, the user data of bit reversal device output and the corresponding counter-rotating mark of the judged result of reversing that whether needs need be stored in the storage unit in the lump.As shown in Figure 3, user data carries out bit reversal through the bit reversal device to be handled the back and transfers in the storage unit by data line and store, and the corresponding counter-rotating mark that whether needs the judged result of reversing then transfers in the storage unit by counter-rotating mark bit line to be stored.This shows that the counter-rotating mark of this judged result both had been used to indicate user data and whether has needed to carry out bit reversal, also be used to indicate this user data and whether carried out bit reversal.
Compare with storer shown in Figure 2, the bit reversal device of Fig. 3 is built-in with judging unit.Whether need carry out bit reversal, by the counter-rotating unit user data that needs reverse is carried out bit reversal again if prejudging the subscriber data data by judging unit, thereby save the power consumption of storer.Specifically for instance, if the user data that writes is " 01011111 ", then this user data is not reversed and be directly inputted to and store in the storage unit; If the user data that writes is " 10100000 ", then this user data is carried out being input to behind the bit reversal and store in the storage unit, reduce the number of the storage unit that needs charging, thus the power consumption of effectively saving storer.And judging unit and counter-rotating unit by memory built-in hardware circuit come the subscriber data data are carried out optionally bit reversal, can avoid Consumption Control device internal resource to judge whether user data needs to carry out bit reversal, increase the processing speed of accumulator system middle controller.
As shown in Figure 4, the present invention also provides another kind of storer, and it comprises bit reversal device, storage array and reads the counter-rotating unit.The counter-rotating unit that has judging unit in the bit reversal device and link to each other with judging unit, storage array has a large amount of storage unit.Wherein, the bit reversal device links to each other with storage array by data line and sign bit line, storage array by data line and sign bit line with read the unit that reverses and link to each other.Storer among Fig. 4 has increased by one than the storer among Fig. 3 and has read the counter-rotating unit, and that corresponding bit reversal device of bit reversal device among Fig. 4 and storage array and Fig. 3 and storage array are write fashionable function in the subscriber data data is consistent.When the subscriber data data are written to storer, at first the judgment unit judges in the bit reversal device this write user data and whether need to carry out bit reversal, and the counter-rotating mark of output judged result is to the counter-rotating unit; The unit that then reverses optionally user data carries out bit reversal according to the counter-rotating mark of judged result, and store in the storage unit of carry-out bit reversal data in the storage array, and the bit reversal device stores the counter-rotating mark of the judged result of this data correspondence in the storage unit in the lump simultaneously.
When reading user data, need read the bit reversal data and the corresponding counter-rotating mark thereof of storage array stored simultaneously, read the counter-rotating unit and the bit reversal data that read are carried out exporting from storer after bit reversal is handled according to the counter-rotating mark.Write fashionable bit reversal with subscriber data and handle and be consistent, when reading data,, then read the bit reversal data that from storage array, to export the counter-rotating unit and carry out from storer, exporting behind once more the bit reversal if counter-rotating is labeled as high level; If counter-rotating is labeled as low level, then reads the bit reversal data that will from storage array, export of counter-rotating unit and directly from storer, export, and these bit reversal data are not carried out once more bit reversal.
This shows that the bit reversal device during reading of data, all needs to carry out bit reversal to data and handles in writing data to storer and storer.Specifically, when writing user data, the bit reversal device carries out bit reversal with this user data to be handled and to obtain the bit reversal data, and with the bit reversal data storage to storage array; When reading user data, utilize and to read counter-rotating unit or bit reversal device and the bit reversal data of storing in the storage array are carried out once more bit reversal handle and to obtain original user data.
In storer shown in Figure 4, when writing the subscriber data data, utilize judgment unit judges whether to need to carry out bit reversal, and the carry-out bit reversal data is stored after carrying out bit reversal by the user data that the counter-rotating unit carries out bit reversal to needs in storage array; When the user reads bit reversal data in the storage array, utilize and read the counter-rotating unit and according to the counter-rotating mark these bit reversal data are carried out bit reversal and handle the back and from storer, export.This shows, by the bit reversal device and read the counter-rotating unit and can effectively accelerate the read or write speed of subscriber data, and reduce the power consumption of storer simultaneously.
Accumulator system as shown in Figure 5 comprises controller and storer as shown in Figure 4, is connected by data line between controller and the storer.Since at memory built-in bit reversal device and read actual hardware circuit such as counter-rotating unit etc.Thereby need between controller and storer, additionally not increase the sign bit line, thus the manufacturing cost of accumulator system effectively reduced, and save the conventional memory systems middle controller and in logic the subscriber data data are carried out the required resource of bit reversal.Certainly, accumulator system shown in Figure 5 also can correspond on the storer shown in Figure 3, does not need the extra counter-rotating unit that reads.During data in reading storer, can utilize counter-rotating unit in the bit reversal device back output storage that reverses once more.The counter-rotating unit can be converted to low level bit " 0 " with high level bit " 1 " with simple not circuit, or low level bit " 0 " is converted to high level bit " 1 ".As in the user data that writes " 0 " bit number than " 1 " bit number for a long time, judging unit output counter-rotating is labeled as the high level of " 1 ", indicating user data and need carry out bit reversal, the counter-rotating unit then reverses and outputs to cell stores after these data; Otherwise, the number of " 0 " bit is lacked than " 1 " bit number in the user data, when perhaps the number of " 0 " bit equates with " 1 " bit number in the user data, judging unit output counter-rotating is labeled as the low level of " 0 ", indicating user data does not need counter-rotating, and the counter-rotating unit does not then carry out bit reversal to this user data and directly exports this user data and store in storage unit.
The present invention also provides the programmed method of above-mentioned semiconductor memory of a kind of correspondence and accumulator system correspondence.When writing user data, utilize the bit reversal device in the storer that this user data that writes is carried out outputing in the interior storage unit of storer after bit reversal is handled to storer.Bit reversal is handled corresponding concrete steps: judge whether the user data that writes needs counter-rotating, and the counter-rotating mark of output judged result; According to this counter-rotating mark, the user data that writes is carried out bit reversal or directly exports described data.Can certainly before handling, bit reversal judge earlier whether the data that write need counter-rotating, and the counter-rotating mark of output judged result.As in the user data that writes " 0 " bit number than " 1 " bit number for a long time, judging unit output counter-rotating is labeled as the high level of " 1 ", indicating user data and need carry out bit reversal, the counter-rotating unit then reverses and outputs to cell stores after these data; Otherwise, the number of " 0 " bit is lacked than " 1 " bit number in the user data, when perhaps the number of " 0 " bit equates with " 1 " bit number in the user data, judging unit output counter-rotating is labeled as the low level of " 0 ", indicating user data does not need counter-rotating, and the counter-rotating unit does not then carry out bit reversal to this user data and directly exports this user data and store in storage unit.
As shown in Figure 6, the judging unit among Fig. 3, Fig. 4 and Fig. 5 has current comparator, and this current comparator has two current input terminals, and the electric current of two current input terminals input is compared the counter-rotating mark of input judged result.When writing user data to storer, judging unit is compared with reference current Iref to n the pairing electric current summation of the bit Isum that writes write-once in the data, and the counter-rotating flag F lag of output judged result.As 8 bits importing the data write-once are 01011111, then Isum is the electric current summation of 5 " 1 " storage unit, and the i.e. electric current summation of 4 storage unit of half bit that reference current Iref gets 8 bit correspondences all the time, thereby Isum＞Iref, counter-rotating flag F lag is set to high Horizon " 1 ", and the data that write that indicating this 8 bit do not need to carry out bit reversal.It is pointed out that here reference current gets the electric current summation of half storage unit that need charge in n the storage unit that writes the data corresponding stored, n gets even numbers such as 8 or 16; It is self-defined according to the attribute of storer by the deviser that counter-rotating flag F lag high level or low level indicate counter-rotating.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (14)
1. the semiconductor memory of a storaging user data, has storage array, it is characterized in that described storer also has the bit reversal device that links to each other with described storage array, described bit reversal device is used for described user data is carried out outputing to described storage array after bit reversal is handled.
2. storer as claimed in claim 1 is characterized in that, described bit reversal device has judging unit and counter-rotating unit.
3. storer as claimed in claim 2 is characterized in that, described judging unit is used to judge whether described user data needs counter-rotating, and the counter-rotating mark of output judged result.
4. storer as claimed in claim 3 is characterized in that, described counter-rotating unit is connected in described judging unit, is used for according to described counter-rotating mark described user data being carried out outputing to described storage array after bit reversal is handled.
5. storer as claimed in claim 4 is characterized in that,
When described counter-rotating was labeled as high level, described counter-rotating unit carried out described user data to output to described storage array behind the bit reversal;
When described counter-rotating was labeled as low level, described counter-rotating unit directly outputed to described storage array with described user data.
6. storer as claimed in claim 5 is characterized in that,
In described user data the number of " 0 " bit than " 1 " bit number for a long time, the counter-rotating mark of described judging unit output high level;
When the number of " 0 " bit in described user's user data is less than or equals " 1 " bit number, the counter-rotating mark of described judging unit output low level.
7. as the described storer of each claim in the claim 1 to 6, it is characterized in that, described bit reversal device carries out bit reversal processing back carry-out bit reversal data to described user data and stores in storage array, described storer also has the counter-rotating of reading unit, and the described counter-rotating unit that reads is used for the described bit reversal data that storage array is stored are carried out bit reversal processing back output storage.
8. as the described storer of each claim in the claim 3 to 6, it is characterized in that, described judging unit has current comparator, described current comparator has two current input terminals, described current comparator compares the electric current of described two current input terminals input, the counter-rotating mark of output judged result.
9. the programmed method of the semiconductor memory of a storaging user data, described storer has storage array, it is characterized in that, described storer has the bit reversal device that links to each other with described storage array, and described programmed method comprises step: utilize described bit reversal device that described user data is carried out outputing to described storage array after bit reversal is handled.
10. programmed method as claimed in claim 9 is characterized in that, described user data is carried out the bit reversal processing specifically comprise step:
Judge whether described user data needs counter-rotating, and the counter-rotating mark of output judged result;
According to described counter-rotating mark, described user data is carried out bit reversal or directly exports described user data.
11. programmed method as claimed in claim 10 is characterized in that,
In user data the number of " 0 " bit than " 1 " bit number for a long time, described counter-rotating is labeled as high level " 1 ";
When the number of " 0 " bit in the user data was less than or equals " 1 " bit number, described counter-rotating was labeled as low level " 0 ".
12. semiconducter memory system, the storer that comprises controller and be connected with described controller, described storer has storage array, it is characterized in that, described storer also has the bit reversal device that links to each other with storage array, and described bit reversal device is used for described user data is carried out outputing to described storage array after bit reversal is handled.
13. accumulator system as claimed in claim 12 is characterized in that, described bit reversal device has judging unit and counter-rotating unit, wherein,
Described judging unit is used to judge whether described user data needs counter-rotating, and the counter-rotating mark of output judged result;
Described counter-rotating unit is connected in described judging unit, is used for according to described counter-rotating mark described user data being carried out outputing to described storage array after bit reversal is handled.
14. accumulator system as claimed in claim 13 is characterized in that,
In user data the number of " 0 " bit than " 1 " bit number for a long time, described counter-rotating is labeled as high level " 1 ";
When the number of " 0 " bit in the user data was less than or equals " 1 " bit number, described counter-rotating was labeled as low level " 0 ".
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Application publication date: 20100721 |