CN1017674B - Vetical sawtooth generator - Google Patents

Vetical sawtooth generator

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Publication number
CN1017674B
CN1017674B CN 88103051 CN88103051A CN1017674B CN 1017674 B CN1017674 B CN 1017674B CN 88103051 CN88103051 CN 88103051 CN 88103051 A CN88103051 A CN 88103051A CN 1017674 B CN1017674 B CN 1017674B
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CN
China
Prior art keywords
capacitor
voltage
signal
sawtooth signal
deflection
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CN 88103051
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Chinese (zh)
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CN1037807A (en
Inventor
彼得·爱德华·哈费尔
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RCA Licensing Corp
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RCA Licensing Corp
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Priority to CN 88103051 priority Critical patent/CN1017674B/en
Publication of CN1037807A publication Critical patent/CN1037807A/en
Publication of CN1017674B publication Critical patent/CN1017674B/en
Expired legal-status Critical Current

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Abstract

The present invention relates to a vertical sawtooth generator in which capacitors C1 and C2 are connected in series to the endpoint (500a) of a switch U6a. When U6a is switched on, the two capacitors form a sawtooth signal Vo' at the endpoint (500a) through switch discharge, wherein the signal has a downslope part corresponding to flyback intervals. When U6a is switched off, the capacitors (C1, C2) are charged by a current source R2 so as to form the upslope part of Vo', corresponding to scanning intervals. An S former connected to the endpoint (703) of C1 and C2 comprises a capacitor C3, resistors (R8, R4, R5) and clamp devices (D1, D2). The S former makes Vo' present an S shape at the endpoints of the scanning intervals and DC restoration before each scanning interval starts.

Description

Vetical sawtooth generator
The present invention relates to a kind ofly, more particularly, relate to and can be used in the deflection system for reducing this generator that flicker visibility is provided with for television yoke produces the saw-toothed wave generator of S correction signal.
The field rate flicker sensation critical value of a television display system is a function of display brightness and flicker frequency.For many years, even reached the degree that flicker is easily seen for the increase of higher field frequency system (for example 60 hertz system of NTSC) display brightness, and low field frequency system (for example 50 hertz system of PAL) is harmful to beyond doubt.A method that addresses this problem is that the field frequency of displayed image is doubled.According to the prior art system, a video input signals is stored in the field memory, every of storage can be resumed in memory, promptly " read " twice and with the duplicate rows of video input signals frequently and frame frequency show, therefore the flicker frequency of shown image is also double, thereby has reduced the visibility of flicker.
The name of authorizing people such as Wden Hollander on October 20th, 1987 is called have been described one in the United States Patent (USP) 4701793 of " having the television display system that reduces the flicker processor " TV pick-up attacnment that reduces flicker is provided.An interlacing base-band television input signal that has given field frequency is provided in this device, provides a vertical synchronizing signal that has impulse waveform by a timing device to the video input signals sensitivity, it is that repetition is carried out on the basis to be four times in field frequency.The pulse of this waveform causes a corresponding phase modulated to deflection current, so that the duration in corresponding vertical-scan period just in time meets with the frame frequency basis and carries out repetition to be four times in the frame frequency basis.
The vertical deflection circuit of a routine will comprise a saw-toothed wave generator, and it and a synchronizing signal that has constant phase are synchronous, and it produces the drive signal with sawtooth waveform.In saw-toothed wave generator, when flyback, capacitor is by a switch discharge; When scanning, by a power source charges.Drive signal is coupled to a switching circuit, to produce a deflection current with respective saw teeth waveform, drive signal contains a ramp portion, and it is corresponding with vertical scanning, so that the time started of ramp portion is showing that corresponding to one the grating top causes the deflection current of scanning.
Because the impulse waveform of vertical synchronizing signal has been carried out phase modulated, in people's such as denHollander device, require also can one to change according to the impulse waveform pattern for basic (frequency) at the peak amplitude of vertical scanning drive signal at the end.
Different drive signal peak amplitudes can cause that compare with the corresponding pulses of the vertical synchronizing signal that produces this ramp portion the zero hour of ramp portion is different, this is owing to the capacitor in the saw-toothed wave generator can become by the peak amplitude of drive signal discharge time, thereby may be different in different fields, consequently the phase place of sweep test deflection current may produce disadvantageous difference with the phase place of being set up by the vertical synchronizing signal of phase modulation.Therefore required even field and even field overlap, and interlocking that odd field and odd field overlapping and even number and odd field are right just can not realize.
Therefore, people wish in each deflection cycle, prevent the influence that time started of drive signal ramp portion is changed by drive signal amplitude (for example peak amplitude).
Producing its nonlinear distortion (being discussed below) is also meeted the requirements by the drive signal that the S shape of sawtooth waveforms is proofreaied and correct.Nonlinear distortion is attributable to such fact: the active centre of the electron beam deflecting does not overlap with the center of the radius of curvature of kinescope screen.Usually the compensation method to this nonlinear distortion is to form a deflection current, in the periodic scan time, this deflection current is not the slope of one section linearity and become one section sine wave, this sinusoidal wave deflection current with all the change reduction of rate of the corresponding positive and negative terminal in center, when electron beam near the top of grating or bottom margin scanning the time, this S shape causes again that sweep speed is slight and reduces and the minimizing of non-linear domain.
In the vertical deflection circuit of some prior arts, with the S shape of the corresponding deflection current of an end of vertical scanning be to finish by the S shape drive signal that saw-toothed wave generator produces.Be subjected to one by the voltage control that produces on the capacitor with the S shape of the corresponding deflection current of the other end of vertical scanning, this capacitor is coupled to the drive signal of a saw-toothed wave generator on the vertical amplifier.
When explaining people's such as denHollander patent, need direct-current coupling between drive signal and the deflecting coil, that is narrated above therefore utilizes capacity coupled S shape method just improper.
As one embodiment of the present of invention, saw-toothed wave generator comprises one to the switch corresponding to the synchronous input signal of deflection frequency (for example by the synchronizing signal of phase modulation) response.First and second capacitors in series form a joining circuit of first end points with switch.When not conducting of switch, a power supply is connected in first end points, with first ramp portion of the output signal that produces saw-toothed wave generator; When switch conduction, each capacitor discharge, and be clamped on predetermined not being subjected on the level of input signal modulation effects.The conducting of switch produces the second portion on the output signal slope opposite with the first direction.Output signal is coupled to link between the 1st and second capacitor by first impedance, with a finish-time in first or second portion of output signal, provides the S shape of output signal.First impedance is including (for example) one the 3rd capacitor, and when switch conduction, this capacitor is also discharged and is positioned at a predetermined numerical value, and one second impedance is connected to union end, provides S shape with another finish-time at the counterpart of output signal.
According to another way of the present invention, a deflection current produces and is coupled on the deflecting coil according to output signal.The sweep test of deflection current carries out phase modulation according to control signal.At each deflection cycle, (deflection current) sweep test is consistent with the sweep test of output signal on phase place.
According to another mode of the present invention:, comprise the gate-controlled switch of a response input signal, with frequency work according to input signal with the tv deflecting device of deflection frequency response synchronous input signal.First and second capacitors form the tandem arrangement that is connected in switch one end, a power supply is connected on the capacitor, so that produce a sawtooth signal that has the slope sweep test at this end, when switch is in first kind of state, the slope sweep test changes according to first kind of direction; When switch is in second kind of state, then change by opposite direction.Impedance with first end points (this end points is connected on the link of first and second capacitor) produces an electric current, and this electric current is coupled to the S shape of the link of above-mentioned two electric capacity with the control sawtooth signal.The clamp device that is connected to first capacitor and second capacitor before the time started of one of first and second parts of scanning, the voltage clamp on first and second capacitors to corresponding predetermined level.
The sawtooth signal of proofreading and correct through S is used for: produce a deflection current of proofreading and correct through S in deflecting coil.
Fig. 1 shows a vertical scanning generator of the embodiment of the invention, and this generator comprises a saw-toothed wave generator,
Fig. 2 (a and b) shows the waveform of the working condition that is used for key diagram 1 circuit.
Fig. 3 shows the block diagram of a television receiver that comprises Fig. 1 generator.
Fig. 4 A-4D is an oscillogram, and the working condition when television receiver utilizes the generator of Fig. 1 is described.
Fig. 5 shows the waveform that is used for key-drawing 1 device working condition.
With reference to figure 1, in an embodiment of the present invention, a lock-out pulse 2V ' is coupled to the vertical oscillation circuit 501 of a vertical scan generator 64, generator 64 can link with the picture tube of 110 ° of 45AX types, pulse 2V ' process phase modulation, the method that produces this pulse is described later.Pulse 2V ' has a nominal frequency 2f v' fv is the vertical synchronizing frequency in TSC-system or the pal television signal baseband here.Pulse 2V ' was separated by the slightly different time intervals, and this specified time interval equals 1/2V, and V represents the cycle of vertical scanning, was 20 milliseconds for Phase Alternation Line system for example.
Ramp generator 500 that is subjected to oscillating circuit 501 control comprises the charging current R that has a resistance 2, R 2Be connected in series capacitor C 1And C 2An end points 500a, resistance R 2Give capacitor C 1And C 2Charging is to form the sweep test of a voltage Vo ' on end points 500a.End points 500a is subjected to an open-collector switching transistor U6a excitation among the comparison circuit U6, so that capacitor C 1And C 2Discharge forms the vertical flyback part of a voltage Vo '.Voltage Vo ' is coupled to the reverse input end of a comparator U5, and the non-inverting input of comparator U5 is by an adjustable Synchronization Control resistance R 20Give direct current biasing, pulse 2V ' by or door 1000 oppositely and by derivative network institute differential, derivative network comprises a capacitor C 4With resistance R 18 to produce pulse 2V ", pulse 2V is " via capacitor C 5Be coupled to the non-return end of comparator U5, the output of comparator U5 forms voltage V on conductor U4a U4, and being connected to the non-inverting input of comparator U6, the reverse input end of comparator U6 gives direct current biasing by the voltage at resistance R 24 two ends.
When vertical scanning, the voltage on the corresponding reverse input end of voltage ratio on the comparator U5 non-inverting input just many, thereby voltage Vu4 than the voltage on the comparator U6 reverse input end just many, so the output transistor U6a of comparator U6 keeps not conducting.
In scanning at the end, when voltage Vo ' was in its peak value, the forward position 900 of the pulse 2V ' of Fig. 1 appearred in moment to as shown in Figure 2.As the result of the opposite and differential of a pulse front edge 900, the voltage on the comparator U5 non-inverting input becomes littler than the voltage on the corresponding reverse input end.Voltage V consequently U4Change to a level, cause that the switching transistor U6a among the comparator U6 becomes conducting less than comparator U6 reverse input end.
The conducting of transistor U6a makes capacitor C 1And C 2Discharge causes that voltage Vo ' reaches the saturation level of transistor U6a, promptly is about zero volt.
When the forward position 900 of pulse 2V ' changes voltage U 4a, a suspending period capacitor C6 causes that at the non-inverting input of comparator U4 a correspondent voltage changes, in moment, voltage on the non-inverting input is become be lower than the voltage on the comparator U4 reverse input end.Therefore, comparator U4 keeps voltage V in a predetermined periods U4In low level, this scheduled time slot depends on capacitor C6, resistor R 22And R 23As long as voltage V U4Be low level, voltage Vo ' promptly keeps connecting in zero, because the output switching transistor U6a of comparator U6 is conducting so.The time interval of transistor U6a conducting is expressed as time t in Fig. 2 a 0To t 2Thereby the ON time of transistor U6a depends on the duration of input pulse 2V '.Voltage V in Fig. 1 U4When becoming high level, the sweep test of voltage Vo ' begins among Fig. 2 (b), for example the time t in Fig. 2 (b) 2To t 3Therefore, when the forward position 900 of pulse 2V ' occurs, capacitor C among Fig. 1 1And C 2Begin to discharge and arrive the saturation voltage level of switching transistor U6a.The pulse of Fig. 1 2V ' disappearance as a result, the comparator U4 of formation vertical oscialltor 501, U5 and U6 produce needed pulse voltage V U4
Voltage V among Fig. 1 U4Each pulse cause that the voltage Vo ' of output transistor U6a is at pulse voltage V U4Predetermined lasting time in (for example last till the moment t of Fig. 2 (b) always 2) clamper is at the saturation voltage level, thereby prevented that voltage Vs ' inclination from rising.Voltage Vo ' among Fig. 1 is via the transistor Q as an emitter follower job 2Coupling is to produce the voltage Vo of Fig. 2 (b), and this voltage Vo with may command mean value also is a sawtooth waveform as voltage Vo '.
A time interval for example at t 2-t 3At interval, the slope of rising appears in first or the sweep test of voltage Vo ' or Vo, this first rises since a predetermined constant level, this constant level equals the saturation voltage of the output switching transistor U6a of comparator U6 among Fig. 1, to a certain extent, it is not subjected to the influence of pulse 2V ' phase modulation, thereby the first of voltage acclivity starts from a steady state value, as the moment t among Fig. 2 (b) 2Voltage Vo second portion downslope betides time interval t 0-t 1, a smooth third part occurs in time interval t 1-t 2Voltage V U4The phase modulation of pulse be shown in Fig. 2 a, the time interval that this pulse is had corresponding different length separates, and causes the peak value of corresponding different ramp voltage Vo, appears at the moment t among Fig. 2 (b) respectively 0, t 3, t 6And t 9
Summation corresponding to time interval of second, third part is a predetermined constant, and this constant is not subjected to the influence of voltage Vo peak value among Fig. 1.Between the moment that the moment that the descending of voltage Vo ' partly begins and the part of going up a slope begin, i.e. t in Fig. 2 (b) 0-t 2During this time, will keep constant, so that not be subjected to the influence of pulse 2V ' phase modulation among Fig. 1.
In an embodiment of the present invention, ramp generator 500 comprises a S means for correcting 700.A capacitor C of device 700 3Be connected emitter-follower transistor Q 2Emitter and end points 701 between, end points 701 is connected to link 703 through a device of being connected with resistance R 5 by a variable Linear Control resistance R 4, link 703 is connected capacitor C 1With C 2Between.At retrace interval, capacitor C 1And C 2Voltage V on the tie point 2' clamper to a predetermined positive level, diode D 1Be connected end points 703 and transistor Q 2Emitter between.At chien shih capacitor C flyback time 3The diode D of discharge 2With resistance R 8In parallel and hold with being connected to and end points 701 between.
Fig. 5 shows the waveform that is used for key-drawing 1 circuit working.
When vertical scanning began, as noted earlier, the voltage Vo ' among Fig. 1 approached zero, a positive voltage V of end points 703 2Equal saturation voltage Vo ', transistor Q 2The forward voltage and the diode D of emitter-base stage 1The summation of forward voltage.Equally, the voltage V of end points 701 4Because diode D 2Clamping action and negative slightly.Because voltage V 2Than voltage V 4Corrigendum, capacitor C 2Begin to pass through resistance R 5And R 4With by diode D 1With capacitor C 3Discharge.The rate of change of discharge (electric current) is not subjected to resistance R in fact 8The influence of numerical value, the result of discharge makes voltage V 2Numerical value reduce.After, in scan period, as shown in Figure 5, as the transistor Q of Fig. 1 2Emitter voltage V 3When having obtained a sufficiently high voltage level, the capacitor C among Fig. 1 2By capacitor C 3Charging, voltage V 2The rate of change that initial minimizing causes voltage Vo ' height during than the scanning beginning in the middle of scanning is as noted earlier, at scanning beginning, voltage V 2With V 4Difference cause capacitor C 2Partial discharge.Capacitor C as shown in Figure 5 2Discharge cause transistor Q among Fig. 1 2The voltage V that produces on the emitter 3Growth rate than increaseing slowly in scanning center.Therefore, in first half period of scanning, this more slowly growth rate S is provided shape, this S shape occurs between the scanning zero hour and the mid point as shown in Figure 5.
According to a feature of the present invention, in second half period of vertical scanning, S shape is subjected to resistance R more and more 8Influence, as voltage V 2And V 4During increase, resistance R 8More and more bigger ground load capacitor C 2, end resistance R in scanning 8Reduced by capacitor C 3The electric current that provides, this electric current can be to capacitor C 2Charge.
Towards scanning end of a period, for example scanning center voltage V 4Higher, so at the end pass through capacitor C towards scanning 3Provide by resistance R 8Institute's bypass, and resistance R 8Prevent that it from flowing into capacitor C 2Electric current just become increasing, consequently, voltage V 3When second half period of scanning, proofreaied and correct by S.Along with resistance R 8The increase of (voltage) numerical value, in scanning at the end, changed the rate of change of voltage Vo ' in an opposite mode, this is because resistance R for example 4Due to the increase.
Another feature according to the present invention, S proofreaies and correct ramp generator 500 and produces voltage Vo ' at a given vertical scanning, the rate of change of Vo ' is independent of the variation of vertical frequency or is independent of the sweep time of last vertical scanning, and this result's acquisition is owing to transistor U6a, diode D 1And D 2At retrace interval to voltage Vo, V 4And V 2The clamping effect.
Switch vertical deflection circuit 100 generators 64 that Fig. 1 has also advantageously comprised a generator 64 are subjected to the control of its a vertical control circuit 120.Acting on being entitled as of deflection circuit 100 and control circuit 120: made detailed description in the United States Patent (USP) 4544864 of " switch vertical deflection circuit and bi-directional power " with PEHaferl name application, certainly, ramp generator circuit 500 can be the direct-current coupling vertical deflection output stage of other type as the correct registration of saw-toothed wave generator with the acquisition displayed image.
Control circuit 120 is pressed pulse-width modulation level or the line frequency of voltage Vo ' switching signal is supplied with a switch element 21, this part drawing is shown and comprises a field effect transistor 118 and an integrated antiparallel diode 19, transistor 118 can comprise a MOS fet power pipe, use this fet power pipe to be particularly conducive to the situation that is significantly higher than (for example Phase Alternation Line system) line frequency when line frequency, the height ratio line frequency can be used for computer monitor, video display terminal or television receiver, at this moment, for example come work with the deflection current that doubles level and vertical deflection frequency respectively, to reduce the visibility of flicker.Switch element 21 via the winding 23 of a kickback transformer 124 be connected in the end points 126 of a holding capacitor 126 ', 124 of kickback transformers are connected with a store energy coil 25, a frame deflector coil 27 of the end points 126 of capacitor 126 ' be connected to.The other end of frame deflector coil 27 is connected to+V 1The power supply of expression.
The signal that a horizontal oscillator tube and a drive circuit 134 of horizontal output stage 33 reasons is provided and being converted with horizontal deflection speed.The conversion operations of output stage 33 produces a horizontal deflection current i 2H, the frequency of this electric current is the tv baseband signal V that the back will be spoken of BBSynchronizing signal line frequency f HTwice.Output stage 33 at each winding two ends of kickback transformer 124 with 2f HHorizontal deflection frequency produce a flyback voltage.
Ramp voltage Vo is fed to a positive input of comparator 66 shown in Figure 1, with the conversion operations of control switch element 21.Horizontal flyback pulse charges via 74 pairs of capacitors of resistance 75 from winding 124, to obtain level (scanning) slope of comparing with the vertical sawtooth wave voltage of voltage Vo.
Comparator 66 is as a pulse-width modulator.With line frequency 2f HThe output that produces the comparator 66 of pulse (this pulse has the variable-operation cycle different with vertical mode) is provided with gate driving to MOS fet power pipe 118.
The effect of deflection circuit 100 comprises the line frequency charging and the discharge of holding capacitor 126, and it is provided at the vertical yoke current i that flows in the winding 27 27The line frequency conversion is carried out by switch element 21.
Vertical scanning is when beginning during each row (scanning), and it is one section insignificant utmost point short time generation before line flyback each time that the transistor 118 of switch element 21 is switched on.Therefore, the big flyback pulse voltage on the winding 23 is by 19 clampers of diode, and a big current i is arranged 23The rightabout of pressing arrow in winding 23 flows, and this electric current causes that capacitor 126 is charged to one than voltage+V 1The voltage of corrigendum, and end points 126 ' go up is than+V 1The voltage of corrigendum causes reverse deflection current i 27In deflecting coil 27, flow with the direction opposite with arrow.As a result, deflection current i 27Given capacitor C 12Positive charge, the electric current of control circuit 120() increase gradually in vertical scanning period.The ON time of transistor 118 occurred in the phase of line scanning each time.So just, cause the current i that flows through diode 19 23Negative-going portion reduces gradually, and flows through the electric current forward part i of transistor 118 23' increase gradually.The average voltage of capacitor 126 two ends on end points 126 reduces as a result, thereby causes deflection current i 27Reduce.
In the center of vertical scanning, current i 23Moiety each flow through diode 19 and transistor 118 with opposite polarity.Thereby do not have electric charge to be added to capacitor 126, same, end points 126 ' voltage equal voltage+V 1, therefore at the center of vertical scanning deflection current i 27' equal zero.
In second half period of vertical scanning, control circuit 120 increases the ON time of transistor 118 more gradually.Flow through the current i of diode 19 and transistor 118 respectively 23The summation of opposite polarity part is also started from scratch gradually and is increased along positive direction, causes capacitor 126 discharges, end points 126 ' voltage reduce and cause the deflection current i that flows along the direction of arrow gradually 27Increase.As a result, deflection current i 27To capacitor C 12Discharge, in scanning at the end, the ON time of diode 19 is littler than transistor 118.The conducting of diode 19 is subjected to the control of transistor 118 and store energy coil 25, coil 25 decision current i 23Rate of change di/dt, during each line flyback, it is constant substantially.Then, from beginning of vertical scanning, deflection current i to end 27Change and make polarity inversion being similar to the vertical scanning center in the climbing mode.
During vertical flyback, transistor 118 not conductings, and diode 19 is with the negative current i of a big numerical value 23Conducting, therefore, the half period that deflecting coil 27 and capacitor 126 cause vibration.Synthetic vertical flyback voltage charges to one greater than+V for capacitor 126 1Certain voltage, make deflection current i 27Polarity inversion.
We can see, the electric current by resistance 122 equals deflection current i 27Therefore, the voltage that produces at resistance 122 two ends is proportional to vertical yoke current i 27The voltage that manifests at deflection current sample resistance 122 two ends is by deflection current i 27Generation also provides negative feedback for vertical control circuit 120, and this feeds back to vertical control circuit 120 provides information, makes it to continue conducting with a rational time interval in each horizontal sweep interval by driving transistors 118, with generation vertical yoke current i 27In vertical scanning period, current i 27Ratio is in sawtooth ramp voltage Vo ' or Vo linearly.
When pulse 2V ' forward position 900(sees Fig. 1) occur in the moment t among Fig. 2 b for example 0The time, the downslope of voltage Vo part has just begun, the downslope part of voltage Vo begin to cause deflection current i in Fig. 1 coil 27 27Begin its corresponding descending flyback part.As voltage V U4Pulse back edge when occurring, just begin deflection current i among Fig. 1 27The upward slope sweep test, at deflection current i 27Vertical scanning partly carry out during, voltage Vo control deflection current i 27Instant level.
As voltage V U4Pulse back edge when occurring, in each vertical-scan period, Vo, V 2, V 3And V 4Each voltage all correspondingly on identical predetermined voltage level, this is because the cause of foregoing clamping action.Therefore, (just as what will speak of after a while) obtained suitable image registration.The phase modulated of pulse 2V ' has caused the modulation in vertical scanning interval.Capacitor C 1, C 2And C 3S shape ripple (as previously mentioned) is provided.As pulse voltage V U4Between the emergence period, capacitor C 1, C 2And C 3On each voltage request carry out clamper so that obtain corresponding to predetermined charge or the voltage level of above-mentioned each capacitor when each scan period begins, if there is not diode D with a kind of mode that not influenced duration scanning by arbitrary front court 1And D 2Clamping action, capacitor C 1, C 2And C 3Each all can have modulated charge slightly from previous picture (frame), this will disturb correct image registration.Because to capacitor C 1, C 2And C 3Clamping action, at each deflection cycle, deflection current i among voltage Vo and Fig. 1 27Slope sweep test phase place all be identical, and all afterpulsing 2V ' corresponding forward position 900 and change.
Can speak of after a while, the phase modulated of pulse 2V ' provides accurate timing, and this accurate timing be for the image registration that following manner is provided necessary: even field and even field coincide, and odd field and odd field coincide, so that even field and odd field are to interlaced.
We see: as a result of this wave form that produces voltage Vo among Fig. 2 or Vo ', make deflection current i among Fig. 1 27From the vertical scanning of one given deflection cycle end to the vertical scanning of next deflection cycle begin therebetween be constant at interval.
The deflecting coil 27 of Fig. 1 preferably should be preserved and be sent to the vertical sawtooth direct current composition of voltage Vo or Vo ' among Fig. 2.Be preferably between sweep-generation circuit 500 and the vertical deflection circuit 100 and to deflecting coil 27 and can use direct-current coupling, the optimality of direct-current coupling makes the phase modulation of pulse 2V ' not change the corresponding deflection current i of the preset level of voltage Vo during such as the scanning beginning 27Level.
(image) Height Adjustment is by a variable resistor R 6Provide, it is according to voltage V 5, capacitor C during the gated sweep 1And C 2Charge rate.The center is adjusted by variable resistor R 10This electrical response voltage V is provided 5, with the mean value of control voltage Vo.Be positioned at resistance R 2The voltage V of end points 999 5Both be proportional to the sawtooth waveforms AC portion of voltage Vo, be proportional to the average level of its direct current composition again.Like this, voltage V 5Formed the dc reference of deflection circuit 100, it is being worked as by changing resistance R 6And when adjusting image height, make image center keep motionless.
Before the deflection current i that mentioned 27Characteristics be useful, for example in the TV receiver circuit of Fig. 3, it is similar to above-mentioned den.Hollander patent, vertical yoke current is carried out phase place and amplitude modulation(PAM) according to the phase modulated vertical synchronizing signal.
Receiver among generation Fig. 1 among Fig. 3 of pulse 2V ' comprises a tuner 10, and this tuner has an input 12, in order to connect antenna or other video input signals source; Also have an output and be used to provide aforementioned base band video output signal V BB' to video processing unit 14.For the purpose of specifying, we suppose that the base band video output signal is a Phase Alternation Line system.But also should mention, principle of the present invention also is applicable to the interleaved vision signal form of other standard.Video processing unit 14 comprises that one converts input signal to Y, the decoder of R-Y and B-Y component signal PAL.When needing, this signal can be with R, G, and B component form is handled.When color difference signal (R-Y, when B-Y) lower bandwidth being arranged, each R, G, the B component all has full video bandwidth.Therefore, field memory that is used for color difference signal with as use R, G, the situation that the B component is handled is compared, just the former can use less memory element to realize.
Y, R-Y and B-Y component signal carry out the low pass filtered mistake by filter 16,18 and 20, and convert digital form to by modulus (A/D) transducer 22,24 and 26, are stored in the memory 40.Filter 16-20 makes to obscure and reduces to minimum, and hypothesis with Phase Alternation Line system input signal situation under, be 7.5MHz to the cut-off frequency of Y, be 2.8MHz to the cut-off frequency of color difference signal R-Y and B-Y.TSC-system then is suitable for lower cut-off frequency.
In order to obtain each horizontal line (scanning) constant number of samples is arranged, transducer 22-26 utilizes one to be phase locked the sampling clock CL of horizontal synchronization multiple and all components after the low-pass filtering to be converted to the numeral of 8 bit resolutions.Passing through separately through the digitlization component after the A/D conversion, delay cell 28,30 and 32 adds to storage 40.Delay cell can be adjustable, and equated to the time of delay of three input signal channels.Color difference components R-Y and B-Y are subjected to the multiplexing switch (MUX) 34 of line frequency signal H control to add to storage 40 by one.Switch 34 makes two 8 bit wide color difference signals be combined into one 8 bit wide signal so that the storage demand amount in the memory 40 is reduced to minimum.
Because multiplexed 8 signals and 8 luma signals are stored in the memory 40, can use one to have and double the read clock signal 2CL that writes clock rate C L and will formerly store one (signal) and read for twice.This double field frequency (for Phase Alternation Line system is 100Hz, is 120Hz for TSC-system) has reduced the flicker perception to shown signal on the display unit 60.A multiplexer switch 42 separates the color difference signal with double field frequency luma signal, and these color difference signals are converted into analog signal by digital to analog converter 44-48.After the D/A conversion, low pass filter 50-54 suppresses to repeat frequency spectrum, is 13.5MHz for the suitable cut-off frequency of luma, then is 6.75MHz for colourity.Double then field frequency analog signal is converted into the RGB form and uses for display unit 60, and display unit 60 is by means of the horizontal yoke current i of Double Data Rate 2HWith vertical yoke current i 27And synchronously, and i 2HAnd i 27Each is produced by level and vertical scan generator 62 and 64.Generator 62 with double in base band video output signal V BBHorizontal sync frequencies f HProduce deflection current i 2H
Press pal mode, one by 312.5 capable compositions.When reading with double speed, this and reproduce together and should form by 625 row, so another is gone when forming by 313 by 312 capable compositions when one of two, just can realize this point.The memory 40 of Fig. 3 provides timing signal by timing unit 70, so that provide as the end sequence, promptly shown in Fig. 4 A, wherein 312 row result from first read cycle (A or B), and 313 row result from the second memory read cycle (A ' or B '), and the 313rd line is blank.
For generator 64 desired double field frequency vertical sync pulse 2V ' have the impulse form shown in the solid line among Fig. 4 B.For comparison purpose, the pulse of also having drawn dotted line, it represents equidistant double frequency vertical sync pulse with 312.5 cycles.Among solid line pulse meter diagrammatic sketch 2 and Fig. 3, serve as the pulse signal 2V ' of basis circulation with four.Just as shown in FIG., an A has 312 row, and repeat fields A ' has 312.5 row, and a B has 312 row, and repeat fields B ' has 313.5 row.Pulse 2V ' control vertical deflection number generator 100, as aforementioned, it produces vertical yoke current i 27The vertical scanning waveform.Current i 27Vertical scanning part roughly be shown in Fig. 4 C.The scan current waveform sequence of Fig. 4 C causes occurring being shown in the interleaving mode of Fig. 4 D, and first coincides with first (A, A ') among Fig. 4 D, second and second (B, B ') coincide, and first to second the time (AA ', BB ') be staggered the appearance.For comparison purpose, the dotted line of Fig. 4 D is illustrated in the scan line that following situation produces: if the lock-out pulse 2V ' of Fig. 4 B is equidistant rather than skew or by phase modulation, be to guarantee the correct registration of display frame, the sawtooth voltage (once introducing before this) of Fig. 4 C that is provided by generator circuit 500 always begins with identical value; All flyback times (To-To ', T 1-T 1', T 2-T 2' etc.) all equate.
The timing signal of control figure transducer, memory, switch and sweeping generator is provided by the timing unit 70 of Fig. 3.Patent as den.Hollander is pointed, when double field frequency signal is shown, unit 70 generation Liang Chang and four field pulse sequences are the control for memory, the scanning of pulse 2V ' takes place and in order to guarantee that even field and even field coincide, odd field and odd field coincide, and even field pair is necessary to occurring alternately with odd field.
Embody the ramp generator 500 of Fig. 1 of all characteristics of the present invention and the trend that vertical oscillation circuit 501 has reduced or eliminated any following variation, promptly with the relevant deflection current i of double field frequency vertical sync pulse 2V ' in irregular space beyond four sequences 27The trend of the phase change of sweep test.

Claims (31)

1, the tv deflecting device of a synchronous input signal of response (2V ') on a certain frequency relevant with deflection frequency, this device comprises:
Gate-controlled switch (the U of the described input signal that response is worked on the relevant frequency of a certain and described input signal (2V ') 6a), it is characterized in that:
First capacitor (the C 1) and the second capacitor (C 2) form a tandem arrangement, and be attached to described switch U 6a
A current source (R 2) be connected to described capacitor (C 1, C 2), for described capacitor is charged, so that produce sawtooth signal (Vo '), as described switch (U 6a) during not conducting, this sawtooth signal has a slope first that changes by first kind of direction, when described switch becomes conducting, described switch U 6aTo described capacitor (C 1, C 2) discharge, so that form the slope second portion that described sawtooth signal (Vo ') changes by a rightabout;
Ramp voltage (Vo) source (500);
One first impedance (R 4, R 5) be connected on the described source (500) of described ramp voltage (Vo), and be connected to the described first capacitor (C 1) and the second capacitor (C 2) between first connection end point (703) on, be used to produce one first electric current and flow into the described first impedance (R 4, R 5), when first finish-time that described sawtooth signal one of is in described first and second parts, described first impedance is according to flowing into the described first impedance (R 4, R 5) described first electric current control the formation of its S shape ripple by the rate of change that reduces described sawtooth signal (Vo ');
One second impedance (R 8), with the described first impedance (R away from described first link (703) 4, R 5) end points (701) be connected, for a bypass part flows into the electric current of the described source (500) of described ramp voltage (Vo) and the current path between described first connection end point (703) to reduce the described first impedance (R 4, R 5) in described first electric current, and when the opposite finish-time that described sawtooth signal (Vo ') one of is in described in described first and second parts, the rate of change that reduces sawtooth signal (Vo ') is to control the S shape of described opposite finish-time;
A deflecting coil (27); With deflection current generation device (100), this device response described sawtooth signal (Vo '), and in described deflecting coil 27, produce the deflection current of proofreading and correct through S.
2,, it is characterized in that one the 3rd capacitor (C according to the device of claim 1 3) make described ramp voltage carry out capacitive couplings with described first connection end point (703).
3,, it is characterized in that described ramp voltage source (500) comprises a voltage follower (Q who has input endpoint (500a) and respond described sawtooth signal (Vo ') according to the device of claim 2 2); And wherein said the 3rd capacitor (C 3) be coupled in described voltage follower (Q 2) output (emitter) and away from the described first impedance (R of described first tie point (703) 4, R 5) end points (701) between.
4,, it is characterized in that device (D according to the device of claim 3 2) and described the 3rd capacitor (C 3) be connected with to described the 3rd capacitor (C 3) voltage that produces carries out clamper, and be on the same level zero hour of each sweep interval of described deflection current.
5,, it is characterized in that the described first impedance (R according to the device of claim 2 4, R 5) and the second impedance (R 8) comprise corresponding first resistance and second resistance, wherein said the 3rd electric capacity (C 3) and the described first resistance (R 4, R 5) form one with described deflection current sweep time corresponding described part described first finish-time, the current path that second capacitor is discharged, and corresponding to described opposite finish-time of the described part of described sweep interval, described second capacitor is charged, so that when described opposite finish-time, described second impedance (R8) has reduced the described second electric capacity (C 2) charging speed.
6,, it is characterized in that the described first resistor (R according to the device of claim 5 4) be variable, in order to the calibrated linear distortion.
7,, it is characterized in that (oscillator) (501) are for carrying out the device (501) that phase modulation responds described input signal (2V '), voltage clamp device (D to described sawtooth signal (Vo ') according to the device of claim 2 1, D 2) and the described first (C 1), the second (C 2), the 3rd (C 3) capacitor is connected, and be used for carrying out clamper with sweep interval corresponding described first finish-time of the zero hour, this moment the described first (C 1), the second (C 2), the 3rd (C 3) each voltage of electric capacity correspondingly reaches the first, the second, the 3rd predetermined level, they each is not subjected to the phase modulation influence of described sawtooth signal (Vo ').
8,, it is characterized in that described voltage clamp device comprises the first diode (D according to the device of claim 7 1), be connected the described second capacitor (C 2) and the described source (500) of ramp voltage (Vo) between, in order to before described sweep interval begins with the described second capacitor (C 2) voltage clamp to described second level, one second diode (D 2) and described the 3rd capacitor (C 3) join, in order to before the described zero hour of described scan period, with described the 3rd capacitor (C 3) voltage clamp at described the 3rd level, and wherein said gate-controlled switch (U 6a) before the described zero hour of described scan period with the described first capacitor (C 1) voltage clamp at described first level.
9,, it is characterized in that clamp device (D according to the device of claim 1 1, D 2) be connected to the described the one the second capacitor (C 1C 2) make the described first capacitor (C with the moment that begins in each deflection current scan period 1), the second capacitor (C 2) terminal voltage reach the predetermined level of the amplitude influence that is not subjected to sawtooth signal (Vo) in fact.
10, tv deflecting device responds synchronous input signal (2V ') on the frequency relevant with deflection frequency, this device comprises:
Gate-controlled switch (the U of a described input signal of response 6a), make described switch U 6aWork on the frequency relevant, it is characterized in that with described input signal (2V '):
First electric capacity (the C 1) and the second electric capacity (C 2) series connection, be connected in switch (U 6a) end points (500a).
Direct voltage source (V 5) by the first resistance (R 2) be connected to described capacitor (C 1, C 2), to produce sawtooth signal (Vo ') as switch (U at end points (500a) 6a) during not conducting, sawtooth signal has a slope sweep test that changes according to first direction, as switch (U 6a) during conducting, a slope flyback part that changes according to opposite direction is arranged;
One first end points is connected in the described first (C 1) second (C 2) the first impedance (C of capacitor connection terminal (703) 3, R 4, R 5), in order to produce first electric current, this electric current is coupled to described link (703), to control the S shape of described sawtooth signal;
Device (D 1, D 2) be connected in the described first (C 1) and the second (C 2) capacitor, with to the described first (C 1) and the second (C 2) corresponding terminal voltage is carried out clamper in the capacitor, so that each magnitude of voltage reached corresponding predetermined level at described sweep test before the time started, like this, at described sweep test at the end, the described corresponding predetermined level on each electric capacity in fact is not subjected to the influence of sawtooth signal amplitude;
A deflecting coil (27); With
Response is through the device (100) of the sawtooth signal (Vo ') of S correction, in order to produce the deflection current (i that proofreaies and correct through S-in described deflecting coil (27) 27).
11,, it is characterized in that described impedance comprises one the 3rd electric capacity (C according to a device of claim 10 3) and wherein said clamp device (D 1, D 2) be connected in the 3rd electric capacity (C 3), to described the 3rd electric capacity (C 3), to described the 3rd electric capacity (C 3) on voltage carry out clamper, with before the described time started of described sweep test, make voltage reach corresponding predetermined level.
12,, it is characterized in that described clamp device comprises diode (D according to a device of claim 10 1, D 2).
13,, it is characterized in that described sawtooth signal (Vo ') is in the vertical deflection frequency according to a device of claim 10.
14, according to a tv deflecting device of claim 10, it is characterized in that device (R 17, C 4, U 5) respond described input signal (2V '), to produce the control signal (V of its frequency and input signal (2V ') frequency dependence and phase modulation U4) wherein said controllable switch (U 6a) respond described control signal (V U4), to produce and described control signal (V U4) synchronous sawtooth signal (Vo '), like this, make in each deflection cycle, when the described time started of sawtooth signal (Vo ') at described sweep test, beginning is when the climbing of described first direction, and described serrated signal (Vo ') is on the predetermined level and uncontrolled signal (V U4) influence of phase modulation.
15,, it is characterized in that the amplitude of described sawtooth signal (Vo '), according to described control signal (V according to a device of claim 14 U4) described phase modulation and change.
16, according to the device of claim 15, it is characterized in that: in the described zero hour of described sweep test, the described predetermined level of described sawtooth signal (Vo ') is identical in each deflection cycle, so that prevent because described control signal V U4The described amplitude of the described sawtooth signal (Vo ') that causes of described phase modulation change, thereby make deflection current (i 27) the phase place of sweep test with respect to described control signal (V U4) phase place change.
17, according to a device of claim 14, it is characterized in that described serrated signal (Vo ') has a third part, it occurs between described scanning and the flyback part, such interval that equals the summation of flyback part and third part, the described sweep test of given deflection cycle and the described sweep test of next deflection cycle are separated, and this interval of each deflection cycle is equated.
18,, it is characterized in that this length of an interval degree that equals described flyback part and third part summation is not subjected to described control signal (V according to a device of claim 17 U4) influence of phase modulation.
19, according to a device of claim 11, it is characterized in that described control signal (V U4) cause described switch (U 6a) conducting, in each deflection cycle, (conducting) interval width equates.
20, according to a device of claim 14, it is characterized in that device (R 17, C 4, U 5) the described control signal that produces causes described switch (U 6a) conducting, at least up to the first (C 1), the second (C 2) and the 3rd (C 3) condenser voltage by clamper till corresponding predetermined constant level.It is the influence that each constant level is not subjected to described sawtooth signal amplitude.
21, according to a device of claim 11, its characteristics are described control signal (V U4) be in a nominal frequency, this frequency equals vertically (deflection) frequency, the device (100) that wherein produces deflection current comprises a switch vertical deflection circuit, and it responds a frequency and the relevant signal of level (deflection) frequency, and produces described deflection current (i with described vertical frequency 27).
22,, it is characterized in that described the 3rd capacitor (C according to a device of claim 11 3) direct-current coupling is arranged in the end points of described sawtooth signal (Vo ').
23,, it is characterized in that described the 3rd capacitor (C according to a device of claim 11 3) via resistor (R 4, R 5) be connected on the described connection end point (703) the second resistance (R wherein 8) be connected described the 3rd capacitor (C 3) and resistor (R 8) between second link (701), flow through described the 3rd capacitor (C to bypass part 3) electric current.
24, according to a device of claim 1, it is characterized in that the described first (C 1) and the second (C 2) (C in the capacitor 1) direct-current coupling is in described deflecting coil (27).
25, tv deflecting device, the frequency response synchronous input signal (2V ') with relevant with deflection frequency includes:
A described synchronous input signal source (2V ');
By the first (C 1) and the second (C 2) tandem arrangement that forms of capacitor;
First current source (the R 2) be connected on the capacitor, to produce sawtooth signal (Vo '), when when first direction scans, signal (Vo ') has a slope sweep test to the capacitor charging, during flyback in the opposite direction, described sawtooth signal (Vo ') has a slope flyback part;
First voltage (Vo) source (120) that frequency is relevant with described input signal (2V ');
First impedance (the C 3, R 4, R 5) be connected described first voltage (Vo) source (120) and the described first (C 1) and the second (C 2) between the electric capacity link (703), to produce second electric current, this electric current is coupled to end points (703) so that provide S-to proofread and correct to described sawtooth signal (Vo ');
Switching device (U 6a) and the described first (C 1) second (C 2) the capacitor connection, so that set up before the time started and two each self-corresponding voltages of capacitor at the described sweep test of described sawtooth signal, these voltages are not subjected to the influence of described sawtooth signal amplitude in fact;
A deflecting coil (27); With device (100), in described deflecting coil (27), to produce a deflection current (i who proofreaies and correct through S-in response to the described sawtooth signal (Vo) of proofreading and correct through S 27).
26,, it is characterized in that described deflecting coil (27) direct-current coupling is in the described first (C according to a device of claim 25 1) and the second (C 2) (C in the capacitor 1).
27,, it is characterized in that described first voltage (Vo) source (120) produces described first voltage with sawtooth waveform according to a device of claim 25.
28,, it is characterized in that described first voltage (Vo) source (120) responds described sawtooth signal (Vo ') and produces described first voltage (Vo) with this according to a device of claim 25.
29,, it is characterized in that described first impedance comprises one by the 3rd capacitor (C according to a device of claim 29 3) and the first resistor (R 4, R 5) second tandem arrangement formed, wherein said switching device (D 1, D 2) and the 3rd capacitor (C 3) connect, before the described time started of described sweep test, to set up a terminal voltage, make it reach corresponding level, this level is not subjected to the influence of the described amplitude of described sawtooth signal (Vo ') in fact.
30, according to a device of claim 29, it is characterized in that: the second impedance (R 8) and the 3rd capacitor (C 3) connect, flow through described the 3rd capacitor (C to bypass part 3) electric current and reduce described second electric current, like this, owing to reduced described second electric current, described sawtooth signal (Vo ') just becomes littler at the rate of change of the finish-time of described sweep test.
31, according to a device of claim 25, it is characterized in that described switching device (U 6a) comprise the gate-controlled switch of a described input signal of response (2V '), it and the described first (C 1) and the second (C 2) (a C one of in the capacitor 1) end points (500a) be connected, and produce described sawtooth signal (Vo '), with before the described time started of described sweep test, at the described first (C at this 1) and the second (C 2) an electric capacity (C in the capacitor 1) two ends set up a relevant voltage that not influenced by described sawtooth signal amplitude; A diode (D 1) voltage (V that is connected described link (703) and changes with described sawtooth signal (Vo ') 3) between, with before the described time started of described sweep test, at the described first electric capacity (C 1) and the second electric capacity (C 2) in another electric capacity (C 2) two ends set up a relevant voltage that not influenced by described sawtooth signal amplitude.
CN 88103051 1988-05-16 1988-05-16 Vetical sawtooth generator Expired CN1017674B (en)

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CN 88103051 CN1017674B (en) 1988-05-16 1988-05-16 Vetical sawtooth generator

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Application Number Priority Date Filing Date Title
CN 88103051 CN1017674B (en) 1988-05-16 1988-05-16 Vetical sawtooth generator

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CN1037807A CN1037807A (en) 1989-12-06
CN1017674B true CN1017674B (en) 1992-07-29

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