CN101764685A - Encrypting and deciphering system for realizing SMS4 algorithm - Google Patents

Encrypting and deciphering system for realizing SMS4 algorithm Download PDF

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CN101764685A
CN101764685A CN 200910193308 CN200910193308A CN101764685A CN 101764685 A CN101764685 A CN 101764685A CN 200910193308 CN200910193308 CN 200910193308 CN 200910193308 A CN200910193308 A CN 200910193308A CN 101764685 A CN101764685 A CN 101764685A
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CN101764685B (en
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张永强
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GCI Science and Technology Co Ltd
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Abstract

The invention relates to the field of block cipher algorithm of wireless local network, and provides an encrypting and deciphering system for realizing SMS4 algorithm; the encrypting and deciphering system comprises a first operation module and a first-stage production line of a first storing module, a second operation module and a second -stage production line of a second storing module and a third operation module and a third -stage production line of a third storing module. The three operation modules in the technical scheme of the invention realize functional reuse for encryption and decryption operation and round key spreading operation, thereby directly reducing component redundancy and reducing the occupied area of the system. Moreover, the invention adopts three-stage production line structure to deal with three groups of data simultaneously, and in which any group of data can be the encryption and decryption operation or the round key spreading operation, so as to improve system efficiency.

Description

Realize the encrypting and deciphering system of SMS4 algorithm
Technical field
The present invention relates to WLAN (wireless local area network) block cipher field, be specially the encrypting and deciphering system that proposes a kind of SMS4 of realization algorithm.
Background technology
The SMS4 cryptographic algorithm is that first of domestic announcement is used for the commercial cipher algorithm of WLAN (wireless local area network) product, and this algorithm is the first open cryptographic algorithm at special dimension of China, and WLAN (wireless local area network) industry and commercial cipher research are all had important meaning.SMS4 is based on the grouping symmetric cryptographic algorithm of S box, and it carries out the encryption and decryption computing to one group of Bit data, and the block length of this algorithm is 128 bits, and key length is 128 bits.Cryptographic algorithm and key schedule all adopt 32 to take turns the nonlinear iteration structure.
Cryptographic algorithm is mainly the process that encryption and decryption data and round key carry out cryptographic calculation of reading in.The enciphering transformation of algorithm comprises XOR and synthetic displacement T 1Computing, wherein synthetic displacement T 1Computing is by linear change L 1τ is composited with nonlinear change, i.e. T 1(.)=L 1(τ (.)).Nonlinear change τ is made of 4 parallel S boxes, and the S box is that 8 bits of fixing are imported the conversion that 8 bits are exported; Linear change L 1Comprise XOR and shift left operation.
The structure of decipherment algorithm and cryptographic algorithm is identical, but the order of use round key in contrast.
Round key in the enciphering and deciphering algorithm is that encryption key MK generates by the round key expansion algorithm.The basic structure of this expansion algorithm is also identical with enciphering and deciphering algorithm, comprises XOR and synthetic displacement T equally 2Computing.Wherein synthetic displacement T 2Synthetic displacement T in computing and the cryptographic algorithm 1Computing is basic identical, only incites somebody to action linear change L wherein 1Be revised as L 2, linear change L 2Comprise XOR and shift left operation equally, form is slightly different.
There is multiple implementation in the prior art in the encrypting and deciphering system of realizing the SMS4 algorithm, but these schemes are mostly based on following framework: comprise round key expansion module, control module and encryption and decryption module.With the cryptographic operation is example, at first reads in encryption key MK, system parameters FK and preset parameter CK by the round key expansion module, and wherein FK and CK are fixed values, and all parameters of reading in are taken turns interative computation through 32 and produced 32 round key and storage.As expressly entering the encryption and decryption module, then cryptographic calculation starts, and reads in the respective wheel key in the iteration every the wheel, takes turns the iterative cryptographic operation until finishing 32, finally exports ciphertext.The difference of different schemes is in the realization of encryption and decryption module.If simple according to the operation in the algorithm, expressly all will take turns iteration through 32 just can finish encryption to each group, and the clock frequency in the practical application is generally all lower, thereby causes interior ciphered data amount of unit interval few, and efficient is low.If improve clock frequency by force, can bring bigger interference to system again, bring difficulty to design of integrated circuit.Therefore the technical staff has designed different cryptographic calculation structures to reduce cycle-index, improves encryption efficiency.Taking turns in the circulation such as one and to add a plurality of round function F, thereby reach the purpose that reduces iterations, is 32 as long as keep the number of round function F and the product of iterations.Can also between each round function F, insert register and form flowing structure, make system can carry out the encryption and decryption computing to multi-group data at one time.
But consider from the structure of system's overall situation, encryption and decryption module and round key expansion module have bigger similitude on function, prior art still uses two independent modules to realize round key expansion and encryption and decryption functions respectively, makes system higher in the situation lower member redundancy that adopts pipeline organization.
Summary of the invention
The objective of the invention is to propose a kind of encrypting and deciphering system of the SMS4 of realization algorithm, under the situation that adopts pipeline organization, reduce the parts redundant degree of system.
Because there are bigger similitude in encryption and decryption module and round key expansion module function in the encrypting and deciphering system of realization SMS4 algorithm, in order to reduce the parts redundant degree, the thought that the present invention is based on module reuse proposes a kind of encrypting and deciphering system of the SMS4 of realization algorithm, comprising: first order streamline, second level streamline, third level streamline;
Described first order streamline comprises first computing module and first memory module; Described second level streamline comprises second computing module and second memory module; Described third level streamline comprises the 3rd computing module and the 3rd memory module;
The memory module of described each level production line all comprises Control Parameter zone, input block territory and operational data zone; Described Control Parameter zone is used for storing control parameter, this Control Parameter indication mode of operation and iteration round; Described input block territory is used for storage input data, and described first order streamline receives the input data of corresponding round, and is stored in the input block territory of the memory module of each level production line; Described operational data zone is used to store operational data, and the computing output result of each level production line is stored in the operational data zone of the memory module of each level production line;
Described mode of operation comprises cipher key spreading pattern and encryption and decryption pattern; Described mode of operation is determined by the input data of first round, is that encryption key then is in the cipher key spreading pattern as if the input data, then is in the encryption and decryption pattern if the input data are plaintext or ciphertext;
Described first computing module will import data and system parameters or zero parameter is carried out xor operation, and the result is exported in computing is stored in described first memory module; Described second computing module receives the computing output result of first memory module, with this computing output result and preset parameter or round key execution xor operation, carries out S box table lookup operation more then, and the result is exported in computing is stored in described second memory module; Described the 3rd computing module receives the computing output result of second memory module, then this computing output result is carried out the ring shift left operation, carries out XOR again, and the result is exported in computing is stored in described the 3rd memory module;
Described second computing module computing output result according to described the 3rd memory module storage when described third level streamline is in the cipher key spreading pattern upgrades round key;
Described third level streamline is sent to first order streamline to computing output result and enters next iteration round, this moment replication work pattern and the iteration round increased progressively; If described third level streamline is in last iteration round, then computing output result is not sent to first order streamline; If this last iteration round is last the iteration round under the encryption and decryption pattern, then the computing of described third level streamline is exported the result as the encryption and decryption operation result.
The encrypting and deciphering system of the realization SMS4 algorithm that the present invention proposes, employing comprises the pipelined architecture that first order streamline, second level streamline and third level streamline are formed, by these three computing modules of first computing module, second computing module and the 3rd computing module, realize the multiplexing functions of encryption and decryption computing and round key extended arithmetic.Though there are three computing modules in the technical scheme, but because each module is only finished the part of computing, essence is equivalent to each module and only is 1/3rd of round function module in the prior art, can be considered as the present invention and only adopt a multiplexing round function module, just can realize the function that needs two independent round function modules to realize in the prior art directly having reduced the parts redundant degree; And this programme can be realized interspersed the carrying out of 32 next round functional operation of the 32 next round functional operation and the round key expansion of encryption and decryption processing under the employing pipelined architecture, promptly can 3 computings of concurrent execution each cycle user, wherein each computing can be encryption and decryption computing or cipher key spreading computing.
Description of drawings
Fig. 1 is the schematic diagram of a Standard Encryption module;
Fig. 2 is a kind of schematic diagram of round key expansion module;
Fig. 3 is each module diagram of inside of three class pipeline in the encrypting and deciphering system of realization SMS4 algorithm of embodiment 1;
Fig. 4 moves towards schematic diagram for the signal of the encrypting and deciphering system first order streamline of the realization SMS4 algorithm of embodiment 2;
Fig. 5 moves towards schematic diagram for the signal of the encrypting and deciphering system second level streamline of the realization SMS4 algorithm of embodiment 2;
Fig. 6 moves towards schematic diagram for the signal of the encrypting and deciphering system third level streamline of the realization SMS4 algorithm of embodiment 2.
Embodiment
The SMS4 algorithm is the domestic important commercial cipher algorithm that is applied to the WLAN (wireless local area network) field, and wherein enciphering and deciphering algorithm and key schedule all adopt 32 to take turns the nonlinear iteration structure.The structure of decipherment algorithm and cryptographic algorithm is identical, just the use reversed in order of round key.
Below enciphering and deciphering algorithm is briefly introduced:
If expressly be input as X 0, X 1, X 2, X 3Ciphertext is input as Y 0, Y 1, Y 2, Y 3Round key is rk i, i=0 wherein, 1,2 ..., 31.Use Z 2 eThe binary system manifold of expression e bit, X then, Y, rk iAll be the binary system manifold of 32 bits, use X , Y , rk i ∈ Z 2 32 Expression.The encryption and decryption of algorithm is transformed to:
X i + 4 = F ( X i , X i + 1 , X i + 2 , X i + 3 , rk i ) = X i ⊕ T 1 ( X i + 1 ⊕ X i + 2 ⊕ X i + 3 ⊕ rk i ) , i = 0,1 , . . . , 31
F is a round function, carry out as above 32 take turns interative computation after, obtain ciphertext:
(Y 0，Y 1，Y 2，Y 3)＝(X 35，X 34，X 33，X 32)
The deciphering conversion is identical with the enciphering transformation structure, only is that the use order of round key is different.When encrypting: the order of using of round key is rk 0, rk 1..., rk 31During deciphering: the order of using of round key is rk 31, rk 30..., rk 0
Synthetic displacement T 1Be an inverible transform, by nonlinear transformation τ and linear transformation L 1Be composited, i.e. T 1(.)=L 1(τ (.)).Nonlinear transformation τ is made of 4 parallel S boxes, and the S box is imported the conversion that 8 bits are exported for 8 fixing bits, is designated as Sbox (.).
If be input as A=(a 1, a 2, a 3, a 4), be output as B=(b 1, b 2, b 3, b 4), wherein, a 1, a 2, a 3, a 4, b 1, b 2, b 3, b 4All be 8 bit binary number, use a 1 , a 2 , a 3 , a 4 , b 1 , b 2 , b 3 , b 4 ∈ Z 2 8 Expression.Nonlinear transformation τ and linear transformation L 1Be respectively:
B＝τ(A)＝(Sbox(a 0)，Sbox(a 1)，Sbox(a 2)，Sbox(a 3))；
C = L 1 ( B ) = B &CirclePlus; ( B < < < 2 ) &CirclePlus; ( B < < < 10 ) &CirclePlus; ( B < < < 18 ) &CirclePlus; ( B < < < 24 ) .
Above-mentioned algorithm has adopted the basic operation of bit XOR and bit ring shift left; With
Figure G2009101933081D00055
Expression bit XOR, with＜＜＜i represents bit ring shift left i position.
Fig. 1 is the schematic diagram of a Standard Encryption module, is made up of data selector, round function F parts and register.With the ciphering process is example: data selector judges whether the encryption of current data group is finished, and then reads in new plaintext and encrypts if finished; Then last round of operation result is not sent into next round and proceed cryptographic calculation if finish.Round function F parts are core components of encryption and decryption module, read in be-encrypted data and round key and carry out cryptographic calculation, and concrete encrypting step is as indicated above.Register is temporary last round of encrypted result, output ciphertext when 32 take turns the computing of iteration encryption and decryption and finish.
Below the round key expansion algorithm is briefly introduced:
Round key in the enciphering and deciphering algorithm is generated by key schedule by encryption key, and this algorithm basic structure is identical with enciphering and deciphering algorithm, also is to generate 32 round key after taking turns interative computation through 32.
Encryption key MK=(MK 0, MK 1, MK 2, MK 3), MK i &Element; Z 2 32 , i＝0，1，2，3；
Order K i &Element; Z 2 32 , I=0,1 ..., 35, round key is rk i &Element; Z 2 32 , I=0,1 ..., 31, then the round key expansion algorithm is:
( K 0 , K 1 , K 2 , K 3 ) = ( MK 0 &CirclePlus; FK 0 , MK 1 &CirclePlus; FK 1 , MK 2 &CirclePlus; FK 2 , MK 3 &CirclePlus; FK 3 )
rk i = K i + 4 = F ` ( K i , K i + 1 , K i + 2 , K i + 3 , CK i ) = K i &CirclePlus; T 2 ( K i + 1 &CirclePlus; K i + 2 &CirclePlus; K i + 3 &CirclePlus; CK i ) , i = 0,1 , . . . . 31
T 2T in conversion and the enciphering and deciphering algorithm 1Basic identical, only be linear transformation L 1Be revised as L 2If be input as B, be output as C, then linear transformation L 2For C = L 2 ( B ) = B &CirclePlus; ( B < < < 13 ) &CirclePlus; ( B < < < 23 ) . FK is system parameters: FK 0=(A3B1BAC6), FK 1=(56AA3350), FK 2=(677D9197), FK 3=(B27022DC), these parameters all are that 16 systems are represented; CK is the preset parameter value.
Fig. 2 is a kind of schematic diagram of round key expansion module, comprises data selector and exclusive-OR operator, round function F` parts, register three parts composition.The first of round key expansion module comprises data selector and exclusive-OR operator, data selector judges whether current round key group generates fully, if generate the then encryption key of the new input of acceptance fully, carry out next round round key generation computing as the input data otherwise will go up the wheel operation result; Exclusive-OR operator carries out XOR to the encryption key MK and the system parameters FK of input, promptly finishes ( K 0 , K 1 , K 2 , K 3 ) = ( MK 0 &CirclePlus; FK 0 , MK 1 &CirclePlus; FK 1 , MK 2 &CirclePlus; FK 2 , MK 3 &CirclePlus; FK 3 ) Computing.The XOR that round function F` parts read in MK and FK is K and CK as a result, takes turns interative computation through 32 and produces 32 round key, and the concrete operation process as mentioned above.Register stores each round key of taking turns computing successively, finishes 32 round key of back output until computing.
As can be seen, there are more multi-functional identical parts in the encryption and decryption module with the round key expansion module, can reduce system redundancy from the module reuse angle from the introduction of enciphering and deciphering algorithm and round key expansion algorithm; And there are property successively in time in round key computing and encryption and decryption computing, can switch by function to realize module reuse.
Embodiment 1:
The encrypting and deciphering system of the realization SMS4 algorithm that the present invention proposes comprises: first order streamline, second level streamline, third level streamline; Fig. 3 is each module diagram of inside of three class pipeline, wherein first order streamline comprises first computing module and first memory module, second level streamline comprises second computing module and second memory module, and third level streamline comprises the 3rd computing module and the 3rd memory module.
The memory module of each level production line all comprises Control Parameter zone, input block territory and operational data zone, and wherein the Control Parameter zone is used for storing control parameter, and the input block territory is used for storage input data, and the operational data zone is used to store operational data; Control Parameter comprises mode of operation and iteration round, each level production line can be in cipher key spreading pattern and encryption and decryption pattern, this is by the input data decision of first round, as if the input data is that encryption key then is in the cipher key spreading pattern, then is in the encryption and decryption pattern if the input data are plaintext or ciphertext.
The course of work of the encrypting and deciphering system of the realization SMS4 algorithm of present embodiment 1 is as follows, and computing then all is described with ciphering process for encryption and decryption:
When cipher key spreading computing of carrying out when system or encryption and decryption computing sum are less than 3, can import new arithmetic operation to system.First order streamline receives the input data of first round, it is stored in the input block territory of the memory module of each level production line, and according to the input data type determine mode of operation, be stored in the Control Parameter zone, simultaneously the iteration round in the Control Parameter zone is set at 1.
First computing module in the first order streamline will be imported data and system parameters or zero parameter and carry out xor operation, and first memory module is stored operation result.Second computing module receives the computing output result of first memory module, with this computing output result and preset parameter or round key execution xor operation, carries out S box table lookup operation more then, and second memory module is stored operation result.The 3rd computing module receives the computing output result of second memory module, then this computing output result is carried out the ring shift left operation, carries out XOR again, and the 3rd memory module is stored operation result.If third level streamline is in the cipher key spreading pattern, the computing output result of the 3rd memory module storage should be sent to second computing module, is used to upgrade round key information.
The operation that first computing module in the first order streamline is carried out is relevant with mode of operation.If be in the cipher key spreading pattern, the input data type is an encryption key, and then the first computing module selective system parameter is carried out XOR, with MK 0, MK 1, MK 2, MK 3The expression encryption key, FK 0, FK 1, FK 2, FK 3The expression system parameters, then XOR output is expressed as ( K 0 , K 1 , K 2 , K 3 ) = ( MK 0 &CirclePlus; FK 0 , MK 1 &CirclePlus; FK 1 , MK 2 &CirclePlus; FK 2 , MK 3 &CirclePlus; FK 3 ) . If be in the encryption and decryption pattern, the input data type be expressly, ciphertext, then first computing module selects zero parameter to carry out XOR, though with the not variation of data of zero XOR, but make the computing module of winning under two kinds of mode of operations, have similar structure, thereby realize multiplexing.
The operation that second computing module in the streamline of the second level is carried out is relevant with mode of operation.If be in the encryption and decryption pattern, the data type of reception is the encryption and decryption intermediate data, is example with the ciphering process, uses X i, X I+1, X I+2, X I+3Expression expressly or carry out the encryption and decryption intermediate data of cryptographic calculation, rk iThe expression round key, A represents output, then second computing module selects round key to carry out XOR A = X i + 1 &CirclePlus; X i + 2 &CirclePlus; X i + 3 &CirclePlus; rk i , Again A is carried out the computing of tabling look-up of S box as input, obtain the S box operation result B that tables look-up, second memory module is stored B then.If be in the cipher key spreading pattern, the data type of reception is a round key expansion intermediate data, with K i, K I+1, K I+2, K I+3Expression round key expansion intermediate data, CK iThe expression preset parameter, A represents output, then second computing module selects preset parameter to carry out XOR A = K i + 1 &CirclePlus; K i + 2 &CirclePlus; K i + 3 &CirclePlus; CK i , And A carried out the computing of tabling look-up of S box as input, and the operation result B that obtains tabling look-up, second memory module is stored B then.Similarly, the parameter that second computing module uses in different mode of operations comprises round key and preset parameter, so need select to choose by data, has so both guaranteed the multiplexing of module to guarantee the realization of various functions again.
The operation that the 3rd computing module in the third level streamline is carried out is relevant with mode of operation.If be in the encryption and decryption pattern, the data type of reception is the encryption and decryption intermediate data, then the encryption and decryption intermediate data is carried out ring shift left and XOR C = B &CirclePlus; ( B < < < 2 ) &CirclePlus; ( B < < < 10 ) &CirclePlus; ( B < < < 18 ) &CirclePlus; ( B < < < 24 ) , And then carry out XOR X i + 4 = X i &CirclePlus; C , The 3rd memory module is with the output X of XOR I+4Store.If be in the cipher key spreading pattern, the data type of reception is a round key expansion intermediate data, then round key expansion intermediate data is carried out ring shift left and XOR C = B &CirclePlus; ( B < < < 13 ) &CirclePlus; ( B < < < 23 ) , And then carry out XOR K i + 4 = K i &CirclePlus; C , The 3rd memory module is with the output K of XOR I+4Store.
Pass through three class pipeline respectively when the input data, promptly finish iterative operation one time, third level streamline will be exported the result to computing and be sent to first order streamline and enter next iteration round, and this moment, mode of operation should remain unchanged, and the iteration round should increase progressively.Above-mentioned iterative process need circulate and carry out 32 times, just can finish a cipher key spreading computing or encryption, decrypt operation.When the handled iteration round of third level streamline equals 32, then computing output result is not sent to first order streamline, this moment if be in the encryption and decryption pattern then the 3rd memory module preserved the output result of encryption and decryption computing.And for the cipher key spreading pattern, the computing output result of the 3rd memory module storage has been updated to the round key parameter region of second computing module when iteration end each time.
Embodiment 2:
The encrypting and deciphering system of the realization SMS4 algorithm of present embodiment comprises: first order streamline, second level streamline, third level streamline; Fig. 3 is each module diagram of inside of three class pipeline, wherein first order streamline comprises first computing module and first memory module, second level streamline comprises second computing module and second memory module, and third level streamline comprises the 3rd computing module and the 3rd memory module.
The memory module of each level production line all comprises Control Parameter zone, input block territory and operational data zone, and wherein the Control Parameter zone is used for storing control parameter, and the input block territory is used for storage input data, and the operational data zone is used to store operational data; Control Parameter comprises mode of operation and iteration round, each level production line can be in cipher key spreading pattern and encryption and decryption pattern, this is by the input data decision of first round, as if the input data is that encryption key then is in the cipher key spreading pattern, then is in the encryption and decryption pattern if the input data are plaintext or ciphertext.
First computing module, second computing module and the 3rd computing module comprise multiple implementation, first computing module comprises the first data alternative pack and the first XOR parts in the present embodiment, second computing module comprises the second data alternative pack, the second XOR parts and S box parts, and the 3rd computing module comprises the 3rd data alternative pack, ring shift left parts and the 3rd XOR parts.
The first data alternative pack, the second data alternative pack and the 3rd data alternative pack all are the parts that are used for the selection of data, and the Control Parameter that receives in the data is obtained mode of operation and iteration round.The first XOR parts, the second XOR parts and the 3rd XOR parts all are the XORs that is used for data, participate in the output result of the data division of XOR from data selector, for different mode of operations, the XOR parts are carried out identical operations, and data selector comes to provide accurate data for the XOR parts according to mode of operation, thereby realizes different calculation functions.The S box that S box parts are used to carry out encryption and decryption intermediate data or the round key expansion intermediate data computing of tabling look-up.The ring shift left parts are used for the input data are comprised the computing of ring shift left and XOR, the ring shift left parts are carried out the ring shift left computing of four kinds of band parameters earlier to the input data, the number of bits that this parameter representative moves to left is carried out xor operation to four kinds of ring shift left results again.
Fig. 4 moves towards schematic diagram for the signal in the first order streamline, and Fig. 5 moves towards schematic diagram for the signal in the streamline of the second level, and Fig. 6 moves towards schematic diagram for the signal in the third level streamline.
The course of work of the encrypting and deciphering system of the realization SMS4 algorithm of present embodiment 2 is as follows, and computing then all is described with ciphering process for encryption and decryption:
When cipher key spreading computing of carrying out when system or encryption and decryption computing sum are less than 3, can import new arithmetic operation to system.First order streamline receives the input data of first round, it is stored in the input block territory of the memory module of each level production line, and according to the input data type determine mode of operation, be stored in the Control Parameter zone, simultaneously the iteration round in the Control Parameter zone is set at 1.
First computing module in the first order streamline will be imported data and system parameters or zero parameter and carry out xor operation, and first memory module is stored operation result.Second computing module receives the computing output result of first memory module, with this computing output result and preset parameter or round key execution xor operation, carries out S box table lookup operation more then, and second memory module is stored operation result.The 3rd computing module receives the computing output result of second memory module, then this computing output result is carried out the ring shift left operation, carries out XOR again, and the 3rd memory module is stored operation result.If third level streamline is in the cipher key spreading pattern, the computing output result of the 3rd memory module storage should be sent to second computing module, is used to upgrade round key information.
First computing module in the first order streamline comprises the first data alternative pack and the first XOR parts, wherein the first data alternative pack is selected its output according to the mode of operation that comprises in the Control Parameter, if be in then selective system parameter of cipher key spreading pattern, otherwise select zero parameter.The output result that the first XOR parts will be imported the data and the first data alternative pack carries out xor operation.When being in the cipher key spreading pattern, the input data type is an encryption key, this moment the first data alternative pack output system parameter, with MK 0, MK 1, MK 2, MK 3The expression encryption key, FK 0, FK 1, FK 2, FK 3The expression system parameters, then the computing of first XOR parts output is expressed as ( K 0 , K 1 , K 2 , K 3 ) = ( MK 0 &CirclePlus; FK 0 , MK 1 &CirclePlus; FK 1 , MK 2 &CirclePlus; FK 2 , MK 3 &CirclePlus; FK 3 ) . When being in the encryption and decryption pattern, the input data type be expressly, ciphertext, first data alternative pack output this moment, zero parameter, then the first XOR parts will be expressly, ciphertext and zero XOR, that is keep original data.Above-mentioned data are selected and the data operation process makes the computing module of winning have similar structure under two kinds of mode of operations, thereby realize multiplexing.
Mode of operation is determined when first order streamline.After through the computing in the first order streamline, the operational data that is under the cipher key spreading pattern then is round key expansion intermediate data; The operational data that is under the encryption and decryption pattern then is the encryption and decryption intermediate data.
Second computing module in the streamline of the second level comprises the second data alternative pack, the second XOR parts and S box parts.Wherein the second data alternative pack is selected its output according to the mode of operation that comprises in the Control Parameter, if being in the cipher key spreading pattern then selects preset parameter, otherwise selects the round key of corresponding round according to the iteration round.The second XOR parts are carried out xor operation with the output result of the operational data and the second data alternative pack, and S box parts are carried out S box table lookup operation to the output result of the second XOR parts.When being in the encryption and decryption pattern, the data type of reception is the encryption and decryption intermediate data, is example with the ciphering process, and this moment, the second data alternative pack was exported the round key of corresponding round, used X i, X I+1, X I+2, X I+3Expression expressly or carry out the encryption and decryption intermediate data of cryptographic calculation, rk iThe expression round key, A represents output, then the second XOR parts are at first carried out XOR A = X i + 1 &CirclePlus; X i + 2 &CirclePlus; X i + 3 &CirclePlus; rk i , Again A is carried out the computing of tabling look-up of S box as input, obtain the S box operation result B that tables look-up, second memory module is stored B then.When being in the cipher key spreading pattern, the data type of reception is a round key expansion intermediate data, and second data alternative pack output this moment preset parameter is with K i, K I+1, K I+2, K I+3Expression round key expansion intermediate data, CK iThe expression preset parameter, A represents output, then second computing module selects preset parameter to carry out XOR A = K i + 1 &CirclePlus; K i + 2 &CirclePlus; K i + 3 &CirclePlus; CK i , And A carried out the computing of tabling look-up of S box as input, and the operation result B that obtains tabling look-up, second memory module is stored B then.Similarly, the parameter that second computing module uses in different mode of operations comprises round key and preset parameter, so need select to choose by data, has so both guaranteed the multiplexing of module to guarantee the realization of various functions again.
The 3rd computing module in the third level streamline comprises the 3rd data alternative pack, ring shift left parts and the 3rd XOR parts.Wherein the 3rd data alternative pack is selected its output according to the mode of operation that comprises in the Control Parameter, if be in the cipher key spreading pattern then select parameter 0,0,13,23}, otherwise select parameter 2,10,18,24}.The ring shift left parts are carried out ring shift left and xor operation to operational data, earlier operational data is carried out the ring shift left computing of four kinds of band parameters, the number of bits that this parameter representative moves to left, again four kinds of ring shift left results are carried out xor operation, and the parameter of ring shift left parts is from the output result of the 3rd data alternative pack.The output result that the 3rd XOR parts will be imported data and ring shift left parts carries out xor operation.When being in the encryption and decryption pattern, the data type of reception is the encryption and decryption intermediate data, this moment the 3rd data alternative pack output parameter 2,10,18,24}, the ring shift left parts will be carried out ring shift left and XOR to the encryption and decryption intermediate data C = B &CirclePlus; ( B < < < 2 ) &CirclePlus; ( B < < < 10 ) &CirclePlus; ( B < < < 18 ) &CirclePlus; ( B < < < 24 ) , And then carry out XOR X i + 4 = X i &CirclePlus; C , The 3rd memory module is with the output X of XOR I+4Store.When being in the cipher key spreading pattern, the data type of reception is a round key expansion intermediate data, and { 0,0,13,23}, ring shift left parts will expand intermediate data to round key and carry out ring shift left and XOR the 3rd data alternative pack output parameter at this moment C = B &CirclePlus; ( B < < < 13 ) &CirclePlus; ( B < < < 23 ) , And then carry out XOR K i + 4 = K i &CirclePlus; C , The 3rd memory module is with the output K of XOR I+4Store.Similarly, the 3rd computing module is selected one of two groups of parameters by data selector in different mode of operations, thereby changes the computing behavior of ring shift left parts, thereby realizes both having guaranteed the multiplexing of module to guarantee the realization of various functions again.
Pass through three class pipeline respectively when the input data, promptly finish iterative operation one time, third level streamline will be exported the result to computing and be sent to first order streamline and enter next iteration round, and this moment, mode of operation should remain unchanged, and the iteration round should increase progressively.Above-mentioned iterative process need circulate and carry out 32 times, just can finish a cipher key spreading computing or encryption, decrypt operation.When the handled iteration round of third level streamline equals 32, then computing output result is not sent to first order streamline, this moment if be in the encryption and decryption pattern then the 3rd memory module preserved the output result of encryption and decryption computing.And for the cipher key spreading pattern, the computing output result of the 3rd memory module storage has been updated to the round key parameter region of second computing module when iteration end each time.So as shown in Figure 6, the output of the 3rd memory module comprises more new data of output result or intermediate object program or round key; Under the encryption and decryption pattern, the output of the 3rd memory module is intermediate object program all in the general computing, and the output of having only the iteration round to equal the 3rd memory module 32 o'clock this moments just is encryption and decryption output result; And under the cipher key spreading pattern, the output of general the 3rd memory module is as round key new data more, i.e. the output result of round key extended arithmetic is updated to the round key parameter region of second computing module.
Because the present invention is the three class pipeline structure, can carry out computing to 3 groups of data simultaneously, improve operation efficiency.Because data processing time difference at different levels might cause data at the corresponding levels also to be untreated and finish, just enter the corresponding levels causes data collision to the data of upper level.As further improvement of this embodiment, the encrypting and deciphering system of this realization SMS4 algorithm also comprises clock module, clock module is sent to first memory module, second memory module and the 3rd memory module with the clock signal that produces, and three memory modules are all carried out the sampling and the storage operation result of data according to the clock signal that receives.Three memory modules all must receive new clock signal, can carry out stores synchronized to the upper level data.Clock signal plays the effect of unified work tempos at different levels, guarantees streamline co-ordination at different levels, makes that the system works effect is better.
The encrypting and deciphering system of realizing the SMS4 algorithm in the prior art is made up of encryption and decryption module and round key expansion module, and area occupied is 2S M+ 2S F+ 2S R, S wherein MBe data selector area, S FBe the area of round function F, S RArea for register.3 groups of data of every encryption, the time that is consumed is 3 * 32 * (T M+ T F+ T R), T wherein M, T F, T RRepresentative data is by the time of data selector, round function F and register respectively.And in this programme, system's area is about S M+ S F+ 5S R, 3 groups of times that data consumed of every encryption are 33 * (T M+ T F+ 3T R).And in the encrypting and deciphering system of realizing the SMS4 algorithm, round function all accounts for major part on the expense of area and time, i.e. S F＞S M+ S R, T F＞T M+ T RTherefore, technical scheme of the present invention reduces to make an appointment with under the situation of half in area overhead with respect to prior art, and time overhead has reduced 2/3.
Above-described embodiment of the present invention does not constitute the qualification to protection range of the present invention.Any modification of being done within the spirit and principles in the present invention, be equal to and replace and improvement etc., all should be included within the claim protection range of the present invention.

Claims (5)

1. an encrypting and deciphering system of realizing the SMS4 algorithm is characterized in that, comprising: first order streamline, second level streamline, third level streamline;
Described first order streamline comprises first computing module and first memory module; Described second level streamline comprises second computing module and second memory module; Described third level streamline comprises the 3rd computing module and the 3rd memory module;
The memory module of described each level production line all comprises Control Parameter zone, input block territory and operational data zone; Described Control Parameter zone is used for storing control parameter, and this Control Parameter is used to indicate mode of operation and iteration round; Described input block territory is used for storage input data, and described first order streamline receives the input data of corresponding round, and is stored in the input block territory of the memory module of each level production line; Described operational data zone is used to store operational data, and the computing output result of each level production line is stored in the operational data zone of the memory module of each level production line;
Described mode of operation comprises cipher key spreading pattern and encryption and decryption pattern; Described mode of operation is determined by the input data of first round, is that encryption key then is in the cipher key spreading pattern as if the input data, then is in the encryption and decryption pattern if the input data are plaintext or ciphertext;
Described first computing module will import data and system parameters according to described mode of operation or zero parameter is carried out xor operation, and the result is exported in computing is stored in described first memory module; Described second computing module receives the computing output result of first memory module, according to mode of operation result and preset parameter or round key are exported in this computing then and carry out xor operation, carry out S box table lookup operation again, and the result is exported in computing be stored in described second memory module; Described the 3rd computing module receives the computing output result of second memory module, according to mode of operation this computing output result is carried out the ring shift left operation then, carries out XOR again, and the result is exported in computing is stored in described the 3rd memory module;
Described second computing module computing output result according to described the 3rd memory module storage when described third level streamline is in the cipher key spreading pattern upgrades round key;
Described third level streamline is sent to first order streamline to computing output result and enters next iteration round, and the replication work pattern also increases progressively the iteration round; If described third level streamline is in last iteration round, then computing output result is not sent to first order streamline; If this last iteration round is last the iteration round under the encryption and decryption pattern, then the computing of described third level streamline is exported the result as the encryption and decryption operation result.
2. the encrypting and deciphering system of realization SMS4 algorithm according to claim 1 is characterized in that described first computing module comprises the first data alternative pack and the first XOR parts;
The described first data alternative pack is used for the selection of data, and the foundation of selection is the mode of operation that comprises in the described Control Parameter; If be in cipher key spreading pattern, then selective system parameter; If be in the encryption and decryption pattern, then select zero parameter.
The described first XOR parts are used for the output result of described input data and the described first data alternative pack is carried out xor operation.
3. the encrypting and deciphering system of realization SMS4 algorithm according to claim 1 is characterized in that described second computing module comprises the second data alternative pack, the second XOR parts and S box parts;
The described second data alternative pack is used for the selection of data, and it selects foundation is the mode of operation that comprises in the described Control Parameter; If be in the cipher key spreading pattern, then select preset parameter; If be in the encryption and decryption pattern, then select round key; Select described round key also according to the iteration round that comprises in the described Control Parameter;
The described second XOR parts are used for the output result of described operational data and the described second data alternative pack is carried out xor operation;
Described S box parts are used for the output result of the described second XOR parts is carried out S box table lookup operation.
4. the encrypting and deciphering system of realization SMS4 algorithm according to claim 1 is characterized in that described the 3rd computing module comprises the 3rd data alternative pack, ring shift left parts and the 3rd XOR parts;
Described the 3rd data alternative pack is used for the selection of data, and it selects foundation is the mode of operation that comprises in the Control Parameter; If be in the cipher key spreading pattern, then select parameter 0,0,13,23}; If be in the encryption and decryption pattern, then select parameter 2,10,18,24};
Described ring shift left parts are used for operational data is carried out ring shift left and xor operation; Described ring shift left parts are carried out the ring shift left computing of four kinds of band parameters earlier to operational data, the number of bits that described parameter representative moves to left is carried out xor operation to four kinds of ring shift left results again; The parameter of described ring shift left parts is from the output result of described the 3rd data alternative pack;
Described the 3rd XOR parts are used for the output result of described input data and described ring shift left parts is carried out xor operation.
5. the encrypting and deciphering system of realization SMS4 algorithm according to claim 1, it is characterized in that, also comprise the clock module that is used for clocking, described clock module is sent to described first memory module, described second memory module and described the 3rd memory module with the clock signal that produces, and described first memory module, described second memory module and described the 3rd memory module are all carried out the storage of data according to the clock signal that receives.
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