CN101763934B - Nonpolar laminated chip inductor - Google Patents

Nonpolar laminated chip inductor Download PDF

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Publication number
CN101763934B
CN101763934B CN2010100428444A CN201010042844A CN101763934B CN 101763934 B CN101763934 B CN 101763934B CN 2010100428444 A CN2010100428444 A CN 2010100428444A CN 201010042844 A CN201010042844 A CN 201010042844A CN 101763934 B CN101763934 B CN 101763934B
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China
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conductive coil
coil pattern
laminated
insulating barrier
chip inductor
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CN101763934A (en
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郭海
伍隽
戴春雷
漆珂
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Shenzhen Sunlord Electronics Co Ltd
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Shenzhen Sunlord Electronics Co Ltd
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Abstract

The invention discloses a nonpolar laminated chip inductor, which comprises a laminated inductance body which is formed by alternatively stacking and in series winding a surfacing insulating layer, a bottom insulating layer and more than three layers of S-shaped conductive coil pattern insulating layers and inverse S-shaped conductive coil pattern insulating layers via through holes, wherein the more than three layers of S-shaped conductive coil pattern insulating layers and the inverse S-shaped conductive coil pattern insulating layers are arranged between the surfacing insulating layer and the bottom insulating layer, the first layer of the laminated inductance body and the last layer of the S-shaped conductive coil pattern insulating layers are respectively connected with external electrodes at the two ends of the laminated inductance body via internal electrodes. The structure can form conductive coils in a shape of figure 8 in the laminated inductance body, and form two coils with the opposite winding direction in the laminated inductance body so that the directions of the generated magnetic fields are different. Because the side electrodes of the laminated inductance body is symmetrical, the difference generated by the reluctance of the external flux of the laminated chip inductor can be eliminated, and the inductance deviation generated by different position relations of a coil winding shaft and a mounting base plate is eliminated.

Description

A kind of nonpolar laminated chip inductor
Technical field
What the present invention relates to is laminated chip inductor, especially a kind of nonpolar laminated chip inductor.
Background technology
The insulating barrier that known laminated chip inductor has several layers to be provided with U-shaped or semicircle conductive coil pattern usually constitutes; Respectively be provided with on the insulating barrier of conductive coil pattern and be equipped with through hole; Through forming conductive coil after the through hole connection conducting, the two ends of laminated chip inductor are provided with the outer electrode that is connected with lamination inner conductive coil between each layer conductive coil pattern.
The coiling axle of the laminated chip inductor inner conductive coil of this structure with lay the laying of substrate usually by following two kinds of forms:
One, the coil winding axle with lay substrate vertical (seeing Fig. 1, Fig. 4);
Two, the coil winding axle with lay substrate parallel (seeing Fig. 2, Fig. 3).
Because the coil winding axle is different with the position relation of laying substrate, makes that the magnetic resistance of the outside magnetic flux of laminated chip inductor produces difference, and the phenomenon of different electric sensibility reciprocal occurs.If the laminated chip inductor of selecting for use the high frequency material of low magnetic permeability to make, to produce the difference of inductance value bigger because of laying direction.
Table 1
Tested number Forward through the time inductance value Forward and reverse through the time inductance value
Fig. 1 21.96 21.91
Fig. 2 21.19 21.22
Fig. 3 22.89 22.93
Fig. 4 20.37 20.30
Unit: nH
Can find out that from table 1 as coil winding axle and the form of laying such as Fig. 1 of laying substrate or when shown in Figure 3, inductance value is suitable basically; But as coil winding axle and the form of laying such as Fig. 2 of laying substrate or when shown in Figure 4, inductance value has then occurred than big-difference.
This phenomenon mainly is that the coiling mode of most of coils all is a single horizontal spiral coil (like Fig. 5) because the Inside coil conductor dbus crosses that through hole is formed by connecting is U-shaped helical coil coil.
At present; Realize that the non-polar method of inductance is to turn over the direction of whole winding to turn 90 degrees (like Fig. 6); The coiling center line of coil is set on the continuous straight line of each central point of a pair of relative chip end face that forms said termination electrode, and promptly the central point line with two end electrodes 1 is a coiling.
Summary of the invention
The object of the invention is exactly the deficiency to prior art, provides a kind of not because of laying the different nonpolar laminated chip inductors that the different electric sensibility reciprocal occurs of mode.
Nonpolar laminated chip inductor of the present invention is realized through following technical scheme.
This nonpolar laminated chip inductor; Comprise: by surface layer insulating barrier, bottom insulating barrier, be stacked on the laminated inductance body that conductive coil pattern insulating barrier constitutes more than three layers between surface layer insulating barrier and the bottom insulating barrier; The two ends of laminated inductance body are provided with the outer electrode that is connected with lamination inner conductive coil
The characteristics of this nonpolar laminated chip inductor are:
Said conductive coil pattern insulating barrier more than three layers comprises: the S insulating barrier and the anti-S insulating barrier that is provided with reverse S shape conductive coil pattern that are provided with S shape conductive coil pattern;
The two ends of the S shape conductive coil pattern of said S insulating barrier and the reverse S shape conductive coil pattern of anti-S insulating barrier are equipped with and are used for the through hole that levels S shape is connected with reverse S shape conductive coil pattern;
After the said insulating barrier alternated that respectively is provided with S shape and reverse S shape conductive coil pattern, be connected the conductive coil of the formation figure of eight in the laminated inductance body through the through hole that is arranged on levels S shape and reverse S shape conductive coil pattern two ends;
The first floor S shape conductive coil pattern of said laminated inductance body is connected with an end outer electrode of laminated inductance body through interior electrode;
The most not layer S shape conductive coil pattern of said laminated inductance body is connected with the outer electrode of holding in addition of laminated inductance body through interior electrode.
The further characteristics of nonpolar laminated chip inductor of the present invention are:
Said insulating barrier, S insulating barrier and anti-S insulating barrier all are high-frequency ceramic diaphragms.
The design principle of this nonpolar laminated chip inductor is: with the conductive coil that can form the figure of eight in the laminated inductance body of processing after S shape that is provided with in order at interval on each aspect of some insulating barriers and the series connection of anti-S shape conductive coil pattern together; Can form two coiling coils in the opposite direction of the reverse S shape of S shape conductive coil pattern and its lower floor conductive coil pattern in this laminated inductance body that forms by S insulating barrier and anti-S insulating barrier alternated, the magnetic fields point that coil the produced difference that two coilings are in the opposite direction.
Beneficial technical effects of the present invention is:
This nonpolar laminated chip inductor is because the electrode of its side is symmetrical, and the magnetic resistance of having eliminated the outside magnetic flux of laminated chip inductor produces difference, has eliminated coil winding axle and the different inductance value deviations that occur of position relation of laying substrate.
The concrete structure of nonpolar laminated chip inductor of the present invention is provided by following accompanying drawing and embodiment in detail.
Description of drawings
Fig. 1 has laminated chip inductor coil winding axle now and lays substrate vertical (mark upwards) figure;
Fig. 2 has laminated chip inductor coil winding axle now and lays substrate parallel (mark is outside) figure;
Fig. 3 has laminated chip inductor coil winding axle now and lays substrate parallel (mark inwards) figure;
Fig. 4 has laminated chip inductor coil winding axle now and lays substrate vertical (mark is downward) figure;
Fig. 5 is the horizontal coiling mode figure that existing laminated chip inductor coil adopts;
Fig. 6 is that existing laminated chip inductor is realized the non-polar technical scheme figure of inductance;
Fig. 7 is the laminated inductance body decomposition texture sketch map of nonpolar laminated chip inductor of the present invention;
The perspective view of Fig. 8 nonpolar laminated chip inductor of the present invention;
The birds-eye perspective of Fig. 9 nonpolar laminated chip inductor of the present invention;
The side perspective view of Figure 10 nonpolar laminated chip inductor of the present invention;
Figure 11 is the performance comparison figure of nonpolar laminated chip inductor of the present invention and existing laminated chip inductor inductance value.
Embodiment
Embodiment: nonpolar laminated chip inductor is made up of laminated inductance body 2 and the outer electrode 1 that is arranged on its two ends.
Said laminated inductance body 2 is as shown in Figure 7, is made up of end face high-frequency ceramic diaphragm 3, bottom surface high-frequency ceramic diaphragm 4, four layers of S high-frequency ceramic diaphragm that is provided with S shape conductive coil pattern 5, three layers of anti-S high-frequency ceramic diaphragm 6 that is provided with reverse S shape conductive coil pattern.
The S shape conductive coil pattern two ends of said S high-frequency ceramic diaphragm 5 are respectively equipped with through hole H1 or H2.
The reverse S shape conductive coil pattern two ends of said anti-S high-frequency ceramic diaphragm 6 are respectively equipped with through hole H1 or H2.
The first floor be not respectively equipped with the interior electrode 7 that is connected with outer electrode on the layer S high-frequency ceramic diaphragm 5.
Be arranged between end face high-frequency ceramic diaphragm 3 and the bottom surface high-frequency ceramic diaphragm 4 after said four layers of S high-frequency ceramic diaphragm 5 and three layers of anti-S high-frequency ceramic diaphragm 6 alternated; Through hole H1 or H2 that each layer is provided with on the high-frequency ceramic diaphragm of conductive coil pattern are corresponding one by one; Form laminated inductance body 2 through through hole H1 or H2 connected in electrical series between each of piling up layer conductive coil pattern high-frequency ceramic diaphragm, above-mentioned S high-frequency ceramic diaphragm 5, the anti-S high-frequency ceramic diaphragm 6 that is provided with S shape conductive coil pattern and reverse S shape conductive coil pattern constitutes 8 shape helical coils 8 in laminated inductance body 2.
Interior electrode 7 on laminated inductance body 2 first floor S high-frequency ceramic diaphragms 5 is connected with right-hand member outer electrode 1;
The laminated inductance body 2 not interior electrode 7 on the layer S high-frequency ceramic diaphragm 5 is connected with left end outer electrode 1.
See from the top of nonpolar laminated chip inductor; In the opposite direction with the coiling of reverse formed two coils of S shape conductive coil pattern in the laminated inductance body 2 by S shape conductive coil pattern; And the magnetic flux that produces points to different directions, and the side electrode of device is about the center symmetry of impedance device.
Table two is test results of the nonpolar laminated chip inductor embodiment that designs and produces according to the present invention
Tested number Forward through the time inductance Forward and reverse through the time inductance
1 21.37 21.39
2 21.87 21.82
3 21.80 21.77
4 21.28 21.32
Unit: nH
Experiment numbers 1,2,3,4 is meant that nonpolar laminated chip inductor of the present invention tests like Fig. 1, Fig. 2, Fig. 3, putting position shown in Figure 4 respectively.
From the table test data can find out, when the inductor putting position not simultaneously, the variation of inductance value is very little.This is because the two coil configuration of the present invention design makes that the electrode of laminated chip inductor in the side is symmetrical, disappears except when the sensibility reciprocal deviation of the mode of laying as shown in Figures 2 and 3 the time.
As can beappreciated from fig. 11, wherein dotted line is the result of traditional structure test, and solid line is the test result of the embodiment of the invention.

Claims (2)

1. nonpolar laminated chip inductor; Comprise: by surface layer insulating barrier, bottom insulating barrier, be stacked on the laminated inductance body that conductive coil pattern insulating barrier constitutes more than three layers between surface layer insulating barrier and the bottom insulating barrier; The two ends of laminated inductance body are provided with the outer electrode that is connected with lamination inner conductive coil, it is characterized in that:
Said conductive coil pattern insulating barrier more than three layers comprises: the S insulating barrier and the anti-S insulating barrier that is provided with reverse S shape conductive coil pattern that are provided with S shape conductive coil pattern;
The two ends of the S shape conductive coil pattern of said S insulating barrier and the reverse S shape conductive coil pattern of anti-S insulating barrier are equipped with and are used for the through hole that levels S shape is connected with reverse S shape conductive coil pattern;
After the said insulating barrier alternated that respectively is provided with S shape and reverse S shape conductive coil pattern, be connected the conductive coil of the formation figure of eight in the laminated inductance body through the through hole that is arranged on levels S shape and reverse S shape conductive coil pattern two ends;
The first floor S shape conductive coil pattern of said laminated inductance body is connected with an end outer electrode of laminated inductance body through interior electrode;
The most not layer S shape conductive coil pattern of said laminated inductance body is connected with the other end outer electrode of laminated inductance body through interior electrode.
2. nonpolar laminated chip inductor according to claim 1 is characterized in that:
Said surface layer insulating barrier, bottom insulating barrier, S insulating barrier and anti-S insulating barrier all are high-frequency ceramic diaphragms.
CN2010100428444A 2010-01-20 2010-01-20 Nonpolar laminated chip inductor Active CN101763934B (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013166619A1 (en) * 2012-05-08 2013-11-14 深圳顺络电子股份有限公司 Laminated inductor having high self-resonant frequency and high quality factor
WO2023122953A1 (en) * 2021-12-28 2023-07-06 深圳顺络电子股份有限公司 Vertical multiphase inductor and manufacturing method therefor
CN114551063B (en) * 2022-04-02 2023-09-15 电子科技大学 Resin type inductance structure

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1189677A (en) * 1996-09-12 1998-08-05 株式会社村田制作所 Laminated electronic component
CN1366313A (en) * 2001-01-19 2002-08-28 株式会社村田制作所 Layered impedance device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1189677A (en) * 1996-09-12 1998-08-05 株式会社村田制作所 Laminated electronic component
CN1366313A (en) * 2001-01-19 2002-08-28 株式会社村田制作所 Layered impedance device

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