CN101763813A - Drive circuit and method for scanning electrode of plasma display - Google Patents
Drive circuit and method for scanning electrode of plasma display Download PDFInfo
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- CN101763813A CN101763813A CN200810246818A CN200810246818A CN101763813A CN 101763813 A CN101763813 A CN 101763813A CN 200810246818 A CN200810246818 A CN 200810246818A CN 200810246818 A CN200810246818 A CN 200810246818A CN 101763813 A CN101763813 A CN 101763813A
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Abstract
The invention provides a drive circuit and a method for a scanning electrode of a plasma display. The circuit comprises a scanning chip, a grounding module, a Vs module and a Vsc module, wherein the scanning chip comprises a high-voltage input end YP, a reference voltage input end YG and an output end and is used for switching the voltage output to the YP or the YG so as to generate a drive waveform of the scanning electrode; the grounding module is used for providing the GND of stages (1), (4), (6), (8) and (10) for the YG; the Vs module is used for providing the voltage Vs of stages of (3) and (9) for the YG; and the Vsc module is used for providing the voltage Vsc of a stage (2) for the YP and providing the -Vsc of stages (5) and (7) for the YG. The invention simplifies the drive circuit and saves the cost.
Description
Technical field
The present invention relates to the plasma display field, in particular to a kind of scan electrode driving circuit and method that is used for plasma display.
Background technology
Chromatic alternating-current plasma display (AC-PDP) is to develop according to the ultimate principle of gas discharge, realizes showing by the ultraviolet excitation light-emitting phosphor that gas discharge sends.At present, three-electrode surface discharge type AC-PDP is the most competitive a kind of PDP type, this AC-PDP adopt mostly addressing and display separation (ADS) technology realize what gray scale showed, be about to a TV Field and be divided into successively luminous 8 or 10 or 12 son fields, each son field is formed by preparatory stage, address period and the phase of keeping, and just can realize 256 grades gray scale demonstration by the combination of suitable son.
Fig. 1 shows the basic structure synoptic diagram of plasma display.As shown in Figure 1, plasma display comprises display screen 110, control circuit 120, scan electrode (Y electrode) driving circuit 130, keeps electrode (X electrode) driving circuit 140 and addressing driving circuit 150.Addressing driving circuit 150 is under the control of control circuit 120, to addressing electrode A
1, A
2, A
3... predetermined voltage is provided.Scan electrode (Y electrode) driving circuit 130 is under the control of control circuit 120, to scan electrode Y
1, Y
2, Y
3... predetermined voltage is provided.Keep electrode (X electrode) driving circuit 140 respectively to keeping electrode X
1, X
2, X
3... service voltage.
Three distribution of electrodes of three-electrode surface discharge type AC-PDP are on front-back baseboard, and discharge is then carried out between two substrates.The prebasal plate horizontal distribution and is kept electrode (X electrode) and scan electrode (Y electrode), and addressing electrode (A electrode) is vertically distributing on metacoxal plate.X electrode and Y electrode are parallel to each other, and with A electrode quadrature.
Fig. 2 shows the drive waveforms of a son field in the existing ADS Driving technique.As shown in Figure 2, be divided into preparatory stage, address period and keep the phase.Label 1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
Be each stage of drive waveforms in the son, wherein 5. 4. 3. 2. 1. the be the preparatory stage, 6. 7. 8. the stage be address period, 9. 10.
Stage is the phase of keeping.In the preparatory stage, three electrodes cooperatively interact, and wipe the wall electric charge that a son field is left over, and make full frame all display units reach consistent original state; In address period, driving circuit carries out addressing to each row according to elder generation's strange back idol, top-down order, and writes image coded data at the A electrode, and the unit that all will be shown in this child field has accumulated suitable wall electric charge; In the phase of keeping, X electrode and Y electrode alternately add high pressure, make the unit generation discharge that has accumulated the wall electric charge in address period, thereby realize the demonstration of image.
Preparatory stage is when beginning, institute's making alive all is 0V on three electrodes, but, last when finishing of last or the last son field phase of keeping be added on the X electrode because keeping pulse, keep discharge back negative wall electric charge of accumulation on the X electrode, on the Y electrode, accumulated positive wall electric charge, therefore, on the Y electrode, add wide positive ramp voltage (Vsetup ≈ 350V) earlier much larger than firing voltage, make between X and Y electrode and discharge, discharge and accumulated positive wall electric charge and negative wall electric charge on latter two electrode respectively, the negative ramp voltage of on the Y electrode, widening (Vy ≈ 170V) subsequently, on the X electrode, add positive plateau voltage (Vb ≈ 150V), make between X and the Y electrode and slowly reach firing voltage, discharge, neutralize wall electric charge positive on X and the Y electrode and negative wall electric charge, make the state of full frame all unit reach the consistent state that extinguishes at last, address period subsequently just can be addressed to each unit exactly.
Fig. 3 shows the scan electrode driving circuit according to correlation technique, and Cpanel wherein is the equivalent capacity of plasma panel.Its course of work is as follows:
When one or one at first, promptly 1. the voltage on the Y is 0 the stage among Fig. 2, at this moment, Yout switches to the YG end, power switch pipe QsusL conducting, YG is connected to GND, realizes that the Y output voltage is 0V; Stage 2. in, other power switch pipe closures, power switch pipe QsanH conducting realizes that the Y output voltage is Vsc; Stage 3. in, power switch pipe Qsetup conducting, the YG terminal voltage equals Vs, power switch pipe QpassL conducting simultaneously, at this moment, Y output voltage=Vsc+Vs realizes preparatory stage acclivity voltage waveform, the purpose that slowly rises in the slope is not take place to neutralize most wall electric charge on the strong basis of discharging, and very strong bias light can not take place; Stage 4. in, power switch pipe QsusL conducting, other power switch pipes are closed, Y output is connected to GND, making output voltage is 0V; Stage 5. in, power switch pipe Qrampdn conducting, YG voltage is pulled to-Vy, has realized the decline ramp voltage waveform, the purpose that the slope descends also is in order to neutralize most wall electric charge on the basis that strong discharge is not taking place, and very strong bias light can not take place; The 6. in the stage, Yout switches to the YP end, power switch pipe QScanH conducting, and other power switch pipes are closed, and Y output is connected to Vsc, and in whole address period, the voltage on the unit that is not addressed to is Vsc-Vy, shown in the address period of Fig. 2; 7. stage is the addressing negative pulse, the capable Y driving circuit at the place, unit that is addressed to can be exported to negative pulse of this row, this negative pulse is to pulled down to-Vy from address period voltage, and voltage on the unit that is not addressed to keeps Vsc-Vy constant, as the 8. stage; Next carry out the transition to the phase of keeping, in the 9. stage, the switch QsusL conducting of Fig. 3, other switches cut out, and Y output is connected to GND, and making output voltage is 0V; 10. the stage for keeping rising edge of a pulse, keeping pulse height is Vs, at this moment, energy recovery circuit part can be worked, and at first switching tube QerH among Fig. 3 and QpassL conducting gone up charge stored with capacitor C er and be transferred on the Y electrode through inductance L er and QpassL and scanning chip, it is about 80% of Vs that this part electric charge makes the voltage on the Y electrode, next switching tube QsusH conducting, other switches cut out, and move the amplitude of keeping rising edge of a pulse to Vs; Ensuing
Stage is a negative edge of keeping pulse, keep voltage and need move 0 current potential to, do not waste, electric charge is stored in the storage capacitor by switching tube QerL in order to make energy, move output voltage amplitude to 0 current potential by switching tube QsusL more subsequently, next repeat rising, step-down operation, finish whole keeping the phase, enter the driving process of next son field subsequently, repeat 10 processes that similar front was said, the Y that finishes all son fields drives, and cooperates X to drive simultaneously and the A driving, finishes the demonstration of a field picture.
Vy, Vsc that Fig. 4 shows in the scan electrode driving circuit of Fig. 3 produce circuit, Fig. 5 shows in the scan electrode driving circuit of Fig. 3+15V_Vy and+15V_YG produces circuit.
Decline ramp voltage-Vy of sweep time plateau voltage Vsc and preparatory stage produces by Switching Power Supply respectively, wherein,-Vy is connected to YG by power switch pipe Qrampdn, Vsc is connected to scanning chip YP end (high voltage input terminal) by power switch pipe QscanH, and then is connected to scanning chip YG end (reference voltage input terminal) by power switch pipe QscanL.Power switch pipe comprises in this scan electrode driving circuit: Qrampdn, QscanH and QscanL.
In realizing process of the present invention, the inventor finds that power switch pipe is more in the existing scan electrode driving circuit, causes circuit complicated, and cost is higher.
Summary of the invention
The present invention aims to provide a kind of scan electrode driving circuit and method that is used for plasma display, and it is complicated to solve existing scan electrode driving circuit, the cost problem of higher.
In an embodiment of the present invention, a kind of scan electrode driving circuit that is used for plasma display is provided, comprise: the scanning chip, it comprises high voltage input terminal YP, reference voltage input terminal YG and output terminal, be used to switch the voltage of output YP or YG, to produce the drive waveforms of scan electrode, its each cycle comprises: the preparatory stage, comprise: the stage 1., GND; Stage 2., rising edge; Stage 3., acclivity; Stage 4., negative edge; Stage 5., the decline slope; Address period comprises: the stage, 6. the scanning plateau voltage was GND; Stage 7., negative pulse; Stage, 8. the scanning plateau voltage was GND; Keep the phase, comprising: 9. the stage keeps rising edge of a pulse; 10. stage keeps the pulse negative edge; Earthing module is used for providing 1. 4. 6. 8. 10. GND of stage to YG; The Vs module is used for providing 3. 9. voltage Vs of stage to YG; The Vsc module is used for providing stage voltage Vsc 2. to YP, and to YG provide the stage 5. 7.-Vsc.
Optionally, in above-mentioned scan electrode driving circuit, the Vs module comprises: first branch road and second branch road, power switch pipe QpassL and power supply Vs in parallel; First end points in parallel connects power supply Vs, and second end points in parallel is connected to YG by power switch pipe QpassL; First branch road comprises power switch pipe QsusH, and second branch road comprises the integrating circuit that is made of power switch pipe Qsetup, resistor and capacitor.
Optionally, in above-mentioned scan electrode driving circuit, second branch road also comprises connects with integrating circuit and is the diode of forward.
Optionally, in above-mentioned scan electrode driving circuit, the Vsc module comprises: the 3rd branch road, the 4th branch road, the 5th branch road and power supply Vsc; The 3rd branch road is connected between power supply Vsc and the YP, and it comprises power switch pipe QscanH; The 4th branch road is connected between YP and the YG, and it comprises capacitor; The 5th branch road is connected between YP and the ground, and it comprises the integrating circuit that is made of power switch pipe Qrampdn, resistor and capacitor.
Optionally, in above-mentioned scan electrode driving circuit, also comprise: energy-storage module is used for 10. storing the electric charge that discharges when YG moves GND to by Vs in the stage.
Optionally, in above-mentioned scan electrode driving circuit, the stage 9. in, earlier utilize charge stored that a part of Vs is provided by energy-storage module, provide remaining Vs by Vs again.
In an embodiment of the present invention, a kind of scan electrode driving method that is used for plasma display also is provided, comprise: the output terminal of the scanning chip by scan electrode driving circuit switches the voltage of output its high voltage input terminal YP or reference voltage input terminal YG, to produce the drive waveforms of scan electrode, its each cycle comprises: the preparatory stage, comprise: the stage 1., GND; Stage 2., rising edge; Stage 3., acclivity; Stage 4., negative edge; Stage 5., the decline slope; Address period comprises: the stage, 6. the scanning plateau voltage was GND; Stage 7., negative pulse; Stage, 8. the scanning plateau voltage was GND; Keep the phase, comprising: 9. the stage keeps rising edge of a pulse; 10. stage keeps the pulse negative edge; Earthing module is used for providing 1. 4. 6. 8. 10. GND of stage to YG; The Vs module is used for providing 3. 9. voltage Vs of stage to YG; The Vsc module is used for providing stage voltage Vsc 2. to YP, and to YG provide the stage 5. 7.-Vsc.
Optionally, in above-mentioned scan electrode driving method, the drive waveforms that the output terminal of the scanning chip by scan electrode driving circuit produces scan electrode specifically comprises: the stage, 1. output terminal switched to YG, and earthing module provides GND to YG; Stage, 2. output terminal switched to YP, and the Vsc module provides Vsc to YP; Stage, 3. output terminal remained on YP, and the Vs module provides the Vs of integration to YG; Stage, 4. output terminal switched to YG, and earthing module provides GND to YG; Stage, 5. output terminal remained on YG, and the Vsc module is moved the YP integration to GND with descending, make YG obtain integration decline-Vsc; Stage, 6. output terminal remained on YG, and earthing module provides GND to YG; Stage, 7. output terminal remained on YG, and the Vsc module is moved YP to GND, and YG is obtained-Vsc; Stage, 8. output terminal remained on YG, and earthing module provides GND to YG; Stage, 9. output terminal remained on YG, and the Vs module provides Vs to YG; Stage, 10. output terminal remained on YG, and earthing module provides GND to YG.
Optionally, in above-mentioned scan electrode driving method, scan electrode driving circuit comprises energy-storage module, and 9. its stage specifically comprises: output terminal remains on YG, earlier utilize its charge stored to provide a part of Vs, provide remaining Vs by the Vs module to YG again to YG by energy-storage module.
Optionally, in above-mentioned scan electrode driving method, 10. its stage specifically comprises: output terminal switches to YG, and earthing module provides GND to YG, and wherein, it is the electric charge that discharges that memory module storage YG moves GND to from Vs.
Scan electrode driving circuit of the above embodiment of the present invention and method, produce circuit because removed the decline ramp voltage-Vy in the traditional circuit, and switching power circuit has also been saved the generation circuit of floating voltage+15V_Vy, therefore greatly reduce the complexity of circuit, provide cost savings.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 shows the basic structure synoptic diagram of plasma display;
Fig. 2 shows the drive waveforms of a son field in the existing ADS Driving technique;
Fig. 3 shows the scan electrode driving circuit according to correlation technique;
Vy, Vsc that Fig. 4 shows in the scan electrode driving circuit of Fig. 3 produce circuit;
Fig. 5 shows in the scan electrode driving circuit of Fig. 3+15V_Vy and+15V_YG produces circuit;
Fig. 6 shows scan electrode driving circuit according to an embodiment of the invention;
Fig. 7 shows scan electrode driving circuit in accordance with a preferred embodiment of the present invention;
Fig. 8 shows the simplified electrical circuit diagram of the Y driving power generation circuit of Fig. 7;
Fig. 9 shows the drive waveforms of the scan electrode driving circuit output of Fig. 7.
Embodiment
Below with reference to the accompanying drawings and in conjunction with the embodiments, describe the present invention in detail.
Fig. 6 shows scan electrode driving circuit according to an embodiment of the invention, comprising:
Preparatory stage, comprising: the stage 1., GND; Stage 2., rising edge; Stage 3., acclivity; Stage 4., negative edge; Stage 5., the decline slope;
Address period comprises: the stage, 6. the scanning plateau voltage was GND; Stage 7., negative pulse; Stage, 8. the scanning plateau voltage was GND;
Keep the phase, comprising: 9. the stage keeps rising edge of a pulse; 10. stage keeps the pulse negative edge;
Vsc module 40 is used for providing stage voltage Vsc 2. to YP, and to YG provide the stage 5. 7.-Vsc.
This embodiment relates generally to Y and drives decline slope generating circuit structure, and promptly usefulness-Vsc replaces the circuit structure of the Vy in the traditional circuit.The embodiment of comparison diagram 6 and Fig. 3, the embodiment that can find Fig. 6 has removed the decline ramp voltage-Vy in the traditional circuit and has produced circuit, and switching power circuit has also been saved the generation circuit of floating voltage+15V_Vy, therefore greatly reduce the complexity of circuit, provide cost savings.
Fig. 7 shows scan electrode driving circuit in accordance with a preferred embodiment of the present invention.
Preferably, as shown in Figure 7, Vs module 30 comprises:
First branch road and second branch road, power switch pipe QpassL and power supply Vs in parallel;
First end points in parallel connects power supply Vs, and second end points in parallel is connected to YG by power switch pipe QpassL;
First branch road comprises power switch pipe QsusH, and second branch road comprises the integrating circuit that is made of power switch pipe Qsetup, resistor and capacitor.
Wherein, the conducting of the power switch pipe QpassL voltage that the Vs module can be provided is applied to YG; The conducting of power switch pipe QsusH can provide Vs, and the conducting of power switch pipe Qsetup can provide the Vs of integration, thereby forms acclivity.
Preferably, as shown in Figure 7, second branch road also comprises connects with integrating circuit and is the diode of forward.Counter the gushing of electric charge when this can stop YG to move GND to.
Preferably, as shown in Figure 7, Vsc module 40 comprises:
The 3rd branch road, the 4th branch road, the 5th branch road and power supply Vsc;
The 3rd branch road is connected between power supply Vsc and the YP, and it comprises power switch pipe QscanH;
The 4th branch road is connected between YP and the YG, and it comprises capacitor;
The 5th branch road is connected between YP and the ground, and it comprises the integrating circuit that is made of power switch pipe Qrampdn, resistor and capacitor.
YP is connected to GND by switch Qrampdn, purpose is can produce-Vsc, links to each other by electric capacity between YP and the YG, and YP is connected to Vsc by switching tube QscanH, when switching tube QscanH conducting, the pressure drop between YP and the YG on the electric capacity is always Vsc (about about 190V) like this.Owing to need not produce Vy voltage separately, therefore simplify circuit structure.
Fig. 8 shows the simplified electrical circuit diagram of the Y driving power generation circuit of Fig. 7.Producing circuit with existing Y driving power compares, owing to need not produce Vy voltage, and, chip for driving power supply+15V_Vy that corresponding Vy produces the circuit power switch pipe also need not produce again, therefore saved a DC-DC circuit that constitutes by transformer, only produce Vsc voltage and+15V YG voltage is just passable.
Preferably, as shown in Figure 6, also comprise: energy-storage module 50 is used for 10. storing the electric charge that discharges when YG moves GND to by Vs in the stage.Optionally, the stage 9. in, earlier utilize charge stored that a part of Vs is provided by energy-storage module, provide remaining Vs by Vs again.This can save electric energy.
One embodiment of the present of invention provide a kind of scan electrode driving method that is used for plasma display, comprise: the output terminal of the scanning chip by scan electrode driving circuit switches the voltage of output its high voltage input terminal YP or reference voltage input terminal YG, to produce the drive waveforms of scan electrode, its each cycle comprises:
Preparatory stage, comprising: the stage 1., GND; Stage 2., rising edge; Stage 3., acclivity; Stage 4., negative edge; Stage 5., the decline slope;
Address period comprises: the stage, 6. the scanning plateau voltage was GND; Stage 7., negative pulse; Stage, 8. the scanning plateau voltage was GND;
Keep the phase, comprising: 9. the stage keeps rising edge of a pulse; 10. stage keeps the pulse negative edge;
Wherein, by the earthing module of scan electrode driving circuit, provide 1. 4. 6. 8. 10. GND of stage to the YG of scanning chip;
By the Vs module of scan electrode driving circuit, provide 3. 9. voltage Vs of stage to YG;
By the Vsc module of scan electrode driving circuit, to scanning chip YP stage voltage Vsc 2. is provided, and to YG provide the stage 5. 7.-Vsc.
Because with-Vsc replacement-Vy, produce circuit so removed the decline ramp voltage-Vy in the traditional circuit, and switching power circuit has also been saved the generation circuit of floating voltage+15V_Vy, therefore greatly reduce the complexity of circuit, provide cost savings.
Optionally, for scan electrode driving circuit shown in Figure 6, the drive waveforms that the output terminal of the scanning chip by scan electrode driving circuit produces scan electrode specifically comprises:
Stage, 1. output terminal switched to YG, and described earthing module provides GND to YG;
Stage, 2. output terminal switched to YP, and described Vsc module provides Vsc to YP;
Stage, 3. output terminal remained on YP, and described Vs module provides the Vs of integration to YG;
Stage, 4. output terminal switched to YG, and described earthing module provides GND to YG;
Stage, 5. output terminal remained on YG, and described Vsc module is moved the YP integration to GND with descending, make YG obtain integration decline-Vsc;
Stage, 6. output terminal remained on YG, and described earthing module provides GND to YG;
Stage, 7. output terminal remained on YG, and described Vsc module is moved YP to GND, and YG is obtained-Vsc;
Stage, 8. output terminal remained on YG, and described earthing module provides GND to YG;
Stage, 9. output terminal remained on YG, and described Vs module provides Vs to YG;
Stage, 10. output terminal remained on YG, and described earthing module provides GND to YG.
Optionally, in above-mentioned scan electrode driving method, scan electrode driving circuit comprises energy-storage module, and 9. its stage specifically comprises: output terminal remains on YG, earlier utilize its charge stored to provide a part of Vs, provide remaining Vs by the Vs module to YG again to YG by energy-storage module.
Optionally, in above-mentioned scan electrode driving method, 10. its stage specifically comprises: output terminal switches to YG, and earthing module provides GND to YG, and wherein, it is the electric charge that discharges that memory module storage YG moves GND to from Vs.
Fig. 9 shows the drive waveforms of the scan electrode driving circuit output of Fig. 7.
Fig. 9 when one or one at first, promptly 1. the voltage on the Y is 0 the stage among Fig. 9, at this moment, Yout (output end voltage) switches to the YG end, power switch pipe QsusL conducting, YG is connected to GND, realizes that the Y output voltage is 0V; Stage 2. in, other power switch pipe closures, power switch pipe QsanH conducting realizes that the Y output voltage is Vsc; Stage 3. in, power switch pipe Qsetup conducting, the YG terminal voltage equals Vs, power switch pipe QpassL conducting simultaneously, at this moment, Y output voltage=Vsc+Vs realizes preparatory stage acclivity voltage waveform, the purpose that slowly rises in the slope is not take place to neutralize most wall electric charge on the strong basis of discharging, and very strong bias light can not take place; Stage 4. in, power switch pipe QsusL conducting, other power switch pipes are closed, Y output is connected to GND, making output voltage is 0V; Stage 5. in, power switch pipe Qrampdn conducting, YP voltage is pulled to 0 current potential, then YG voltage=-Vsc, realized the decline ramp voltage waveform, the purpose that the slope descends also is in order to neutralize most wall electric charge on the basis that strong discharge is not taking place, and very strong bias light can not take place; The 6. in the stage, power switch pipe QsusL conducting, other power switch pipes are closed, and Y output is connected to GND, and making output voltage is 0V, and in whole address period, the voltage on the unit that is not addressed to is 0V, shown in the address period of Fig. 9; Stage, the capable Y driving circuit at the place, unit that is addressed to can be exported to negative pulse of this row 7. for the addressing negative pulse, and this negative pulse is to pulled down to-Vsc from address period voltage 0V, and the voltage maintenance 0V on the unit that is not addressed to is as the 8. stage; Next carry out the transition to the phase of keeping, 9. the stage for keeping rising edge of a pulse, keeping pulse height is Vs, and at this moment, the energy recovery circuit part can be worked, at first switching tube QerH among Fig. 7 and QpassL conducting, capacitor C er is gone up charge stored be transferred on the Y electrode through inductance L er and QpassL and scanning chip, it is about 80% of Vs, next switching tube QsusH conducting that this part electric charge makes the voltage on the Y electrode, other switches cut out, and move the amplitude of keeping rising edge of a pulse to Vs; Ensuing 10. the stage is a negative edge of keeping pulse, keep voltage and need move 0 current potential to, do not waste in order to make energy, electric charge is stored in the storage capacitor by switching tube QerL, move output voltage amplitude to 0 current potential by switching tube QsusL more subsequently, next repeat rising, step-down operation, finish whole keeping the phase, enter the driving process of next son field subsequently, repeat 10 processes that similar front was said, the Y that finishes all son fields drives, and cooperates X to drive simultaneously and the A driving, finishes the demonstration of a field picture.
For high-power circuit, reduce power tube and simplification circuit and can reduce circuit cost, reduction circuit power consumption, increase work efficiency.The preferred embodiment produces in the circuit by the decline ramp voltage at scan electrode driving circuit, and usefulness-Vsc replaces the Vy in the traditional circuit, has reduced circuit complexity, has also reduced circuit power consumption simultaneously, has improved work efficiency.And,, also reduced the cost of circuit owing to reduced a switch and part components and parts.
In a word, scan electrode driving circuit of the above embodiment of the present invention and method have reached the saving circuit cost, reduce circuit complexity, the effect of increasing work efficiency.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. a scan electrode driving circuit that is used for plasma display is characterized in that, comprising:
The scanning chip, it comprises high voltage input terminal YP, reference voltage input terminal YG and output terminal, is used to switch the voltage of output YP or YG, to produce the drive waveforms of scan electrode, its each cycle comprises:
Preparatory stage, comprising: the stage 1., GND; Stage 2., rising edge; Stage 3., acclivity; Stage 4., negative edge; Stage 5., the decline slope;
Address period comprises: the stage, 6. the scanning plateau voltage was GND; Stage 7., negative pulse; Stage, 8. the scanning plateau voltage was GND;
Keep the phase, comprising: 9. the stage keeps rising edge of a pulse; 10. stage keeps the pulse negative edge;
Earthing module is used for providing 1. 4. 6. 8. 10. GND of stage to YG;
The Vs module is used for providing 3. 9. voltage Vs of stage to YG;
The Vsc module is used for providing stage voltage Vsc 2. to YP, and to YG provide the stage 5. 7.-Vsc.
2. scan electrode driving circuit according to claim 1 is characterized in that, described Vs module comprises:
First branch road and second branch road, power switch pipe QpassL and power supply Vs in parallel;
First end points in parallel connects described power supply Vs, and second end points in parallel is connected to YG by power switch pipe QpassL;
Described first branch road comprises power switch pipe QsusH, and described second branch road comprises the integrating circuit that is made of power switch pipe Qsetup, resistor and capacitor.
3. scan electrode driving circuit according to claim 2 is characterized in that, described second branch road also comprises connects with described integrating circuit and be the diode of forward.
4. scan electrode driving circuit according to claim 1 is characterized in that, described Vsc module comprises:
The 3rd branch road, the 4th branch road, the 5th branch road and power supply Vsc; Described the 3rd branch road is connected between described power supply Vsc and the YP, and it comprises power switch pipe QscanH;
Described the 4th branch road is connected between YP and the YG, and it comprises capacitor;
Described the 5th branch road is connected between YP and the ground, and it comprises the integrating circuit that is made of power switch pipe Qrampdn, resistor and capacitor.
5. scan electrode driving circuit according to claim 1 is characterized in that, also comprises:
Energy-storage module is used for 10. storing the electric charge that discharges when YG moves GND to by Vs in the stage.
6. scan electrode driving circuit according to claim 5 is characterized in that, the stage 9. in, earlier utilize charge stored that a part of Vs is provided by described energy-storage module, provide remaining Vs by described Vs again.
7. a scan electrode driving method that is used for plasma display is characterized in that, comprising:
The output terminal of the scanning chip by scan electrode driving circuit switches the voltage of output its high voltage input terminal YP or reference voltage input terminal YG, and to produce the drive waveforms of scan electrode, its each cycle comprises:
Preparatory stage, comprising: the stage 1., GND; Stage 2., rising edge; Stage 3., acclivity; Stage 4., negative edge; Stage 5., the decline slope;
Address period comprises: the stage, 6. the scanning plateau voltage was GND; Stage 7., negative pulse; Stage, 8. the scanning plateau voltage was GND;
Keep the phase, comprising: 9. the stage keeps rising edge of a pulse; 10. stage keeps the pulse negative edge;
Earthing module is used for providing 1. 4. 6. 8. 10. GND of stage to YG;
The Vs module is used for providing 3. 9. voltage Vs of stage to YG;
The Vsc module is used for providing stage voltage Vsc 2. to YP, and to YG provide the stage 5. 7.-Vsc.
8. scan electrode driving method according to claim 7 is characterized in that, the drive waveforms that the output terminal of the scanning chip by scan electrode driving circuit produces scan electrode specifically comprises:
Stage, 1. output terminal switched to YG, and described earthing module provides GND to YG;
Stage, 2. output terminal switched to YP, and described Vsc module provides Vsc to YP;
Stage, 3. output terminal remained on YP, and described Vs module provides the Vs of integration to YG;
Stage, 4. output terminal switched to YG, and described earthing module provides GND to YG;
Stage, 5. output terminal remained on YG, and described Vsc module is moved the YP integration to GND with descending, make YG obtain integration decline-Vsc;
Stage, 6. output terminal remained on YG, and described earthing module provides GND to YG;
Stage, 7. output terminal remained on YG, and described Vsc module is moved YP to GND, and YG is obtained-Vsc;
Stage, 8. output terminal remained on YG, and described earthing module provides GND to YG;
Stage, 9. output terminal remained on YG, and described Vs module provides Vs to YG;
Stage, 10. output terminal remained on YG, and described earthing module provides GND to YG.
9. scan electrode driving method according to claim 8 is characterized in that described scan electrode driving circuit comprises energy-storage module, and 9. its stage specifically comprises:
Output terminal remains on YG, utilizes its charge stored to provide a part of Vs to YG by described energy-storage module earlier, provides remaining Vs by described Vs module to YG again.
10. scan electrode driving method according to claim 9 is characterized in that, 10. its stage specifically comprises:
Output terminal switches to YG, and described earthing module provides GND to YG, and wherein, it is the electric charge that discharges that described memory module storage YG moves GND to from Vs.
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| CN 200810246818 CN101763813B (en) | 2008-12-31 | 2008-12-31 | Drive circuit and method for scanning electrode of plasma display |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101727823B (en) * | 2008-12-30 | 2011-10-12 | 四川虹欧显示器件有限公司 | Sustaining electrode driving circuit for plasma display and driving method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1622162A (en) * | 2003-11-27 | 2005-06-01 | 三星Sdi株式会社 | Driving method and device of plasma display panel and plasma display device |
| CN1822078A (en) * | 2005-02-17 | 2006-08-23 | Lg电子株式会社 | Plasma display apparatus and driving method thereof |
| CN1838211A (en) * | 2005-03-22 | 2006-09-27 | Lg电子株式会社 | Method of driving plasma display apparatus |
| JP2007212904A (en) * | 2006-02-13 | 2007-08-23 | Fujitsu Hitachi Plasma Display Ltd | Driving method of plasma display panel and plasma display device |
| JP2007240822A (en) * | 2006-03-08 | 2007-09-20 | Matsushita Electric Ind Co Ltd | Plasma display panel drive circuit and plasma display device |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1622162A (en) * | 2003-11-27 | 2005-06-01 | 三星Sdi株式会社 | Driving method and device of plasma display panel and plasma display device |
| CN1822078A (en) * | 2005-02-17 | 2006-08-23 | Lg电子株式会社 | Plasma display apparatus and driving method thereof |
| CN1838211A (en) * | 2005-03-22 | 2006-09-27 | Lg电子株式会社 | Method of driving plasma display apparatus |
| JP2007212904A (en) * | 2006-02-13 | 2007-08-23 | Fujitsu Hitachi Plasma Display Ltd | Driving method of plasma display panel and plasma display device |
| JP2007240822A (en) * | 2006-03-08 | 2007-09-20 | Matsushita Electric Ind Co Ltd | Plasma display panel drive circuit and plasma display device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101727823B (en) * | 2008-12-30 | 2011-10-12 | 四川虹欧显示器件有限公司 | Sustaining electrode driving circuit for plasma display and driving method |
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| CN101763813B (en) | 2012-12-12 |
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