CN101740399A - Method for partially covering insulating layer on metal wire in package - Google Patents

Method for partially covering insulating layer on metal wire in package Download PDF

Info

Publication number
CN101740399A
CN101740399A CN200810178175A CN200810178175A CN101740399A CN 101740399 A CN101740399 A CN 101740399A CN 200810178175 A CN200810178175 A CN 200810178175A CN 200810178175 A CN200810178175 A CN 200810178175A CN 101740399 A CN101740399 A CN 101740399A
Authority
CN
China
Prior art keywords
plain conductor
insulating material
metal wire
insulating barrier
need
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN200810178175A
Other languages
Chinese (zh)
Inventor
周健威
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Semiconductor China R&D Co Ltd
Samsung Electronics Co Ltd
Original Assignee
Samsung Semiconductor China R&D Co Ltd
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Semiconductor China R&D Co Ltd, Samsung Electronics Co Ltd filed Critical Samsung Semiconductor China R&D Co Ltd
Priority to CN200810178175A priority Critical patent/CN101740399A/en
Publication of CN101740399A publication Critical patent/CN101740399A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45139Silver (Ag) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/786Means for supplying the connector to be connected in the bonding apparatus
    • H01L2224/78621Holding means, e.g. wire clampers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512Aligning
    • H01L2224/85148Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518Translational movements
    • H01L2224/85181Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/1016Shape being a cuboid
    • H01L2924/10162Shape being a cuboid with a square active surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

The invention discloses a method for partially covering an insulating layer on a metal wire in a package. The method comprises the following steps: marking the surface region of the metal wire in need of insulation protection, wherein the surface region of the metal wire in need of insulation protection is the region which can contact or approach to other metal wires and produce short circuit or drain current when the metal wire is packaged; attaching an insulating material only on the marked region on the metal wire; and curing the attached insulating material solution by using a curing unit, thereby forming an insulating layer on the region of the metal wire in need of insulation protection. The method of the invention can reduce cost and give consideration to both the binding force of bonding points and the insulating property among wires.

Description

A kind of method of the partially covering insulating layer on metal wire in packaging part
Technical field
The present invention relates to the encapsulation technology field, more particularly, the present invention relates to a kind of by having the part of short circuit risk to be coated with insulating layer coating on plain conductor to reach the method for insulation effect at packaging part.
Background technology
In semiconductor package part, for the substrate (for example bonding welding pad (lead-in wire) of printed circuit board (PCB) (PCB) or lead frame (lead frame)) and the chip bonding pad of semiconductor chip are electrically connected to each other, use plain conductor (metal wire) usually with substrate and semiconductor chip bonding.Such technology is called the lead bonding technology, uses plain conductor to be connected and is called the lead bonding between substrate and the semiconductor chip.
Along with the chip bonding pad of semiconductor chip becomes more and more microminiaturized, and utilize the lead bonding technology to pile up and makes stack package, make the also increase greatly of possibility that when plain conductor is in contact with one another, is short-circuited with multi-lager semiconductor chip.That is to say, in the technical process that adopts the plain conductor bonding,, thereby take place plain conductor to be in contact with one another easily and cause risk of short-circuits because that various plain conductors are understood the phase mutual edge distance unavoidably is too near.Therefore, the use to the insulation metallizing lead that applies with insulating barrier on the surface of plain conductor increases day by day.At present mostly all the plain conductor of this use is carried out the insulating barrier coating processing.
Fig. 1 shows according to the lead bonding chip 100 after the sealing of conventional art.With reference to Fig. 1, chip (die) 104 is bonded on the substrate 102 by adhesion layer (adhesive layer) 106, and chip 104 is connected to substrate 102 by many leads 108.Lead 108 generally is made of metal, with the adhesion between assurance and substrate and/or the lead frame.Insulating barrier 110 is sealed and is centered on lead 108, thereby can prevent the short circuit between the lead, and protects chip 104 and lead 108 to avoid external action.
Fig. 2 shows the cutaway view according to the lead bonding technology that is used for semiconductor package part of the use coated wire bonding of conventional art.With reference to Fig. 2, semiconductor chip 104 utilizes adhesion layer 106 to invest on the substrate 102 (for example, PCB or lead frame), and bonding welding pad 103 is separated with semiconductor chip 104.Chip bonding pad 105 is arranged on the semiconductor chip 104, and bonding tool 9 is positioned on the chip bonding pad (not shown).
As shown in Figure 2, bonding tool 9 comprises anchor clamps (clamp) 2 and capillary (capillary) 3.Through hole 5 is formed in the bonding tool 9, that is, through hole 5 is formed in anchor clamps 2 and the capillary 3.Make after the lead that is coated with insulating barrier (be called hereinafter " coated wire) 118 passes through hole 5, forming spherical part 4 at the front end of coated wire 118.Can utilize discharge to form spherical part 4.For example, can near the front end of coated wire 118, place the electrode (not shown), thereby introduce discharge, make the fore-end of coated wire melt and the formation sphere by coated wire 118.Thereby, utilize bonding tool 9 that coated wire 118 is bonded on the chip bonding pad 105.
Therefore, in the prior art, use be that the lead that the surface has been coated with insulating layer coating carries out bonding, as shown in Figure 2.Yet, because the surface of plain conductor covers insulating barrier fully, cause the bonding point of lead can be subjected to influence, the particularly lead/lead frame bonding point of insulating barrier or the adhesion between lead/substrate bonding point can die down because of insulating barrier, thereby be difficult to reach the quality requirements of batch process.The insulating barrier of conductive line surfaces is thick more, and the adhesion of the bonding point of lead is just weak more.But, if reduce the thickness of insulating layer of conductive line surfaces, the insulation property of lead are affected, thereby when lead is in contact with one another, have the danger of short circuit or leakage current, do not reach the insulation effect of requirement.In addition, traditional wire insulation method is that the mode that adopts conductive line surfaces all to cover insulating barrier realizes the mutually insulated between lead, makes cost rise obviously, and bonding point adhesion and insulation property can not be taken into account simultaneously.
Once the someone had proposed the use insulated conductor and had replaced plain conductor, thereby reached desired insulation effect in the adhesion that guarantees the lead bonding point.But the price of insulated conductor is much more expensive than the price of plain conductor, and what short circuit risk was arranged may be the fraction lead; Therefore,, then can cause very big waste, thereby increase packaging cost greatly if all leads all are replaced with insulated conductor.
For this reason, existing packaging part just need a kind ofly can prevent the short circuit that too closely causes because of each plain conductor phase mutual edge distance and can obviously not promote the method for the present invention that manufactures.
Summary of the invention
The present invention is intended to solve the aforementioned problems in the prior, and therefore, the object of the present invention is to provide a kind of by having the part of short circuit risk to be coated with insulating layer coating to reach the method for insulation effect on encapsulating with plain conductor.
According to the present invention, soak iknsulating liquid by part, perhaps part sprays the insulating coating mode, makes plain conductor have the part of short circuit risk to cover the last layer insulating barrier, thereby reaches the effect that makes mutually insulated between the plain conductor.It is too near that this method can be applicable to various plain conductor phase mutual edge distances, plain conductor takes place easily be in contact with one another, thereby the packaging part of short circuit risk is arranged.
The invention provides a kind of method of the partially covering insulating layer on metal wire in packaging part, described method comprises the steps: when the program of the concrete lead-in wire of editor bonding, in program, need the part of insulation protection to make and the different mark of common metal lead to plain conductor, wherein, to need the surface of insulation protection part be that plain conductor has when encapsulation and contact with other plain conductors or close and be short-circuited or the zone of the danger of leakage current to plain conductor; Then, only on the surface partly of marking of plain conductor, adhere to insulating material; Then, solidify, thereby need the surface of insulation protection part to form insulating barrier at plain conductor by the insulating material solution that solidification equipment adheres to this part.
According to one embodiment of present invention, by the surface spraying one deck insulating material of spray equipment in the part of marking of plain conductor, thereby, cover insulating barrier on ground, plain conductor top.According to another embodiment of the invention, be immersed in the solution of insulating material, make insulating material this part surface, thereby cover insulating barrier on ground, plain conductor top attached to plain conductor by the surface partly of marking with plain conductor.
According to the present invention, described solidification equipment is heater, ultraviolet irradiation device or infrared radiation device.Described plain conductor is gold thread, copper cash, silver-colored line or aluminum steel, or is the alloy wire of main component with the gold.Described insulating barrier is formed by multiple organic substance or the inorganic matter after solidifying.
According to the present invention, the thickness that covers the insulating barrier on plain conductor surface is 0.01 micron to 1 millimeter, and with the plain conductor electric insulation.The technology and the metal wire bonding that cover insulating barrier at the surface portion of plain conductor are carried out synchronously.
The present invention can only add insulating barrier in the conductor part of needs insulation, and for the bonding point that does not need insulating barrier and do not need other leads of insulating, does not add insulating barrier.Therefore, the present invention can save a large amount of insulating material costs, and can take into account the adhesion of bonding point and the insulation property between lead simultaneously.
Description of drawings
Fig. 1 shows according to the lead bonding chip after the sealing of conventional art.
Fig. 2 shows the cutaway view according to the lead bonding technology that is used for semiconductor package part of the use coated wire bonding of conventional art.
Fig. 3 shows the cutaway view of the partially covering insulating layer on metal wire in packaging part according to one embodiment of present invention.
Fig. 4 shows the cutaway view of the partially covering insulating layer on metal wire in packaging part according to another embodiment of the invention.
Fig. 5 shows the schematic diagram of in writing lead-in wire bonding program insulated part being marked according to the present invention.
Embodiment
The invention will be further elaborated below in conjunction with embodiment.Embodiment only is used to illustrate the present invention, rather than limits the present invention by any way.In the accompanying drawings, identical label is represented components identical all the time.For the sake of clarity, can exaggerate the layer or the size and the relative size of parts.Layer and parts shown in the accompanying drawing come down to schematically, and their shape is not intended to illustrate the accurate shape of layer or parts, also is not intended to limit the scope of the invention.
The invention provides the method for mutually insulated between a kind of novel, plain conductor of realizing packaging part with low cost, thereby can take into account insulation property and plain conductor bonding performance (mainly being the adhesion of bonding point) between plain conductor simultaneously.Method according to the partially covering insulating layer on metal wire in packaging part of the present invention comprises the steps: at first, in the routing stage of encapsulation flow process, the program that needs to edit concrete lead-in wire bonding earlier (is determined the particular location of routing, the quantity of routing), need the surface of insulation protection part to mark to plain conductor this moment in program, and (as: the common metal lead is shown as white or other colors in program, then corresponding partly shown in red or other the different colors in program of insulation protection of wanting), wherein, to be plain conductor have when encapsulation on the surface that cover insulating barrier of plain conductor with other plain conductors contact or close and be short-circuited or the zone of the danger of leakage current; Then, when routing, calculate, only on the surface partly of marking of plain conductor, adhere to insulating barrier by predefined routing program; By solidification equipment the insulating material solution of adhering to is solidified then, thereby need the surface of insulation protection part to form insulating barrier at plain conductor.
Below, describe in conjunction with specific embodiments with reference to the accompanying drawings according to the present invention in the method for packaging part with partially covering insulating layer on metal wire.
Fig. 3 shows the cutaway view of the partially covering insulating layer on metal wire in packaging part according to one embodiment of present invention.Describe the method for the partially covering insulating layer on metal wire in packaging part according to one embodiment of present invention in detail with reference to Fig. 3.
At first,, need in routing device, to write earlier the program of lead-in wire bonding, in order to determine the particular location of routing, the quantity of bank in the routing stage of encapsulation flow process; Need the part of insulation protection to mark to plain conductor this moment in program; for example; the common plain conductor that need not protect is shown as white or other colors in program, and corresponding partly shown in red or other the different colors in program of insulation protection of wanting).Fig. 5 is the example of in program insulated part being marked according to the present invention.In Fig. 5, show the common plain conductor that need not protect in program with fine line, and show the plain conductor of in program, wanting insulation protection part (only accounting for a section of plain conductor, perhaps multistage) with heavy line.According to the present invention, plain conductor can be gold thread, copper cash, silver-colored line or aluminum steel, or is the alloy wire of main component with the gold.
Then, when routing, calculate the normal routing of the common plain conductor that need not protect by predefined routing program.And the plain conductor of wanting insulation protection part that comes out for mark in program; place the liquid bath 5 that holds insulating material solution 6 by the surface partly of marking with plain conductor; make insulating material need the surface of insulation protection, thereby cover insulating barrier on ground, plain conductor top attached to plain conductor.Specifically, because capillary effect, insulating material solution 6 can be attached to the surface of plain conductor 8.Liquid bath 5 can be moved up and down by machine control, so that when plain conductor 8 needs insulation protection, liquid bath 5 rises and makes plain conductor be immersed in the insulating material solution 6 under the effect of roller 7; And when plain conductor 8 did not need insulation protection, liquid bath 5 descended and plain conductor is not contacted with insulating material solution 6.Like this, the liquid bath by holding insulating material solution 6 can be in the surface attachment insulating material solution that needs the insulation protection part of plain conductor 8, thereby forms insulating barrier on the surface of the part of marking of plain conductor.
According to embodiments of the invention, insulating material solution 6 can be mixed by the solution of multiple organic substance or inorganic matter.Insulating material is that multiple organic substance or the inorganic matter after solidifying forms, and can at high temperature or under ultraviolet irradiation or infrared radiation be cured in several microseconds.According to one embodiment of present invention, insulating material solution 6 can be formed by organic substance, for example, and can being combined to form by modified alkyd resin, dimethylbenzene, butanols, amino resins or they.According to another embodiment of the present invention, insulating material solution 6 can be formed by inorganic matter, for example, and can be by TiO 2, Al 2O 3, being combined to form of ZnO or they.According to still another embodiment of the invention, insulating material solution 6 can be formed by in above-mentioned organic substance and the inorganic matter one or more.Yet insulating material solution according to the present invention is not limited thereto, the insulating material solution that can use always for those skilled in the art.
Then, by solidification equipment 1 insulating material solution of adhering on the surface of plain conductor 8 is solidified.In the present invention, can adopt the device that is heating and curing, ultra-violet curing device or infrared curing device as solidification equipment 1, thereby by heating, ultraviolet irradiation or infrared radiation, make the insulating material solution full solidification of plain conductor surface attachment, thereby form insulating coating 18, with the surface formation good combination of plain conductor.Certainly, in the present invention, only the surface that is attached with insulating material solution to plain conductor is cured.According to the present invention, the insulating barrier that covers the plain conductor surface is wanted enough thick damage to prevent the lead short circuit and to prevent from the plasma cleaning process insulating barrier to be caused; In an embodiment of the present invention, the thickness that covers the insulating barrier on plain conductor surface can be 0.01 micron to 1 millimeter, and with the plain conductor electric insulation.
At last, by bonding tool 9 plain conductor and chip bonding pad (not shown) are bonded together.Specifically, bonding tool 9 comprises: anchor clamps 2 are used for when routing plain conductor being fixed; Capillary 3, be used to push soldered ball and transmit ultrasonic so that gold thread forms intermetallic compound with pad.
In addition, according to one embodiment of present invention, the technology and the metal wire bonding that partly cover insulating barrier at plain conductor are carried out synchronously.
According to this embodiment, utilize surface tension effects can so that insulating material solution attached to the surface of one section plain conductor, and at the surface selectivity ground of plain conductor formation insulating coating, promptly, the present invention can only add insulating barrier in the conductor part of needs insulation, and for the bonding point that does not need insulating barrier and do not need other part leads of insulating, do not add insulating barrier, therefore, the present invention can save a large amount of insulating material costs, and can take into account the insulation property between bonding point adhesion and lead simultaneously.
Below, describe the method for the partially covering insulating layer on metal wire in packaging part according to another embodiment of the invention in detail with reference to Fig. 4.Fig. 4 shows the cutaway view of the partially covering insulating layer on metal wire in packaging part according to another embodiment of the invention.
With reference to Fig. 4, another kind of method according to the partially covering insulating layer on metal wire in packaging part of the present invention comprises step: at first, in the routing stage of encapsulation flow process, need the program of the concrete lead-in wire of editor bonding earlier, in order to determine the particular location of routing, the quantity of routing; Need the surface of insulation protection part to mark to plain conductor this moment in program, for example, the common plain conductor that need not protect is shown as white or other colors in program, and corresponding partly shown in red or other the different colors in program of insulation protection of wanting; Then, by the surface spraying one deck insulating material that need insulation protection part of spray equipment 10 at plain conductor 8; Then,, make the insulating material solution full solidification of the surface attachment of plain conductor, thereby form insulating coating 18, form good combination with the plain conductor surface by heating, ultraviolet irradiation or infrared radiation.Using in the method for partially covering insulating layer on metal wire of Fig. 4 at packaging part, except needing at plain conductor the surface spraying insulating material of insulation protection part, basic identical with method according to the embodiment of Fig. 3 according to the method for the embodiment of Fig. 4 by spray equipment; Therefore, for clarity, omitted description to step identical in the method for Fig. 4 with step in the method for Fig. 3.
With reference to Fig. 4, by the liquid bath that holds insulating material solution 65 that replaces among Fig. 3 with insulating material spray equipment 10, at the one section zone spraying insulating coating that needs the insulation protection part of plain conductor.This insulating material spray equipment can be opened or be closed by machine control.When routing, calculate by predefined routing program, the normal routing of the common plain conductor that need not protect, this moment, spray equipment was closed; And the plain conductor of wanting insulation protection part that comes out for mark in program, program can be controlled and open spray equipment.
According to this embodiment; by the insulating material spray equipment, need one section zone of insulation protection to spray insulating coating at plain conductor, then; can insulating material solution be solidified by heating, ultraviolet irradiation or infrared radiation, thereby form one section insulating coating on the plain conductor surface.Like this, optionally form insulating coating, can save a large amount of insulating material costs, thereby reduce cost, and can take into account insulation property between bonding point adhesion and lead simultaneously by part surface at plain conductor.

Claims (8)

1. the method for the partially covering insulating layer on metal wire in the packaging part is characterized in that described method comprises the steps:
When writing the program of concrete lead-in wire bonding, in program, need the part of insulation protection to make and the different mark of common metal lead to plain conductor, wherein, to need the surface of insulation protection part be that plain conductor has when encapsulation and contact with other plain conductors or close and be short-circuited or the zone of the danger of leakage current to plain conductor;
Only on the surface partly of marking of plain conductor, adhere to insulating material;
By solidification equipment the insulating material solution of adhering to is solidified, thereby need the surface of insulation protection part to form insulating barrier at plain conductor.
2. method according to claim 1 is characterized in that, by the surface spraying one deck insulating material of spray equipment in the part of marking of plain conductor, thereby, cover insulating barrier on ground, plain conductor top.
3. method according to claim 1, it is characterized in that, be immersed in the solution of insulating material by the surface partly of marking, make on insulating material this part surface, thereby cover insulating barrier on ground, plain conductor top attached to plain conductor with plain conductor.
4. method according to claim 1 is characterized in that, described solidification equipment is heater, ultraviolet irradiation device or infrared radiation device.
5. method according to claim 1 is characterized in that, described plain conductor is gold thread, copper cash, silver-colored line or aluminum steel, or is the alloy wire of main component with the gold.
6. method according to claim 1 is characterized in that, described insulating barrier is formed by multiple organic substance or the inorganic matter after solidifying.
7. method according to claim 1 is characterized in that, the thickness that covers the insulating barrier on plain conductor surface is 0.01 micron to 1 millimeter, and with the plain conductor electric insulation.
8. method according to claim 1 is characterized in that, the technology and the metal wire bonding that cover insulating barrier at the surface portion of plain conductor are carried out synchronously.
CN200810178175A 2008-11-25 2008-11-25 Method for partially covering insulating layer on metal wire in package Pending CN101740399A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200810178175A CN101740399A (en) 2008-11-25 2008-11-25 Method for partially covering insulating layer on metal wire in package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200810178175A CN101740399A (en) 2008-11-25 2008-11-25 Method for partially covering insulating layer on metal wire in package

Publications (1)

Publication Number Publication Date
CN101740399A true CN101740399A (en) 2010-06-16

Family

ID=42463663

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200810178175A Pending CN101740399A (en) 2008-11-25 2008-11-25 Method for partially covering insulating layer on metal wire in package

Country Status (1)

Country Link
CN (1) CN101740399A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106992103A (en) * 2016-01-21 2017-07-28 瑞侃电子(上海)有限公司 Thermal circuit beraker
CN115673007A (en) * 2022-02-22 2023-02-03 深圳中宝新材科技有限公司 Method for manufacturing insulating gold bonding wire for double-layer stacked packaging of integrated circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106992103A (en) * 2016-01-21 2017-07-28 瑞侃电子(上海)有限公司 Thermal circuit beraker
CN115673007A (en) * 2022-02-22 2023-02-03 深圳中宝新材科技有限公司 Method for manufacturing insulating gold bonding wire for double-layer stacked packaging of integrated circuit
CN115673007B (en) * 2022-02-22 2023-04-18 深圳中宝新材科技有限公司 Method for manufacturing insulating gold bonding wire for double-layer stacked packaging of integrated circuit

Similar Documents

Publication Publication Date Title
US20180374798A1 (en) Semiconductor device having emi shielding structure and related methods
CN102339763B (en) The method of assembling integrated circuit (IC)-components
CN101416311B (en) Clipless and wireless semiconductor die package and method for making the same
KR0145768B1 (en) Method for manufacturing a semiconductor package using lead frame
CN102386106B (en) Partially patterned lead frame and manufacture and use its method in semiconductor packages
US20150061157A1 (en) High yield semiconductor device
CN104769713A (en) Semiconductor device including independent film layer for embedding and/or spacing semiconductor die
KR20140113964A (en) Magnetic sensor and magnetic sensor device, and magnetic sensor manufacturing method
CN101276765B (en) Inkjet printed wire bonding, encapsulant and shielding
JP2013197531A (en) Semiconductor device and manufacturing method of the same
JP2013197531A5 (en)
CN102969145A (en) Method for connecting leader line
CN205194694U (en) Surface mounting electron device
CN105789064A (en) Package method and package structure for fingerprint identification chip
US20150001697A1 (en) Selective treatment of leadframe with anti-wetting agent
CN103972199B (en) Line bonding method and structure
WO2012171320A1 (en) A new contact smart card packaging method
CN101740399A (en) Method for partially covering insulating layer on metal wire in package
CN101989593B (en) Packaging substrate as well as manufacturing method and packaging structure thereof
CN101026133A (en) Semiconductor package structure with radiating fin and its manufacturing method
US9728493B2 (en) Mold PackageD semiconductor chip mounted on a leadframe and method of manufacturing the same
CN102339762B (en) Non-carrier semiconductor packaging part and manufacturing method thereof
JP2016195292A (en) Semiconductor device and method of manufacturing the same
CN101740405A (en) Method for forming insulating layer on metal wire of package
CN105552044A (en) Package structure and package process of surface mounted resistance bridge

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C12 Rejection of a patent application after its publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20100616