CN101728838A - Photovoltaic power generation device and method based on amplitude-phase control - Google Patents

Abstract

The invention relates to photovoltaic power generation device and method based on amplitude-phase control, belonging to the technical field of power electronics. An AC side voltage and current sensor detects three-phase AC voltage and current, and the three-phase AC voltage and current are processed by a voltage and current translation circuit and then transmitted to a DSP of a main control unit for processing; the DSP determines the output vector of voltage regulation through the amplitude-phase control and inner loop control according to set values of the detected AC side current and voltage and DC side voltage and transmits the output vector to an FPGA; output voltage received by the FPGA and a waveform generated by a triangle generator are synthesized into a PWM waveform to be transmitted to a driving and amplifying unit; and a switching device of a main circuit unit generates switch-on and switch-off according to an amplified pulse signal. The photovoltaic power generation method successfully reduces the AC side voltage distortion rate, is suitable for multiple load types, reduces the influence of load current change on output AC voltage and enhances the fast response capacity.

Description

A kind of based on a facies-controlled photovoltaic power generation apparatus and a method

Technical field

The invention belongs to electric and electronic technical field, particularly a kind of inverter and method of controlling three-phase voltage output based on amplitude and phase angle.

Background technology

Solar energy is as a kind of emerging green energy resource, with its cleaning, flexibly, advantage such as exhaustion never, applied just rapidly, along with the solar energy power generating application and development, solar energy power generating no longer has been the energy supply as remote areas without electricity, but develops to the direction that replaces conventional energy resource gradually.Abroad, generating electricity by way of merging two or more grid systems becomes the main application fields of solar energy power generating gradually, and the photovoltaic industry forms gradually, and grows continuously and fast.

At present external combining inverter technical development is very rapid.Research mainly concentrates on space vector PWM technology, digital phase-locking phase control technology, digital DSP control technology, MPPT maximum power point tracking and isolated island and detects technology, and the overall system design etc. of taking all factors into consideration above aspect.Some external combining inverter also designs has independent operating and the function that is incorporated into the power networks simultaneously.

Domestic photovoltaic is used still based on autonomous power supply system, and grid-connected system is then at the early-stage.Compare with the inverter that works alone, combining inverter not only will guarantee low harmonic wave of output voltage aberration rate and high efficiency, and require output voltage and line voltage size, phase place consistent, the more important thing is to guarantee that low network access current harmonics aberration rate is arranged, in order to avoid electrical network is polluted.

The combining inverter of present domestic independent development has system's fluctuation of service, the weakness that reliability is low; And safeguard measure is incomplete, causes accident easily, does not obtain fine consideration with problems such as architecture-integrals yet.

Summary of the invention

At the deficiency that prior art exists, the invention provides and a kind ofly can successfully reduce AC side voltage distortion rate, and be applicable to the three-phase asymmetric load based on a facies-controlled photovoltaic power generation apparatus and a method.

Apparatus of the present invention comprise: main circuit unit, main control unit, voltage-current sensor, Programmable Logic Controller, and the electric parameter measurement unit, wherein, main circuit unit comprises that 4 groups of IGBT modules, IGBT absorb protection electric capacity and driving and power amplification unit; Main control unit comprises digital signal processor (DSP) and programmable gate array FPGA; The electric parameter measurement unit is made up of the parameters of electric power table;

The input of main circuit unit links to each other with the output of dc voltage transducer, and the output of main circuit unit links to each other with the input of AC side voltage-current sensor; The output of dc voltage transducer links to each other with the input of driving and power amplification unit; Driving links to each other with the input of main circuit unit with the output of power amplification unit, drives to link to each other with the output of main control unit with the input of power amplification unit; Programmable Logic Controller links to each other with main control unit, Programmable Logic Controller links to each other with the GTO unit, the output of electric parameter measurement unit links to each other with the input of Programmable Logic Controller, and the input of electric parameter measurement unit links to each other with the output of AC side voltage-current sensor.

Based on a facies-controlled photovoltaic generation control method, step is as follows:

Step 1: AC side voltage, current sensor senses, are given the digital signal processor DSP of main control unit and are handled after the voltage and current translation circuit is handled to three-phase alternating voltage, three-phase alternating current;

Step 2: the digital signal processor DSP of main control unit is according to the set-point of detected ac-side current, voltage and dc voltage, by amplitude control, phase control and the control of interior ring, determine the output vector of voltage-regulation, and the vector that will obtain exporting passes to programmable gate array FPGA;

The process of wherein, amplitude control, phase control and the control of interior ring is as follows:

With given voltage U ^*(t) amplitude and PHASE SEPARATION, respectively amplitude and phase place are controlled: amplitude control is meant the given voltage U to detected system ^*(t) and the amplitude of the output voltage U of inverter (t) compare, regulate control output through ratio, the voltage of output is U ^*+ Δ U ^*Phase control is that SIN function sin ω t and output voltage U (t) that transducer is exported are compared, decomposite phase deviation angle θ, regulate control through ratio and be output as sin (ω t+ θ), the result that amplitude control and phase control obtain multiplies each other, ring controlled target Function e (t) in obtaining, e (t) and inverter output voltage U (t) compare, after ratio is regulated control, and output voltage e ^*(t);

Step 3: the waveform that output voltage that programmable gate array FPGA receives and triangular-wave generator produce synthesizes the PWM waveform, sends to the driving and the amplifying unit of main circuit unit;

Step 4: the switching device in the main circuit unit produces turn-on and turn-off according to amplified pulse signal.

Beneficial effect: during the work of this device, with 600V～720V direct current that solar power system produced, convert to amplitude and phase place all with the alternating current of electrical network coupling, for people's production and life use.Have following advantage based on a facies-controlled photovoltaic generation method:

1) use the success of this kind method reduction the voltage distortion rate of AC side, wherein transfer ratio reaches more than the %97, little percent harmonic distortion is less than %3;

2) under three-phase asymmetric load situation, obtain good static state and dynamic characteristic, be applicable to multiple loadtype, as linearity and nonlinear load, balance and non-equilibrium load, individual event and threephase load;

3) effect that adopts interior ring control to produce: equivalently will be for original with filter inductance Reduced load current and changed, improved capability of fast response the output AC voltage influence; Decay to the voltage harmonic component original

Having overcome low pass filter only has the filtering effect to high order harmonic component, and low-order harmonic is not had the defective of filtering ability, has reduced the distortion of waveform, has increased the response speed of system.

4) after the decoupling zero, u _N=0, resistance value is original

Description of drawings

Fig. 1 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus structured flowchart;

Fig. 2 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus voltage conversion circuit schematic diagram;

Fig. 3 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus AC side voltage sensor circuit theory diagrams;

Fig. 4 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus current conversion circuit schematic diagram;

Fig. 5 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus ac-side current sensor circuit schematic diagram;

Fig. 6 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus DSP circuit theory diagrams;

Fig. 7 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus FPGA circuit theory diagrams;

Fig. 8 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus Programmable Logic Controller PLC and FPGA connecting circuit schematic diagram;

Fig. 9 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus main circuit drive part circuit theory diagrams;

Figure 10 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus electrical schematic diagram;

Figure 11 controls schematic diagram mutually for the present invention is based on a facies-controlled photovoltaic power generation apparatus width of cloth;

Figure 12 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus three-phase four-leg inverter equivalent circuit theory figure;

Figure 13 the present invention is based on an equivalent circuit theory figure of facies-controlled photovoltaic power generation apparatus decoupling zero control;

Figure 14 is for the present invention is based on a facies-controlled photovoltaic power generation apparatus individual event inverter equivalent circuit theory figure;

Figure 15 is the equivalent circuit theory figure that the present invention is based on after the facies-controlled photovoltaic power generation apparatus decoupling zero.

Embodiment

In conjunction with the accompanying drawings the present invention is described in further detail.

Fig. 1 is apparatus of the present invention structured flowchart.

Based on a facies-controlled photovoltaic inversion device, as shown in Figure 1.Comprise: main circuit unit, main control unit, voltage-current sensor, Programmable Logic Controller, the electric parameter measurement unit, wherein, main circuit unit comprises that 4 groups of IGBT modules, IGBT absorb protection electric capacity and driving and power amplification unit; Main control unit comprises digital signal processor (DSP) and field programmable gate array (FPGA) and peripheral circuit; The electric parameter measurement unit is made up of the parameters of electric power table;

The input of main circuit unit links to each other with the output of dc voltage transducer, and the output of main circuit unit links to each other with the input of AC side voltage, current sensor; The output of dc voltage transducer links to each other with the input of driving and power amplification unit; Driving links to each other with the input of main circuit unit with the output of power amplification unit, drives to link to each other with the output of main control unit with the input of power amplification unit; Programmable Logic Controller links to each other with main control unit, Programmable Logic Controller links to each other with the GTO unit, the output of electric parameter measurement unit links to each other with the input of Programmable Logic Controller, and the input of electric parameter measurement unit links to each other with the output of AC side voltage-current sensor.

Apparatus of the present invention adopt the TMS320F2812A type dsp chip of TI company, the XC3S250E type fpga chip of XILINX company, the FX2N-32MR type of MIT becomes gate array, the LT308-S7 type current sensor of large inferior company, the voltage sensor of the AV100-1000 model of LEM company, touch-screen adopts the PWS6A00T type touch-screen of Taiwan HITECH company, and power supply adopts DC800V/24V/10A Switching Power Supply PS1, DC24V/5V/5A Switching Power Supply PS2, DC24V/15V/-15V/2A Switching Power Supply PS3;

Apparatus of the present invention circuit theory diagrams, shown in Fig. 2～9, concrete annexation is as follows:

Apparatus of the present invention comprise 4 groups of voltage conversion circuits and 4 groups of current conversion circuits.Wherein, the voltage conversion circuit schematic diagram as shown in Figure 2, annexation is as follows: the 1st pin VAFDBK of the input x11 of voltage conversion circuit, the 2nd pin GND link to each other with pin XA, the XAG of AC side voltage sensor successively; The output pin ADCINA3 of voltage conversion circuit connects TMS320F2812A pin of chip ADCINA3; Other three groups identical therewith;

The A phase voltage feedback circuit of AC side voltage transformer connects as follows: pin VAFDBK and GND that the A phase voltage pin X1 of AC side voltage transformer, XAG connect the peripheral circuit of main control unit successively; Other are connected identical therewith, as shown in Figure 3;

The circuit theory diagrams of current conversion circuit as shown in Figure 4, annexation is as follows: the 1st pin of the input X16 of current conversion circuit, the 2nd pin, the 3rd pin, the 4th pin connect the 1st pin, the 2nd pin, the 3rd pin, the 4th pin of ac-side current transducer successively; The output terminals A DCINB1 of current conversion circuit connects the TMS320F2812A pin of chip; Other three groups identical therewith;

The 1st, 2,3,4 pins of A phase DC side current transformer connect pin+15 ,-15, IA_FDBR, the GND of main control unit peripheral circuit respectively; Other is connected identical therewith, concrete connection as shown in Figure 5.

TMS320F2812A pin of chip PW1～PW12, T1PWM～T4PWM, DSP_MODE0～DSP_MODE2, PDPINTA, PDPINTB, DSP_XINT1, DSP_XINT3, SCITXB, SCIRXB, SPISIMO, SPISOMI, SPICLK, SPISTE, CANTX, CANRX, connect XC3S250E pin of chip PW1～PW12 successively, T1PWM～T4PWM, FPGA_MODE0～FPGA_MODE2, PDPINTA, PDPINTB, DSP_XINT1, DSP_XINT3, SCITXB, SCIRXB, SPISIMO, SPISOMI, SPICLK, SPISTE, CANTX, CANRX.

Power subsystem is used for to central processing unit DSP, programmable gate array FPGA, Programmable Logic Controller PLC, driving and amplifying unit and the power supply of GTO touch-screen, wherein, Switching Power Supply PS1 provides 24V operating voltage for becoming controller PLC, power ps 2, power ps 3 and GTO touch-screen; Switching Power Supply PS2 provides 5V voltage for the central processing unit DSP in the main control unit and programmable gate array FPGA; Switching Power Supply PS3 for the driving in the main circuit unit and amplifying unit provide 15V and-15V voltage;

PLC is connected as shown in Figure 8 with FPGA's, pin IO_LIP_0, the I0_LION_I/LDC1 of FPGA, I0_LION_I/LDC2, I0_L1N_0 I0_L2P_0, I0_L6N_1/A5/RHCLK5, I0_L6N_1/A4/RHCLK6, DONE, I0_L7N_1/A3/RHCLK7 connect CM1, the x0～x10 of PLC successively, COM1, Y0～Y3, COM2, Y4～Y7;

The drive plate that this device adopts Xi Menkang company to make, the pwm signal that FPGA produces converts voltage signal to by drive plate, thereby controls the break-make of IGBT on each brachium pontis, realizes inversion.The connection layout of FPGA and main circuit drive plate as shown in Figure 9.This device has two drive plates, two brachium pontis of each drive plate control, drive plate J1 links to each other with the FPGA respective pins with the J2 terminal, J3, J4, J5, J6 connect the IGBT on the brachium pontis, LD53 links to each other with 38 pins of FPGA, LD54 links to each other with 36 pins of FPGA, and LD55 and LD56 are the power supply of 15V Switching Power Supply.LD57 links to each other with 33 pins of FPGA, and LD58 links to each other with 34 pins of FPGA, and LD59 links to each other with 35 pins of FPGA, and LD60 links to each other with 39 pins of FPGA.The break-make of the upper and lower IGBT of J3, J4 control A phase brachium pontis, the break-make of the upper and lower IGBT of J5, J6 control B phase brachium pontis, the G on the terminal, E, C connect base stage, the emitter and collector of each IGBT respectively.LD18, LD17, LD19 connect A respectively and descend brachium pontis IGBT mutually, LD15, LD14, LD16 connect A respectively and go up brachium pontis IGBT mutually, LD28, LD27, LD29 connect B respectively and descend brachium pontis IGBT mutually, LD25, LD24, LD26 connect B respectively and go up brachium pontis IGBT mutually, another drive plate control C mutually with N mutually, connected mode is similar.

Figure 10 is for the present invention is based on a facies-controlled photovoltaic inversion device electrical schematic diagram.Inverter output loading side voltage U 1, U2, U3 and given voltage ratio obtain voltage e through amplitude control, phase control and the control of interior ring ^*(t), it is produced pulse as modulating wave control main circuit unit, inverter output voltage U1, U2, U3 and given voltage are consistent, among Fig. 9, Ud is an inverter direct-flow side voltage, and L1, L2 and L3 are the AC side filter inductance, and C1, C2 and C3 are the AC side filter capacitor.

The present invention is based on a facies-controlled photovoltaic inversion method, concrete steps are as follows:

Step 1: AC side voltage, current sensor senses after the voltage and current translation circuit is handled, are given the digital signal processor DSP of main control unit to three-phase alternating voltage, three-phase alternating current;

Step 2: the digital signal processor DSP of main control unit is according to the set-point of detected ac-side current, AC side voltage and dc voltage, by amplitude control, phase control and the control of interior ring, determine the output vector of voltage-regulation, and the vector that will obtain passes to programmable gate array FPGA;

Step 3: the waveform that produces with triangular-wave generator after the output vector that programmable gate array FPGA receives synthesizes the PWM waveform, sends to the driving and the amplifying unit of main circuit unit;

Step 4: the switching device in the main circuit unit produces turn-on and turn-off according to amplified pulse signal.

Wherein, the amplitude control described in the step 2, phase control and interior ring control principle are as shown in figure 10.

Figure 11 controls schematic diagram mutually for the single-phase inverter control system width of cloth of the present invention.Whole system is made up of ring control in amplitude control, phase control and the system.At first with the amplitude U of given voltage ^*(t) separate with phase place, respectively amplitude and phase place are controlled: amplitude control is the given voltage U by detection system ^*(t) and the amplitude of inverter output voltage U (t) compare, through pi regulator control output, output is U as shown in Figure 10 ^*+ Δ U ^*Phase control is that SIN function sin ω t and output voltage U (t) that transducer is exported are compared, and decomposites phase deviation angle θ, regulates being output as sin (ω t+ θ) through PI.The result that amplitude control and phase control obtain multiplies each other, ring controlled target Function e (t) in obtaining, and e (t) and inverter output voltage U (t) compare, and are output as e through proportional controller ^*(t), e ^*(t) with the synthetic PWM ripple of the waveform of triangular-wave generator generation, make inverter output voltage meet specification requirement.The target of above-mentioned control system is that the output voltage of inverter is equated fully with control voltage, i.e. amplitude controlled quentity controlled variable Δ U ^*θ equals 0 with the phase control amount.

Detailed process is as follows:

At first the amplitude of given voltage is separated with phase place:

1) amplitude formula.Obtain detecting the general formula of voltage magnitude according to Fourier transform:

$U=\frac{\mathrm{\ω}}{4}{\∫}_{t-T}^t\left|u\left(t\right)\right|\mathrm{dt}---\left(1\right)$

ω is given voltage angle frequency in the formula, and T is given voltage cycle.

2) phase place formula.Phase-detection is with the voltage magnitude of given voltage divided by setting, determines that phase place is sin ω t.

Carry out amplitude control and phase control then.Wherein the formula of amplitude control is as follows:

$\left.\begin{array}{c}{e}_v=U^{*}-U\\ {\mathrm{\&Delta;e}}_u=k_{p1}{e}_v+{\mathrm{<figure-callout\; id="1"\; label="k\; i"\; filenames="H2009102488343E00071.png,H2009102488343E00081.png"\; state="\{\{state\}\}">k</figure-callout>}}_i{\&Integral;}_0^t{e}_v\mathrm{dt}\\ U_e=U^{*}+{\mathrm{\&Delta;e}}_u\end{array}\right\}---\left(2\right)$

In the formula, e _vBe the amplitude deviation, Δ e _uBe the output of PI controller, U _eFor adding the total output after feedovering, k _P1Be ratio time coefficient, k _I1Be the coefficient time of integration.

The formula of phase control is as follows:

Afterwards, should determine phase angle θ at output voltage u (the t)=Usin (ω t+ θ) that obtains inverter, and satisfy θ=0.

Utilize the cross-correlation definition of function to determine phase angle θ.If two periodic functions are T function x (t)=sin (ω t+ θ), y (t)=sin ω t.Cross-correlation function between them is R _Xy(τ):

$R_{\mathrm{xy}}\left(\mathrm{\&tau;}\right)=\frac{1}{T}{\&Integral;}_{t-T}^t\sin (\mathrm{\&omega;t}+\mathrm{\&theta;})\sin (\mathrm{\&omega;t}+\mathrm{\&omega;\&tau;})\mathrm{dt}---\left(3\right)$

Make in the formula (3) $\mathrm{\&omega;\&tau;}=-\frac{\mathrm{\&pi;}}{2},$ Then $R_{\mathrm{xy}}\left(\mathrm{\&tau;}\right)=\frac{1}{2}\sin \mathrm{\&theta;},$ That is:

$\sin \mathrm{\&theta;}=2R_{\mathrm{xy}}\left(\mathrm{\&tau;}\right)=\frac{2}{T}{\&Integral;}_{t-T}^t\sin (\mathrm{\&omega;t}+\mathrm{\&theta;})\sin (\mathrm{\&omega;t}-\frac{\mathrm{\&pi;}}{2})\mathrm{dt}---\left(4\right)$

To can get following formula after the arrangement of inverter output voltage u (t)=Usin (ω t+ θ) substitution formula (6)

$\sin \mathrm{\&theta;}=\frac{2}{T}{\&Integral;}_{t-T}^t\frac{u\left(t\right)}{U}\sin (\mathrm{\&omega;t}-\frac{\mathrm{\&pi;}}{2})\mathrm{dt}---\left(5\right)$

Scope to θ is done estimation: θ is caused by the pressure drop that fundamental current produces on inductance L, establishes its pressure drop vector and is Δ u _L, output voltage vector is

, the brachium pontis output voltage vector is

, the pass between three vectors is:

=

+ Δ u _LAs Δ u _LWith

When vertical and mould value is maximum, Δ u _LmaxΔ u when being operating mode with U _LWith

The mould value,

With

Maximum angle is arranged, and its value is θ _Max=arctan (Δ u _Lmax/ U).Generally the rated voltage drop with inductance is designed to 10% of rated output voltage, considers 1.5 times overload capacity, and therefore Δ u is arranged _Lmax=15%, θ _Max=arctan (0.15)=8.53 °, θ _MaxPromptly be the maximal phase angular difference of given voltage and output voltage, promptly the excursion of θ is-8.53 °≤θ≤8.53 °.

Replace θ can cause worst error to be with sin θ $\mathrm{\&Delta;}=\frac{{\mathrm{\&theta;}}_{\max }-\sin {\mathrm{\&theta;}}_{\max }}{{\mathrm{\&theta;}}_{\max }}=0.4\%,$ Δ reduces along with reducing of θ in the adjustment process, to system stability, and Δ=0 and θ=0.Therefore, replace θ exert an influence can for the stable state phase angular accuracy of system with sin θ.

Sin θ is replaced θ, through pi regulator.The mathematical formulae of setting up is as follows:

$\left\{\begin{array}{c}{e}_{\mathrm{\&theta;}}=\sin \mathrm{\&theta;}\\ \sin \left(\mathrm{\&Delta;\&theta;}\right)=k_{p2}{e}_{\mathrm{\&theta;}}+{\mathrm{<figure-callout\; id="2"\; label="k\; i"\; filenames="H2009102488343E00071.png,H2009102488343E00093.png"\; state="\{\{state\}\}">k</figure-callout>}}_i{\&Integral;}_0^t{e}_{\mathrm{\&theta;}}\mathrm{dt}\end{array}\right.---\left(6\right)$

Here θ is less, so cos (Δ θ) for just, determines that the phase shift formula is as follows:

$\left\{\begin{array}{c}\cos \left(\mathrm{\&Delta;\&theta;}\right)=\sqrt{1-{\sin }^2\left(\mathrm{\&Delta;\&theta;}\right)}\\ \sin (\mathrm{\&omega;t}-\mathrm{\&Delta;\&theta;})=\cos \left(\mathrm{\&Delta;\&theta;}\right)\sin \left(\mathrm{\&omega;t}\right)-\sin \left(\mathrm{\&Delta;\&theta;}\right)\cos \left(\mathrm{\&omega;t}\right)\end{array}\right.---\left(7\right)$

The set-point e (t) of ring control in determining again, concrete grammar is:

The result of amplitude control and phase control is multiplied each other, the set-point e (t) of ring control in determining, concrete formula is as follows:

e(t)＝(U ^*+Δe _u)sin(ωt-Δθ) (8)

Interior ring control set-point e (t) and inverter output voltage U (t) compare, and after ratio adjusting control, obtain modulating wave e ^*(t), concrete formula is as follows:

$\left.\begin{array}{c}{e}_u=e\left(t\right)-u\left(t\right)\\ \mathrm{\&Delta;e}\left(t\right)=k_{p3}{e}_u\\ e^{*}\left(t\right)=e\left(t\right)+\mathrm{\&Delta;e}\left(t\right)\end{array}\right\}---\left(9\right)$

The modulating wave e that forms ^*(t) carrier signal with the triangular-wave generator generation relatively produces the SPWM pulse in the back, controls cut-offfing of main circuit unit.

Parameter in amplitude control and the phase control, need satisfy the condition that decoupling zero is controlled:

The topological structure of three-phase four-leg inverter is carried out the equivalent electric circuit conversion, and the circuit diagram after the conversion as shown in figure 11.Among Figure 11, be that 1/2 place with DC bus-bar voltage is a reference point for ease of analysis, the inverter three-phase is exported mutually and can equivalence be become 2 voltage controlled voltage sources, L among Figure 12 with zero line _A, L _B, L _CBe filter inductance, C is a filter capacitor.

The loop voltage equation of equivalent electric circuit is:

$\left\{\begin{array}{c}{u}_{\mathrm{nA}}={\mathrm{Ldi}}_A/\mathrm{dt}+u_A+L_N{\mathrm{di}}_0/\mathrm{dt}+u_{\mathrm{nN}}\\ u_{\mathrm{nB}}={\mathrm{Ldi}}_B/\mathrm{dt}+u_B+L_N{\mathrm{di}}_0/\mathrm{dt}+u_{\mathrm{nN}}\\ u_{\mathrm{nC}}={\mathrm{Ldi}}_C/\mathrm{dt}+u_C+L_N{\mathrm{di}}_0/\mathrm{dt}+{\mathrm{<figure-callout\; id="0"\; label="u\; nN\; i"\; filenames="H2009102488343E00071.png,H2009102488343E00101.png"\; state="\{\{state\}\}">u</figure-callout>}}_{\mathrm{nN}}& \\ i_{}{}_0=i_A+i_B+i_C\end{array}\right.---\left(10\right)$

Three-phase four-leg inverter is under the situation of laod unbalance, and it is three symmetrical and can to satisfy amplitude be specified sinusoidal voltage that the three-phase voltage of inverter is output as, and the form of output voltage is shown in formula (11)

$\left\{\begin{array}{c}{u}_A=U\sin \left(\mathrm{\&omega;t}\right)\\ u_B=U\sin (\mathrm{\&omega;t}-2\mathrm{\&pi;}/3)\\ u_C=U\sin (\mathrm{\&omega;t}-4\mathrm{\&pi;}/3)\end{array}\right.---\left(11\right)$

Based on above-mentioned control thought, the equivalent electric circuit that proposes decoupling zero control is shown in figure (12).

As shown in figure 13, every voltage increment Δ u that seals in mutually _NA, Δ u _NB, Δ u _NC, make to keep certain internal relation between their inside, realize decoupling zero control, last u _N=0 (u _NBe the voltage between zero line output and reference point).The internal relations formula is between the three-phase increment:

$\left\{\begin{array}{c}{\mathrm{\&Delta;u}}_{\mathrm{nA}}=k_p(u_{\mathrm{nA}}-u_A)\\ {\mathrm{\&Delta;u}}_{\mathrm{nB}}=k_p(u_{\mathrm{nB}}-u_B)\\ {\mathrm{\&Delta;u}}_{\mathrm{nC}}=k_p(u_{\mathrm{nC}}-u_C)\\ u_{\mathrm{nN}}=k_n(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})\\ k_l=L/L_N\\ \mathrm{\&Sigma;}{u}_n=u_{\mathrm{nA}}+u_{\mathrm{nB}}+u_{\mathrm{nC}}\\ \mathrm{\&Sigma;u}=u_A+u_B+u_C\end{array}\right.---\left(12\right)$

More than be exactly three-phase internal relations formula, k in the formula (12) _pThe phase control coefrficient, k _nBe zero phase control coefrficient, k _lBe the ratio coefficient of phase inductance with zero phase inductance.To carry out the abbreviation arrangement to formula (12) below.

Voltage circuit equation among Figure 13 is a following formula:

$\left\{\begin{array}{c}{u}_{\mathrm{nA}}={\mathrm{\&Delta;u}}_{\mathrm{nA}}={\mathrm{Ldi}}_A/\mathrm{dt}+u_A+L_N{\mathrm{di}}_0/\mathrm{dt}+u_{\mathrm{nN}}\\ u_{\mathrm{nB}}+{\mathrm{\&Delta;u}}_{\mathrm{nB}}={\mathrm{Ldi}}_B/\mathrm{dt}+u_B+L_N{\mathrm{di}}_0/\mathrm{dt}+u_{\mathrm{nN}}\\ u_{\mathrm{nC}}+{\mathrm{\&Delta;u}}_{\mathrm{nC}}={\mathrm{Ldi}}_C/\mathrm{dt}+u_C+L_N{\mathrm{di}}_0/\mathrm{dt}+{\mathrm{<figure-callout\; id="0"\; label="u\; nN\; i"\; filenames="H2009102488343E00071.png,H2009102488343E00101.png"\; state="\{\{state\}\}">u</figure-callout>}}_{\mathrm{nN}}& \\ i_{}{}_0=i_A+i_B+i_C\\ u_N=u_{\mathrm{nN}}+L_N{\mathrm{di}}_0/\mathrm{dt}\end{array}\right.---\left(13\right)$

Formula (12) substitution formula (13) is obtained following formula:

$\left\{\begin{array}{c}{u}_{\mathrm{nA}}+k_p(u_{\mathrm{nA}}-u_A)={\mathrm{Ldi}}_A/\mathrm{dt}+u_A+(L/k_l)({\mathrm{di}}_0/\mathrm{dt})+k_n(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})\\ u_{\mathrm{nB}}+k_p(u_{\mathrm{nB}}-u_B)={\mathrm{Ldi}}_B/\mathrm{dt}+u_B+(L/k_l)({\mathrm{di}}_0/\mathrm{dt})+k_n(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})\\ u_{\mathrm{nC}}+k_p(u_{\mathrm{nC}}-u_C)={\mathrm{Ldi}}_C/\mathrm{dt}+u_C+(L/k_l)({\mathrm{di}}_0/\mathrm{dt})+k_n(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})\\ {\mathrm{<figure-callout\; id="0"\; label="i"\; filenames="H2009102488343E00071.png,H2009102488343E00101.png"\; state="\{\{state\}\}">i</figure-callout>}}_0=i_A+i_B+i_C\\ u_N=k_n(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})+(L/k_l)({\mathrm{di}}_0/\mathrm{dt})\\ \mathrm{\&Sigma;}{u}_n=u_{\mathrm{nA}}+u_{\mathrm{nB}}+u_{\mathrm{nC}}\\ \mathrm{\&Sigma;u}=u_A+u_B+u_C\end{array}\right.---\left(14\right)$

With preceding 3 the equation additions in the formula (14), put in order:

$\left\{\begin{array}{c}(k_p+1)(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u}){-3k}_n(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})={\mathrm{<figure-callout\; id="0"\; label="Ldi"\; filenames="H2009102488343E00071.png,H2009102488343E00101.png"\; state="\{\{state\}\}">Ldi</figure-callout>}}_0/\mathrm{dt}+(3/k_l)({\mathrm{<figure-callout\; id="0"\; label="Ldi"\; filenames="H2009102488343E00071.png,H2009102488343E00101.png"\; state="\{\{state\}\}">Ldi</figure-callout>}}_0/\mathrm{dt})\\ u_N=k_n(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})+(1/k_l)({\mathrm{<figure-callout\; id="0"\; label="Ldi"\; filenames="H2009102488343E00071.png,H2009102488343E00101.png"\; state="\{\{state\}\}">Ldi</figure-callout>}}_0/\mathrm{dt})\end{array}\right.---\left(15\right)$

We want decoupling zero as can be seen from formula (15), will make u _N=0, need to determine control coefrficient k like this _p, k _nAnd k _lBetween relation.Make u in the formula (15) _N=0, can obtain following formula:

$\left\{\begin{array}{c}(k_p+1)(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})={\mathrm{<figure-callout\; id="0"\; label="Ldi"\; filenames="H2009102488343E00071.png,H2009102488343E00101.png"\; state="\{\{state\}\}">Ldi</figure-callout>}}_0/\mathrm{dt}\\ k_n(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})=-(1/k_l)({\mathrm{<figure-callout\; id="0"\; label="Ldi"\; filenames="H2009102488343E00071.png,H2009102488343E00101.png"\; state="\{\{state\}\}">Ldi</figure-callout>}}_0/\mathrm{dt})\end{array}\right.---\left(16\right)$

Formula (16) two formulas are compared:

(k _p+1)/k _n＝-k _l (17)

As long as satisfy the constraints (17) of following formula, just can realize the three-phase decoupling zero.

Figure 14 is individual event inverter equivalent circuit theory figure.With inverter outlet side voltage e (t) equivalence is controllable voltage source, because the harmonic voltage that the IGBT switching frequency causes is n (t), obtains equivalent electric circuit Figure 14 of single-phase inversion circuit simultaneously.

According to loop voltage and current equation, can get:

$e\left(t\right)+n\left(t\right)=L\frac{\mathrm{di}}{\mathrm{dt}}+u\left(t\right)---\left(18\right)$

i＝i _c+i _L (19)

With formula (9) substitution formula (18), can get:

$e\left(t\right)+\frac{1}{{\mathrm{<figure-callout\; id="3"\; label="k\; p"\; filenames="H2009102488343E00071.png,H2009102488343E00091.png"\; state="\{\{state\}\}">k</figure-callout>}}_p+1}n\left(t\right)=\frac{1}{{\mathrm{<figure-callout\; id="3"\; label="k\; p"\; filenames="H2009102488343E00071.png,H2009102488343E00091.png"\; state="\{\{state\}\}">k</figure-callout>}}_p+1}L\frac{\mathrm{di}}{\mathrm{dt}}+u\left(t\right)---\left(20\right)$

With formula (20) and formula (1) contrast discovery afterwards, the effect that produces after ring is controlled in adopting has: equivalently will be for original with filter inductance

Reduced load current and changed, improved capability of fast response the output AC voltage influence; Decay to the voltage harmonic component original

Having overcome low pass filter only has the filtering effect to high order harmonic component, and low-order harmonic is not had the defective of filtering ability, has reduced the distortion of waveform, has increased the response speed of system.

Figure 15 is the equivalent circuit theory figure after the decoupling zero.

Formula (17) substitution formula (14) can be got:

$\left\{\begin{array}{c}{u}_{\mathrm{nA}}+k_p(u_{\mathrm{nA}}-u_A)={\mathrm{Ldi}}_A/\mathrm{dt}+u_A+(L/k_l)({\mathrm{di}}_0/\mathrm{dt})-[(k_p+1)/k_l](\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})\\ u_{\mathrm{nB}}+k_p(u_{\mathrm{nB}}-u_B)={\mathrm{Ldi}}_B/\mathrm{dt}+u_B+(L/k_l)({\mathrm{di}}_0/\mathrm{dt})-[(k_p+1)/k_l](\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})\\ u_{\mathrm{nC}}+k_p(u_{\mathrm{nC}}-u_C)={\mathrm{Ldi}}_C/\mathrm{dt}+u_C+(L/k_l)({\mathrm{di}}_0/\mathrm{dt})-[(k_p+1)/k_l](\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})\\ {\mathrm{<figure-callout\; id="0"\; label="i"\; filenames="H2009102488343E00071.png,H2009102488343E00101.png"\; state="\{\{state\}\}">i</figure-callout>}}_0=i_A+i_B+i_C\\ u_N=-[(k_p+1)/k_l](\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})+(L/k_l)({\mathrm{di}}_0/\mathrm{dt})\\ \mathrm{\&Sigma;}{u}_n=u_{\mathrm{nA}}+u_{\mathrm{nB}}+u_{\mathrm{nC}}\\ \mathrm{\&Sigma;u}=u_A+u_B+u_C\end{array}\right.---\left(21\right)$

Preceding 3 equation additions in the formula (21), can derive:

$(k_p+1)(\mathrm{\&Sigma;}{u}_n-\mathrm{\&Sigma;u})=L\frac{{\mathrm{di}}_0}{\mathrm{dt}}---\left(22\right)$

Again formula (22) generation time formula (21) is put in order:

$\left\{\begin{array}{c}{u}_{\mathrm{nA}}=\frac{1}{k_p+1}L\frac{{\mathrm{di}}_A}{\mathrm{dt}}+u_A\\ u_{\mathrm{nB}}=\frac{1}{k_p+1}L\frac{{\mathrm{di}}_B}{\mathrm{dt}}+u_B\\ u_{\mathrm{nC}}=\frac{1}{k_p+1}L\frac{{\mathrm{di}}_C}{\mathrm{dt}}+u_C\\ u_N=0\end{array}\right.---\left(23\right)$

The conclusion that formula (23) obtains satisfies the governing equation of decoupling zero.Therefore as long as each coefficient satisfies the constraints of formula (17), realize the three-phase decoupling zero.According to formula (23) draw after the decoupling zero equivalent circuit diagram as shown in figure 14, u after the decoupling zero _N=0, the phase of impedance value is original

Claims (3)

1. one kind based on a facies-controlled photovoltaic power generation apparatus, it is characterized in that: comprise main circuit unit, main control unit, voltage-current sensor, Programmable Logic Controller, electric parameter measurement unit and touch screen unit, wherein, main circuit unit comprises 4 groups of IGBT modules and power amplification unit; Main control unit comprises digital signal processor (DSP) and programmable gate array FPGA; The electric parameter measurement unit is made up of the parameters of electric power table;

The input of main circuit unit links to each other with the output of dc voltage transducer, and the output of main circuit unit links to each other with the input of AC side voltage-current sensor; The output of dc voltage transducer links to each other with the input of driving and power amplification unit; Driving links to each other with the input of main circuit unit with the output of power amplification unit, drives to link to each other with the output of main control unit with the input of power amplification unit; Programmable Logic Controller links to each other with main control unit, Programmable Logic Controller links to each other with touch screen unit, the output of electric parameter measurement unit links to each other with the input of Programmable Logic Controller, and the input of electric parameter measurement unit links to each other with the output of AC side voltage-current sensor.

2. adopt that claim 1 is described a kind ofly carries out the method for photovoltaic generation based on a facies-controlled photovoltaic power generation apparatus, it is characterized in that: comprise the steps:

Step 1: AC side voltage, current sensor senses, are given the digital signal processor DSP of main control unit and are handled after the voltage and current translation circuit is handled to three-phase alternating voltage, three-phase alternating current;

Step 2: the digital signal processor DSP of main control unit is according to the set-point of detected ac-side current, voltage and dc voltage, by amplitude control, phase control and the control of interior ring, determine the output vector of voltage-regulation, and the vector that will obtain exporting passes to programmable gate array FPGA;

The process of wherein, amplitude control, phase control and the control of interior ring is as follows:

With given voltage U ^*(t) amplitude and PHASE SEPARATION, respectively amplitude and phase place are controlled: amplitude control is meant the given voltage U to detected system ^*(t) and the amplitude of the output voltage U of inverter (t) compare, regulate control output through ratio, the voltage of output is U ^*+ Δ U ^*Phase control is that SIN function sin ω t and output voltage U (t) that transducer is exported are compared, decomposite phase deviation angle θ, regulate control through ratio and be output as sin (ω t+ θ), the result that amplitude control and phase control obtain multiplies each other, ring controlled target Function e (t) in obtaining, e (t) and inverter output voltage U (t) compare, after ratio is regulated control, and output voltage e ^*(t);

Step 3: the waveform that output voltage that programmable gate array FPGA receives and triangular-wave generator produce synthesizes the PWM waveform, sends to the driving and the amplifying unit of main circuit unit;

Step 4: the switching device in the main circuit unit produces turn-on and turn-off according to amplified pulse signal.

3. according to claim 2 a kind of based on a facies-controlled photovoltaic generation method, it is characterized in that: the described amplitude control of step 2, phase control and the control of interior ring, need satisfy decoupling zero controlled condition, concrete formula is as follows:

(k _p+1)/k _n＝-k _l

Wherein, k _pExpression phase control coefrficient, k _nExpression zero phase control coefrficient, k _lThe ratio coefficient of expression phase inductance and zero phase inductance.

Images