CN101724896A - Method for growing germanium-silicon epitaxies in nonselective way - Google Patents
Method for growing germanium-silicon epitaxies in nonselective way Download PDFInfo
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- CN101724896A CN101724896A CN200910199435A CN200910199435A CN101724896A CN 101724896 A CN101724896 A CN 101724896A CN 200910199435 A CN200910199435 A CN 200910199435A CN 200910199435 A CN200910199435 A CN 200910199435A CN 101724896 A CN101724896 A CN 101724896A
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Abstract
The invention provides a method for growing germanium-silicon epitaxies in a nonselective way. In the prior art, the reduction of thermal budget is easy to influence by using hydrogen with the high temperature of 1100 DEG C to bake, and seed silicon layers are deposited before a monocrystalline germanium-silicon layer and a polycrystalline germanium-silicon layer are formed so that the polycrystalline germanium-silicon layer has larger particles and the quality of connection between the monocrystalline germanium-silicon layer and the polycrystalline germanium-silicon layer is influenced. The method comprises the following steps of: firstly carrying out hydrofluoric acid cleaning for a wafer, which is the chemical cleaning of a final step; then baking the wafer by hydrogen from 800 DGE C to 950 DEG C; then depositing the seed silicon layers on a monocrystalline silicon area and an isolation structure area through a CVD process, and then generating the monocrystalline germanium-silicon layer and the polycrystalline germanium-silicon layer through the CVD process; and finally generating a covering layer through the CVD process. The invention reduces the thermal budget by reducing baking temperature and can enhance the quality of the connection between the monocrystalline germanium-silicon layer and the polycrystalline germanium-silicon layer and reduce the base resistance of HBT using the germanium-silicon epitaxies as bases and correspondingly enhance the frequency property of the HBT.
Description
Technical field
The present invention relates to field of semiconductor manufacture, relate in particular to a kind of method of non-selective growth germanium and silicon epitaxial.
Background technology
Extension (Epitaxy, be called for short Epi) technology is meant the material that growth one deck and substrate have identical lattice arrangement on substrate, and epitaxial film can be homogeneity epitaxial layer (for example Si/Si), also can be epitaxially deposited layer (for example SiGe/Si or SiC/Si etc.).Germanium silicon (SiGe) extension be silicon and germanium by the semiconductor compound that covalent bonds forms, be the instead type sosoloid that germanium, two kinds of elements of silicon infinitely dissolve each other.Germanium and silicon epitaxial generally has amorphous, polycrystalline, monocrystalline and four kinds of forms of superlattice, field such as the monocrystalline germanium silicon epitaxy is widely used in having high frequency, the cableless communication of high-speed requirement, satellite and optical communication.One of main application of monocrystalline germanium silicon epitaxy is exactly as heterojunction bipolar transistor (Hetero-junction Bipolar Transistor, HBT) base, compare with the base of silicon single crystal, it can reduce band gap width, increases transistorized feature limiting frequency f
T(CutOff Frequency).
Epitaxy technique comprises molecular beam epitaxy (MBE), high vacuum chemical vapour deposition (UHV/CVD), aumospheric pressure cvd (APCVD) and rpcvd (RPCVD) etc.In the above-mentioned epitaxy technique, RPCVD has more advantage than other technologies, it controls the gas flow that feeds reactor while the reaction chamber of finding time when carrying out, and with the pressure-controlling in the reaction chamber under 8～20 kPas low pressure range, so impurity molecule, the corrosive gases of reaction chamber just can be drained with main air stream rapidly, can avoid impurity generation self-diffusion in the silicon substrate and can reduce the defective of outer Yanzhong.Three kinds of gaseous state silicon sources commonly used in the epitaxy technique are silane (SiH
4), dichlorosilane (SiH
2Cl
2, be called for short DCS) and trichlorosilane (SiHCl
3, be called for short TCS), wherein, silane more adapts to the requirement at the bottom of the depositing temperature; Also to use the gas germane (GeH that contains Ge in germanium silicon (SiGe) epitaxy technique
4), hydrogen (H is generally selected in the carrier gas in the reaction for use
2).
Epitaxy technique can also be divided into selective epitaxial (Selective Epi is called for short SEG) and non-selective epitaxy technology two big classes according to growth method, non-selective epitaxy technology also claims full extension (Blanket Epi) technology.When carrying out selective epitaxial process, the monocrystalline germanium silicon layer only is grown on the monocrystalline silicon surface that needs growth.And germanium and silicon epitaxial can be grown on the full wafer wafer when carrying out full epitaxy technique, and the monocrystalline germanium silicon layer growth and can grow the polycrystalline germanium silicon layer on other insulation layer of wafer on monocrystalline silicon surface.
When making the base of HBT, not only to generate the monocrystalline germanium silicon layer at monocrystalline silicon region, the polycrystalline germanium silicon layer of also will in the isolation structure district of monocrystalline silicon region both sides, growing, this polycrystalline germanium silicon layer is used for the monocrystalline germanium silicon layer is drawn, and therefore need make by non-selective epitaxy technology when making the base of HBT.The method of the non-selective growth germanium and silicon epitaxial of prior art may further comprise the steps: (1), the wafer that provides the surface to have monocrystalline silicon region and isolation structure district, and this isolation structure district is fleet plough groove isolation structure (STI) district; (2), the board of the epitaxy with reaction chamber is provided, be provided with silicon wafer bearing disk in this reaction chamber, this epitaxy board is the RPCVD board; (3), this wafer is arranged on this silicon wafer bearing disk; (4), open the epitaxy board and the temperature and the pressure of reaction chamber regulated and control respectively to storing temperature and baking pressure, this storing temperature is 1100 degrees centigrade, baking pressure is 2 to 3 kPas; (5), feed baking gas to reaction chamber and remove the silicon oxide on monocrystalline silicon region surface, this baking gas is hydrogen; (6) feed gaseous state silicon source and gaseous state germanium source simultaneously and generate monocrystalline germanium silicon layer and polycrystalline germanium silicon layer at monocrystalline silicon region and isolation structure district respectively to reaction chamber by RPCVD technology, also feed the gaseous state doped source simultaneously monocrystalline germanium silicon layer and polycrystalline germanium silicon layer are mixed, the temperature range of this CVD technology is 650 to 700 degrees centigrade; (7), in reaction chamber, feed gaseous state silicon source and generate tectum at crystal column surface by CVD technology, the temperature range of this CVD technology is 650 to 700 degrees centigrade.Above-mentioned gaseous state silicon source and gaseous state germanium source are respectively silane and germane.The gaseous state doped source can be divided into N type and P type two classes: N type foreign gas commonly used comprises phosphine (PH
3) and arsine (AsH
3), the P type then mainly is borine (B
2H
6).
There is following problem in the method for the non-selective growth germanium and silicon epitaxial of above-mentioned prior art: at first, the temperature of hydrogen bake is up to 1100 degrees centigrade, so high temperature can influence the heat budget of semiconducter device, in semi-conductor was made, the method that the reduction heat budget is being sought always by equipment manufacturers and wafer factory was to boost productivity and to reduce the consumption of starting material, equipment and the energy; Moreover, the baking back directly generates monocrystalline germanium silicon layer and polycrystalline germanium silicon layer at monocrystalline silicon region and isolation structure district respectively by RPCVD technology, the polycrystalline germanium silicon layer particle that causes being generated is than big and continuous inadequately with being connected of monocrystalline germanium silicon layer, thereby cause the HBT base resistance excessive, and then influence the frequency performance of HBT.
Referring to Fig. 1, it has shown the surface scan figure of the polycrystalline germanium silicon layer of being grown by the method for the non-selective growth germanium and silicon epitaxial of prior art, this surface scan figure is by atomic force microscope (AFM) scanning gained, as shown in the figure, particle radius on the polycrystalline germanium silicon layer is about 9.069 nanometers, its particle is excessive, easily causes polycrystalline germanium silicon layer and being connected of monocrystalline germanium silicon to go wrong.
Therefore, how to provide a kind of method of non-selective growth germanium and silicon epitaxial to reduce the granular size of polycrystalline germanium silicon layer, and improve the continuity that is connected between polycrystalline germanium silicon layer and the monocrystalline silicon layer, and reduce heat budget, become the technical problem that industry needs to be resolved hurrily by reducing storing temperature.
Summary of the invention
The object of the present invention is to provide a kind of method of non-selective growth germanium and silicon epitaxial, can reduce the granular size of polycrystalline germanium silicon layer by described method, and improve the continuity that is connected between polycrystalline germanium silicon layer and the monocrystalline silicon layer, and reduce heat budget by reducing storing temperature.
The object of the present invention is achieved like this: a kind of method of non-selective growth germanium and silicon epitaxial may further comprise the steps: a, provide the surface to have the wafer in monocrystalline silicon region and isolation structure district; B, provide the board of the epitaxy with reaction chamber, be provided with silicon wafer bearing disk in this reaction chamber; C, this wafer is arranged on this silicon wafer bearing disk; D, open the epitaxy board and the temperature and the pressure of reaction chamber are regulated and control respectively to storing temperature and baking pressure; E, feed baking gas to carry out the baking of preset period of time to reaction chamber; F, in reaction chamber, feed gaseous state silicon source, and generate the seed silicon layer of preset thickness by chemical vapor deposition method at crystal column surface; G, feed gaseous state silicon source and gaseous state germanium source simultaneously, and generate monocrystalline germanium silicon layer and polycrystalline germanium silicon layer at monocrystalline silicon region and isolation structure district respectively by chemical vapor deposition method to reaction chamber; H, in reaction chamber, feed gaseous state silicon source and generate tectum at crystal column surface by chemical vapor deposition method.
In the method for above-mentioned non-selective growth germanium and silicon epitaxial, in step a, this wafer is the matting of final step through hydrofluoric acid clean, and this isolation structure district is the fleet plough groove isolation structure district.
In the method for above-mentioned non-selective growth germanium and silicon epitaxial, in steps d, this storing temperature scope is 800 to 950 degrees centigrade, and this baking pressure range is 2 to 3 kPas.
In the method for above-mentioned non-selective growth germanium and silicon epitaxial, in step e, this baking gas is hydrogen, and this preset period of time scope is 100 to 120 seconds.
In the method for above-mentioned non-selective growth germanium and silicon epitaxial, in step f, the range temperature of this chemical vapor deposition method is 650 to 700 degrees centigrade, and the deposition pressure range is 12 to 14 kPas, and this preset thickness is 100 to 200 dusts.
In the method for above-mentioned non-selective growth germanium and silicon epitaxial, in step g, the temperature range of this chemical vapor deposition method is 650 to 700 degrees centigrade, and the deposition pressure range is 12 to 14 kPas.
In the method for above-mentioned non-selective growth germanium and silicon epitaxial, in step g, also in reaction chamber, feed the gaseous state doped source simultaneously monocrystalline germanium silicon layer and polycrystalline germanium silicon layer are mixed.
In the method for above-mentioned non-selective growth germanium and silicon epitaxial, in step h, the temperature range of this chemical vapor deposition method is 650 to 700 degrees centigrade, and the deposition pressure range is 12 to 14 kPas.
In the method for above-mentioned non-selective growth germanium and silicon epitaxial, this gaseous state silicon source is a silane, and this gaseous state germanium source is a germane.
In the method for above-mentioned non-selective growth germanium and silicon epitaxial, this epitaxy board is the rpcvd board, and this chemical vapor deposition method is a rpcvd technology.
With deposition seed silicon layer earlier before forming monocrystalline germanium silicon layer and polycrystalline germanium silicon layer in the prior art, thereby cause polycrystalline germanium silicon layer particle to compare more greatly, the method of non-selective growth germanium and silicon epitaxial of the present invention is after finishing hydrogen bake, in monocrystalline silicon region and isolation structure district, deposit the seed silicon layer earlier by CVD technology earlier, generate monocrystalline germanium silicon layer and polycrystalline germanium silicon layer at monocrystalline silicon region and isolation structure district respectively by CVD technology more afterwards.The present invention is by introducing the granular size that the seed silicon layer effectively reduces the polycrystalline germanium silicon layer, can effectively improve the quality of connection between monocrystalline germanium silicon layer and the polycrystalline germanium silicon layer, and can reduce and use the base resistance of this SiGe extension as the HBT of base stage, the frequency performance of HBT is also corresponding to be improved.
Toast the silicon oxide on the monocrystalline silicon region surface of making a return journey compares with the high-temperature hydrogen of use up to 1100 degrees centigrade in the prior art, the method of non-selective growth germanium and silicon epitaxial of the present invention is carried out the matting that hydrofluoric acid clean is a final step to wafer earlier, again wafer is carried out 800 to 950 degrees centigrade hydrogen bake afterwards, so guaranteeing to effectively reduce heat budget under the prerequisite of baking quality, improving productivity accordingly and reduced the consumption of starting material, equipment and the energy.
Description of drawings
The method of non-selective growth germanium and silicon epitaxial of the present invention is provided by following embodiment and accompanying drawing.
Fig. 1 is the surface scan figure of the polycrystalline germanium silicon layer of being grown by the method for the non-selective growth germanium and silicon epitaxial of prior art;
Fig. 2 is the schema of the method for non-selective growth germanium and silicon epitaxial of the present invention;
Fig. 3 is the flat scanning figure that finishes the regional area of the wafer behind the step S25 among Fig. 2;
Fig. 4 is the surface scan figure of the polycrystalline germanium silicon layer of being grown by the method for non-selective growth germanium and silicon epitaxial of the present invention;
The transistorized skeleton view of Fig. 5 for growing through the method for non-selective growth germanium and silicon epitaxial of the present invention;
Fig. 6 is the skeleton view in the I district among Fig. 5.
Embodiment
Below will the method for non-selective growth germanium and silicon epitaxial of the present invention be described in further detail.
Referring to Fig. 2, the method for non-selective growth germanium and silicon epitaxial of the present invention is at first carried out step S20, the wafer that provides the surface to have monocrystalline silicon region and isolation structure district, and described isolation structure district is the fleet plough groove isolation structure district.
Then continue step S21, it is the matting of final step that described wafer is carried out through hydrofluoric acid clean, and matting herein can comprise the cleaning step of removing metal ion, remove organic cleaning step and with the step of hydrofluoric acid clean etc.
Then continue step S22, the board of the epitaxy with reaction chamber is provided.Be provided with silicon wafer bearing disk in the described reaction chamber, described epitaxy board is the rpcvd board.In the present embodiment, described rpcvd board is the EpiCentura epitaxial system that Applied Materials (Applied Materials Inc) releases.
Then continue step S23, described wafer is arranged on the described silicon wafer bearing disk.
Then continue step S24, open the epitaxy board and the temperature and the pressure of reaction chamber are regulated and control respectively to storing temperature and baking pressure.Described storing temperature scope is 800 to 950 degrees centigrade, and described baking pressure range is 2 to 3 kPas.In the present embodiment, described storing temperature is 900 degrees centigrade, and described baking pressure is 2.667 kPas.
Then continue step S25, feed baking gas to carry out the baking of preset period of time to reaction chamber.Described baking gas is hydrogen, and described preset period of time scope is 100 to 120 seconds.In the present embodiment, described preset period of time is 120 seconds.
Referring to Fig. 3, it has shown the flat scanning figure of the regional area of the wafer behind the step S25 that finishes present embodiment, described flat scanning figure uses scanning electronic microscope (SEM) scanning gained, as shown in the figure only remaining odd silicon oxide particle on the monocrystalline silicon region 1.Wafer among the present invention has carried out hydrofluoric acid clean earlier before carrying out the present invention be the cleaning of final step, carrying out adopting when of the present invention the hydrogen bake of lesser temps also can effectively remove the silicon oxide on monocrystalline silicon region surface, and can effectively reduce heat budget.
Then continue step S26, in reaction chamber, feed gaseous state silicon source, and generate the seed silicon layer of preset thickness by chemical vapor deposition method at crystal column surface.The temperature range of described chemical vapor deposition method is 650 to 700 degrees centigrade, and the deposition pressure range is 12 to 14 kPas, and described preset thickness is 100 to 200 dusts, and described gaseous state silicon source is a silane, and described chemical vapor deposition method is a rpcvd.In the present embodiment, the temperature of described chemical vapor deposition method is 680 degrees centigrade, and deposition pressure is 13.332 kPas, and described preset thickness is 100 dusts.
Then continue step S27, feed gaseous state silicon source, gaseous state germanium source and gaseous state doped source simultaneously, and generate monocrystalline germanium silicon layer and polycrystalline germanium silicon layer at monocrystalline silicon region and isolation structure district respectively by chemical vapor deposition method to reaction chamber.The temperature range of described chemical vapor deposition method is 650 to 700 degrees centigrade, the deposition pressure range is 12 to 14 kPas, described chemical vapor deposition method is a rpcvd, described gaseous state doped source is phosphine, arsine or borine etc., described gaseous state silicon source is a silane, and described gaseous state germanium source is a germane.In the present embodiment, the temperature range of described chemical vapor deposition method is 660 degrees centigrade, and deposition pressure is 13.332 kPas.
Then continue step S28, in reaction chamber, feed gaseous state silicon source and generate tectum at crystal column surface by chemical vapor deposition method.Described chemical vapor deposition method is a rpcvd, and the temperature range of described chemical vapor deposition method is 650 to 700 degrees centigrade, and the deposition pressure range is 12 to 14 kPas, and described gaseous state silicon source is a silane.In the present embodiment, the temperature range of described chemical vapor deposition method is 680 degrees centigrade, and deposition pressure is 13.332 kPas.
Referring to Fig. 4, it has shown the surface scan figure of the polycrystalline germanium silicon layer of being grown by the method for non-selective growth germanium and silicon epitaxial of the present invention, described surface scan figure is by atomic force microscope (AFM) scanning gained, as shown in the figure, particle radius on the polycrystalline germanium silicon layer is about 3.919 nanometers, be about on the polycrystalline germanium silicon layer of 9.069 nanometers with the particle radius of growing by prior art among Fig. 1 and compare, greatly reduce the granular size of polycrystalline germanium silicon layer.
Referring to Fig. 5, it has shown the transistorized skeleton view of growing through the method for non-selective growth germanium and silicon epitaxial of the present invention, as shown in the figure, has realized being connected preferably between monocrystalline germanium silicon layer SiGe and polycrystalline germanium silicon layer Poly SiGe.
Referring to Fig. 6, it has shown the skeleton view in I district among Fig. 5, and as shown in the figure, being connected between monocrystalline germanium silicon layer SiGe and polycrystalline germanium silicon layer Poly SiGe is very coherent.The base resistance that so can guarantee HBT remains on preferable numerical value.
In sum, the method of non-selective growth germanium and silicon epitaxial of the present invention is carried out the matting that hydrofluoric acid clean is a final step to wafer earlier, again wafer is carried out 800 to 950 degrees centigrade the first CVD technology elder generation's deposition seed silicon layer in monocrystalline silicon region and isolation structure district that passes through of hydrogen bake afterwards, and then pass through CVD technology respectively at monocrystalline silicon region and isolation structure district generation monocrystalline germanium silicon layer and polycrystalline germanium silicon layer, generate tectum by CVD technology at last.The present invention is guaranteeing to effectively reduce heat budget under the prerequisite of baking quality, improve productivity accordingly and reduced the consumption of starting material, equipment and the energy, the present invention is also by introducing the granular size that the seed silicon layer has effectively reduced the polycrystalline germanium silicon layer, so can improve the quality of connection between monocrystalline germanium silicon layer and the polycrystalline germanium silicon layer, and can reduce and use the base resistance of described SiGe extension as the HBT of base stage, the frequency performance of HBT is also corresponding to be improved.
Claims (10)
1. the method for a non-selective growth germanium and silicon epitaxial is characterized in that, may further comprise the steps: a, provide the surface to have the wafer in monocrystalline silicon region and isolation structure district; B, provide the board of the epitaxy with reaction chamber, be provided with silicon wafer bearing disk in this reaction chamber; C, this wafer is arranged on this silicon wafer bearing disk; D, open the epitaxy board and the temperature and the pressure of reaction chamber are regulated and control respectively to storing temperature and baking pressure; E, feed baking gas to carry out the baking of preset period of time to reaction chamber; F, in reaction chamber, feed gaseous state silicon source, and generate the seed silicon layer of preset thickness by chemical vapor deposition method at crystal column surface; G, feed gaseous state silicon source and gaseous state germanium source simultaneously, and generate monocrystalline germanium silicon layer and polycrystalline germanium silicon layer at monocrystalline silicon region and isolation structure district respectively by chemical vapor deposition method to reaction chamber; H, in reaction chamber, feed gaseous state silicon source and generate tectum at crystal column surface by chemical vapor deposition method.
2. the method for non-selective growth germanium and silicon epitaxial as claimed in claim 1 is characterized in that, in step a, this wafer is the matting of final step through hydrofluoric acid clean, and this isolation structure district is the fleet plough groove isolation structure district.
3. the method for non-selective growth germanium and silicon epitaxial as claimed in claim 1 is characterized in that, in steps d, this storing temperature scope is 800 to 950 degrees centigrade, and this baking pressure range is 2 to 3 kPas.
4. the method for non-selective growth germanium and silicon epitaxial as claimed in claim 1 is characterized in that, in step e, this baking gas is hydrogen, and this preset period of time scope is 100 to 120 seconds.
5. the method for non-selective growth germanium and silicon epitaxial as claimed in claim 1, it is characterized in that in step f, the temperature range of this chemical vapor deposition method is 650 to 700 degrees centigrade, the deposition pressure range is 12 to 14 kPas, and this preset thickness scope is 100 to 200 dusts.
6. the method for non-selective growth germanium and silicon epitaxial as claimed in claim 1 is characterized in that, in step g, the temperature range of this chemical vapor deposition method is 650 to 700 degrees centigrade, and the deposition pressure range is 12 to 14 kPas.
7. the method for non-selective growth germanium and silicon epitaxial as claimed in claim 1 is characterized in that, in step g, also feeds the gaseous state doped source simultaneously in reaction chamber monocrystalline germanium silicon layer and polycrystalline germanium silicon layer are mixed.
8. the method for non-selective growth germanium and silicon epitaxial as claimed in claim 1 is characterized in that, in step h, the temperature range of this chemical vapor deposition method is 650 to 700 degrees centigrade, and the deposition pressure range is 12 to 14 kPas.
9. the method for non-selective growth germanium and silicon epitaxial as claimed in claim 1 is characterized in that, this gaseous state silicon source is a silane, and this gaseous state germanium source is a germane.
10. the method for non-selective growth germanium and silicon epitaxial as claimed in claim 1 is characterized in that, this epitaxy board is the rpcvd board, and this chemical vapor deposition method is a rpcvd technology.
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Cited By (6)
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| CN102544356A (en) * | 2010-12-17 | 2012-07-04 | 中芯国际集成电路制造(北京)有限公司 | Method for preparing heating layer of phase change memory |
| CN102851735A (en) * | 2011-06-28 | 2013-01-02 | 上海华虹Nec电子有限公司 | Silicon epitaxial growth method via chemical vapor deposition (CVD) |
| CN105070647A (en) * | 2015-07-27 | 2015-11-18 | 上海晶盟硅材料有限公司 | Epitaxial wafer, preparation method thereof and semiconductor device |
| CN107771226A (en) * | 2015-01-22 | 2018-03-06 | Lg矽得荣株式会社 | The preparation method that the reactor of epitaxial growth restarts is carried out on chip |
| CN108257868A (en) * | 2018-01-11 | 2018-07-06 | 上海华虹宏力半导体制造有限公司 | Using the process of the autoregistration germanium silicium HBT device of non-selective epitaxy |
| CN110828300A (en) * | 2019-11-25 | 2020-02-21 | 上海华力集成电路制造有限公司 | Epitaxial process |
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| JP3719998B2 (en) * | 2002-04-01 | 2005-11-24 | 松下電器産業株式会社 | Manufacturing method of semiconductor device |
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| US7166528B2 (en) * | 2003-10-10 | 2007-01-23 | Applied Materials, Inc. | Methods of selective deposition of heavily doped epitaxial SiGe |
| CN101106079A (en) * | 2007-04-26 | 2008-01-16 | 河北普兴电子科技股份有限公司 | A growth method of silicon germanium material |
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| CN102544356A (en) * | 2010-12-17 | 2012-07-04 | 中芯国际集成电路制造(北京)有限公司 | Method for preparing heating layer of phase change memory |
| CN102851735A (en) * | 2011-06-28 | 2013-01-02 | 上海华虹Nec电子有限公司 | Silicon epitaxial growth method via chemical vapor deposition (CVD) |
| CN102851735B (en) * | 2011-06-28 | 2015-08-19 | 上海华虹宏力半导体制造有限公司 | Chemical vapor deposition growing epitaxial silicon method |
| CN107771226A (en) * | 2015-01-22 | 2018-03-06 | Lg矽得荣株式会社 | The preparation method that the reactor of epitaxial growth restarts is carried out on chip |
| CN105070647A (en) * | 2015-07-27 | 2015-11-18 | 上海晶盟硅材料有限公司 | Epitaxial wafer, preparation method thereof and semiconductor device |
| CN108257868A (en) * | 2018-01-11 | 2018-07-06 | 上海华虹宏力半导体制造有限公司 | Using the process of the autoregistration germanium silicium HBT device of non-selective epitaxy |
| CN108257868B (en) * | 2018-01-11 | 2021-06-08 | 上海华虹宏力半导体制造有限公司 | Process method of self-aligned germanium-silicon HBT device adopting non-selective epitaxy |
| CN110828300A (en) * | 2019-11-25 | 2020-02-21 | 上海华力集成电路制造有限公司 | Epitaxial process |
| CN110828300B (en) * | 2019-11-25 | 2022-03-18 | 上海华力集成电路制造有限公司 | Epitaxial process |
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