CN101723305B - Manufacturing method of micro-electro-mechanical element - Google Patents
Manufacturing method of micro-electro-mechanical element Download PDFInfo
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- CN101723305B CN101723305B CN200810173853.XA CN200810173853A CN101723305B CN 101723305 B CN101723305 B CN 101723305B CN 200810173853 A CN200810173853 A CN 200810173853A CN 101723305 B CN101723305 B CN 101723305B
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Abstract
The present invention relates to a kind of manufacturing method of micro-electro-mechanical element, comprise: a level 0 substrate is provided; Form microcomputer electric component region on the substrate, the first sacrifice region is provided with in this microcomputer electric component region, so that the suspension structure part of microcomputer electric component and the other parts of microcomputer electric component are separated out, and second sacrifice region, so that the suspension structure part of microcomputer electric component and substrate zone are separated; Etching is removed this first sacrifice region and is removed the second sacrifice region in the lump, to discharge this microcomputer electric component; And carry out build micro Process for this level 0 substrate, the wherein micro-machined scope of this second sacrifice region definition build.
Description
Technical field
The present invention relates to a kind of manufacture method of microcomputer electric component, particularly a kind of compatible with CMOS processing procedure, and be convenient to the manufacturing method of micro-electro-mechanical element with rear process integration; Described rear processing procedure is such as front build micro Process (Surface micromachining) or back side build micro Process (bulkmicromachining).
Background technology
Microcomputer electric component has various application, such as micro-sound pressure sensor, gyroscope, accelerometer etc.The processing procedure of current making microcomputer electric component, and non-fully and standard CMOS processing procedure compatibility, such as United States Patent (USP) the 5th, 490, No. 220, United States Patent (USP) the 7th, 190, No. 038, microcomputer electric component processing procedure disclosed among United States Patent (USP) the 7th, 202, No. 101 grades, all need special material or the board equipment of non-standard CMOS processing procedure, naturally correspondingly affect cost.In addition, after microcomputer electric component makes, for promoting component structure usefulness, often rear processing procedure need be carried out, such as face type micro Process or build micro Process.Such as, though have minority microcomputer electric component processing procedure compatible with standard CMOS processing procedure, United States Patent (USP) the 5th, 970, No. 315, in this Patent Case, reckon without rear processing procedure.Therefore, industry very needs a kind of compatible with CMOS processing procedure, and is convenient to the manufacturing method of micro-electro-mechanical element with rear process integration.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art and defect, propose a kind of manufacturing method of micro-electro-mechanical element, its not only can completely with current CMOS process integration, and be convenient to carry out front build micro Process or back side build micro Process with rear process integration.
For reaching above-mentioned purpose, with regard to one of them viewpoint of the present invention, providing a kind of manufacturing method of micro-electro-mechanical element, comprising: a level 0 substrate is provided; Form microcomputer electric component region on the substrate, the first sacrifice region is provided with in this microcomputer electric component region, so that the suspension structure part of microcomputer electric component and the other parts of microcomputer electric component are separated out, and second sacrifice region, so that the suspension structure part of microcomputer electric component and substrate zone are separated; Etching is removed this first sacrifice region and is removed the second sacrifice region in the lump, to discharge this microcomputer electric component; And carry out build micro Process for this level 0 substrate, the wherein micro-machined scope of this second sacrifice region definition build.
In said method, the etching step of removing this first sacrifice region with carry out micro-machined step for this level 0 substrate and there is no absolute precedence.
In method, this micro Process step can be front build micro Process or back side build micro Process, or both all carry out.
In preferred mode, level 0 substrate is silicon substrate, and face type micro Process carries out isotropic etching with XeF2 to this level 0 substrate surface.
In preferred mode, level 0 substrate is silicon substrate, build micro Process first from back side anisotropic etching level 0 substrate to reduce the thickness of its partial area, again from this level 0 substrate of front anisotropic etching, the mode of etching can be induction electric paste etching (ICP etch, InductivelyCoupled Plasma etch).
Illustrate in detail below by specific embodiment, when the effect being easier to understand object of the present invention, technology contents, feature and reach.
Accompanying drawing explanation
Figure 1A-1D marks one embodiment of the present of invention;
Fig. 2 A-2D marks an alternative embodiment of the invention.
Symbol description in figure
11 level 0 silicon substrates
12a contact layer
12b-12f channel layer
13a-13f metal level
14a, 14c, 14d sacrifice region
14b isolated area
15 recessed districts
16 shielding layers
100 microcomputer electric component regions
101 suspension structure parts
200 circuit element regions
Embodiment
Accompanying drawing in the present invention all belongs to signal, is mainly intended to represent the orbution up and down between fabrication steps and each layer, as shape, thickness and width then not according to scale.
First the first embodiment of the present invention is described.Refer to Figure 1A, first provide a level 0 wafer substrate 11 in the present embodiment, this substrate 11 such as can be silicon substrate, with compatible with CMOS processing procedure.Then the (not shown) such as transistor unit are made with CMOS processing procedure on the substrate 11, sequentially make interconnect with processing procedures such as deposition, micro-shadow, etchings again, as the contact layer 12a in Figure 1A, first layer metal layer 13a, ground floor channel layer 12b, second layer metal layer 13b, second layer channel layer 12c etc.Wherein, contact layer and channel layer such as can use tungsten to make, and metal level then can use aluminium to make, and dielectric material can use oxide as silicon dioxide.But certainly, use other conduction to be also feasible with dielectric material to make interconnect, and metal layer numbers can certainly be more, icon is only citing.In the pattern of each layer 12a-12c and 13a-13b, comprise sacrifice region 14a and isolated area 14b; Except region 14a, 14b, the detail drawing case of each layer does not illustrate, in the hope of simplifying drawing.The material of region 14a, 14b can identical, also can be different, and both all use oxide, such as silicon dioxide in the present embodiment.The object of sacrifice region 14a is in the microcomputer electric component structure formed future, and the micro electromechanical structure of suspension part is separated out with silicon substrate (referring to Fig. 1 D).Icon isolated area 14b schematically illustrates and is isolated in microcomputer electric component region 100 and other circuit element region 200, and its section shape not absolute demand as shown in the figure.
Refer to Figure 1B, next at surface deposition channels layer 12d-12f and metal level 13c-13f, to make micro electromechanical structure.The same, the number of channel layer and metal level can change, and this figure is citing just.In order to form the micro electromechanical structure part of suspension, and this suspension micro electromechanical structure part is separated out, so define sacrifice region 14c in processing procedure with the other parts of microcomputer electric component.In addition, determine according to the structural design of microcomputer electric component, in the present embodiment, also in microcomputer electric component, sacrifice region 14d is defined, in other words, in the microcomputer electric component of the present embodiment, comprise two structures part (consulting Fig. 1 C) of separating up and down.Certainly, in other structural design, if the micro electromechanical structure part suspended is integrated, just this sacrifice region 14d can not be needed.Sacrifice region 14c and 14d can use oxide, such as silicon dioxide.Sacrifice region 14a, 14c, 14d and isolated area 14b can be formed in the lump when making each metal level and channel layer.
Refer to Fig. 1 C again, next etch after surface deposits and defines shielding layer 16, remove the oxide in sacrifice region 14a, 14c, 14d.The effect of this shielding layer 16 avoids the other parts beyond the first sacrifice region to be etched.The mode of etching such as can be hydrofluoric acid vapor etching (HF vapor etch) or immersed by monolith substrate in acid tank carries out Wet-type etching in buffer oxide etch (BOE, buffered oxide etch) mode.Shielding layer 16 can be such as photoresistance, also can be other individual layer or composite layer, such as, metal level or amorphous silicon layer can be utilized as shielding layer 16.Main purpose due to shielding layer 16 is other circuit element region 200 beyond protection microcomputer electric component region 100, therefore circuit element region 200 also can be utilized often to need the overcoat (passivation layer) used to be used as shielding layer 16.Overcoat can be the double-decker that nitration case or oxide layer add nitration case.
After removing sacrifice region, as shown in figure ip, from front-side etch level 0 silicon substrate, the front build micro Process of rear processing procedure can be carried out; Etching silicon substrate such as can use isotropic etching, with XeF2 gas for it.If shielding layer 16 is photoresistance, and not yet consumes complete, then can remove shielding layer 16 after Fig. 1 D step.If shielding layer 16 is other effective material layer, such as, be aforesaid overcoat, then namely completed desired microcomputer electric component after Fig. 1 D step terminates.
Refer to Fig. 2 A, below second embodiment is described.First provide a level 0 wafer substrate 11, this substrate 11 such as can be silicon substrate, with compatible with CMOS processing procedure.Then the (not shown) such as transistor unit are made with CMOS processing procedure on the substrate 11, more sequentially with contact layer 12a, channel layer 12b-12f and the metal level 13a-13f in the processing procedure construction drawing 2A such as deposition, micro-shadow, etching.Identical with last embodiment, contact layer and channel layer such as can use tungsten to make, and metal layer is as used aluminium to make, and dielectric material such as can use oxide as silicon dioxide.The micro electromechanical structure design that the present embodiment suspends because of it is different from previous embodiment, does not therefore need to form sacrifice region 14a, but still should form isolated area 14b, to be isolated in microcomputer electric component region 100 and other circuit element region 200.In addition, according to the design of micro electromechanical structure, in processing procedure, also form sacrifice region 14c.Sacrifice region 14a and 14c can be oxide, such as silicon dioxide.The sacrifice region 14d of not shown previous embodiment, but as structural design thought necessary, certainly also can it be set.
Refer to Fig. 2 B, next first can carry out anisotropic lithography from substrate back, form recessed district 15 at substrate back, reduce the thickness of this part of substrate, in order to making micro electromechanical structure.The mode of etching such as can be ICP (Inductively Coupled Plasma, induced electricity is starched) etching.This step is the some of " build micro Process " processing procedure, carries out after also can moving on to Fig. 2 step C.
Refer to Fig. 2 C, then deposit from surface and etch after defining shielding layer 16, removing the oxide in sacrifice region 14c.The effect of this shielding layer 16 avoids the other parts beyond the first sacrifice region to be etched.The mode of etching such as can be hydrofluoric acid vapor etching (HFvapor etch) or immersed by monolith substrate in acid tank carries out Wet-type etching in buffer oxide etch (BOE, buffered oxide etch) mode.Shielding layer 16 can be such as photoresistance, also can be other individual layer or composite layer, metal level or amorphous silicon layer such as can be utilized as shielding layer 16, or utilize circuit element region 200 often to need the overcoat (passivation layer) used to be used as shielding layer 16.Overcoat can be the double-decker that nitration case or oxide layer add nitration case.
After removing sacrifice region 14c, as shown in Figure 2 D, proceed the etching of silicon substrate, such as, can use aforesaid ICP etching mode, so namely completed desired microcomputer electric component.As previous embodiment, if shielding layer 16 is that photoresistance then should be removed, if shielding layer 16 is that other effective material layer then can retain.The present embodiment and previous embodiment difference are, in this kind of micro electromechanical structure, comprise silicon substrate body in suspension structure part 101.
After above-described embodiment illustrates, those skilled in the art are when finding, the first embodiment and the FEOL step of the second embodiment are identical (Figure 1A-1B and Fig. 2 A, even Fig. 1 C and Fig. 2 B), are only that layout patterns is different.Therefore in the present invention, in same wafer, first can complete basic structure, then carry out front build micro Process in diverse location place respectively and carry out back side build micro Process.This integration elasticity of the present invention is prior art institute nothing, therefore is superior compared with prior art.
Below for preferred embodiment, the present invention is described, just the above, be only and make those skilled in the art be easy to understand content of the present invention, be not used for limiting interest field of the present invention.For those skilled in the art, when in spirit of the present invention, can thinking immediately and various equivalence change.For example, the material in the above each embodiment, number of metal, etching mode are all citing, and also other has the possibility of various equivalence change.Therefore allly change according to concept of the present invention with spirit institute is impartial for it or modifies, all should be included in the scope of claims of the present invention.
Claims (13)
1. a manufacturing method of micro-electro-mechanical element, is characterized in that, comprises:
A level 0 silicon substrate is provided;
Form microcomputer electric component region on the substrate, the first sacrifice region is provided with in this microcomputer electric component region, so that microcomputer electric component is separated out with the other parts of metal suspension structure part and microcomputer electric component, and second sacrifice region, so that the suspension structure part of microcomputer electric component and substrate zone are separated;
Etching is removed this first sacrifice region and is removed the second sacrifice region in the lump, has discharged this microcomputer electric component when this step completes;
Build micro Process is carried out, wherein the micro-machined scope of this second sacrifice region definition build for this level 0 substrate; And
In the suspension structure part of this microcomputer electric component, form the 3rd sacrifice region, so that the suspension structure part of microcomputer electric component is separated up and down, and in the step of etching removal first sacrifice region, this 3rd sacrifice region removed,
Wherein, above-mentionedly to complete with CMOS processing procedure in steps.
2. manufacturing method of micro-electro-mechanical element as claimed in claim 1, wherein, this build micro Process step comprises: from just in the face of this level 0 substrate carries out isotropic etching.
3. manufacturing method of micro-electro-mechanical element as claimed in claim 2, wherein, this level 0 substrate is silicon substrate, and described isotropic etching uses XeF2 gas to carry out.
4. manufacturing method of micro-electro-mechanical element as claimed in claim 1, wherein, the step that the first sacrifice region is removed in this etching comprises: first deposit definition one shielding layer, then etch, and this shielding layer is etched in order to avoid the other parts beyond the first sacrifice region.
5. manufacturing method of micro-electro-mechanical element as claimed in claim 4, wherein, this first sacrifice region is oxide, and this etching step comprise following both one of: hydrofluoric acid vapor etching or buffer oxide etch.
6. manufacturing method of micro-electro-mechanical element as claimed in claim 4, wherein, this shielding layer material is selected from one of following: metal level, amorphous silicon layer, nitration case or oxide layer add the double-decker of nitration case.
7. a manufacturing method of micro-electro-mechanical element, is characterized in that, comprises:
A level 0 silicon substrate is provided;
Form microcomputer electric component region on the substrate, in this microcomputer electric component region, be provided with the first sacrifice region, to be separated out with the other parts of metal suspension structure part and microcomputer electric component by microcomputer electric component;
This first sacrifice region is removed in etching;
Build micro Process is carried out for this level 0 substrate;
Form microcomputer electric component, wherein the suspension structure part of this microcomputer electric component comprises a part for this level 0 substrate;
The step wherein etching removal first sacrifice region with carry out the micro-machined step of build for this level 0 substrate and there is no absolute precedence,
In the suspension structure part of this microcomputer electric component, form the second sacrifice region, and in the step of etching removal first sacrifice region, this second sacrifice region is removed; And
In this microcomputer electric component region, form the 3rd sacrifice region, so that the suspension structure part of microcomputer electric component and substrate zone are separated, and in the step of etching removal first sacrifice region, this 3rd sacrifice region removed,
Wherein, above-mentioned to complete with CMOS processing procedure in steps, and discharged this microcomputer electric component when the step etching removal first sacrifice region completes.
8. manufacturing method of micro-electro-mechanical element as claimed in claim 7, wherein, this build micro Process step comprises: first from back etched level 0 substrate to reduce the thickness of its partial area, then from this level 0 substrate of front-side etch.
9. manufacturing method of micro-electro-mechanical element as claimed in claim 8 wherein, should be carry out anisotropic etching to this level 0 substrate from the step of the back side and front-side etch level 0 substrate.
10. manufacturing method of micro-electro-mechanical element as claimed in claim 9, wherein, this level 0 substrate is silicon substrate, and this anisotropic etching use sense answers electric paste etching.
11. manufacturing method of micro-electro-mechanical element as claimed in claim 7, wherein, the step that the first sacrifice region is removed in this etching comprises: first deposit definition one shielding layer, then etch, and this shielding layer is etched in order to avoid the other parts beyond the first sacrifice region.
12. manufacturing method of micro-electro-mechanical element as claimed in claim 11, wherein, this first sacrifice region is oxide, and this etching step comprise following both one of: hydrofluoric acid vapor etching or buffer oxide etch.
13. manufacturing method of micro-electro-mechanical element as claimed in claim 11, wherein, this shielding layer material is selected from one of following: metal level, amorphous silicon layer, nitration case or oxide layer add the double-decker of nitration case.
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| CN200810173853.XA CN101723305B (en) | 2008-10-29 | 2008-10-29 | Manufacturing method of micro-electro-mechanical element |
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| CN200810173853.XA CN101723305B (en) | 2008-10-29 | 2008-10-29 | Manufacturing method of micro-electro-mechanical element |
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| CN101723305B true CN101723305B (en) | 2015-08-19 |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1334594A (en) * | 2001-08-24 | 2002-02-06 | 清华大学 | Process for mfg. micromechanical inductor with suspended structure on single surface of silicon substrate |
| CN1705138A (en) * | 2004-05-31 | 2005-12-07 | 冲电气工业株式会社 | Method of manufacturing a micro-electrical-mechanical system |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1334594A (en) * | 2001-08-24 | 2002-02-06 | 清华大学 | Process for mfg. micromechanical inductor with suspended structure on single surface of silicon substrate |
| CN1705138A (en) * | 2004-05-31 | 2005-12-07 | 冲电气工业株式会社 | Method of manufacturing a micro-electrical-mechanical system |
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