CN101720466B - 使用复制存储元件记录仿真器状态 - Google Patents

使用复制存储元件记录仿真器状态 Download PDF

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Publication number
CN101720466B
CN101720466B CN2008800230966A CN200880023096A CN101720466B CN 101720466 B CN101720466 B CN 101720466B CN 2008800230966 A CN2008800230966 A CN 2008800230966A CN 200880023096 A CN200880023096 A CN 200880023096A CN 101720466 B CN101720466 B CN 101720466B
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design
storer
circuit
input signal
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CN101720466A (zh
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R·C·迈克斯纳
M·拉罗歇
C·K·额
K·S·麦克尔文
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Synopsys Inc
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • G06F30/3308Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/331Design verification, e.g. functional simulation or model checking using simulation with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Executing Machine-Instructions (AREA)
CN2008800230966A 2007-05-09 2008-05-09 使用复制存储元件记录仿真器状态 Active CN101720466B (zh)

Applications Claiming Priority (11)

Application Number Priority Date Filing Date Title
US91703307P 2007-05-09 2007-05-09
US91702707P 2007-05-09 2007-05-09
US91702407P 2007-05-09 2007-05-09
US91701507P 2007-05-09 2007-05-09
US60/917,024 2007-05-09
US60/917,033 2007-05-09
US60/917,027 2007-05-09
US60/917,015 2007-05-09
US12/117,705 US7984400B2 (en) 2007-05-09 2008-05-08 Techniques for use with automated circuit design and simulations
US12/117,705 2008-05-08
PCT/US2008/006011 WO2008140790A2 (en) 2007-05-09 2008-05-09 Recording of emulation states using replicated memory elements

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CN101720466A CN101720466A (zh) 2010-06-02
CN101720466B true CN101720466B (zh) 2013-02-13

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US (1) US7984400B2 (enExample)
EP (1) EP2165280B1 (enExample)
JP (1) JP5405451B2 (enExample)
CN (1) CN101720466B (enExample)
WO (1) WO2008140790A2 (enExample)

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TWI579768B (zh) * 2016-01-12 2017-04-21 英業達股份有限公司 複雜可程式邏輯裝置之韌體之更新系統及其更新方法

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US7904859B2 (en) * 2007-05-09 2011-03-08 Synopsys, Inc. Method and apparatus for determining a phase relationship between asynchronous clock signals
US8756557B2 (en) * 2007-05-09 2014-06-17 Synopsys, Inc. Techniques for use with automated circuit design and simulations
US8001497B2 (en) * 2008-10-01 2011-08-16 Lsi Corporation Control signal source replication
US20130144589A1 (en) * 2010-06-08 2013-06-06 Delon Levi Systems and methods for circuit design, synthesis, simulation, and modeling
US8661383B1 (en) 2010-07-28 2014-02-25 VSYNC Circuits, Ltd. VLSI black-box verification
US8707229B1 (en) 2010-07-28 2014-04-22 VSYNC Circuit, Ltd. Static analysis of VLSI reliability
US8631364B1 (en) * 2010-12-26 2014-01-14 VSYNC Circuits Ltd. Constraining VLSI circuits
US8886507B2 (en) * 2011-07-13 2014-11-11 General Electric Company Methods and systems for simulating circuit operation
CN102955713B (zh) * 2011-08-31 2015-11-25 北京中电华大电子设计有限责任公司 一种802.11n无线网卡芯片仿真固件优化的处理方法
US9230046B2 (en) 2012-03-30 2016-01-05 International Business Machines Corporation Generating clock signals for a cycle accurate, cycle reproducible FPGA based hardware accelerator
US9286423B2 (en) 2012-03-30 2016-03-15 International Business Machines Corporation Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator
JP5949410B2 (ja) 2012-04-23 2016-07-06 株式会社ソシオネクスト 半導体装置
US9495492B1 (en) * 2015-01-05 2016-11-15 Cadence Design Systems, Inc. Implementing synchronous triggers for waveform capture in an FPGA prototyping system
US9552456B2 (en) * 2015-05-29 2017-01-24 Altera Corporation Methods and apparatus for probing signals from a circuit after register retiming
CN107066707B (zh) * 2017-03-27 2019-07-30 中国科学院计算技术研究所 一种使用快照的可调试性设计追踪方法及装置
CN117112452B (zh) * 2023-08-24 2024-04-02 上海合芯数字科技有限公司 寄存器模拟配置方法、装置、计算机设备和存储介质
CN117113907B (zh) * 2023-10-17 2023-12-22 北京开源芯片研究院 一种验证方法、装置、电子设备及可读存储介质

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US5553275A (en) * 1993-07-13 1996-09-03 Intel Corporation Method and apparatus for synchronously detecting phase relationships between a high-frequency clock and a low-frequency clock
US5659716A (en) * 1994-11-23 1997-08-19 Virtual Machine Works, Inc. Pipe-lined static router and scheduler for configurable logic system performing simultaneous communications and computation
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WO2001001245A1 (en) * 1999-06-26 2001-01-04 Yang Sei Yang Input/output probing apparatus and input/output probing method using the same, and mixed emulation/simulation method based on it
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KR20010006983A (ko) 1999-06-26 2001-01-26 양세양 신속 프로토타이핑 장치와 그것의 입출력 탐침방법 및그것을 이용한 혼합 검증 방법
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US7245684B2 (en) * 2003-05-09 2007-07-17 Hewlett-Packard Development Company, L.P. System and method for compensating for skew between a first clock signal and a second clock signal
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US7213216B2 (en) * 2002-08-09 2007-05-01 Synplicity, Inc. Method and system for debugging using replicated logic and trigger logic
CN1940944A (zh) * 2005-09-29 2007-04-04 上海奇码数字信息有限公司 电路状态扫描链、数据采集系统和仿真验证方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI579768B (zh) * 2016-01-12 2017-04-21 英業達股份有限公司 複雜可程式邏輯裝置之韌體之更新系統及其更新方法

Also Published As

Publication number Publication date
US20080313578A1 (en) 2008-12-18
WO2008140790A2 (en) 2008-11-20
JP2010531001A (ja) 2010-09-16
WO2008140790A3 (en) 2009-05-07
US7984400B2 (en) 2011-07-19
CN101720466A (zh) 2010-06-02
EP2165280B1 (en) 2019-06-26
JP5405451B2 (ja) 2014-02-05
EP2165280A2 (en) 2010-03-24

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