CN101719971B - Signal read-out amplifying method of photosensitive compound medium grid MOSFET detector - Google Patents

Signal read-out amplifying method of photosensitive compound medium grid MOSFET detector Download PDF

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CN101719971B
CN101719971B CN2009102342661A CN200910234266A CN101719971B CN 101719971 B CN101719971 B CN 101719971B CN 2009102342661 A CN2009102342661 A CN 2009102342661A CN 200910234266 A CN200910234266 A CN 200910234266A CN 101719971 B CN101719971 B CN 101719971B
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photoelectron
detector
voltage
grid
exposure
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CN101719971A (en
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闫锋
徐跃
张�荣
施毅
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Nanjing University
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Nanjing University
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Priority to PCT/CN2010/070612 priority patent/WO2010094233A1/en
Priority to US13/126,079 priority patent/US8604409B2/en
Priority to KR1020117021893A priority patent/KR101563770B1/en
Priority to JP2011549425A priority patent/JP5939703B2/en
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Abstract

The invention relates to a signal read-out amplifying method of a photosensitive compound medium grid MOSFET detector, comprising the following steps of: setting N-type semiconductor regions at both sides above a P-type semiconductor material of a substrate to form a source electrode and a drain electrode, setting a bottom-layer and top-layer insulting medium material and grid above the substrate as well as a photosensitive compound medium grid MOSFET detector of a photoelectron storage layer; reading out and amplifying the photoelectron, i.e., grounding the source electrode of the detector and the substrate, connecting the drain electrode at a positive voltage of about 0.1V, and enabling the MOSFET detector to operate in a linear region by adjusting the grid voltage of about 1-3V; directly measuring the output drain current to obtain the relation of the current variation of the drain electrode and the number of the searched photoelectron i.e., biasing VG on the grid of the detector and grounding the substrate, wherein the photoelectron in the photoelectron storage layer is formed in the P-type semiconductor substrate by tunneling when the negative bias is high enough. The invention overcomes error caused by excursion of the electron mobility.

Description

The signal read-out amplifying method of photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector
One, technical field
The present invention relates to the imaging detection device, especially infrared, visible light wave range is to the structure and the signal read-out amplifying method of the imaging detection device of ultraviolet band.
Two, background technology
Present imaging detection device mainly is CCD and CMOS-APS, CCD device basic functional principle is relevant with the Physical Mechanism of Metal-oxide-silicon (MOS) electric capacity, the basic composition unit of CCD is the mos capacitance device, and its course of work mainly is generation, storage, transfer and the detection of signal charge.CCD is the device of signal being stored, being shifted with the form of charge packet, and its outstanding characteristic is to be signal with the electric charge, is the device of signal with the curtage and be different from other.During CCD work, produce and control the variation of semiconductor potential well, and then realize the storage and the transfer of electric charge by clock pulse voltage.CMOS-APS is as Chinese patent CN1774814 etc.
Typical visible light wave range image device CCD specification and pixel size:
maximum specification 10kx10k (DALSA)
minimum pixel 2.4 microns (e2V) can't dwindle
well depth~1000e-/μ m 2
Typical case's CMOS-APS pixel specification (CMOS-APS imaging pixel unit has four big functions, photoelectron is collected and stored, amplifies, resets, addressing):
maximum specification 4kx4k (0.18 micron technology, Raytheon etc.)
2.8 microns (0.25 micron technology Panasonic) is difficult to dwindle the minimum pixel
well depth 3000e-/micron μ m 2
CCD and CMOS-APS comprehensively are compared as follows table:
CCD CMOS-APS
Leakage current Very good<1nA/cm 2 Bad>50nA/cm 2
Duty ratio (Fill Factor) Very good~100% Bad<60%
Technological requirement with Very high Generally
Rate of finished products Rate of finished products is low The rate of finished products height
Compatibility with CMOS technology Incompatible Compatible
The limitation of CCD and CMOS-APS: CCD and CMOS-APS are the image-forming components of extensive use in current scientific instrument and the image documentation equipment, but two kinds of image-forming components all have its shortcoming.CCD be in essence be parallel to each other can the directional transmissions electric charge a large amount of mos capacitances of series connection mutually, its limitation shows:
1) image taking speed is difficult to improve: need physical property ground dislocation charge in the CCD imaging process, therefore, image taking speed is difficult to improve.
2) rate of finished products is low: because its mos capacitance framework of connecting mutually and the needs of transmission charge, in CCD pixel with delegation's series connection, any one mos capacitance lost efficacy or cisco unity malfunction all can influence the normal transmission of electric charge at this electric capacity, thereby caused coming in this row CCD pixel this electric capacity pixel cisco unity malfunction afterwards.Be usually expressed as secret note, informal voucher or the filaments of sun.Therefore, it requires high to technology controlling and process, so rate of finished products is lower usually, production cost is high.
3) pixel is difficult to further to dwindle: for the signal to noise ratio that maintains in the charge transfer constant, the CCD unit pixel dwindle requirement attenuate Oxide-Nitride (ON) thickness, and the reliability requirement of ON is constant, so further diminishing of CCD pixel has suitable difficulty.In addition, fringe field has also limited further dwindling of CCD pixel.
Above-described limitation is a problem in essence, is difficult to fundamentally solve.The influence of the technological factor of manufacturing CCD is very big: CCD is made on silicon integrated circuit, its technology basic composition comprises cleaning, oxidation, diffusion, photoetching, etching, ion injection, LPCVD, plasma growth and survey technology, and the manufacturing of CCD is combined these individual event technologies exactly with different numbers and order.Oxidation, photoetching, ion inject.Oxidation is one of critical process during CCD makes, the SiO that oxidation generates 2Film has important effect in CCD, (1) is as protection and the passivating film of CCD.2) as the dielectric of grid oxygen among the CCD.3) as the separator between the polysilicon membrane, SiO 2Can prevent upper strata polysilicon and lower floor's inter polysilicon short circuit, oxide requires free of pinholes and space.In CCD makes, the mode of oxidizing of the dried oxygen-wet oxygen of more employing-dried oxygen combination.During CCD made, gate dielectric layer was by SiO 2One deck silicon nitride film of layer and upward regrowth thereof constitutes jointly, and this is because silicon nitride (Si 3N 4) dielectric constant approximately is the twice of silicon dioxide, but because the thermal coefficient of expansion of silicon nitride approximately is the twice of silicon, cause the contact between silicon nitride and the silicon bad, and SiO 2Approaching with the coefficient of expansion of Si, so form Si-SiO 2-Si 3N 4As gate dielectric layer.Domestic and international now when the dielectric layer of research metal-oxide-semiconductor, substitute SiO with the high-dielectric-coefficient grid medium layer 2Layer.The gate dielectric layer of research has: the metal oxide of IIIA family and IIIB family mainly comprises Al 2O 3, Y 2O 3, La 2O 3Deng; The group vib metal oxide mainly contains HfO 2, ZrO 2, TiO 2Deng; Stacking provisions such as HfO 2/ SiO 2, ZrO 2/ SiO 2Deng.
Different with CCD, each pixel of CMOS-APS all is separate, therefore the dislocation charge that does not need physical property in whole signals transmission, from having overcome the weakness of CCD in essence, but each pixel of CMOS-APS all comprises 1 photodiode and the transistor more than three.This framework can cause following problem:
1) dark current noise height: because CMOS-APS adopts diode as light-sensitive device, its dark current is than high similar two magnitudes of CCD.
2) effective quantum efficiency is difficult to improve: different with CCD, CMOS-APS also comprises at least three transistors except photodiode, and duty ratio is less than 60%.
Three, summary of the invention
The present invention seeks to: what propose a kind of novel photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector structure and its signal reads amplification method (comprising infrared to ultraviolet band).
1. the structure of photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector
Structure as shown in Figure 1, both sides above substrate P type semiconductor material are provided with the N type semiconductor district and constitute source region and drain region, be respectively equipped with bottom and top layer dielectric material and grid directly over the substrate, be provided with the photoelectron accumulation layer between the two-layer dielectric material, described photoelectron accumulation layer is polysilicon, Si 3N 4Or other electronic conductor or semiconductor; Grid is polysilicon, metal or transparency conductive electrode.
The top layer insulating medium layer that contacts with grid can be SiO 2, SiO 2/ Si 3N 4/ SiO 2Composite construction or high-k (high-k) medium can be a broadband semiconductor also, its objective is that charge stored is lost on the grid in the prevention photoelectron accumulation layer.The bottom insulating medium layer of substrate P type semiconductor material contact can be SiO 2, SiON or broadband semiconductor.When grid added low pressure, the bottom insulating medium layer can effectively come the channel isolation between photoelectron accumulation layer and source electrode and the drain electrode; Sweep the storage of photoelectron accumulation layer at the grid photoelectron of being collected in can be described raceway groove that adds high pressure down by the bottom insulating medium layer, when collecting photoelectron and shift photoelectron, should guarantee that source electrode and drain electrode are hanging structure to photoelectron storage layer, in order to produce photoelectric effect, has a place at least for detector is surveyed the transparent or translucent window of wavelength at basalis or control gate pole-face in raceway groove to substrate inner region.
First dielectric is that the bottom medium is that silica 1-10nm or high-k medium are (as HfO 2, Al 2O 3, ZrO 2, Y 2O 3, BaTiO 3, BaZrO 3, ZrSiO 4, Ta 2O 3Deng) 1-5nm (equivalent SiO 2Thickness).
The material of second insulating medium layer is that the top layer medium is silicon oxide/silicon nitride/silicon oxide 12-20nm (equivalent SiO 2Thickness); Or silica 10-20nm; Or the about 10nm of aluminium oxide; Or silica 10-20nm; Or the high-k medium, as HfO 2, ZrO 2, Y 2O 3, BaTiO 3, BaZrO 3, ZrSiO 4, Ta 2O 3Deng 1-5nm (equivalent SiO 2Thickness).
The material of photoelectron accumulation layer and corresponding thickness: polysilicon 10-200nm or silicon nitride 3-10nm.
Photoelectron accumulation layer of the present invention is to utilize the operation principle of composite dielectric gate, with compound medium grid MOSFET become one have simultaneously that charge collection, photoelectron are measured and the addressing function, be used for photoelectron accumulation layer that imaging uses, constitute a pixel of a detector by one-transistor (switch type transistor), its array constitutes detector; Promptly constitute and be called photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector.
2. the photoelectron of described detector is collected, is stored, reads amplification and resets
The photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector signal read amplification method, be provided with the N type semiconductor district based on the both sides above substrate P type semiconductor material and constitute source electrode and drain electrode, be respectively equipped with bottom and top layer dielectric material and grid directly over the substrate, the photosensitive composite dielectric gate that is provided with the photoelectron accumulation layer between the two-layer dielectric material is a floating-gate MOS FET detector, and the photoelectron of described detector is read the step of amplifying and resetting and is:
Photoelectron is read amplification: with the source electrode and the substrate ground connection of detector, drain electrode engages the suitable about 0.1V of positive voltage, makes the MOSFET detector be operated in linear zone by regulating the about 1~3V of grid voltage;
By the direct measurement to the output drain current, two values promptly measuring exposure front and back leak electrode current compare to determine the size of light signal, and the current change quantity that obtains draining is as follows with the photoelectron number purpose relation of collecting:
Δ I DS = μ n C ox W L · N FG q C T · V DS - - - ( 1 )
Δ I wherein DSFor before the MOSFET detector exposure-exposure back drain current variable quantity, N FGBe the photoelectron number of storing on the floating boom, C TBe total equivalent capacity of detector photoelectron accumulation layer, C OxBe the unit-area capacitance of gate oxide between photoelectron accumulation layer and the substrate, W and L are respectively the width and the length of detector raceway groove, μ nBe electron mobility, V DSBe the voltage difference of drain electrode with grid; Reset: on the detector grid, add back bias voltage V G, substrate ground connection; When back bias voltage is enough high, the photoelectron that stores in the photoelectron accumulation layer is swept in the P type semiconductor substrate by tunnelling.
1) photoelectronic collection and storage
When grid adds the positive bias pulse, in P type semiconductor, form depletion layer, when light incides that photon is absorbed by semiconductor in the depletion layer, produce photoelectron, photoelectron is moved to raceway groove and bottom insulating barrier at the interface ordering about of grid voltage.Increase grid voltage, when voltage was enough big, photoelectron entered electric charge storage layer after by the F-N tunnelling; If photon energy is big (greater than the Δ Ec of semiconductor and bottom dielectric) enough, photoelectron can direct Tunneling enter electric charge storage layer.Detailed process is shown in Figure 2, and process 1 enters electric charge storage layer for the photoelectron generation F-N tunneling effect on substrate channel surface by the bottom insulating barrier among the figure; Process 2 enters electric charge storage layer for the photoelectron generation Direct Tunneling Effect on substrate channel surface by the bottom insulating barrier.Collecting the photoelectronic stage, source and leakage should be unsettled to prevent that electronics from injecting from source and drain region.When electric field was more weak in the second layer insulating medium layer, photoelectron can be stored in accumulation layer.Accumulation layer can produce the drift of threshold voltage after depositing photoelectron in, i.e. the drift of drain current can be made photoelectron number in the photoelectron accumulation layer by exposure front and back leak electrode current drift value is measured.
2) signal reads amplification
With the source electrode and the substrate ground connection of detector, drain electrode engages suitable positive voltage V D, by regulating grid voltage V GMake detector be operated in linear zone.By to before and after the exposure to output once the reading of drain current, promptly measure the drain-current drift amount and can make photoelectron number in the photoelectron accumulation layer.But in photoelectronic collection and storage process, photoelectron passes through bottom thin SiO under highfield 2Effect takes place to wear then when entering the photoelectron accumulation layer in layer, and the photoelectron that energy is big can cause SiO 2Damage makes the Si-O bond fission and forms trap, and the easy trapped electron of trap becomes fixed charge.Simultaneously at P type Si and SiO 2The interface place form interfacial state.When charged photoelectron from being subjected to scattering mobility changed through out-of-date near fixed charge and the interfacial state.If, will make the photoelectron number of reading inaccurate because of the mobility change of not considering exposure front and back electronics with before and after exposing the method that once reads of output drain current being determined photoelectronic number.Therefore for the drift of compensate for electronic mobility, the photoelectron number of collecting can be read accurately, we have adopted the exposure front and back to carry out the method that reads for twice respectively.Before exposure, add control voltage respectively twice, magnitude of voltage is respectively V CG1And V CG2, by measuring drain current I twice DS1And I DS2, obtain reflecting the preceding transconductance parameters β of mobility drift 1 CGAfter exposure, also add control voltage respectively twice, magnitude of voltage is respectively V CG1And V CG2, by measuring drain current I ' twice DS1And I ' DS2, obtain reflecting the transconductance parameters β after mobility is drifted about 2 CGUtilize exposure front and back V at last CG1Current value I under the bias voltage ' DS1And I DS1, the variable quantity of electric charge on the floating boom before and after obtaining exposing, the photoelectronic accurately number of promptly being collected, thus overcome the error that the method that the output drain current once reads before and after the exposure is brought because of the drift of electron mobility.
Equally also can be with the source electrode and the substrate ground connection of detector, drain electrode engages suitable positive voltage V D, by regulating grid voltage V GMake detector be operated in subthreshold region.Inconsistent in order to compensate before and after the exposure among the SiO2 interface state density of density of trapping charges and substrate interface place, as also to adopt the method measurement of carrying out reading for twice respectively before and after the exposure to collect photoelectron number.
3) reset: on grid, add back bias voltage V G, substrate ground connection; When back bias voltage is enough high, the photoelectron that stores in the photoelectron accumulation layer is swept in the P type semiconductor substrate by tunnelling.
Beneficial effect of the present invention: the superiority of photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector is as follows: compare with CMOS-APS with CCD, photosensitive compound medium grid MOSFET has the advantage of a lot of CCD and CMOS-APS concurrently, but overcome their a lot of weakness, be that the ideal of image device of future generation is selected; Its characteristics and superiority comprise:
Scalability is fabulous: the yardstick of the compound medium grid MOSFET that contemporary flash memory technology uses is at 4~10F 2(F: minimum photoetching line dimension), when using the 50nm photoetching technique, the area of a photosensitive compound medium grid MOSFET may diminish to 0.01 micron 2, promptly at 1 micron 2On can make 100 photosensitive compound medium grid MOSFETs.In contrast to this, the pixel of CCD minimum is~3 microns of 3x 2, and CMOS-APS is~the 1x1 micron 2The use of photosensitive compound medium grid MOSFET technology can provide image devices such as CMOS-APS and CCD incomparable resolution, thereby make physical resolution be higher than optical resolution.
Compatible substantially with the flash memory production technology: the complex media gate technique of photosensitive compound medium grid MOSFET and standard is identical, can produce photosensitive compound medium grid MOSFET by standard compound medium grid MOSFET technology is finely tuned.
Image taking speed is faster than CCD: although adopt the photoelectron identical with CCD to collect mechanism, photosensitive compound medium grid MOSFET is stored in the photoelectron of generation in the composite dielectric gate rather than in the raceway groove.Read output signal realizes by measuring threshold voltage (being the electric charge in the composite dielectric gate), thus do not need to carry photoelectron as CCD, so image taking speed can compare with CMOS-APS, and fast more a lot of than CCD.
Insensitive to defective workmanship: because photosensitive compound medium grid MOSFET does not need to carry photoelectron, the inefficacy of any one pixel can not influence other pixel, so it is responsive unlike CCD to defective workmanship, can be used to make the large area detector array.
Dynamic range is bigger than other structure: because photosensitive compound medium grid MOSFET signal readout can not influence signal itself fully, can support repeatedly to read.In practice, can regulate the size of output signal by the voltage that changes on the control gate, so can enlarge signal corresponding dynamic scope by reading with different gate voltages.This is the advantage that CCD and CMOS-APS do not have.
The accuracy height that signal reads: in the detector signal process of reading, adopt the method that reads at twice before and after the exposure, promptly add control-grid voltage twice before the exposure, measure the drain current of twice output; Add onesize control-grid voltage after the exposure twice, measure the drain current of twice output; The variable quantity of electric charge on the photoelectron accumulation layer before and after the front and back of utilization exposure at last obtain exposing with the current value under the bias voltage, accurately make collected photoelectronic number, thereby overcome because of trap, the inconsistent influence that causes of interface state density among the grid SiO2 before and after the exposure.
Four, description of drawings
Fig. 1 is a panel detector structure schematic diagram of the present invention
Fig. 2 is that panel detector structure energy band diagram of the present invention and photoelectron produce and the migration schematic diagram
Five, embodiment
1. detector is operated in linear zone
With the source electrode and the substrate ground connection of detector, drain electrode engages suitable positive voltage V D, by regulating grid voltage V GMake detector be operated in linear zone.By the direct measurement to the output drain current, two values promptly measuring exposure front and back leak electrode current compare to determine the size of light signal, and it is as follows with the photoelectron number purpose relation of collecting to obtain the drain current variable quantity:
Δ I DS = μ n C ox W L · N FG q C T · V DS - - - ( 1 )
Δ I wherein DSBe the drain current variable quantity of reading before and after the exposure, N FGFor on the photoelectron accumulation layer being the photoelectron number of floating boom storage, C TBe total equivalent capacity of photoelectron accumulation layer, C OxBe the unit-area capacitance of gate oxide between photoelectron accumulation layer and the substrate, W and L are respectively the width and the length of MOSFET raceway groove, μ nBe electron mobility, V DSBe the voltage difference of drain electrode with source electrode.
But in photoelectronic collection process, photoelectron passes through thin SiO under highfield 2Effect takes place to wear then when entering the photoelectron accumulation layer in layer, and the photoelectron that energy is big can cause SiO 2Damage makes the Si-O bond fission and forms trap, and the easy trapped electron of trap becomes trapped charge.Simultaneously at P type Si and SiO 2The interface place form interfacial state.When charged photoelectron from being subjected to scattering mobility changed through out-of-date near trapped charge and the interfacial state.If the method for (1) formula of employing is carried out the photoelectronic amplification of reading, will make the photoelectronic number of reading that error be arranged because of the drift of electron mobility before and after the exposure.Therefore in order to compensate μ nDrift, the photoelectron number of collecting can be read accurately, we have adopted and have carried out the method that reads for twice before and after the exposure respectively.
When detector was operated in linear zone, the drain current expression formula of output was
I DS = β CG ( V CG - V T CG + Q FG C CG ) V DS - - - ( 2 )
β in the formula CGBe the transconductance parameters of detector, V CGBe grid-control voltage, V T CGBe the threshold voltage of detector, Q FGBe the photoelectronic quantity of electric charge of storing on the photoelectron accumulation layer, C CGBe the equivalent capacity between grid and the photoelectron accumulation layer.
Before exposure, add control voltage respectively twice, magnitude of voltage is respectively V CG1And V CG2, by measuring drain current I twice DS1And I DS2, obtain reflecting the preceding transconductance parameters of mobility drift
β 1 CG = C CG C T · C ox μ n W L = Δ I DS Δ V CG · V DS - - - ( 3 )
μ in the formula nBe the electron mobility before the exposure, C CGBe detector top layer dielectric layer capacitance, C TBe total equivalent capacity of photoelectron accumulation layer, C OxBe the unit-area capacitance of gate oxide between photoelectron accumulation layer and the substrate, Δ V CG=V CG2-V CG1, Δ I DS=I DS2-I DS1
For the drift of compensate for electronic mobility, the photoelectron number of collecting is read accurately, adopted the exposure front and back to carry out the method that reads for twice respectively:
Before exposure, add control voltage respectively twice, magnitude of voltage is respectively V CG1And V CG2, by measuring drain current I twice DS1And I DS2, obtain reflecting the preceding transconductance parameters of mobility drift
β 1 CG = C CG C T · C ox μ n W L = Δ I DS Δ V CG · V DS - - - ( 3 - 1 )
μ in the formula nBe the electron mobility before the exposure, C CGBe detector top layer dielectric layer capacitance, Δ V CG=V CG2-V CG1, Δ I DS=I DS2-I DS1
After exposure, for the drift of compensate for electronic mobility, also add control voltage respectively twice, magnitude of voltage is respectively V CG1And V CG2, by measuring drain current I ' twice DS1And I ' DS2, obtain reflecting the transconductance parameters after mobility is drifted about:
β 2 CG = Δ I DS ′ Δ V CG · V DS = C CG C T · C ox μ n ′ W L - - - ( 4 )
μ ' in the formula nBe the electron mobility after the exposure, Δ V CG=V CG2-V CG1, Δ I ' DS=I ' DS2-I ' DS1Utilize exposure front and back V at last CG1Current value I under the bias voltage ' DS1And I DS1, the variable quantity of electric charge on the floating boom before and after obtaining exposing.
Δ Q FG = ( I DS 1 ′ β 2 CG · V DS - I DS 1 β 1 CG · V DS ) · C CG - - - ( 5 )
(3) formula and (4) formula substitution (5) formula can accurately be read the photoelectron number that the exposure back was collected, thereby overcome the error that the drift because of electron mobility brings.
2. detector work subthreshold region, process 1 is the F-N tunnelling among Fig. 2, process 2 is a direct Tunneling
Drain electrode engages suitable positive voltage V D, by regulating grid voltage V GMake detector be operated in subthreshold region.When satisfying V DS > > KT q The time drain current be
I DS = I D 0 exp ( q ( V GS - V T + Q FG C CG ) nKT ) - - - ( 7 )
I in the formula D0Depend on size of devices, the doping content of substrate and temperature, I at a certain temperature after device creates D0Bit constant.Coefficient n=1+ (C B+ C It)/C Ox, C wherein BBe the substrate unit-area capacitance, be directly proportional with the square root of substrate doping density; C ItArea capacitance for trapped charge causes is directly proportional with interfacial state and SiO2 trap density.
Because photoelectron is stored in before and after the photoelectron accumulation layer, SiO 2In the density of trapping charges and the interface state density at substrate interface place inconsistent, cause the n in (7) formula to change, therefore directly adopt the drain current before and after the relatively exposure to determine that the photoelectron number of being collected is just inaccurate.In order to compensate trap, the inconsistent influence of interface state density, we read equally also to adopt to the signal of subthreshold region detector and carry out the method that reads for twice before and after the exposure respectively.
Before exposure, add control voltage respectively twice, magnitude of voltage is respectively V CG1And V CG2, by measuring drain current I twice DS1And I DS2, the coefficient n before obtaining exposing is
n = q KT · Δ V CG ln I DS 2 I DS 1 - - - ( 8 )
After exposure, add control voltage respectively twice, magnitude of voltage is respectively V CG1And V CG2, by measuring twice drain electrode
Electric current I ' DS1And I ' DS2, the coefficient n ' after obtaining exposing is
n ′ = q KT · Δ V CG ln I DS 2 ′ I DS 1 ′ - - - ( 9 )
Utilize exposure front and back V at last CG1Current value I under the bias voltage ' DS1And I DS1, the variable quantity of electric charge on the photoelectron accumulation layer before and after obtaining exposing
Δ Q FG = [ n ′ KT q ln I DS 1 ′ I D 0 - n KT q ln I DS 1 I D 0 ] C CG - - - ( 10 )
(10) formula can accurately be read the photoelectron number that the exposure back was collected, thereby has overcome because of the SiO before and after the exposure 2Trap, interface state density is inconsistent and the influence that causes.

Claims (3)

1. the photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector signal reads amplification method, the both sides that described photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector is based on substrate P type semiconductor material top are provided with the N type semiconductor district and constitute and be respectively equipped with the photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector that is provided with the photoelectron accumulation layer between bottom and top layer dielectric material and grid, the two-layer dielectric material directly over source electrode and drain electrode, the substrate, and the photoelectron that it is characterized in that described detector is read the step of amplifying and resetting and is:
Photoelectron is read amplification: with the source electrode and the substrate ground connection of detector, drain electrode engages suitable positive voltage 0.1V, makes the MOSFET detector be operated in linear zone by regulating grid voltage 1~3V;
By the direct measurement to the output drain current, two values promptly measuring exposure front and back leak electrode current compare to determine the size of light signal, and the current change quantity that obtains draining is as follows with the photoelectron number purpose relation of collecting:
ΔI DS = μ n C ox W L · N FG q C T · V DS - - - ( 1 )
Δ I wherein DSPreceding for exposing-exposure back drain current variable quantity, N FGBe the photoelectron number of storing on the floating boom, C TBe total equivalent capacity of detector photoelectron accumulation layer, C OxBe the unit-area capacitance of gate oxide between photoelectron accumulation layer and the substrate, W and L are respectively the width and the length of detector raceway groove, μ nBe electron mobility, V DSBe the voltage difference of drain electrode with grid; Reset: on the detector grid, add back bias voltage V G, substrate ground connection; When back bias voltage is enough high, the photoelectron that stores in the photoelectron accumulation layer is swept in the P type semiconductor substrate by tunnelling.
2. photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector signal according to claim 1 read amplification method, it is characterized in that the photoelectron number of collecting is read accurately, adopted the exposure front and back to carry out the method that reads for twice respectively: before exposure, add control voltage respectively twice, magnitude of voltage is respectively V CG1And V CG2, by measuring drain current I twice DS1And I DS2, obtain reflecting the preceding transconductance parameters of mobility drift
β 1 CG = C CG C T · C ox μ n W L = ΔI DS ΔV CG · V DS - - - ( 2 )
μ in the formula nBe the electron mobility before the exposure, C CGBe detector top layer dielectric layer capacitance, V DSBe the voltage difference of drain electrode with grid; Δ V CG=V CG2-V CG1, Δ I DS=I DS2-I DS1
After exposure, for the drift of compensate for electronic mobility, also add control voltage respectively twice, magnitude of voltage is respectively V CG1And V CG2, by measuring drain current I ' twice DS1And I ' DS2, obtain reflecting the transconductance parameters after mobility is drifted about
β 2 CG = ΔI DS ′ ΔV CG · V DS = C CG C T · C ox μ n ′ W L - - - ( 3 )
μ ' in the formula nBe the electron mobility after the exposure, Δ V CG=V CG2-V CG1, Δ I ' DS=I ' DS2-I ' DS1Utilize exposure front and back V at last CG1Current value I under the bias voltage ' DS1And I DS1, the variable quantity of electric charge on the floating boom before and after obtaining exposing
ΔQ FG = ( I DS 1 ′ β 2 CG · V DS - I DS 1 β 1 CG · V DS ) · C CG - - - ( 4 )
(4) formula can accurately be read the photoelectron number that exposure back was collected, and overcomes the error that the drift because of electron mobility brings.
3. photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector signal according to claim 1 read amplification method, the photoelectron that it is characterized in that detector is read the collection before amplifying, the step of storage is: when grid adds the positive bias pulse, in P type semiconductor, form depletion layer, when light incides that photon is absorbed by semiconductor in the depletion layer, produce photoelectron, photoelectron is moved to raceway groove and bottom insulating barrier at the interface ordering about of grid voltage; Increase grid voltage, when voltage was enough big, photoelectron entered electric charge storage layer after by the F-N tunnelling; If photon energy is enough big, greater than the Δ Ec of semiconductor and bottom dielectric, photoelectron can direct Tunneling enter electric charge storage layer.Collecting the photoelectronic stage, source and leakage should be unsettled to prevent that electronics from injecting from source and drain region.The photoelectron accumulation layer can produce the drift of threshold voltage after depositing photoelectron in, i.e. the drift of drain current can be made photoelectron number in the photoelectron accumulation layer by exposure front and back leak electrode current drift value is measured.
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