CN101718567B - Pulse-detecting circuit used for ultrasonic gas flowmeter based on time difference method - Google Patents
Pulse-detecting circuit used for ultrasonic gas flowmeter based on time difference method Download PDFInfo
- Publication number
- CN101718567B CN101718567B CN2009102336001A CN200910233600A CN101718567B CN 101718567 B CN101718567 B CN 101718567B CN 2009102336001 A CN2009102336001 A CN 2009102336001A CN 200910233600 A CN200910233600 A CN 200910233600A CN 101718567 B CN101718567 B CN 101718567B
- Authority
- CN
- China
- Prior art keywords
- amplifier
- circuit
- signal
- peak value
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title abstract description 15
- 238000003199 nucleic acid amplification method Methods 0.000 claims abstract description 59
- 230000003321 amplification Effects 0.000 claims abstract description 55
- 230000000052 comparative effect Effects 0.000 claims abstract description 11
- 230000005540 biological transmission Effects 0.000 claims abstract description 9
- 238000012546 transfer Methods 0.000 claims description 52
- 230000001360 synchronised effect Effects 0.000 claims description 5
- 238000006073 displacement reaction Methods 0.000 claims description 4
- 238000004804 winding Methods 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 abstract description 3
- 238000012360 testing method Methods 0.000 description 30
- 239000003990 capacitor Substances 0.000 description 20
- 239000007789 gas Substances 0.000 description 15
- 238000002604 ultrasonography Methods 0.000 description 6
- 239000000047 product Substances 0.000 description 4
- 238000004364 calculation method Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 238000005070 sampling Methods 0.000 description 3
- 238000007599 discharging Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012467 final product Substances 0.000 description 2
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- 101100044040 Rattus norvegicus Sycn gene Proteins 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000010009 beating Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 239000003345 natural gas Substances 0.000 description 1
- 238000004321 preservation Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 230000009885 systemic effect Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Images
Landscapes
- Measuring Volume Flow (AREA)
Abstract
The invention discloses a pulse-detecting circuit used for an ultrasonic gas flowmeter based on a time difference method. The pulse-detecting circuit is characterized by comprising a computer interface, a control circuit, a pre-amplification circuit, a peak value adjusting and transmitting circuit, a signal three-level amplification circuit, and a comparison circuit; wherein the pre-amplification circuit is respectively connected with the peak value adjusting and transmitting circuit and the signal three-level amplification circuit; and the pre-amplification circuit, the peak value adjusting and transmitting circuit and the signal three-level amplification circuit are electrically connected through the comparison circuit and the computer interface as well as the control circuit respectively. By adopting a peak value transmission method, the invention automatically changes a comparative level used for generating a zero-crossing comparison control signal according to changes of the peak value of a signal, avoids complex controls needed by a gain control, and simplifies a circuit structure to be very simple; and moreover, the invention avoids precision loss generated during conversion and a balanced contradiction between cost and precision without adopting AD/DA conversion.
Description
Technical field
The present invention relates to a kind of pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference, be used to detect the ultrasonic signal that ultrasonic transducer receives, and when detecting required pulse output ultrasonic wave pulse arriving signal.
Background technology
Ultrasonic gas flowmeter is used for the flow metering in gas delivery tube road, is mainly used in natural gas line and the industrial gasses pipeline, can be divided into Doppler type and time difference French etc.Adopt the ultrasonic gas flowmeter of time difference method; Through a pair of ultrasonic sensor; Ultrasonic propagation time when measuring following current between the two (with respect to gas flow direction) with adverse current respectively can calculate parameters such as the velocity of sound, gas flow rate, gas flow in this pipeline section.For the ultrasonic gas flowmeter that adopts time difference method to measure, Measuring Propagation Time of Ultrasonic Wave is of paramount importance exactly, and under the constantly known prerequisite of ultrasonic emitting, only need providing accurately, the ultrasound wave due in gets final product.Owing to impurity, pipe vibration and valve switch, the ultrasound wave reasons such as reflection in pipeline in air stream turbulence, the gas; The ultrasonic signal that receives exists wave form distortion and peak change usually; Therefore; Can not through with signal directly through relatively confirming the ultrasound wave due in fixed voltage, it is general that what adopt was zero balancing.The comparative result of amplified signal and threshold voltage as the zero passage comparison control signal, is arrived the output of zero-crossing comparator in sign as signal.
Excessive for preventing that signal amplitude from changing; Cause beating several cycles before and after the zero passage comparison control signal; Method commonly used is automatic gain control; Receive the foundation of signal gain amplifier adjustment to detect signal peak that a last transmit cycle receives as next cycle, so that the signal peak after amplifying has only fluctuation among a small circle.The method constitutes through AD converter, computing machine, DA converter and voltage controlled gain amplifying circuit.By computing machine a last transmit cycle signal is carried out the AD sampling; With comparing of its peak value and systemic presupposition; Confirm the signal amplification factor of following one-period, and export control corresponding voltage to the voltage controlled gain amplifying circuit, to realize automatic gain control through DA.Therefore; Automatic gain control need be write software specially and carried out the AD sampling, and after sampling, confirms gain next time, and exports DA to; Increased the system time expense; Particularly for the small-sized flowmeter that has only adopted SCM system, the needed storage space of system time expense and AD has all taken more resource, and software reliability is had high requirements; On the other hand, in AD and DA transfer process, will inevitably be accompanied by loss of significance; Thereby directly influenced the signal peak fluctuation behind the automatic gain; Even can cause the peak value fluctuation excessive, and the zero passage comparison control signal is beated several cycles, run counter to the original intention of using this method; And if unrestrictedly adopt high-precision AD/DA, then cost and circuit scale will be very big, are unacceptable in a lot of occasions.
In sum; Existing application is in ultrasonic gas flowmeter based on time difference ultrasound examination circuit; Exist circuit more complicated, software overhead big, to the demanding intrinsic problem of software reliability, the contradiction that conditions each other for control accuracy and cost simultaneously also is difficult to overcome.
Summary of the invention
Goal of the invention: the objective of the invention is to the deficiency to prior art, a kind of pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference is provided, it has adopted the peak value transmission method; According to the variation of signal peak, change the comparative level that is used to produce the zero passage comparison control signal automatically, improving accuracy and time precision that ultrasonic signal detects; Reduced the influence of low signal-to-noise ratio to measurement result, simultaneously, response speed is fast; Simple in structure, cost is low, and except that the switch signal, need not the software support; Easy to use, degree of accuracy is high.
Technical scheme: in order to solve the problems of the technologies described above, the utility model has adopted following technical scheme:
A kind of pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference is characterized in that: it comprises computer interface and control circuit, pre-amplification circuit, peak value adjustment and transfer circuit, signal three-stage amplifier and comparator circuit; Described pre-amplification circuit is electrically connected with transfer circuit, signal three-stage amplifier with the peak value adjustment respectively, and described pre-amplification circuit, peak value adjustment are electrically connected with computer interface and control circuit through comparator circuit respectively with transfer circuit and signal three-stage amplifier; Synchronous signal control circuit work schedule by computer interface and control circuit input before the ultrasonic pulse of pre-estimating arrives receiving sensor, empties the peak value that peak value transmission and comparator circuit are preserved in advance; Export peak value adjustment and transfer circuit and signal three-stage amplifier to after the preposition amplification of signal of pre-amplification circuit with sensor output; The peak value adjustment is preserved peak value with transfer circuit, and it is output as and empties the last minor peaks of transmitting before the peak value; The signal three-stage amplifier carries out signal to export comparator circuit to after three grades of amplifications; Pre-amplification circuit output compares through comparator circuit with peak value adjustment and transfer circuit output; Comparative result control comparator circuit carried out zero balancing with the output of signal three-stage amplifier, exported computer interface and control circuit to after detecting ultrasonic pulse; After the ultrasonic pulse of pre-estimating finishes, the peak value output that peak value adjustment and transfer circuit will be preserved before.
Wherein, described computer interface and control circuit comprise connection terminal, connection terminal through winding displacement respectively with the ground of computing machine ,+5V ,-the 5V power supply, and timing control signal CTRL0 is connected with computing machine with CTRL1, sequential enable signal EN; Timing control signal CTRL01, CTRL are connected with coding input end A, the B of code translator respectively, and sequential enable signal EN is connected with the Enable Pin G1 of code translator, and the ultrasonic pulse arriving signal that computing machine receives is connected with the output terminal of comparator circuit; The coding input end C of code translator, Enable Pin G2A, G2B ground connection, the decoding output terminal Y0-Y4 of code translator is connected with transfer circuit with the peak value adjustment through first phase inverter, second phase inverter, the 3rd phase inverter and the 4th phase inverter respectively.
Wherein, described pre-amplification circuit comprises first amplifier, and the in-phase input end of first amplifier is through first resistance eutral grounding, and first amplifier's inverting input is connected with signal source through second resistance; The output terminal of first amplifier is connected with first amplifier's inverting input through the 3rd resistance; The minus earth of first diode, the positive pole of first diode is connected with first amplifier's inverting input; The plus earth of second diode, the negative pole of second diode is connected with first amplifier's inverting input; The output terminal of first amplifier links to each other with second amplifier's inverting input through the 5th resistance, and the in-phase input end of second amplifier is through the 4th resistance eutral grounding; The output terminal of second amplifier links to each other with second amplifier's inverting input through the 6th resistance, and the output terminal of second amplifier is connected with transfer circuit with the peak value adjustment.Be used for the signal of sensor output is tentatively amplified, preserve with the transfer circuit peak value and comparator circuit requirement relatively to satisfy the peak value adjustment.
First amplifier of said employing, the input impedance of second amplifier are more than or equal to 10
12Ω, gain bandwidth product be more than or equal to 10MHz, equivalent input noise smaller or equal to
Be used for amplification to the upper frequency ultrasonic signal.
Described peak value adjustment comprises first analog switch, second analog switch, the 3rd analog switch and the 4th analog switch with transfer circuit; The control end of first analog switch, second analog switch, the 3rd analog switch and the 4th analog switch is connected with output terminal T1, T2, T3 and the T4 of computer interface and control circuit respectively; The in-phase input end of the 3rd amplifier is connected with the output terminal of pre-amplification circuit through first analog switch, and the in-phase input end of the 3rd amplifier is through the 7th resistance eutral grounding; The positive pole of the 3rd diode is connected with the 3rd amplifier's inverting input, and the negative pole of the 3rd diode is connected with the output terminal of the 4th amplifier; The positive pole of the 4th diode is connected with the output terminal of the 3rd amplifier, and the negative pole of the 4th diode is connected with the inverting input of the 4th diode through the 9th resistance, the 8th resistance of series connection, and the negative pole of the 4th diode also is connected with the positive pole of the 5th diode; The negative pole of the 5th diode is connected with an end of the tenth resistance, and the other end of the tenth resistance is respectively through first electric capacity, the second analog switch ground connection; The negative pole of the 5th diode is connected with the in-phase input end of the 4th amplifier through the 11 resistance, and the output terminal of the 4th amplifier is connected with the 4th amplifier's inverting input; The in-phase input end of the 5th amplifier is connected with the output terminal of the 4th amplifier through the 3rd analog switch; The in-phase input end of the 5th amplifier is through the 12 resistance eutral grounding, and the positive pole of the 6th diode is connected with the 5th amplifier's inverting input, and the negative pole of the 6th diode is connected with the output terminal of the 5th amplifier; The positive pole of the 7th diode is connected with the output terminal of the 5th amplifier, and the negative pole of the 7th diode is connected with the 5th amplifier's inverting input through the 14 resistance, the 13 of series connection, and the negative pole of the 7th diode also is connected with the positive pole of the 8th diode; The negative pole of the 8th diode is connected with an end of the 15 resistance, and the other end of the 15 resistance is respectively through second electric capacity, the 4th analog switch ground connection; The negative pole of the 8th diode also is connected with the in-phase input end of the 6th amplifier through the 16 resistance; The output terminal of the 6th amplifier is connected with the 6th amplifier's inverting input; The output terminal of the 6th amplifier is connected with comparator circuit.Be used for the signal peak that pre-amplification circuit received in a last signal period is passed to comparator circuit, and the signal peak that this signal period receives is preserved, supply the next signal cycle to use.
The input impedance of the 3rd amplifier of said employing, the 4th amplifier, the 5th amplifier and the 6th amplifier is more than or equal to 10
12Ω, gain bandwidth product be more than or equal to 10MHz, equivalent input noise smaller or equal to
Described signal three utmost point amplifying circuits comprise the 7th amplifier, and the in-phase input end of the 7th amplifier is through the 17 resistance eutral grounding, and the 7th amplifier's inverting input is connected with the pre-amplification circuit output terminal through the 18 resistance; The output terminal of the 7th amplifier is connected with the 7th amplifier's inverting input through the 19 resistance, and the output terminal of the 7th amplifier also is connected with comparator circuit through the 20 resistance.
The input impedance of the 7th amplifier of said employing is more than or equal to 10
12Ω, gain bandwidth product be more than or equal to 10MHz, equivalent input noise smaller or equal to
Be used for amplification to the upper frequency ultrasonic signal.
Described comparator circuit comprises comparer; The control end ground connection of comparer passage A; The in-phase input end of comparer passage A is connected with the output terminal of pre-amplification circuit; The inverting input of comparer passage A is connected with the output terminal of transfer circuit with the peak value adjustment; The in-phase output end of comparer passage A is connected with the monostalbe trigger in-phase input end, and the timing end RC of monostalbe trigger connects+the 5V power supply through the 21 resistance, and the timing end RC of monostalbe trigger is connected with the timing end C of monostalbe trigger through the 3rd electric capacity; The inverting input of monostalbe trigger and zero clearing termination+5V power supply, the reversed-phase output of monostalbe trigger is connected with the control end of comparer channel B; The inverting input of comparer channel B is connected with the output terminal of signal three utmost point amplifying circuits, the in-phase input end ground connection of comparer channel B, and the in-phase output end of comparer channel B is connected with computer interface and control circuit.The common-mode rejection ratio of said comparer is not less than 80dB, and transmission delay is not more than 16ns, and differential transfer postpones to be not more than 5ns.
Principle of work: under the control of computer program; Testing circuit is adjusted comparative level automatically according to received ultrasonic signal peak change; Output ultrasonic wave pulse arriving signal supplies the COMPUTER CALCULATION ultrasonic propagation time to use to computing machine when detecting required pulse.
Beneficial effect: (1) the present invention has adopted the peak value transmission method, according to the variation of signal peak, changes the comparative level that is used to produce the zero passage comparison control signal automatically, has avoided the needed complicated control of gain control, makes circuit structure very simple.(2) need not adopt AD/DA conversion, balanced contradiction between the loss of significance of having avoided producing in the transfer process and cost and the precision.(3) all functions circuit all adopts hardware circuit directly to build, need not the software support, and response speed is fast, convenient debugging, and wide adaptability.(4) adopt high input impedance; Long-pending, the low noise operational amplifier of high gain-bandwidth is formed third stage amplifier; Realization is to the especially equal proportion of radio-frequency signal amplification in the broadband, and the air ultrasound signal that makes this circuit adapt to different frequency amplifies, for the large power supersonic signal; Upper limiting frequency can reach 1MHz, and general ultrasonic signal practical upper limit frequency can reach 500KHz.(5) the present invention adopts the simple integrated circuit that is easier on the market purchase to form, and simple and reasonable, cost is lower than the gain control circuit of equal performance, and debugging is convenient, and reliability is high.
Description of drawings
Fig. 1 is a structured flowchart of the present invention.
Fig. 2 is a control signal sequential chart of the present invention
Fig. 3 is computer interface of the present invention and control circuit figure.
Fig. 4 is pre-amplification circuit figure of the present invention.
Fig. 5 is peak value adjustment of the present invention and transfer circuit figure.
Fig. 6 is signal three-stage amplifier figure of the present invention.
Fig. 7 is comparator circuit figure of the present invention.
Embodiment:
Below in conjunction with accompanying drawing the present invention is done explanation further.
As shown in Figure 1, a kind of signal deteching circuit that is used for ultrasonic gas flowmeter based on time difference of the present invention comprises computer interface and control circuit 1, pre-amplification circuit 2, peak value adjustment and transfer circuit 3, signal three-stage amplifier 4 and comparator circuit 5.Described pre-amplification circuit 2 is electrically connected with transfer circuit 3, signal three-stage amplifier 4 with peak value adjustment respectively, and described pre-amplification circuit 2, peak value adjustment are electrically connected with computer interface and control circuit 1 through comparator circuit 5 respectively with transfer circuit 3 and signal three-stage amplifier 4; Synchronous signal control circuit work schedule by computer interface and control circuit 1 input before the ultrasonic pulse of pre-estimating arrives receiving sensor, empties the peak value that peak value transmission and comparator circuit 5 are preserved in advance; Export peak value adjustment and transfer circuit 3 and signal three-stage amplifier 4 after the preposition amplification of signal of pre-amplification circuit 2 with sensor output to; The peak value adjustment is preserved peak value with transfer circuit 3, and it is output as and empties the last minor peaks of transmitting before the peak value; Signal three-stage amplifier 4 carries out signal to export comparator circuit 5 to after three grades of amplifications; Pre-amplification circuit 2 outputs compare through comparator circuit 5 with peak value adjustment and transfer circuit 3 outputs; Comparative result control comparator circuit 5 carried out zero balancing with 4 outputs of signal three-stage amplifier, exported computer interface and control circuit 1 to after detecting ultrasonic pulse; After the ultrasonic pulse of pre-estimating finishes, the peak value output that peak value adjustment and transfer circuit 3 will be preserved before.
As shown in Figure 3, described computer interface and control circuit 1 comprise synchronous control signal, testing result output signaling interface and switching signal circuit.Power supply is ± 5V that being used to all circuit of this device provides testing circuit required power supply; Synchronous control signal is 2, according to sequential chart shown in Figure 2, and the break-make of each on-off circuit of control after 74LS138 decoding.Described computer interface and control circuit 1 comprise connection terminal J1, are the connection terminal of SIP9 like available model.Connection terminal J1 through winding displacement respectively with the ground of computing machine ,+5V ,-the 5V power supply, and timing control signal CTRL0 is connected with computing machine with CTRL1, sequential enable signal EN; Timing control signal CTRL01, CTRL are connected with coding input end A, the B of code translator U1 respectively, and sequential enable signal EN is connected with the Enable Pin G1 of code translator U1, and the ultrasonic pulse arriving signal that computing machine receives is connected with the output terminal of comparator circuit 5.The model of code translator U1 is 74LS138.The coding input end C of code translator U1, Enable Pin G2A, G2B ground connection; The decoding output terminal Y0-Y4 of code translator U1 is connected with transfer circuit 3 with the peak value adjustment through the first phase inverter U2A, the second phase inverter U2B, the 3rd phase inverter U2C and the 4th phase inverter U2D respectively, and the model of described four phase inverters is 74LS04.
Computer interface and control circuit 1 are used to connect circuit work power and the control signal that computing machine provides, and the control peak value is adjusted the work schedule with transfer circuit 3, and the output terminal of circuit is connected to computing machine.
As shown in Figure 4; Pre-amplification circuit 2 is used for the signal of sensor output is tentatively amplified; It comprises first order amplifying circuit and second level amplifying circuit; Be used for small ultrasonic signal is tentatively amplified, it is preserved with transfer circuit 3 peak values and comparator circuit 5 requirement relatively to satisfy the peak value adjustment.The two-stage amplifying circuit is formed by integrated operational amplifier.
Described pre-amplification circuit 2 comprises the first amplifier U3A, and the in-phase input end of the first amplifier U3A is through first resistance R, 1 ground connection, and the inverting input of the first amplifier U3A is through second resistance R 2 and the signal source, and promptly receiving sensor connects; The output terminal of the first amplifier U3A is connected with the inverting input of the first amplifier U3A through the 3rd resistance R 3; The minus earth of the first diode D1, the positive pole of the first diode D1 is connected with the inverting input of the first amplifier U3A; The plus earth of the second diode D2, the negative pole of the second diode D2 is connected with the inverting input of the first amplifier U3A; The output terminal of the first amplifier U3A links to each other with the inverting input of the second amplifier U3B through the 5th resistance R 5, and the in-phase input end of the second amplifier U3B is through the 4th resistance R 4 ground connection; The output terminal of the second amplifier U3B links to each other with the inverting input of the second amplifier U3B through the 6th resistance R 6, and the output terminal of the second amplifier U3B is connected with transfer circuit 3 with the peak value adjustment.
As shown in Figure 5, described peak value adjustment comprises on-off circuit, peak value amplifying circuit, peak value transfer circuit and capacitor charge and discharge circuit with transfer circuit 3.By the break-make of computer interface and control circuit 1 CS circuit, realize respectively preserving discharging and recharging of peak value electric capacity, and peak value transmits discharging and recharging of electric capacity.Peak value is preserved the charging of electric capacity and peak value transmission electric capacity and is exported by integrated operational amplifier and form, and wherein charging circuit is an amplifying circuit, and output circuit is a follower circuit.
Described peak value adjustment comprises the first analog switch U5A, the second analog switch U5B, the 3rd analog switch U5C and the 4th analog switch U5D with transfer circuit 3, is the analog switch of CD4066 like available model; The control end of the first analog switch U5A, the second analog switch U5B, the 3rd analog switch U5C and the 4th analog switch U5D is connected with output terminal T1, T2, T3 and the T4 of computer interface and control circuit 1 respectively; The in-phase input end of the 3rd amplifier U4A is connected with the output terminal of pre-amplification circuit 2 through the first analog switch U5A, and the in-phase input end of the 3rd amplifier U4A is through the 7th resistance R 7 ground connection; The positive pole of the 3rd diode D3 is connected with the inverting input of the 3rd amplifier U4A, and the negative pole of the 3rd diode D3 is connected with the output terminal of the 4th amplifier U4A.
The positive pole of the 4th diode D4 is connected with the output terminal of the 3rd amplifier U4A; The negative pole of the 4th diode D4 is connected with the inverting input of the 4th diode D4 through the 9th resistance R 9, the 8th resistance R 8 of series connection, and the negative pole of the 4th diode D4 also is connected with the positive pole of the 5th diode D5; The negative pole of the 5th diode D5 is connected with an end of the tenth resistance R 10, and the other end of the tenth resistance R 10 is respectively through first capacitor C 1, the second analog switch U5B ground connection.
The negative pole of the 5th diode D5 is connected with the in-phase input end of the 4th amplifier U4B through the 11 resistance R 11, and the output terminal of the 4th amplifier U4B is connected with the inverting input of the 4th amplifier U4B; The in-phase input end of the 5th amplifier U6A is connected with the output terminal of the 4th amplifier U4B through the 3rd analog switch U5C.
The in-phase input end of the 5th amplifier U6A is through the 12 resistance R 12 ground connection, and the positive pole of the 6th diode D6 is connected with the inverting input of the 5th amplifier U6A, and the negative pole of the 6th diode D6 is connected with the output terminal of the 5th amplifier U6A.
The positive pole of the 7th diode D7 is connected with the output terminal of the 5th amplifier U6A; The negative pole of the 7th diode D7 is connected with the inverting input of the 5th amplifier U6A through the 14 resistance R 14, the 13 R13 of series connection, and the negative pole of the 7th diode D7 also is connected with the positive pole of the 8th diode D8.
The negative pole of the 8th diode D8 is connected with an end of the 15 resistance R 15, and the other end of the 15 resistance R 15 is respectively through second capacitor C 2, the 4th analog switch U5D ground connection; The negative pole of the 8th diode D8 also is connected with the in-phase input end of the 6th amplifier U6B through the 16 resistance R 16.
The output terminal of the 6th amplifier U6B is connected with the inverting input of the 6th amplifier U6B; The output terminal of the 6th amplifier U6B is connected with comparator circuit 5.
The peak value adjustment is used for the signal peak that pre-amplification circuit 2 received in a last signal period is passed to comparator circuit 5 with transfer circuit 3, and the signal peak that this signal period receives is preserved, and supplies the next signal cycle to use.
As shown in Figure 6, signal three-stage amplifier 4 is made up of integrated operational amplifier.Described signal three utmost point amplifying circuits 4 comprise the 7th amplifier U7A, and the in-phase input end of the 7th amplifier U7A is through the 17 resistance R 17 ground connection, and the inverting input of the 7th amplifier U7A is connected with pre-amplification circuit 2 output terminals through the 18 resistance R 18; The output terminal of the 7th amplifier U7A is connected with the inverting input of the 7th amplifier U7A through the 19 resistance R 19, and the output terminal of the 7th amplifier U7A also is connected with comparator circuit 5 through the 20 resistance R 20.
Signal three utmost point amplifying circuits 4 are used for pre-amplification circuit 2 preliminary amplifying signals are further amplified, and cross the requirement of zero balancing to satisfy comparator circuit 5.
As shown in Figure 7, comparator circuit 5 comprises high speed comparator circuit and monostalbe trigger circuit.The signal of the output of peak value adjustment and transfer circuit 3 and pre-amplification circuit 2 outputs inserts high speed comparator circuit passage A simultaneously and compares; The comparative result that produces is control high-speed comparator channel B after the monostalbe trigger time-delay; The signal of signal three-stage amplifier output was carried out zero balancing, produce final detection result and export computer interface and control circuit 1 to.The binary channels comparer common-mode rejection ratio that adopts is not less than 80dB, and transmission delay is not more than 16ns, and differential transfer postpones to be not more than 5ns.Described monostable circuit output time scope can be by the 21 resistance R 21 and the adjustment of the 3rd capacitor C 3, the time window of opening as high speed comparator circuit channel B; Be used for precise control and opened the time window of zero balancing, reduce the influence of undesired signal compared result as far as possible.
Described comparator circuit 5 comprises comparer U8, and the model of comparer U8 is MAX912.The control end ground connection of comparer U8 passage A; The in-phase input end of comparer U8 passage A is connected with the output terminal of pre-amplification circuit 2; The inverting input of comparer U8 passage A is connected with the output terminal of transfer circuit 3 with the peak value adjustment; The in-phase output end of comparer U8 passage A is connected with monostalbe trigger U9A in-phase input end, and the model of monostalbe trigger U9A is CD4538.The timing end RC of monostalbe trigger U9A connects+the 5V power supply through the 21 resistance R 21, and the timing end RC of monostalbe trigger U9A is connected with the timing end C of monostalbe trigger U9A through the 3rd capacitor C 3; The inverting input of monostalbe trigger U9A and zero clearing termination+5V power supply, the reversed-phase output of monostalbe trigger U9A is connected with the control end of comparer U8 channel B; The inverting input of comparer U8 channel B is connected with the output terminal of signal three utmost point amplifying circuits 4, the in-phase input end ground connection of comparer U8 channel B, and the in-phase output end of comparer U8 channel B is connected with computer interface and control circuit 1.Comparator circuit 5 is used for according to peak value of last cycle and this cycle signal result relatively, the time window that control was carried out zero balancing to signal three-stage amplifier 4, and output zero passage comparative result in time window is as the entire circuit testing result.
The operational amplifier input impedance that the present invention adopted is 10
12Ω, gain bandwidth product are 10MHz.When practical operation, not to be higher than
be the operational amplifier of TLE2072 like available model to noise when the frequency that noise was not higher than
equivalent input noise when the frequency of equivalent input noise was 10Hz was 10KHz.Be used for amplification to the upper frequency ultrasonic signal.
Fig. 3-shown in Figure 7 be a ultrasonic sensor supporting testing circuit, the complete system of a cover comprises computing machine, a pair of transceiver ultrasonic sensor and supporting radiating circuit and two cover Fig. 3-testing circuits shown in Figure 7 thereof.
The circuit working sequential chart is as shown in Figure 2.Here adopt second sensor P2 emission, first sensor P1 receives, and is example explanation work schedule with the testing circuit of sensor P1.Computer interface and control circuit 1 middle connecting terminal J1 are connected with the computing machine respective terminal through winding displacement, and the input end of pre-amplification circuit 2 is connected with first sensor P1 signal end; T1-T4 is respectively the control signal of 4 path analoging switch in the circuit diagram shown in Figure 3.High level is for opening analog switch, and low level is for closing analog switch.The moment of the control T1 signal rising edge of the first analog switch U5A is t0; The t0 state of previous peaks transfer circuit constantly is: first capacitor C 1 is preserved last cycle signal peak; And be passed to second capacitor C 2 and preserved; Output to high-speed comparator circuit path A again, all analog switches are closed condition.Square wave shown in the first sensor P1 and the second sensor P2 is the signal of two sensors transponder pulse among the figure, and the less envelope of amplitude is for receiving signal hint.
When second sensor P2 emission ultrasonic signal, open the first analog switch U5A by the T1 signal, first capacitor C 1 is discharged over the ground, empty peak value; Ultrasonic propagation time according to prior rough calculation; Control T2 signal is opened the second analog switch U5B in advance; And close the first analog switch U5A, and make the ultrasonic signal that arrives after a while amplifying the back through pre-amplification circuit 2 to 1 charging of first capacitor C, preserve peak value; Meanwhile, this ultrasonic signal after preposition amplification outputs to high speed comparator circuit passage A, and the peak signal that has exported high speed comparator circuit passage A with aforementioned t0 constantly to compares; When peak signal during greater than ultrasonic signal, high-speed comparator circuit output low level, thereby control high speed comparator circuit channel B is closed; When peak signal during less than ultrasonic signal; High-speed comparator circuit output high level, through the monostable circuit broadening, the time window that control high speed comparator circuit channel B is opened; Make the output of signal three-stage amplifier 3 carry out zero balancing, and export comparative result to computing machine by computer interface and control circuit 1.After this, the peak value in second capacitor C 2 is invalid, opens the 3rd analog switch U5C by T3; Second capacitor C 2 is discharged; And behind discharge off, close the 3rd analog switch U5C, open the 4th analog switch U5D; The peak value that charging is preserved to first capacitor C 1 before this is passed to second capacitor C 2, and outputs to high-speed comparator circuit path A and supply relatively use next time.
When being applied to concrete flowmeter, the complete ultrasonic gas flowmeter based on time difference system of a cover comprises a pair of transceiver ultrasonic sensor, a pair of testing circuit that links to each other with respective sensor respectively, a control computer at least; By computer control sensor emission ultrasound wave, and the control detection circuit detects, and the testing result of monitoring testing circuit, is used for calculated flow rate.A complete signal emission comprises with sense cycle: computer control first sensor P1 emission ultrasonic pulse also picks up counting; Control the testing circuit detection that the second sensor P2 connects; After the testing circuit that the second sensor P2 connects detects ultrasonic pulse, the record ultrasonic propagation time; Control second sensor P2 emission ultrasonic pulse then and pick up counting, control the testing circuit that the second sensor P1 connects and detect, after the testing circuit that the second sensor P1 connects detects ultrasonic pulse, the record ultrasonic propagation time; These two travel-times are used for calculated flow rate and repeat said process.
Consider that a pair of ultrasonic sensor transmits and receives the symmetry of signal; Can the circuit working process be divided into two parts artificially: when second sensor P2 emission; When first sensor P1 receives; Peak value (by the T1 on the P1 testing circuit, T2 signal controlling) is preserved in first capacitor C, 1 zero clearing on the P1 testing circuit and charging, and second capacitor C, 2 zero clearings on the P2 testing circuit are also transmitted peak value (by the T3 on the P2 testing circuit, T4 signal controlling); When first sensor P1 emission; When the second sensor P2 receives; Peak value (by the T1 on the P2 testing circuit, T2 signal controlling) is preserved in first capacitor C, 1 zero clearing on the P2 testing circuit and charging, and second capacitor C, 2 zero clearings on the P1 testing circuit are also transmitted peak value (by the T3 on the P1 testing circuit, T4 signal controlling).That is, during (1) second sensor P2 transponder pulse, open first analog switch U5A of first sensor P1 testing circuit and the 3rd analog switch U5C of the second sensor P2 testing circuit; (2), when first sensor P1 will receive pulse, open second analog switch U5B of first sensor P1 testing circuit and the 4th analog switch U5D of the second sensor P2 testing circuit through rough calculation; (3) during first sensor P1 transponder pulse, open the 3rd analog switch U5C of first sensor P1 testing circuit and the first analog switch U5A of the second sensor P2 testing circuit; When (4) second sensor P2 will receive pulse, open the 4th analog switch U5D of first sensor P1 testing circuit and the second analog switch U5B of the second sensor P2 testing circuit.
When selecting circuit parameter, pre-amplification circuit 2 every grade of enlargement factors are confirmed according to pulsed frequency and propagation distance, make signal amplitude satisfy the requirement of peak value adjustment and transfer circuit 3 preservation peak values, can not lose peak information because of saturated amplification again.The sensor of general 5V driven, during emission 40KHz pulse propagation 0.5m, every grade of enlargement factor is about 20-50.The peak value adjustment can be through analog switch and amplifier electric leakage with first capacitor C 1 and second capacitor C 2 in the transfer circuit 3; Therefore; The enlargement factor of two amplifying circuits makes the peak value both can be unsaturated in transmittance process, can satisfy again when the signal with pre-amplification circuit 2 outputs compares; The needs that can equate at both voltages of selected pulse place exactly, total magnification generally is slightly larger than 1.The enlargement factor of signal three-stage amplifier 4 only need make signal be able to saturated amplification get final product, and has both satisfied the requirement of zero balancing, can not make noise excessive again.The time-delay of monostalbe trigger circuit can just open the delay time window by the 21 resistance R 21 and 3 adjustment of the 3rd capacitor C when receiving signal, prevent the output error signal.
Claims (8)
1. pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference is characterized in that: it comprises computer interface and control circuit (1), pre-amplification circuit (2), peak value adjustment and transfer circuit (3), signal three-stage amplifier (4) and comparator circuit (5); Described pre-amplification circuit (2) is electrically connected with transfer circuit (3), signal three-stage amplifier (4) with the peak value adjustment respectively, and described pre-amplification circuit (2), peak value adjustment are electrically connected with computer interface and control circuit (1) through comparator circuit (5) respectively with transfer circuit (3) and signal three-stage amplifier (4);
By the synchronous signal control circuit work schedule of computer interface and control circuit (1) input, before the ultrasonic pulse of pre-estimating arrives receiving sensor, empty the peak value that peak value adjustment and transfer circuit (3) are preserved in advance; Export peak value adjustment and transfer circuit (3) and signal three-stage amplifier (4) after the preposition amplification of signal of pre-amplification circuit (2) with sensor output to; The peak value adjustment is preserved peak value with transfer circuit (3), and it is output as and empties the last minor peaks of transmitting before the peak value; Signal three-stage amplifier (4) carries out signal to export comparator circuit (5) to after three grades of amplifications; Pre-amplification circuit (2) output compares through comparator circuit (5) with peak value adjustment and transfer circuit (3) output; Comparative result control comparator circuit (5) carried out zero balancing with signal three-stage amplifier (4) output, exported computer interface and control circuit (1) to after detecting ultrasonic pulse; After the ultrasonic pulse of pre-estimating finishes, the peak value output that peak value adjustment and transfer circuit (3) will be preserved before.
2. a kind of pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference according to claim 1; It is characterized in that: described computer interface and control circuit (1) comprise connection terminal (J1); Connection terminal (J1) through winding displacement respectively with the ground of computing machine; + 5V ,-the 5V power supply, and timing control signal CTRL0 is connected with computing machine with CTRL1, sequential enable signal EN; Timing control signal CTRL0, CTRL1 are connected with coding input end A, the B of code translator (U1) respectively; Sequential enable signal EN is connected with the Enable Pin G1 of code translator (U1), and the ultrasonic pulse arriving signal terminal that computing machine receives is connected with the output terminal of comparator circuit (5); The coding input end C of code translator (U1), Enable Pin G2A, G2B ground connection, the decoding output terminal Y0-Y4 of code translator (U1) is connected with transfer circuit (3) with the peak value adjustment through first phase inverter (U2A), second phase inverter (U2B), the 3rd phase inverter (U2C) and the 4th phase inverter (U2D) respectively.
3. a kind of pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference according to claim 1; It is characterized in that: described pre-amplification circuit (2) comprises first amplifier (U3A); The in-phase input end of first amplifier (U3A) is through first resistance (R1) ground connection, and the inverting input of first amplifier (U3A) is connected with signal source through second resistance (R2); The output terminal of first amplifier (U3A) is connected with the inverting input of first amplifier (U3A) through the 3rd resistance (R3); The minus earth of first diode (D1), the positive pole of first diode (D1) is connected with the inverting input of first amplifier (U3A); The plus earth of second diode (D2), the negative pole of second diode (D2) is connected with the inverting input of first amplifier (U3A); The output terminal of first amplifier (U3A) links to each other with the inverting input of second amplifier (U3B) through the 5th resistance (R5), and the in-phase input end of second amplifier (U3B) is through the 4th resistance (R4) ground connection; The output terminal of second amplifier (U3B) links to each other with the inverting input of second amplifier (U3B) through the 6th resistance (R6), and the output terminal of second amplifier (U3B) is connected with transfer circuit (3) with the peak value adjustment; Be used for the signal of sensor output is tentatively amplified, preserve with transfer circuit (3) peak value and comparator circuit (5) requirement relatively to satisfy the peak value adjustment.
4. a kind of pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference according to claim 1 is characterized in that: described peak value adjustment comprises first analog switch (U5A), second analog switch (U5B), the 3rd analog switch (U5C) and the 4th analog switch (U5D) with transfer circuit (3); The control end of first analog switch (U5A), second analog switch (U5B), the 3rd analog switch (U5C) and the 4th analog switch (U5D) is connected with output terminal T1, T2, T3 and the T4 of computer interface and control circuit (1) respectively; The in-phase input end of the 3rd amplifier (U4A) is connected with the output terminal of pre-amplification circuit (2) through first analog switch (U5A), and the in-phase input end of the 3rd amplifier (U4A) is through the 7th resistance (R7) ground connection; The positive pole of the 3rd diode (D3) is connected with the inverting input of the 3rd amplifier (U4A), and the negative pole of the 3rd diode (D3) is connected with the output terminal of the 4th amplifier (U4A);
The positive pole of the 4th diode (D4) is connected with the output terminal of the 3rd amplifier (U4A); The negative pole of the 4th diode (D4) is connected with the inverting input of the 3rd amplifier (U4A) through the 9th resistance (R9), the 8th resistance (R8) of series connection, and the negative pole of the 4th diode (D4) also is connected with the positive pole of the 5th diode (D5); The negative pole of the 5th diode (D5) is connected with an end of the tenth resistance (R10), and the other end of the tenth resistance (R10) is respectively through first electric capacity (C1), second analog switch (U5B) ground connection;
The negative pole of the 5th diode (D5) is connected with the in-phase input end of the 4th amplifier (U4B) through the 11 resistance (R11), and the output terminal of the 4th amplifier (U4B) is connected with the inverting input of the 4th amplifier (U4B); The in-phase input end of the 5th amplifier (U6A) is connected with the output terminal of the 4th amplifier (U4B) through the 3rd analog switch (U5C);
The in-phase input end of the 5th amplifier (U6A) is through the 12 resistance (R12) ground connection, and the positive pole of the 6th diode (D6) is connected with the inverting input of the 5th amplifier (U6A), and the negative pole of the 6th diode (D6) is connected with the output terminal of the 5th amplifier (U6A);
The positive pole of the 7th diode (D7) is connected with the output terminal of the 5th amplifier (U6A); The negative pole of the 7th diode (D7) is connected with the inverting input of the 5th amplifier (U6A) through the 14 resistance (R14), the 13 resistance (R13) of series connection, and the negative pole of the 7th diode (D7) also is connected with the positive pole of the 8th diode (D8);
The negative pole of the 8th diode (D8) is connected with an end of the 15 resistance (R15), and the other end of the 15 resistance (R15) is respectively through second electric capacity (C2), the 4th analog switch (U5D) ground connection; The negative pole of the 8th diode (D8) also is connected with the in-phase input end of the 6th amplifier (U6B) through the 16 resistance (R16);
The output terminal of the 6th amplifier (U6B) is connected with the inverting input of the 6th amplifier (U6B); The output terminal of the 6th amplifier (U6B) is connected with comparator circuit (5);
Sensor output signal peak value after the amplification that peak value adjustment and transfer circuit (3) were used for a last signal period is received is passed to comparator circuit (5); And the sensor output signal peak value after the amplification that this signal period is received preserves, and supplies the next signal cycle to use.
5. a kind of pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference according to claim 4 is characterized in that: the input impedance of the 3rd amplifier (U4A) of said employing, the 4th amplifier (U4A), the 5th amplifier (U6A) and the 6th amplifier (U6B) is more than or equal to 10
12Ω, gain bandwidth product be more than or equal to 10MHz, equivalent input noise smaller or equal to
6. a kind of pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference according to claim 1; It is characterized in that: described signal three-stage amplifier (4) comprises the 7th amplifier (U7A); The in-phase input end of the 7th amplifier (U7A) is through the 17 resistance (R17) ground connection, and the inverting input of the 7th amplifier (U7A) is connected with pre-amplification circuit (2) output terminal through the 18 resistance (R18); The output terminal of the 7th amplifier (U7A) is connected with the inverting input of the 7th amplifier (U7A) through the 19 resistance (R19), and the output terminal of the 7th amplifier (U7A) also is connected with comparator circuit (5) through the 20 resistance (R20).
7. a kind of pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference according to claim 1; It is characterized in that: described comparator circuit (5) comprises comparer (U8); The control end ground connection of comparer (U8) passage A; The in-phase input end of comparer (U8) passage A is connected with the output terminal of pre-amplification circuit (2); The inverting input of comparer (U8) passage A is connected with the output terminal of transfer circuit (3) with the peak value adjustment; The in-phase output end of comparer (U8) passage A is connected with monostalbe trigger (U9A) in-phase input end, and the timing end RC of monostalbe trigger (U9A) connects+the 5V power supply through the 21 resistance (R21), and the timing end RC of monostalbe trigger (U9A) is connected with the timing end C of monostalbe trigger (U9A) through the 3rd electric capacity (C3); The inverting input of monostalbe trigger (U9A) and zero clearing termination+5V power supply, the reversed-phase output of monostalbe trigger (U9A) is connected with the control end of comparer (U8) channel B; The inverting input of comparer (U8) channel B is connected with the output terminal of signal three-stage amplifier (4), the in-phase input end ground connection of comparer (U8) channel B, and the in-phase output end of comparer (U8) channel B is connected with computer interface and control circuit (1).
8. the pulse-detecting circuit that is used for ultrasonic gas flowmeter based on time difference according to claim 7 is characterized in that: the common-mode rejection ratio of said comparer (U8) is not less than 80dB, and transmission delay is not more than 16ns, and differential transfer postpones to be not more than 5ns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009102336001A CN101718567B (en) | 2009-10-29 | 2009-10-29 | Pulse-detecting circuit used for ultrasonic gas flowmeter based on time difference method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009102336001A CN101718567B (en) | 2009-10-29 | 2009-10-29 | Pulse-detecting circuit used for ultrasonic gas flowmeter based on time difference method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101718567A CN101718567A (en) | 2010-06-02 |
| CN101718567B true CN101718567B (en) | 2012-04-25 |
Family
ID=42433173
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009102336001A Expired - Fee Related CN101718567B (en) | 2009-10-29 | 2009-10-29 | Pulse-detecting circuit used for ultrasonic gas flowmeter based on time difference method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101718567B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103975527B (en) * | 2011-12-02 | 2017-07-07 | 法国原子能及替代能源委员会 | Equipment for adjusting random voltages stream of pulses in the input of analog-digital converter |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101886939A (en) * | 2010-06-10 | 2010-11-17 | 宁波大学 | Inhibition model and inhibition method for static drift of time difference ultrasonic flowmeter |
| CN104062361B (en) * | 2013-03-19 | 2016-06-08 | 中国石油天然气股份有限公司 | A kind of lap weld ultrasonic testing system single channel dual-function circuit |
| CN103471667B (en) * | 2013-06-17 | 2016-03-30 | 大连普林斯电子有限公司 | Based on large-scale caliber ultrasonic flow meter and the signal Enhancement Method thereof of TDC-GP22 |
| CN105444827A (en) * | 2014-08-31 | 2016-03-30 | 上海中核维思仪器仪表有限公司 | Method for measuring ultrasonic wave transmission time using bilateral measurement |
| CN104406641B (en) * | 2014-11-24 | 2018-01-26 | 天津商业大学 | A kind of ultrasonic flowmeter peak-value detection method and compensation system |
| CN105157772B (en) * | 2015-07-10 | 2018-09-25 | 安徽水联水务科技有限公司 | Timer expiration method and circuit and ultrasonic wave detecting system based on the circuit |
| CN106052639A (en) * | 2016-07-08 | 2016-10-26 | 深圳市高巨创新科技开发有限公司 | Embedded height measuring system |
| CN107131918B (en) * | 2017-07-02 | 2023-09-12 | 中国计量大学 | Echo signal processing method and circuit of low-power-consumption ultrasonic flowmeter |
| CN109029600B (en) * | 2018-08-15 | 2019-12-27 | 电子科技大学 | Ultrasonic signal amplitude self-adaptive detection device |
| CN109708729B (en) * | 2018-12-14 | 2020-10-20 | 金卡智能集团股份有限公司 | Automatic gain adjustment method for metering signal of ultrasonic meter and ultrasonic gas meter |
| CN110319893B (en) * | 2019-06-28 | 2024-02-23 | 金卡智能集团股份有限公司 | Metering instrument accumulated gas quantity detection circuit and method |
| CN117168583B (en) * | 2023-10-31 | 2024-01-23 | 成都千嘉科技股份有限公司 | Zero-crossing detection method and detection device for gas meter |
-
2009
- 2009-10-29 CN CN2009102336001A patent/CN101718567B/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103975527B (en) * | 2011-12-02 | 2017-07-07 | 法国原子能及替代能源委员会 | Equipment for adjusting random voltages stream of pulses in the input of analog-digital converter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101718567A (en) | 2010-06-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101718567B (en) | Pulse-detecting circuit used for ultrasonic gas flowmeter based on time difference method | |
| CN104697593A (en) | Ultrasonic gas flowmeter on basis of FPGA (field programmable gate array) and DSP (digital signal processor) | |
| CN102590805A (en) | Ultrasonic circuit system for improving range-measuring accuracy | |
| CN101539599A (en) | Digital lightning detection method and device thereof | |
| CN2356355Y (en) | Ultrasonic distance measurer | |
| CN107290564A (en) | A kind of ultrasonic flow-velocity measuring method based on phase difference | |
| CN107131918A (en) | A kind of low-consumption ultrasonic flow measurement meter echo signal processing method and circuit | |
| CN109579950A (en) | A kind of mistake proofing wave detection device of Ultrasonic Wave Flowmeter | |
| CN105181046A (en) | Digitalized ultrasonic flowmeter system based on dual-core architecture and method thereof | |
| CN102507073A (en) | Pressure and pressure difference combination measurement and communication realization method | |
| CN102203601A (en) | Method for determining the starting instant of a periodically oscillating signal response | |
| CN109612541B (en) | Mistake wave prevention signal processing circuit of gas ultrasonic flowmeter | |
| CN116358652A (en) | Multi-feature point ultrasonic transit time measurement method based on cross-correlation algorithm assistance | |
| CN104897219A (en) | High-accuracy low-power consumption ultrasonic flowmeter | |
| CN206905826U (en) | Low-consumption ultrasonic flow measurement meter echo signal processing circuit | |
| CN201671805U (en) | Tangential fan performance testing device | |
| CN201611380U (en) | Digital frequency characteristic tester | |
| CN206892340U (en) | Identification device and laser radar at the time of based on laser radar | |
| CN203053499U (en) | Time-difference method ultrasonic flowmeter | |
| CN108007531A (en) | A kind of echo signal processing circuit of ultrasonic material level meter | |
| CN204359370U (en) | Ultrasonic Wave Flowmeter receive MUT signal intensity AGC (automatic gain control) system | |
| CN202182873U (en) | Emulsion concentration online detector | |
| CN104601131B (en) | Receipt signal strength automatic gain control method for gas ultrasonic flow meter transducer | |
| CN106404085B (en) | A kind of ultrasonic flowmeter | |
| CN102253119B (en) | Emulsion concentration online detection system and ultrasonic receiving circuit thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120425 Termination date: 20141029 |
|
| EXPY | Termination of patent right or utility model |