CN101707592A - Method for processing SPI4 interface data packet - Google Patents
Method for processing SPI4 interface data packet Download PDFInfo
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- CN101707592A CN101707592A CN200910093988A CN200910093988A CN101707592A CN 101707592 A CN101707592 A CN 101707592A CN 200910093988 A CN200910093988 A CN 200910093988A CN 200910093988 A CN200910093988 A CN 200910093988A CN 101707592 A CN101707592 A CN 101707592A
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Abstract
The invention provides a method for processing an SPI4 interface data packet. The method comprises the following steps of: adding PPP frame format data according to the requirement of an SPI4 protocol to obtain data brust; carrying out protocol conversion on the data brust, and sending the data brust subjected to the protocol conversion through an SPI4 interface. By the method, a data packet according with the SPI4 interface protocol can be generated and sent and a common interface of 10Gbps, WAN, LAN, MAN and SAN is realized, so that the interface protocol design is easier for engineering realization, the amount and the functions of pins are reduced, the integrality of signals is enhanced, and the cost of the SPI4 interface is reduced.
Description
Technical field
The present invention relates to the communications field, and especially, relate to a kind of processing method of SPI4 interface data bag.
Background technology
SPI4 (system's packet switch interface, Level 4) is a new system-level interface standard, and the designer can be according to this standard for data and the communications service concentrated are developed flexibly, upgradeable system.The SPI4 interface is supported the high rate data transmission of a plurality of agreements to have nothing in common with each other, and these agreements comprise packets of information (POS frame), OC-192, Ethernet, Fast Ethernet, megabit Ethernet, 10 megabit Ethernets and the 10 megabit optical-fibre channel SAN etc. on the SONET/SDH.
At present, the SPI4 interface generally is to realize by special ASIC or expensive IP core, form is subjected to bigger constraint, cost is higher, and can not compatible 10Gbps wide area network (Wide AreaNetwork abbreviates WAN as), local area network (LAN) (Local Area Network abbreviates LAN as), metropolitan area network (Metropolitan Area Network, abbreviate MAN as) and storage area network procotols such as (StorageArea Network abbreviate SAN as).
Summary of the invention
Consider the problem of SPI4 interface cost height, poor compatibility in the correlation technique, the object of the present invention is to provide a kind of processing scheme of SPI4 interface data bag, with in addressing the above problem one of at least.
Processing method according to SPI4 interface data bag of the present invention comprises:
Add according to the protocol requirement PPP frame format data of SPI4 and to obtain data burst;
Protocol conversion is carried out in burst to data, by the data burst after the SPI4 interface transmission protocol conversion.
Wherein, PPP frame format data being added the processing that obtains data burst comprises: PPP frame format data are added 16 bit protocol heads obtain data burst.
And the processing of PPP frame format data being added protocol header comprises: the head to PPP frame format data adds packet start information, and the afterbody of PPP frame format data is added end-of-packet information, thereby obtains data burst.
Wherein, the length of the data burst that obtains after the interpolation is 32 bytes.
In addition, the processing that protocol conversion is carried out in data bursts comprises: by data burst is converted to two data of prolonging and comes that burst realizes the protocol conversion of 32 bit fields to 16 bit fields to data by singly prolonging data.
By means of technical scheme of the present invention, can generate and send the packet that meets the SPI4 interface protocol, realize the common interface of 10Gbps WAN, LAN, MAN and SAN, make the interface protocol design be easier to Project Realization, reduce number of pin and power consumption, the enhancing signal integrality, the cost of reduction SPI4 interface.
Description of drawings
Fig. 1 is the flow chart according to the processing method of the SPI4 interface data bag of the embodiment of the invention;
Fig. 2 is the schematic diagram according to the I/O interface model that processing method adopted of the SPI4 interface data bag of the embodiment of the invention;
Fig. 3 is the state machine diagram that is adopted when sending data burst in the processing method of the SPI4 interface data bag of the embodiment of the invention.
Embodiment
Problem at SPI4 interface cost height, poor compatibility in the correlation technique, the present invention proposes to realize by FPGA the processing of SPI4 interface data, make the SPI4 interface compatibility improve greatly by protocol conversion, make that the SPI4 interface can be as the common interface of 10Gbps WAN, LAN, MAN and SAN, and can effectively reduce cost.
The present invention can be by multiple FPGA as carrier, with LX110T FPGA is example, the present invention can application device inside OBUFDS (being used to realize the buffer memory of dateout) and ODDR (be used for list along data or clock be converted to two along) etc. resource handle, describe embodiments of the invention in detail below in conjunction with accompanying drawing.
Fig. 1 is the flow chart according to the processing method of the SPI4 interface data bag of the embodiment of the invention.As shown in Figure 1, the processing method according to the SPI4 interface data bag of the embodiment of the invention comprises:
Step S102 adds to obtain data burst (burst) to point-to-point protocol (Point to Point Protocol abbreviates PPP as) frame format data according to the protocol requirement of SPI4;
Step S104, protocol conversion is carried out in burst to data, and by the burst after the SPI4 interface transmission protocol conversion.
Wherein, in step S 102, need add 16 bit protocol heads to PPP frame format data and obtain burst.In the process of adding, need add the head of PPP frame format data and unwrap the beginning (StartOf Packet, abbreviate SOP as) information, and PPP frame format data are got afterbody add end-of-packet (EndOf Packet, abbreviate EOP as) information, thereby obtain burst, the length of this burst is 32 bytes, makes the recipient can discern this burst.
In step S104, when burst is carried out protocol conversion process, can by the ODDR technology burst be converted to two data of prolonging by singly prolonging data in the I/O part, thereby burst is realized the protocol conversion of 32bit territory to the 16bit territory, standard compliant SPI4 agreement.
By above-mentioned processing, can generate and send the packet that meets the SPI4 protocol requirement, realize the common interface of 10Gbps WAN, LAN, MAN and SAN, reduce the cost that the SPI4 interface is realized, can be applied in the communication equipments such as line interface, switching backplane of router LINK to the descending connection of PHY.
Particularly, in step S102, can adopt ODDR0, ODDR1 in the I/O interface model shown in Figure 2 ..., ODDR15 to the 32bytes data of having added SOP and EOP (SpiTData[0] [16], SpiTData[1] [17] ..., SpiTData[15] [31]) singly prolong the conversion of prolonging to two;
By the control signal SpiTCtrl[1:0 of ODDR16 to input] singly prolong the conversion of prolonging to two;
Clock signal iSpiTStartClk for input then can carry out the clock signal buffer memory by BUFIO and BUFER (1/4);
In addition, for ODDR0 ..., the signal of ODDR15, ODDR16, BUFIO and BUFER output, can before transmission, carry out buffer memory by OBUFDS respectively.Particularly, for ODDR0, ODDR1 ..., the data of ODDR15 after handling, behind buffer memory, can export the ovSpiTData_P/N[0 that satisfies the SPI4 protocol requirement], ovSpiTData_P/N[1] ..., ovSpiTData_P/N[15]; For control signal, can export the control signal oSpiTCtrl_P/N that satisfies the SPI4 protocol requirement behind the buffer memory; For clock signal, after by the OBUFDS buffer memory, can export the clock signal oSpiTClk_P/N that satisfies the SPI4 protocol requirement, receive data for receiving terminal.
In addition, in processing method, can carry out the transmission of packet according to state machine shown in Figure 3 according to the SPI4 interface data bag of the embodiment of the invention.
As shown in Figure 3, as follows according to the state machine that processing method adopted of the SPI4 interface data bag of the embodiment of the invention:
At first, need between transmitting terminal and the receiving terminal to train control by training data (Training data), the length of training can define as required, for example, 5 cycles (cycle), do not match (not match) if training result is transmitting terminal and receiving terminal, then need to restart training;
If transmitting terminal and receiving terminal mate (match) each other, then can enter the wait state of SOP, at this moment, when not detecting SOP,, should transmit empty bag (IDEL) between transmitting terminal and the receiving terminal according to the requirement of agreement, that is the wait sop﹠amp shown in Fig. 3; Send IDEL state;
Detecting SOP and do not detecting as yet under the situation of EOP, transmitting terminal needs per 8 cycles to send detected data burst (burst), empty bag and C control word (C ctrl word);
If detect EOP in 8 cycles, then transmitting terminal need send EOP and empty bag, and returns and wait for next SOP again, and current burst sends and finishes.
In sum, by means of technical scheme of the present invention, can generate and send the packet that meets the requirement of SPI4 interface protocol, make the interface protocol design be easier to Project Realization, reduce number of pin and power consumption, the enhancing signal integrality has realized the common interface of 10Gbps WAN, LAN, MAN and SAN; For needing the 10Gbps flow and, can transplant by simple logic and be applied to the scene fast based on the mega project of FPGA, and can be at different application, simple modification fifo interface and handshake can be used, and have good transplantability.
Obviously, those skilled in the art should be understood that, above-mentioned each module of the present invention or each step can realize with the general calculation device, they can concentrate on the single calculation element, perhaps be distributed on the network that a plurality of calculation element forms, alternatively, they can be realized with the executable program code of calculation element, thereby, they can be stored in the storage device and carry out by calculation element, perhaps they are made into each integrated circuit modules respectively, perhaps a plurality of modules in them or step are made into the single integrated circuit module and realize.Like this, the present invention is not restricted to any specific hardware and software combination.
Be the preferred embodiments of the present invention only below, be not limited to the present invention, for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (4)
1. the processing method of a SPI4 interface data bag is characterized in that, comprising:
Is that PPP frame format data are added and obtained data burst according to the protocol requirement of SPI4 to point-to-point protocol;
Described data burst is carried out protocol conversion, and by the described data burst after the SPI4 interface transmission protocol conversion.
2. method according to claim 1 is characterized in that, described PPP frame format data is added the processing that obtains described data burst comprise:
Described PPP frame format data are added 16 bit protocol heads obtain described data burst.
3. method according to claim 2 is characterized in that, the processing that described PPP frame format data are added described protocol header comprises:
Head to described PPP frame format data adds packet start information, and the afterbody of described PPP frame format data is added end-of-packet information, thereby obtains described data burst.
4 according to each described method in the claim 1 to 3, it is characterized in that the length of the described data burst that obtains after the interpolation is 32 bytes.
5. method according to claim 1 is characterized in that, the processing of described data burst being carried out described protocol conversion comprises:
By described data burst is converted to and two prolong data and come described data burst is realized the protocol conversion of 32 bit fields to 16 bit fields by singly prolonging data.
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| CN100518140C (en) * | 2005-06-15 | 2009-07-22 | 华为技术有限公司 | SPI4II interface remote transmission realizing method and apparatus |
| CN100499666C (en) * | 2006-04-13 | 2009-06-10 | 杭州华三通信技术有限公司 | System and method for inter connecting SP14 equipment and PCI Express equipment |
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Non-Patent Citations (2)
| Title |
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| HONG CHEN ETC.: "Design of the SPI interface of 10-Gigabit Ethernet with FPGA", 《PROCEEDINGS OF THE SPIE - THE INTERNATIONAL SOCIETY FOR OPTICAL ENGINEERING》 * |
| 范红永等: "SPI-4.2接口的FPGA实现 ", 《计算机工程》 * |
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