CN101707484B

CN101707484B - Fast exp-Golomb decoding method suitable to be implemented by hardware

Info

Publication number: CN101707484B
Application number: CN 200910099561
Authority: CN
Inventors: 刘亮; 陈日仪
Original assignee: GAOTE INFORMATION TECHNOLOGY Co Ltd HANGZHOU CITY
Current assignee: GAOTE INFORMATION TECHNOLOGY Co Ltd HANGZHOU CITY
Priority date: 2009-06-18
Filing date: 2009-06-18
Publication date: 2012-11-28
Anticipated expiration: 2029-06-18
Also published as: CN101707484A

Abstract

The invention relates to a fast exp-Golomb decoding method suitable to be implemented by hardware, which comprises the following steps: 1) the parallel input of a 32-bit fixed-length non-decoded data string is performed by a decoder every time; 2) the high bytes of the data string, namely the 31st bit to 27th bit of the data string, are compared with the binary number of the same length so as to determine the number of zero bits and further determine the length of effective code words; 3) according to the comparison result, a data selector is controlled to superpose accumulated value with effective code words, so as to obtain a final Code Num value. Due to the adoption of the method, the problems in the prior art of slow decoding speed, poor speed and area of pure parallel decoding, overlong critical path of a circuit and the like are solved. According to code word structures of the exp-Colomb codes, the method acquires effective code words and decodes the effective code words so as to achieve a mode for fastly decoding the exp-Colomb codes, wherein the mode is suitable to be implemented by the hardware and has a small circuit area, a low working frequency and less storage data.

Description

A kind of suitable hard-wired quick index Columbus sign indicating number coding/decoding method

Affiliated technical field

This method be used on hardware asics realizing quick A VS, H.264 wait the video coding code stream the decoding of index Columbus sign indicating number.

Background technology

AVS and H.264 all adopt the adaptive variable length coding techniques in the standard---index Columbus sign indicating number.The index Columbus sign indicating number is a kind of variable length code, so its code length is also by its code word content decision.Yet the index Columbus sign indicating number is had any different again in common variable length code, and it has the fixed form corresponding to exponent number, has corresponding code table unlike general variable length code.In other words when a code word be when encoding by index Columbus, need not know its variable length code code table, and as long as construct a code table according to the rule of table according to its exponent number.When resolving k rank index Columbus sign indicating number, at first the current location from bit stream begins to seek first non-zero bit, and zero number of bits that will find is designated as leadingZeroBits, then according to leadingZeroBits calculating CodeNum.Following table has provided the structure of 0 rank, 1 rank, 2 rank index Columbus sign indicating numbers.The Bit String of index Columbus sign indicating number is divided into " prefix " and " suffix " two parts.Prefix is by leadingZeroBits ' 0 ' and one ' 1 ' continuous formation.Suffix is made up of leadingZeroBits+k bit, i.e. x in the table _nString, x _nValue be ' 0 ' or ' 1 '.

When on ASIC, realizing the decoding of index Columbus sign indicating number with common serial, code stream is sent into decoder by turn, and decoder is realized the decoding of variable length code through coupling by turn.Because this mode adopts the bitwise operation mode, and the code length of variable length code has nothing in common with each other, make that the required cycle of operation of code word identification is also inequality.When separating the code word that code length is short, exponent number is low, its decoding speed is very fast, and when separating the code word that code length is long, exponent number is high, its decoding speed is slower.Obviously, Bits Serial decoding scheme efficient is relatively low, and decoding speed is different because of code word size, can't satisfy the application scenario that some is had relatively high expectations to real-time.Another kind of PLA decoding algorithm commonly used is characterized in because realize easily, and reliable.PLA is a kind of special ROM, and it just can store great deal of information with less memory cell.But when realizing decoding, when the CodeNum of code word is little, can on hardware, obtain comprehensively and realize decoding function well with PLA; But the scope of working as the CodeNum of this code word surpasses 2 ¹⁰The time, the PLA code table of generation is difficult to obtain all gratifying result on speed and the area, and big PLA code table can cause the critical path of circuit long, and therefore, pure PLA parallel decoding algorithm is not suitable for separating the big index Columbus sign indicating number of CodeNum.In sum, all can not well on hardware, realize the decoding of index Columbus sign indicating number with complete serial or parallel fully mode.

Summary of the invention

In order to solve pure serial decode when separating the code word that code length is long, exponent number is high; Slower, pure parallel decoding speed of its decoding speed and area are undesirable; And problem such as the critical path of circuit is long; This method provides a kind of suitable hardware to realize, the method for the Rapid Realization index Columbus sign indicating number decoding that circuit area is little, operating frequency is low, the storage data are few.

The technical scheme that addresses the above problem employing is: a kind of suitable hard-wired quick index Columbus sign indicating number coding/decoding method is characterized in that carrying out according to the following steps:

(1) the not decoded data string of 32 fixed length of the parallel at every turn input of decoder;

(2) binary number with the high position data in this serial data and one group of same length compares, and confirms zero number of bits, and then confirms effective code word size according to the exponent number of index Columbus sign indicating number; The numerical value of described one group of binary number is respectively 2 ⁰, 2 ¹, 2 ²... 2 ^N-1, wherein, n is the number of comparator.

(3) according to comparative result control data gate, gate superposes accumulated value and effective code word, obtains final CodeNum value; Described accumulated value is 2 ^{LeadingZeroBits+k}-2 ^k, wherein leadingZeroBits representes initial ' 0 ' number continuously in the index Columbus code word, k representes the exponent number of index Columbus sign indicating number, all accumulated values in advance according to the characteristic people of syntactic element in the code stream in the program of being added on.For example; In the situation of 0 rank index Columbus decoding (k=0), after the comparison through step (2), confirm the pairing actual numerical value of binary code under its binary system effective code word length and this length; For example effectively code word is " 101 "; Then the effective code word length is 3 (as previously mentioned, the effective code word length is the summation of leadingZeroBits+k), and corresponding actual numerical value is 5 (decimal systems).Calculate 2 ³⁺⁰-2 ⁰Obtaining accumulated value is 7, is 5+7=12 so obtain final CodeNum value.For another example, in the situation of 1 rank index Columbus decoding (k=1), be that 101 situation is an example still with effective code word, during 1 rank, the value of leadingZeroBits is 3-k=2, calculates 2 ²⁺¹-2 ¹Obtaining accumulated value is 6, is 5+6=11 so obtain the value of final CodeNum.

The number of comparator is half according to encoding code stream syntactic element the longest corresponding index Columbus code word size number.The width of comparator is half according to encoding code stream syntactic element the longest corresponding index Columbus code word size number.

Suitable hard-wired quick index Columbus sign indicating number coding/decoding method of the present invention; Code word characteristics according to the index Columbus sign indicating number; Each code word all by n bit continuously ' 0 ', 1 bit ' 1 ' again the order of n the effective code word of bit (n >=0) form, according to the difference that syntactic element in the code stream defines, be example with the AVS standard; The length of n is no more than 10, i.e. 10 >=n >=0.Under the situation of the concrete length of not knowing n; This method acquiescence n is the maximum length code word length of separating current bit stream syntax element; With n bit continuous ' 0 ' read in decoder with the code stream of ' 1 ' the length summation (n+1bit altogether) of 1bit; And with parallel mode will be somebody's turn to do (n+1) bit content and same length for the binary number of (n+1) bit length relatively, only have one to be ' 1 ' in this binary number, all the other all are ' 0 '.Through the comparison of this mode, confirm effective code word size, and decode.

This method is mainly used parallel hardware comparator and single adder, on speed and circuit area, all consumes not quite, and the big capacity code table that this process of while need not walk abreast and store is not confirmed code word size through the mode that compares by turn yet.With the AVS code stream is example, and wherein the single code word size of index Columbus sign indicating number is all less than 32bit, so this method reality reads in the regular length code word at every turn, and in the monocycle, accomplishes code word size and calculate, and obtains actual CodeNum simultaneously.The AVS video code stream analyzing module that this method realizes; On Xilinx VirtexII 3000 platforms, verify; During 27MHz work dominant frequency, can realize the AVS Jizhun Profile10Mbps code stream of 1080P is decoded, when increasing the code stream processing speed; Still guarantee lower operating frequency, thereby reduce the actual hardware power consumption.

Description of drawings

Below in conjunction with accompanying drawing and embodiment this method being further specified, is that 10bit is an example with 0 rank Columbus's code word, length and width degree.

Fig. 1 is the frame diagram of embodiments of the invention.

Embodiment

This method is according to the characteristics of syntactic element to be decoded, at first confirms its longest effective code word length, and the longest effective code word and precalculated accumulated value are superposeed obtains final decoded result again.

Following equal 0 rank index Columbus sign indicating number; The maximum length code word width is that 10bit is an example; Decoder obtains the not data of decoding of 32bit fixed length at every turn; With comparing of the data parallel of the high 5bit (31bit to 27bit) in the 32bit data, confirm in the code word of index Columbus sign indicating number 0 the number length that first non-0 coefficient is preceding with " 10000 ", " 01000 ", " 00100 ", " 00010 " and " 00001 " 5 numerical value.The several length that compare with it are with consistent by several length relatively, and in the whole data (binary system), only one is ' 1 ', and all the other are ' 0 ' all, list all possible mode and compare.When for example the code word that obtains of decoder is " 00110XXXXX "; The high 5bit of this code word is " 00110 ", after relatively, confirms these 5bit data greater than " 00100 ", but less than " 01000 "; Therefore learn that the number before first non-0 coefficient of this code word is identical with " 00100 "; Be 2bit,, so the individual effective code word of 2+0 (exponent number) arranged also behind its non-0 coefficient simultaneously because be 0 rank index Columbus sign indicating number.In other words, through this step, decoder learns that this code word physical length is that 2bit ' 0 ', 1bit ' 1 ' and the effective code word of 2bit are formed.

Before effective code word is handled to reality, need to use an accumulated value: 2 ^{LeadingZeroBits+k}-2 ^k, wherein leadingZeroBits representes ' 0 ' number continuously initial in the index Columbus code word, k representes the exponent number of index Columbus sign indicating number.This accumulated value is 4-1=3 in this example.Before decoding, all accumulated values should be in advance according to the characteristic people of syntactic element in the code stream in the program of being added on, but the number of this part value and few confirm according to the syntactic element length of required decoding, so reality does not take too much hardware resource.

After obtaining actual effective code word length, gate superposes accumulated value and effective code word, obtains actual decoded results, i.e. CodeNum value, and the value of CodeNum is 3+2=5 in the last example, wherein 2 is 10 hex value of the effective code word of 2bit.

Below with the situation of single order (k=1) decode procedure is described once more.Suppose maximal solution code length and last example always; When the code word that decoder obtains is " 00011110XX "; Decoder parallel parallel relatively " 10000 ", " 01000 ", " 00100 ", " 00010 " and " 00001 " confirm that continuous ' 0 ' number among the high 5bit " 00011 " of enter code word is 3, then confirm the 4th bit ' 1 ' afterwards length be effective code word of 3+1; Be " 1110 " that promptly decimal value is 14 in this example.Accumulated value is 2 ³⁺¹-2 ¹=14.So finally obtaining the value of CodeNum is 14+14=28.

In the time of can type releasing other exponent numbers through above two embodiment, the value of pairing CodeNum during the code word of different length.

What should be understood that is: the foregoing description is just to explanation of the present invention, rather than limitation of the present invention, and any innovation and creation that do not exceed in the connotation scope of the present invention all fall within protection scope of the present invention.

Claims

1. one kind is fit to hard-wired quick index Columbus sign indicating number coding/decoding method, it is characterized in that carrying out according to the following steps:

(2) binary number with high 5 bit data of the 31bit to 27bit in this serial data and one group of same length compares, and confirms zero number of bits, and then confirms effective code word size according to the exponent number of index Columbus sign indicating number; The numerical value of described one group of binary number is respectively 2 ⁰, 2 ¹, 2 ²2 ^N-1, wherein, n is the number of comparator.

(3) according to comparative result control data gate, gate superposes accumulated value and effective code word, obtains final CodeNum value; Described accumulated value is 2 ^{LeadingZeroBits+k}– 2 ^k, wherein leadingZeroBits representes initial ' 0 ' number continuously in the index Columbus code word, k representes the exponent number of index Columbus sign indicating number, all accumulated values in advance according to the characteristic people of syntactic element in the code stream in the program of being added on.

2. a kind of hard-wired quick index Columbus sign indicating number coding/decoding method that is fit to according to claim 1, the number that it is characterized in that comparator is half according to encoding code stream syntactic element the longest corresponding index Columbus code word size number.

3. a kind of hard-wired quick index Columbus sign indicating number coding/decoding method that is fit to according to claim 1, the width that it is characterized in that comparator is half according to encoding code stream syntactic element the longest corresponding index Columbus code word size number.

4. according to any one described a kind of hard-wired quick index Columbus sign indicating number coding/decoding method that is fit to of claim 1-3, it is characterized in that using in the decoder and only use an adder be used to add up effective code word and gating result.