CN101707484A - Fast exp-Golomb decoding method suitable to be implemented by hardware - Google Patents
Fast exp-Golomb decoding method suitable to be implemented by hardware Download PDFInfo
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- CN101707484A CN101707484A CN 200910099561 CN200910099561A CN101707484A CN 101707484 A CN101707484 A CN 101707484A CN 200910099561 CN200910099561 CN 200910099561 CN 200910099561 A CN200910099561 A CN 200910099561A CN 101707484 A CN101707484 A CN 101707484A
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- code word
- index columbus
- sign indicating
- indicating number
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Abstract
The invention relates to a fast exp-Golomb decoding method suitable to be implemented by hardware. According to code word structures of the exp-Colomb codes, the method acquires effective code words and decodes the effective code words so as to achieve a mode for fastly decoding the exp-Colomb codes, wherein the mode is suitable to be implemented by the hardware and has a small circuit area, a low working frequency and less storage data.
Description
Affiliated technical field
This method be used on hardware asics realizing quick A VS, H.264 wait the video coding code stream the decoding of index Columbus sign indicating number.
Background technology
AVS and H.264 all adopt the adaptive variable length coding techniques in the standard---index Columbus sign indicating number.The index Columbus sign indicating number is a kind of variable length code, so its code length is also by its code word content decision.Yet the index Columbus sign indicating number is had any different again in common variable length code, and it has the fixed form corresponding to exponent number, unlike variable length code have corresponding code table.In other words when a code word be when encoding by index Columbus, do not need to know its variable length code code table, and as long as construct a code table according to the rule of table according to its exponent number.When resolving k rank index Columbus sign indicating number, at first the current location from bit stream begins to seek first non-zero bit, and zero number of bits that will find is designated as leadingZeroBits, then according to leadingZeroBits calculating CodeNum.Following table has provided the structure of 0 rank, 1 rank, 2 rank index Columbus sign indicating numbers.The Bit String of index Columbus sign indicating number is divided into " prefix " and " suffix " two parts.Prefix is by leadingZeroBits ' 0 ' and one ' 1 ' continuous formation.Suffix is made of leadingZeroBits+k bit, i.e. x in the table
nString, x
nValue be ' 0 ' or ' 1 '.
When on ASIC, realizing the decoding of index Columbus sign indicating number with common serial, code stream is sent into decoder by turn, decoder is by the decoding of coupling realization variable length code by turn. because this mode adopts the bitwise operation mode, and the code length of variable length code has nothing in common with each other, make that the required cycle of operation of code word identification is also inequality. in that to separate code length shorter, during the low code word of exponent number, its decoding speed is very fast, and in that to separate code length longer, during the high code word of exponent number, its decoding speed is slower. obviously, Bits Serial decoding scheme efficient is relatively low, decoding speed is different because of code word size, can't satisfy the application scenario that some is had relatively high expectations to real-time. another kind of PLA decoding algorithm commonly used, be characterized in because realize easily, and reliable .PLA is a kind of special ROM, it just can store a large amount of information with less memory cell. but when realizing decoding, when the CodeNum of code word is little, can on hardware, obtain comprehensively and realize decoding function well with PLA; But the scope of working as the CodeNum of this code word surpasses 2
10The time, the PLA code table of generation is difficult to obtain all gratifying result on speed and the area, and big PLA code table can cause the critical path of circuit long, and therefore, pure PLA parallel decoding algorithm is not suitable for separating the big index Columbus sign indicating number of CodeNum.In sum, all can not well on hardware, realize the decoding of index Columbus sign indicating number with complete serial or parallel fully mode.
Summary of the invention
In order to solve pure serial decode when separating the code word that code length is long, exponent number is high, slower, pure parallel decoding speed of its decoding speed and area are undesirable, and problem such as the critical path of circuit is long, this method provides a kind of suitable hardware to realize, the method for the quick realization index Columbus sign indicating number decoding that circuit area is little, operating frequency is low, the storage data are few.
The technical scheme that addresses the above problem employing is: a kind of suitable hard-wired quick index Columbus sign indicating number coding/decoding method is characterized in that carrying out according to the following steps:
(1) the not decoded data string of 32 fixed length of the parallel at every turn input of decoder;
(2) binary number with the high position data in this serial data and one group of same length compares, and determines zero number of bits, and then determines effective code word size according to the exponent number of index Columbus sign indicating number; The numerical value of described one group of binary number is respectively 2
0, 2
1, 2
2... 2
N-1, wherein, n is the number of comparator.
(3) according to comparative result control data gate, gate superposes accumulated value and effective code word, obtains final CodeNum value; Described accumulated value is 2
LeadingZeroBits+k-2
k, wherein leadingZeroBits represents initial ' 0 ' number continuously in the index Columbus code word, k represents the exponent number of index Columbus sign indicating number, all accumulated values in advance according to the feature people of syntactic element in the code stream in the program of being added on.For example, in the situation of 0 rank index Columbus decoding (k=0), after the comparison by step (2), determine the pairing actual numerical value of binary code under its binary system effective code word length and this length, for example effectively code word is " 101 ", then the effective code word length is 3 (as previously mentioned, the effective code word length is the summation of leadingZeroBits+k), and corresponding actual numerical value is 5 (decimal systems).Calculate 2
3+0-2
0Obtaining accumulated value is 7, is 5+7=12 so obtain final CodeNum value.For another example, in the situation of 1 rank index Columbus decoding (k=1), be that 101 situation is an example still with effective code word, during 1 rank, the value of leadingZeroBits is 3-k=2, calculates 2
2+1-2
1Obtaining accumulated value is 6, is 5+6=11 so obtain the value of final CodeNum.
The number of comparator is half according to the longest index Columbus code word size number of encoding code stream syntactic element correspondence.The width of comparator is half according to the longest index Columbus code word size number of encoding code stream syntactic element correspondence.
Suitable hard-wired quick index Columbus sign indicating number coding/decoding method of the present invention, code word characteristics according to the index Columbus sign indicating number, each code word is all by continuous ' 0 ', 1 bit ' 1 ' the order composition of n the effective code word of bit (n 〉=0) again of n bit, difference according to syntactic element definition in the code stream, with the AVS standard is example, the length of n is no more than 10, i.e. 10 〉=n 〉=0.Under the situation of the concrete length of not knowing n, this method acquiescence n is the maximum length code word length of separating current bit stream syntax element, the code stream of ' 1 ' the length summation (n+1bit altogether) of ' 0 ' and the 1bit that n bit is continuous reads in decoder, and will be somebody's turn to do (n+1) bit content and same length in parallel mode and compare for the binary number of (n+1) bit length, only have one to be ' 1 ' in this binary number, all the other all are ' 0 '.By the comparison of this mode, determine effective code word size, and decode.
This method is mainly used parallel hardware comparator and single adder, on speed and circuit area, all consume little, this process does not need the big capacity code table of parallel storage simultaneously, do not determine code word size by the mode that compares by turn yet. with the AVS code stream is example, wherein the single code word size of index Columbus sign indicating number is all less than 32bit, therefore this method reality is read in the regular length code word at every turn, and in the monocycle, finish code word size and calculate, obtain the AVS video code stream analyzing module that actual CodeNum. this method realizes simultaneously, on Xilinx VirtexII 3000 platforms, verify, during 27MHz work dominant frequency, can realize the AVS Jizhun Profile@10Mbps code stream of 1080P is decoded, when increasing the code stream processing speed, still guarantee lower operating frequency, thereby reduce the actual hardware power consumption.
Description of drawings
Below in conjunction with drawings and Examples this method being further specified, is that 10bit is an example with 0 rank Columbus's code word, length and width degree.
Fig. 1 is the frame diagram of embodiments of the invention.
Embodiment
This method is according to the characteristics of syntactic element to be decoded, at first determines its longest effective code word length, and the longest effective code word and precalculated accumulated value are superposeed obtains final decoded result again.
Following equal 0 rank index Columbus sign indicating number, the maximum length code word width is that 10bit is an example, decoder obtains the not data of decoding of 32bit fixed length at every turn, with the data parallel of the high 5bit (31bit to 27bit) in the 32bit data and " 10000 ", " 01000 ", " 00100 ", " 00010 " and " 00001 " 5 numerical value compare, determine in the code word of index Columbus sign indicating number the number length of 0 before first non-0 coefficient.The several length that compare with it are consistent with the several length that are compared, and in the whole data (binary system), only one is ' 1 ', and all the other are ' 0 ' all, list all possible mode and compare.When for example the code word that obtains of decoder is " 00110XXXXX ", the high 5bit of this code word is " 00110 ", confirm that after relatively these 5bit data are greater than " 00100 ", but less than " 01000 ", therefore learn that the number before first non-0 coefficient of this code word is identical with " 00100 ", be 2bit,, so the individual effective code word of 2+0 (exponent number) arranged also behind its non-0 coefficient simultaneously because be 0 rank index Columbus sign indicating number.In other words, by this step, decoder learns that this code word physical length is that 2bit ' 0 ', 1bit ' 1 ' and the effective code word of 2bit are formed.
Before effective code word is handled to reality, need to use an accumulated value: 2
LeadingZeroBits+k-2
k, wherein leadingZeroBits represents ' 0 ' number continuously initial in the index Columbus code word, k represents the exponent number of index Columbus sign indicating number.This accumulated value is 4-1=3 in this example.Before decoding, all accumulated values should be in advance according to the feature people of syntactic element in the code stream in the program of being added on, but the number of this part value and few determine according to the syntactic element length of required decoding, so reality does not take too much hardware resource.
After obtaining actual effective code word length, gate with accumulated value and effectively code word superpose, obtain actual decoded results, i.e. CodeNum value, the value of CodeNum is 3+2=5 in the last example, wherein 2 is 10 hex value of the effective code word of 2bit.
Below with the situation of single order (k=1) decode procedure is described once more.Suppose maximal solution code length and last example always, when the code word that decoder obtains is " 00011110XX ", decoder parallel relatively " 10000 ", " 01000 ", " 00100 ", " 00010 " and " 00001 ", determine that continuous ' 0 ' number among the high 5bit " 00011 " of enter code word is 3, determine that then in the 4th bit ' 1 ' back length be effective code word of 3+1, be " 1110 " that promptly decimal value is 14 in this example.Accumulated value is 2
3+1-2
1=14.So finally obtaining the value of CodeNum is 14+14=28.
But when releasing other exponent numbers by above two embodiment classes, the value of pairing CodeNum during the code word of different length.
What should be understood that is: the foregoing description is just to explanation of the present invention, rather than limitation of the present invention, and any innovation and creation that do not exceed in the connotation scope of the present invention all fall within protection scope of the present invention.
Claims (4)
1. one kind is fit to hard-wired quick index Columbus sign indicating number coding/decoding method, it is characterized in that carrying out according to the following steps:
(1) the not decoded data string of 32 fixed length of the parallel at every turn input of decoder;
(2) binary number with the high position data in this serial data and one group of same length compares, and determines zero number of bits, and then determines effective code word size according to the exponent number of index Columbus sign indicating number; The numerical value of described one group of binary number is respectively 2
0, 2
1, 2
22
N-1, wherein, n is the number of comparator.
(3) according to comparative result control data gate, gate superposes accumulated value and effective code word, obtains final CodeNum value; Described accumulated value is 2
LeadingZeroBits+k-2
k, wherein leadingZeroBits represents initial ' 0 ' number continuously in the index Columbus code word, k represents the exponent number of index Columbus sign indicating number, all accumulated values in advance according to the feature people of syntactic element in the code stream in the program of being added on.
2. a kind of hard-wired quick index Columbus sign indicating number coding/decoding method that is fit to according to claim 1, the number that it is characterized in that comparator is half according to the longest index Columbus code word size number of encoding code stream syntactic element correspondence.
3. a kind of hard-wired quick index Columbus sign indicating number coding/decoding method that is fit to according to claim 1, the width that it is characterized in that comparator is half according to the longest index Columbus code word size number of encoding code stream syntactic element correspondence.
4. according to any one described a kind of hard-wired quick index Columbus sign indicating number coding/decoding method that is fit to of claim 1-3, it is characterized in that using in the decoder and only use an adder be used to add up effective code word and gating result.
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Cited By (2)
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---|---|---|---|---|
CN104469366A (en) * | 2014-12-18 | 2015-03-25 | 中国科学院自动化研究所 | Zero-order exponential Golomb code decoder and decoding method |
CN107454406A (en) * | 2017-08-18 | 2017-12-08 | 深圳市佳创视讯技术股份有限公司 | The live high-speed decoding method of VR panoramic videos and system based on AVS+ |
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US7333037B2 (en) * | 2006-02-14 | 2008-02-19 | Broadcom Corporation | Method and system for improved lookup table (LUT) mechanism for Huffman decoding |
CN100593954C (en) * | 2007-03-28 | 2010-03-10 | 中国科学院微电子研究所 | Device and method for decoding Columbus code |
CN101304534A (en) * | 2008-06-20 | 2008-11-12 | 四川长虹电器股份有限公司 | Index Columbus encoding method |
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CN104469366A (en) * | 2014-12-18 | 2015-03-25 | 中国科学院自动化研究所 | Zero-order exponential Golomb code decoder and decoding method |
CN104469366B (en) * | 2014-12-18 | 2017-10-03 | 中国科学院自动化研究所 | A kind of 0 rank Exp- Golomb decoder and coding/decoding method |
CN107454406A (en) * | 2017-08-18 | 2017-12-08 | 深圳市佳创视讯技术股份有限公司 | The live high-speed decoding method of VR panoramic videos and system based on AVS+ |
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