CN101707475B - High-linearity upper frequency mixer with controllable output voltage and frequency mixing method - Google Patents
High-linearity upper frequency mixer with controllable output voltage and frequency mixing method Download PDFInfo
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- CN101707475B CN101707475B CN2009101982919A CN200910198291A CN101707475B CN 101707475 B CN101707475 B CN 101707475B CN 2009101982919 A CN2009101982919 A CN 2009101982919A CN 200910198291 A CN200910198291 A CN 200910198291A CN 101707475 B CN101707475 B CN 101707475B
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Abstract
The invention discloses a high-linearity upper frequency mixer with controllable output voltage, which comprises a voltage/current conversion circuit, a frequency mixing circuit, an amplitude detector and a comparison module, wherein the voltage/current conversion circuit is used for converting analog baseband signals into current signals; the frequency mixing circuit is used for mixing the current signals output by the voltage/current conversion circuit with LO signals, and outputting high-linearity frequency mixing signals; the amplitude detector is used for detecting the amplitude of the high-linearity frequency mixing signals, and outputting detection signals; and the comparison module is used for comparing the detection signals with reference voltage signals, and outputting control signals to control the current output by the voltage/current conversion circuit. Due to the adoption of a negative feedback control loop, the high-linearity upper frequency mixer ensures that the output voltage amplitude is accurate, has a simple circuit structure and is favorable for CMOS integration.
Description
Technical field
The invention belongs to wireless communication technology field, relate to controlled high-linearity upper frequency mixer of a kind of output voltage and frequency mixing method.
Background technology
Along with the fast development of integrated circuit processing technique, give the wireless transceiver system height the integrated possibility that provides.Simultaneously, the development of communication system technology and the demand of consumption market all concentrate on communicating by letter of high data rate.This just needs to use the modulation of 64QAM (Quadrature Amplitude Modulation, quadrature amplitude modulation), 256QAM even 1024QAM.The transceiver that these modulation techniques all require to carry out radio signal transmission has the very high linearity.At present, in the integrated transmitter circuitry, adopt the mixer architecture of gilbert (Gilbert) structure usually, as shown in Figure 1.But utilize this mixer architecture, obtain the very high linearity has certain difficulty, because the MOS transistor device in the circuit of Fig. 1 is a nonlinear device, only can linear work when small-signal, and if increasing, signal will produce distortion and non-linear.
Summary of the invention
Technical problem to be solved by this invention is: provide a kind of output voltage controlled high-linearity upper frequency mixer.
For solving the problems of the technologies described above, the present invention adopts following technical scheme.
The high-linearity upper frequency mixer that a kind of output voltage is controlled comprises voltage, mixting circuit, range detector, comparison module; Said voltage converts current signal in order to the baseband signal with simulation; Said mixting circuit carries out mixing in order to the current signal with said voltage output with the LO signal, exports high linear mixture signal; Said range detector is in order to detect the amplitude of said high linear mixture signal, output detection signal; Said comparison module is in order to more said detection signal and reference voltage signal, and the output control signal is controlled the electric current of said voltage output.
As a kind of preferred version of the present invention, said voltage comprises operational amplifier U10, nmos pass transistor M7, adjustable resistance R1, PMOS transistor M1, current source I1; The in-phase input end of said operational amplifier U10 meets the baseband signal BB_I_P of simulation, and inverting input meets current source I1, the grid of output termination nmos pass transistor M7; The source electrode of PMOS transistor M1 connects operational amplifier U10 and the crossing node of current source I1, and grounded drain, grid connect the source electrode of nmos pass transistor M7 and the end of adjustable resistance R1; The other end ground connection of adjustable resistance R1.
As another kind of preferred version of the present invention, said adjustable resistance R1 is connected with control signal VCTRL, the resistance of regulating adjustable resistance R1 through the value that changes control signal VCTRL.
As another preferred version of the present invention, said mixting circuit comprises nmos pass transistor M2, M3; The source electrode of nmos pass transistor M2, M3 connects the drain electrode of nmos pass transistor M7; The grid of nmos pass transistor M2 meets LO signal LO_I_P, and drain electrode meets output voltage node OUTN; The grid of nmos pass transistor M3 meets LO signal LO_I_N, and drain electrode meets output voltage node OUTP.
The frequency mixing method of the high-linearity upper frequency mixer that a kind of output voltage is controlled may further comprise the steps:
Step 1, voltage converts the baseband signal of simulation into current signal;
Step 3, range detector detect the amplitude of said high linear mixture signal, output detection signal;
Step 4, more said detection signal of comparison module and reference voltage signal, the output control signal is controlled the output current of said voltage.
As a kind of preferred version of the present invention, in the step 1, said voltage comprises operational amplifier U10, nmos pass transistor M7, adjustable resistance R1, PMOS transistor M1, current source I1; The in-phase input end of said operational amplifier U10 meets the baseband signal BB_I_P of simulation, and inverting input meets current source I1, the grid of output termination nmos pass transistor M7; The source electrode of PMOS transistor M1 connects operational amplifier U10 and the crossing node of current source I1, and grounded drain, grid connect the source electrode of nmos pass transistor M7 and the end of adjustable resistance R1; The other end ground connection of adjustable resistance R1.
As another kind of preferred version of the present invention, said adjustable resistance R1 is connected with control signal VCTRL, the resistance of regulating adjustable resistance R1 through the value that changes control signal VCTRL.
As another preferred version of the present invention, said mixting circuit comprises nmos pass transistor M2, M3; The source electrode of nmos pass transistor M2, M3 connects the drain electrode of nmos pass transistor M7; The grid of nmos pass transistor M2 meets LO signal LO_I_P, and drain electrode meets output voltage node OUTN; The grid of nmos pass transistor M3 meets LO signal LO_I_N, and drain electrode meets output voltage node OUTP.
Beneficial effect of the present invention is: it has adopted the negative feedback control loop, makes output voltage amplitude accurate, and circuit structure of the present invention is simple, and it is integrated to help CMOS.
Description of drawings
Do further explain below in conjunction with the accompanying drawing specific embodiments of the invention.
Fig. 1 is the structural representation of the frequency mixer of gilbert's structure;
Fig. 2 is a structural representation of the present invention;
Fig. 3 is part core circuit figure of the present invention.
Embodiment
Embodiment
The high-linearity upper frequency mixer that a kind of output voltage is controlled, as shown in Figure 2, comprise voltage, mixting circuit, range detector, comparison module; Said voltage converts current signal in order to the baseband signal with simulation; Said mixting circuit carries out mixing in order to the current signal with said voltage output with the LO signal, exports high linear mixture signal; Said range detector is in order to detect the amplitude of said high linear mixture signal, output detection signal; Said comparison module is in order to more said detection signal and reference voltage signal, and the output control signal is controlled the electric current of said voltage output.
Said voltage comprises operational amplifier U10, nmos pass transistor M7, adjustable resistance R1, PMOS transistor M1, current source I1; The in-phase input end of said operational amplifier U10 meets the baseband signal BB_I_P of simulation, and inverting input meets current source I1, the grid of output termination nmos pass transistor M7; The source electrode of PMOS transistor M1 connects operational amplifier U10 and the crossing node of current source I1, and grounded drain, grid connect the source electrode of nmos pass transistor M7 and the end of adjustable resistance R1; The other end ground connection of adjustable resistance R1.Said adjustable resistance R1 is connected with control signal VCTRL, the resistance of regulating adjustable resistance R1 through the value that changes control signal VCTRL.Said mixting circuit comprises nmos pass transistor M2, M3; The source electrode of nmos pass transistor M2, M3 connects the drain electrode of nmos pass transistor M7; The grid of nmos pass transistor M2 meets LO signal LO_I_P, and drain electrode meets output voltage node OUTN; The grid of nmos pass transistor M3 meets LO signal LO_I_N, and drain electrode meets output voltage node OUTP.
The frequency mixing method of the high-linearity upper frequency mixer that a kind of output voltage is controlled may further comprise the steps:
Step 1, voltage converts the baseband signal of simulation into current signal;
Step 3, range detector detect the amplitude of said high linear mixture signal, output detection signal;
Step 4, more said detection signal of comparison module and reference voltage signal, the output control signal is controlled the output current of said voltage.
In the step 1, said voltage comprises operational amplifier U10, nmos pass transistor M7, adjustable resistance R1, PMOS transistor M1, current source I1; The in-phase input end of said operational amplifier U10 meets the baseband signal BB_I_P of simulation, and inverting input meets current source I1, the grid of output termination nmos pass transistor M7; The source electrode of PMOS transistor M1 connects operational amplifier U10 and the crossing node of current source I1, and grounded drain, grid connect the source electrode of nmos pass transistor M7 and the end of adjustable resistance R1; The other end ground connection of adjustable resistance R1.Said adjustable resistance R1 is connected with control signal VCTRL, the resistance of regulating adjustable resistance R1 through the value that changes control signal VCTRL.Said mixting circuit comprises nmos pass transistor M2, M3; The source electrode of nmos pass transistor M2, M3 connects the drain electrode of nmos pass transistor M7; The grid of nmos pass transistor M2 meets LO signal LO_I_P, and drain electrode meets output voltage node OUTN; The grid of nmos pass transistor M3 meets LO signal LO_I_N, and drain electrode meets output voltage node OUTP.
Structural representation of the present invention is as shown in Figure 2.Baseband signal BBI, the BBQ of simulation at first convert current signal into through the voltage (V/I circuit) of too high linearity; Carry out mixing with oscillation signals according LOI, LOQ then and obtain high linear mixture signal VOUT; VOUT obtains detection signal DET_OUT through range detector; DET_OUT compares controlled signal VCTRL with reference voltage signal VREF again, the output current of VCTRL control V/I circuit.Whole system is degeneration factor, stable after, high linear mixture signal VOUT range value equal with reference voltage signal VREF.
Fig. 3 has described part core circuit of the present invention.What frequency mixer adopted is active Gilbert mixer architecture.Among the figure, operational amplifier U10, nmos pass transistor M7, adjustable resistance R1, PMOS transistor M1, current source I 1 have constituted the transducer of the voltage of a high linearity to electric current.Wherein, the in-phase input end of operational amplifier U10 meets BB_I_P, and inverting input meets current source I1, the grid of output termination nmos pass transistor M7; The source electrode of PMOS transistor M1 connects operational amplifier U10 and the crossing node of current source I1, and grounded drain, grid connect the source electrode of nmos pass transistor M7 and the end of adjustable resistance R1; The other end ground connection of adjustable resistance R1; The drain electrode of nmos pass transistor M7 connects the source electrode of nmos pass transistor M2, M3; The grid of nmos pass transistor M2 meets LO_I_P, and drain electrode meets OUTN; The grid of nmos pass transistor M3 meets LO_I_N, and drain electrode meets OUTP.Adjustable resistance R1 is connected with control signal VCTRL, the resistance that can regulate R1 through the value that changes control signal VCTRL.
The present invention has adopted the negative feedback control loop, makes output voltage amplitude accurate, and circuit structure of the present invention is simple, and it is integrated to help CMOS.
Here description of the invention and application is illustrative, is not to want with scope restriction of the present invention in the above-described embodiments.Here the distortion of the embodiment that is disclosed and change are possible, and the replacement of embodiment is known with the various parts of equivalence for those those of ordinary skill in the art.Those skilled in the art are noted that under the situation that does not break away from spirit of the present invention or substantive characteristics, and the present invention can be with other forms, structure, layout, ratio, and realize with other elements, material and parts.
Claims (6)
1. the high-linearity upper frequency mixer that output voltage is controlled is characterized in that, comprising:
Voltage converts current signal in order to the baseband signal with simulation;
Mixting circuit carries out mixing in order to the current signal with said voltage output with the LO signal, exports high linear mixture signal;
Range detector is in order to detect the amplitude of said high linear mixture signal, output detection signal; Comparison module, in order to more said detection signal and reference voltage signal, the output control signal is controlled the electric current of said voltage output,
Wherein said voltage comprises operational amplifier U10, nmos pass transistor M7, adjustable resistance R1, PMOS transistor M1, current source I1; The in-phase input end of said operational amplifier U10 meets the baseband signal BB_I_P of simulation, and inverting input meets current source I1, the grid of output termination nmos pass transistor M7; The source electrode of PMOS transistor M1 connects operational amplifier U10 and the crossing node of current source I1, and grounded drain, grid connect the source electrode of nmos pass transistor M7 and the end of adjustable resistance R1; The other end ground connection of adjustable resistance R1.
2. the controlled high-linearity upper frequency mixer of output voltage according to claim 1 is characterized in that: said adjustable resistance R1 is connected with control signal VCTRL, the resistance of regulating adjustable resistance R1 through the value that changes control signal VCTRL.
3. the controlled high-linearity upper frequency mixer of output voltage according to claim 1, it is characterized in that: said mixting circuit comprises nmos pass transistor M2, M3; The source electrode of nmos pass transistor M2, M3 connects the drain electrode of nmos pass transistor M7; The grid of nmos pass transistor M2 meets LO signal LO_I_P, and drain electrode meets output voltage node OUTN; The grid of nmos pass transistor M3 meets LO signal LO_I_N, and drain electrode meets output voltage node OUTP.
4. the frequency mixing method of the controlled high-linearity upper frequency mixer of the described output voltage of claim 1 is characterized in that, may further comprise the steps:
Step 1, voltage converts the baseband signal of simulation into current signal;
Step 2, mixting circuit carries out mixing with the current signal of said voltage output with the LO signal, exports high linear mixture signal;
Step 3, range detector detect the amplitude of said high linear mixture signal, output detection signal;
Step 4, more said detection signal of comparison module and reference voltage signal, the output control signal is controlled the output current of said voltage,
Wherein in the step 1, said voltage comprises operational amplifier U10, nmos pass transistor M7, adjustable resistance R1, PMOS transistor M1, current source I1; The in-phase input end of said operational amplifier U10 meets the baseband signal BB_I_P of simulation, and inverting input meets current source I1, the grid of output termination nmos pass transistor M7; The source electrode of PMOS transistor M1 connects operational amplifier U10 and the crossing node of current source I1, and grounded drain, grid connect the source electrode of nmos pass transistor M7 and the end of adjustable resistance R1; The other end ground connection of adjustable resistance R1.
5. the frequency mixing method of the high-linearity upper frequency mixer that output voltage according to claim 4 is controlled is characterized in that: said adjustable resistance R1 is connected with control signal VCTRL, the resistance of regulating adjustable resistance R1 through the value that changes control signal VCTRL.
6. the frequency mixing method of the high-linearity upper frequency mixer that output voltage according to claim 4 is controlled is characterized in that: said mixting circuit comprises nmos pass transistor M2, M3; The source electrode of nmos pass transistor M2, M3 connects the drain electrode of nmos pass transistor M7; The grid of nmos pass transistor M2 meets LO signal LO_I_P, and drain electrode meets output voltage node OUTN; The grid of nmos pass transistor M3 meets LO signal LO_I_N, and drain electrode meets output voltage node OUTP.
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| WO2022171501A1 (en) * | 2021-02-10 | 2022-08-18 | International Business Machines Corporation | Low power transmitter for sensor arrays |
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| CN105207626B (en) * | 2015-10-27 | 2017-11-28 | 东南大学 | A kind of collapsible linear transconductance upconverter |
| CN112564720B (en) * | 2021-02-20 | 2021-06-01 | 杭州优智联科技有限公司 | UWB-based transmit pulse shaping circuit, transmit front end, transmit apparatus and method |
| CN113922831A (en) * | 2021-10-29 | 2022-01-11 | 上海力通通信有限公司 | Broadband radio frequency signal modulation circuit, equipment and radio frequency transmitter |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2022171501A1 (en) * | 2021-02-10 | 2022-08-18 | International Business Machines Corporation | Low power transmitter for sensor arrays |
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