CN101706835A - Method for designing micro/nano-scale nonstandard product structure - Google Patents
Method for designing micro/nano-scale nonstandard product structure Download PDFInfo
- Publication number
- CN101706835A CN101706835A CN200910155248A CN200910155248A CN101706835A CN 101706835 A CN101706835 A CN 101706835A CN 200910155248 A CN200910155248 A CN 200910155248A CN 200910155248 A CN200910155248 A CN 200910155248A CN 101706835 A CN101706835 A CN 101706835A
- Authority
- CN
- China
- Prior art keywords
- model
- design
- nano
- nonstandard
- micro
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Management, Administration, Business Operations System, And Electronic Commerce (AREA)
Abstract
The invention discloses a method for designing a micro/nano-scale nonstandard product structure. The method comprises the following steps: acquiring a device-level nonstandard three-dimensional structure through a two-dimensional layout of the nonstandard structure and a definition file of a manufacturing flow; establishing a complete finite element model, and mapping, extracting and describing the integral quality, rigidity and damping matrix of a system to acquire a system-level model; selecting a mode as an analysis object, and using an initial position or a test load as an input vector so as to acquire an output vector; based on the input/output vector, acquiring a system-level coarse-grained model through Lagrange interpolation; adjusting the granularity of the model, and mapping the matrix to low-dimensional space till the residual error meets the precision requirement so as to acquire a compact numerical value macro model; and after the design object meets the requirement, exporting layout information, and finishing the nonstandard product design. The method expands the design of simple devices limited in cell libraries to independent design supporting complex fantastic nonstandard products, and is favorable for improving the design quality and efficiency of the micro/nano-scale independent products.
Description
Technical field
The present invention relates to the product digitalized design method, especially relate to a kind of method for designing micro/nano-scale nonstandard product structure.
Background technology
Along with the development of micro-electronic mechanical system technique, in fields such as information communication, medical treatment biology, automobile, the design requirement of micro/nano-scale product structure is grown with each passing day.The design and manufacturing technology of integrated and compoundization of research micro-nano structure, significant for the competitive power that improves production field.
The micro/nano-scale product structure design is different from the macro-scale product structure design, and difference is that the former generally relates to scale effect and many coupled problems.Generally will be called macro-scale greater than the yardstick of 1mm, the yardstick of 1 μ m-1mm is called micro-meter scale, and the yardstick of 0.1nm-100nm is called nanoscale.The simplification hypothesis that adopts under the macro-scale is difficult to use in microcosmic and nanoscale.Scale effect relates to the heterogeneous body and the nonequilibrium behavior of physical system.Even and equilibrium response under the macro-scale just no longer keeps when the physical size of material reduces to micron dimension.Consequent problem is the related parameter that has that is difficult in definite micro-nano structure manufacture process, causes because the too high and unpractical end product of cost.The microscale effect is meant the spontaneous phenomenon that physical quantity is small along with the object structures size and change.At micro/nano-scale, the relative increase of effect of acting force that is directly proportional with the low power of characteristic dimension such as friction force, electrostatic force, surface tension, viscous force, elastic force, and relative the weakening of effect of acting force that is directly proportional with the high power of size such as inertial force, moment of inertia, electromagnetic force, therefore the subject group who has derived new, to characterize the constitutive relation of micro/nano-scale, and interpenetrate, intersect, extend, make many couplings become the inevitable requirement of micro-nano structure design.The physical model of each different phase can be described on given physical region by dissimilar time correlations or irrelevant partial differential equation respectively in the micro-nano structure design, by many couplings of field partial differential unified equation formula simulation of different field.
As seen, micro/nano-scale product design scale, design complexities are more and more higher, the simulation and analysis bottleneck that has become the restriction innovative design consuming time.On the other hand, existing micro/nano-scale product design is based on the parameterized units storehouse mostly, is difficult to realize the direct system level design of the complex devices of non-standard, Fei Kunei, has limited the independence and the novelty of product greatly.The macro-scale method for designing is difficult to be adapted to micro/nano-scale, and particularly nonstandard structure Design for addressing this problem, has provided a kind of micro/nano-scale nonstandard product structural approach.Re-assembly then by decomposing modeling, based on grand modeling to support the nonstandard product autonomous Design, can overcome on the one hand the grade emulation of method of existing finite element, finite difference and cross slow problem, significantly improve system-level design efficiency, can overcome the problem that to set up equivalent model to simple Devices of methods such as equivalent electrical circuit, lumped parameter on the other hand, significantly the expansion design scope.This micro/nano-scale product design for quick realization labyrinth is significant.
Summary of the invention
The object of the present invention is to provide the method for supporting the nonstandard product structural design under a kind of micro/nano-scale. along with extensiveization of micro/nano-scale product application and the variation of demand, nonstandard product continues to bring out, product design has been proposed requirements at the higher level. for this reason, having provided a kind of method for designing micro/nano-scale nonstandard product structure. the mixing together with accurate model and approximate model is a feature, on the basis of the design level of supporting the grand modeling of many granularities and flow process framework, the node of the perfect finite meta-model by device related with combination, the global matrix of descriptive system is extracted in mapping, the accurate model based on low order ordinary differential equation group of acquisition system. store large-scale sparse symmetric matrix by row one dimension mode variable bandwidth, introducing is the equivalent approximation method of feature with numerical fitting and matrix reduction, quick and precisely obtain the input/output relation of non-mark system, interface unit level model and system-level model, constantly iteration realizes product design. be designed to example with digital light processing micro mirror and carry out application verification, show that method proposed by the invention will be confined to that the design of simple Devices is extended to the autonomous Design of supporting complicated unusual nonstandard product in the cell library, the design that depends on single software is extended to the collaborative design of supporting heterogeneous software, and this is significant from the designing quality and the efficient of major product for improving micro/nano-scale.
To achieve these goals, the present invention adopts the step of technical scheme as follows:
The first step, the nonstandard three-dimensional structure of defined file acquisition device level of two-dimentional domain and manufacturing process by nonstandard structure, or directly import three-dimensional model, in device level, finish nonstandard three-dimensional structure design;
Second step, with nonstandard three-dimensional structure gridding, set up the perfect finite meta-model, obtain the integral rigidity matrix, mass matrix and the damping matrix that design a model;
The 3rd step, the unit of grid model and the node of unit are stored with the discrete point form, by the derivation introducting interface between software, the finite element grid data are used for the calculating of the grand modeling of many granularities, choosing mode is analytic target, with initial position or test load is input vector, obtains the output vector of non-mark system;
The 4th step, based on the input and output vector, carry out polynary repeatedly fitting of a polynomial by the Lagrange interpolation, obtain system-level coarseness model;
The 5th step, set the up-and-down boundary value, utilize the criterion reduced-order model matrix of contribution factor, calculate the basis function of maximum output amplitude greater than the coboundary correspondence, then be left in the basket less than lower boundary, matrix is mapped to lower dimensional space, realizes the depression of order of system matrix, obtain to compact the numerical value macro model by the design process iteration.
The 6th step fed back to simulation result in the product structure, and product structure is optimized repeatedly, after micro/nano-scale nonstandard product structure Design analytic target all satisfies accuracy requirement, domain was derived in downstream output, finished product design.
The nonstandard product structure has two characteristics: the one, and product structure that does not comprise in the cell library of design software and combination thereof, the 2nd, three-dimensional structure that the analytic model of many couplings is difficult to obtain and combination thereof.
Describedly finish nonstandard three-dimensional structure method for designing, the micro/nano-scale nonstandard product structure has two kinds of generation methods: the one, and generate three-dimensional model and carry out Boolean calculation by two-dimensional design figure and manufacturing process flow process and obtain, the 2nd, the introducting interface by design software obtains from external software.
The described perfect finite meta-model method of setting up has whole discrete volume mesh unit, load apply the position and direction must determine that earlier the size of load can be determined also can be uncertain, the boundary condition of load promptly retrains and must determine.
5, a kind of method for designing micro/nano-scale nonstandard product structure according to claim 1, it is characterized in that: described many granularities macro modeling method, based on the input and output vector, obtain system-level coarseness model by the Lagrange interpolation, with the second order differential equation group is the fine granularity model, mixing together with approximate model and accurate model is a feature, replaces analytic model and overcomes the problem that analytic model is difficult to obtain with numerical model.
Described input and output vector acquisition methods on the basis that micro/nano-scale nonstandard product structure Design analytical parameters is determined, applies excitation or observes its starting condition as input vector product, with the response of design analysis parameter as output vector.
The order reducing method of described system matrix, feature to large-scale sparse matrix is carried out yojan, obtains the key feature vector, extracts the crucial degree of freedom of design system, the reduction of order of matrix is to satisfy under the prerequisite of accuracy requirement, for the counting yield that increases substantially many couplings is carried out.
The described numerical value macro model acquisition methods that compacts, require the controlling Design precision by satisfying residual error, make the design process iteration, by rough grade to high precision, by approaching to self-defining up-and-down boundary, obtain the mathematical model that the interface unit level is designed into system level design, carry out system-level emulation to overcome system-level net table problem beyond expression of words with macro model.
The beneficial effect that the present invention has is:
(1) supports the nonstandard product system level design by the grand modeling of many granularities.Overcome the emulation difficult problem of the compositional modeling of non-standard device, the design of simple Devices is extended to the autonomous Design of supporting complicated unusual nonstandard product in the cell library with being confined to.
(2) obtain the numerical value macro model that compacts by model reduction process iteration.Obtain the satisfied demand of numerical value macro model by model reduction, under the prerequisite that guarantees computational accuracy, improved system-level design efficiency, help satisfying varigrained emulation demand the emulation of many granularities of complex devices.
(3) support the heterogeneous software collaborative design by the perfect finite meta-model.Macro model is based on the perfect finite meta-model, data have high correlation and isomery independence, strengthened the opening of this method, can carry out collaborative design, helped the expansion design ability and realize reusing and share existing design resource by heterogeneous software.
Description of drawings
The main design cycle of Fig. 1 method proposed by the invention.
The manufacturing process that Fig. 2 adopts when utilizing two-dimentional domain to generate three-dimensional model.
The system assumption diagram of the prototype system that Fig. 3 method proposed by the invention realizes.
Fig. 4 digital light is handled the finite element grid model of micro mirror.
Fig. 5 describes the dimension depression of order that digital light is handled the large-scale sparse symmetrical matrix of micromirror systems.
Fig. 6 digital light is handled the model analysis of micromirror systems.
The digital light of the 3*7 array that Fig. 7 designs is handled micromirror systems.
Embodiment
The present invention is further illustrated below in conjunction with drawings and Examples.
As shown in Figure 1, be the main design cycle of method proposed by the invention.Be called grand modeling from device level to the interface system-level.Macro model interface unit level model and system-level model.That micro-nano structure modeling level can be divided into is system-level, device level and process level design.
(1) system level design: user oriented requirement, study the global behavior characteristic and the performance of system emphatically, comprise Product Conceptual Design, formulate design proposal, for device level design provides foundation, the macro model that device layer is obtained is integrated into and carries out emulation in the system model, carries out system optimization according to simulation result.
(2) device level design: comprise device modeling, processing simulation, design of device mask layout and aspects such as comprehensive and device simulation.Its behavioral trait of mockup and physical characteristics according to device, mainly finish entity design, analysis and the optimization of micro-nano structure device, for technology, the layout design of device lays the foundation, and the behavior model of extraction device therefrom, carry out system-level behavior emulation again, with the checking design proposal.
(3) process level design: the final step before the device fabrication, the mask layout and the technical flow design that comprise device, technology definition based on solid model, domain based on entity generates and processing technology emulation, the parameter library of machining process is provided, as the mask thicknesses in the photoetching process, time shutter, the corrosion speed in the silicon corrosion process etc.
As shown in Figure 2, the manufacturing process that adopts when being the two-dimentional domain generation of utilization of the present invention three-dimensional model. the Boolean calculation that the micro/nano-scale three-dimensional model passes through voxel more realizes, 2.5 dimension volume element, between between two dimensional surface and three dimensions. by merging domain and parameterized procedure the true geometric model creation that realizes based on voxel is described, and it is visual to the geometric model of each process correspondence. use Virtual Manufacture to design snapshot, before manufacturing, carry out manufacturability and discharge corrosion check.
As shown in Figure 3, be the system assumption diagram of the prototype system of method realization proposed by the invention.Prototype system is the geometric modeling kernel with the ACIS R13 of U.S. Spatial company, HOOPSV11.0 with Tech Soft America is collaborative visualization component, adopt the exploitation of Microsoft Visual C++.net 2003 and Microsoft SQLServer 2000 programming tools, to expand the three dimension system function.Prototype system adopts many many views of document frameworks, by the case mechanism and the message transmission of multithreading, strengthens the executed in parallel ability of each module; By being that a document class object adds a plurality of view objects, the expansion three-dimensional is browsed ability.The function that prototype system has has: three-dimensional modeling, derivation geological information; Seating surface is to the design of making, derivation machining information; Seating surface is to the complex devices design and the innovative design of function; The database of support material characteristic.
As shown in Figure 4, be the finite element grid model that digital light of the present invention is handled micro mirror.Obtain whole unit and nodal information by grid dividing software, can import in the prototype system by data-interface and handle.When discrete point set is imported to prototype system, use SPAposition point[k] storage discrete grid block node, when system carries and divides mesh module and carry out discretize, can and obtain assignment element number m (m≤k+1) to the point assignment, if import the grid dividing data of other software, can be by pointer to the point assignment, but obtaining of m depends on assignment procedure, for this reason, system is become more meticulous and the abstract operation, use vector Dynamic Array container class, i.e. vector＜SPAposition〉point, obtain m by the general type pointer of container iterator, make obtaining of m be independent of assignment procedure, only depend on array itself, avoid problem simultaneously, the robustness during the importing and exporting of the division grid of enhanced system because of the excessive Array Bound of m.
Described is on the B-Rep of three-dimensional model data structure with device three-dimensional model body gridding method, optimizes structure based on the Delaunay space lattice, and the structure discrete grid block is realized in the enclosure space that all curved surfaces are formed.
As shown in Figure 5, be the dimension depression of order that the description of the invention digital light is handled the large-scale sparse symmetrical matrix of micromirror systems.Adopt semilog coordinate, to dwindle the drawing scope, transverse axis is the iteration step of calculating, and the longitudinal axis is the common logarithm value of residual error.Many granularities model is divided into accurate model and approximate model, and the former is expressed as core with the parametrization of parsingization, and the latter is a core with the equivalent depression of order that quantizes.Mixing together with accurate model and approximate model is a feature, with numerical fitting and matrix reduction is the equivalent approximation method of feature, quick and precisely obtain the input/output relation of non-mark system, interface unit level model and system-level model, constantly iteration realizes product design.The multinomial interpolation is to utilize given interpolation node group and function (derivative) value of multivariate function at the node place to construct a multinomial function to represent these multivariate function approx, and these two functions are obtained identical function (derivative) value at the node place.Utilization is based on the GMRES depression of order algorithm implementation model depression of order of Krylov subspace, derives the low accuracy model of a simplification from the high precision model, reduces the exponent number or the state dimension of product process model, with the complexity of simplified design system.The finite element of coupled field is directly analyzed consuming time unusually, with the depression of order modeling method physical coupling system is expressed, and obtains its static state and dynamic response fast and accurately.As can be known, the granularity difference of grand modeling, the input/output relation that system-level emulation obtains is also different, and maximum norm residual error 3.3e-5 meets the demands.
Described order reducing method, be meant by the minimum residue (GMRES of broad sense, Generalized MinimalResiduals) utilizing the vector that least residual is arranged in the Krylov subspace to approach separates, matrix of coefficients is converted into the Hessenberg matrix, obtain the dimensionality reduction matrix, the second order differential equation group is converted into system of linear equations Ax=b finds the solution realization, step is as follows:
The first step is for finding the solution Ax=b, initialization x
(0), A is a matrix of coefficients;
In second step, try to achieve initial residual error σ
(0)=b-Ax
(0)
In the 3rd step, iteration carried out for the 4th step up to the j residual error σ in step
(j)＜λ, λ is for setting numerical value certainly;
In the 4th step, make x
(j)∈ x
(0)+ κ
j(A, σ
(0)), make the mould minimum of the residual error in j step, i.e. minnize|| σ
(j)||
2, wherein, the Krylov subspace κ in j step
j(A, σ
(0)) form κ by the base of a series of continuous generations
j(A, σ
(0)) ≡ span{ σ
(0), A σ
(0), A
2σ
(0)..., A
J-1σ
(0);
In the 5th step, ask tensor space κ
j(A, σ
(0)) ≡ span{ σ
(0), A σ
(0), A
2σ
(0)..., A
J-1σ
(0)Orthonormal basis;
The 6th step, according to the needs of many granularities depression of order, former rank in the choice criteria orthogonal basis, the depression of order matrix A of projection formation coefficient matrices A '.
As shown in Figure 6, be the model analysis that digital light of the present invention is handled micromirror systems.In the iterative process that many granularities are found the solution, test load comprises 2 unified pressure loads that are equivalent to the static pressure of initial position.Unit load is the 9.81m/s along the Z direction
2Acceleration and the unified 1MPa pressure load that is applied to the micro mirror upper limb.Pick-up voltage is 796 volts.Torsion mode is the horizontal mode along the Z direction, makes the mode of plate distortion.The acquisition mode amplitude and the status of a sovereign are moved the variation with voltage.The macro model that obtains is used for system level design, obtains minute surface point voltage variation relation in time.With micro mirror mode is the design analysis object, and the natural frequency that obtains the 1st rank, the 3rd rank and the 5th rank is respectively 39008HZ, 59873HZ and 243361HZ, and its contribution rate to the mode assignment accounts for 81.58%, 17.27% and 1.09% respectively.
As shown in Figure 7, be the digital light processing micromirror systems of the 3*7 array of designing of the present invention.Final micro-mirror structure is to form on the basis of continuing to optimize, and the micro mirror unit as the part of complicated micro mirror array is used for light deflection field.The bistable state digital micro-mirror that is designed to has non-reflection attitude and reflection attitude.In non-reflection attitude, micro mirror leaves light path to be passed through to allow light.In the reflection attitude, micro mirror moves or is turned in the light path, changes beam direction by reflection.All micro mirror arrays comprise a plurality of independent by synchronously driven micro mirror band, to obtain high-speed light deflection.Each band of micro mirror unit all is connected to silicon chip surface by the dagger of two centres.This product structure has satisfied different design requirements by the multiple degrees of freedom of micromirror.
Claims (8)
1. method for designing micro/nano-scale nonstandard product structure is characterized in that:
The first step, the nonstandard three-dimensional structure of defined file acquisition device level of two-dimentional domain and manufacturing process by nonstandard structure, or directly import three-dimensional model, in device level, finish nonstandard three-dimensional structure design;
Second step, with nonstandard three-dimensional structure gridding, set up the perfect finite meta-model, obtain the integral rigidity matrix, mass matrix and the damping matrix that design a model;
The 3rd step, the unit of grid model and the node of unit are stored with the discrete point form, by the derivation introducting interface between software, the finite element grid data are used for the calculating of the grand modeling of many granularities, choosing mode is analytic target, with initial position or test load is input vector, obtains the output vector of non-mark system;
The 4th step, based on the input and output vector, carry out polynary repeatedly fitting of a polynomial by the Lagrange interpolation, obtain system-level coarseness model;
The 5th step, set the up-and-down boundary value, utilize the criterion reduced-order model matrix of contribution factor, calculate the basis function of maximum output amplitude greater than the coboundary correspondence, then be left in the basket less than lower boundary, matrix is mapped to lower dimensional space, realizes the depression of order of system matrix, obtain to compact the numerical value macro model by the design process iteration;
The 6th step fed back to simulation result in the product structure, and product structure is optimized repeatedly, after micro/nano-scale nonstandard product structure Design analytic target all satisfies accuracy requirement, domain was derived in downstream output, finished product design.
2. a kind of method for designing micro/nano-scale nonstandard product structure according to claim 1, it is characterized in that: the nonstandard product structure has two characteristics: the one, and product structure that does not comprise in the cell library of design software and combination thereof, the 2nd, three-dimensional structure that the analytic model of many couplings is difficult to obtain and combination thereof.
3. a kind of method for designing micro/nano-scale nonstandard product structure according to claim 1, it is characterized in that: describedly finish nonstandard three-dimensional structure method for designing, the micro/nano-scale nonstandard product structure has two kinds of generation methods: the one, and generate three-dimensional model and carry out Boolean calculation by two-dimensional design figure and manufacturing process flow process and obtain, the 2nd, the introducting interface by design software obtains from external software.
4. a kind of method for designing micro/nano-scale nonstandard product structure according to claim 1, it is characterized in that: the described perfect finite meta-model method of setting up, has whole discrete volume mesh unit, the applying position and direction and must determine earlier of load, the size of load can be determined also can be uncertain, and the boundary condition of load promptly retrains and must determine.
5. a kind of method for designing micro/nano-scale nonstandard product structure according to claim 1, it is characterized in that: described many granularities macro modeling method, based on the input and output vector, obtain system-level coarseness model by the Lagrange interpolation, with the second order differential equation group is the fine granularity model, mixing together with approximate model and accurate model is a feature, replaces analytic model and overcomes the problem that analytic model is difficult to obtain with numerical model.
6. a kind of method for designing micro/nano-scale nonstandard product structure according to claim 1, it is characterized in that: described input and output vector acquisition methods, on the basis that micro/nano-scale nonstandard product structure Design analytical parameters is determined, product is applied excitation or observes its starting condition as input vector, with the response of design analysis parameter as output vector.
7. a kind of method for designing micro/nano-scale nonstandard product structure according to claim 1, it is characterized in that: the order reducing method of described system matrix, feature to large-scale sparse matrix is carried out yojan, obtain the key feature vector, extract the crucial degree of freedom of design system, the reduction of order of matrix is to satisfy under the prerequisite of accuracy requirement, for the counting yield that increases substantially many couplings is carried out.
8. a kind of method for designing micro/nano-scale nonstandard product structure according to claim 1, it is characterized in that: the described numerical value macro model acquisition methods that compacts, require the controlling Design precision by satisfying residual error, make the design process iteration, by rough grade to high precision, by to the approaching of self-defining up-and-down boundary, obtain the mathematical model that the interface unit level is designed into system level design, carry out system-level emulation to overcome system-level net table problem beyond expression of words with macro model.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910155248A CN101706835A (en) | 2009-12-10 | 2009-12-10 | Method for designing micro/nano-scale nonstandard product structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910155248A CN101706835A (en) | 2009-12-10 | 2009-12-10 | Method for designing micro/nano-scale nonstandard product structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101706835A true CN101706835A (en) | 2010-05-12 |
Family
ID=42377060
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200910155248A Pending CN101706835A (en) | 2009-12-10 | 2009-12-10 | Method for designing micro/nano-scale nonstandard product structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101706835A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102306155A (en) * | 2011-06-30 | 2012-01-04 | 深圳市五巨科技有限公司 | Realizing method of dynamic array type based on universal mobile terminal development platform |
| WO2014043844A1 (en) * | 2012-09-18 | 2014-03-27 | Lu Ming | Method for building flight icing reduced-order model in flight simulator |
| CN107145631A (en) * | 2017-04-06 | 2017-09-08 | 浙江大学 | A kind of piecemeal linkage design method of customed product non-standard component partial structurtes |
| CN113066523A (en) * | 2021-04-16 | 2021-07-02 | 上海交通大学 | Lepidoptera micro-nano structure unified characterization method and system based on space trigonometric function |
-
2009
- 2009-12-10 CN CN200910155248A patent/CN101706835A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102306155A (en) * | 2011-06-30 | 2012-01-04 | 深圳市五巨科技有限公司 | Realizing method of dynamic array type based on universal mobile terminal development platform |
| WO2014043844A1 (en) * | 2012-09-18 | 2014-03-27 | Lu Ming | Method for building flight icing reduced-order model in flight simulator |
| CN107145631A (en) * | 2017-04-06 | 2017-09-08 | 浙江大学 | A kind of piecemeal linkage design method of customed product non-standard component partial structurtes |
| CN107145631B (en) * | 2017-04-06 | 2019-06-14 | 浙江大学 | A kind of piecemeal linkage design method of customed product non-standard component partial structurtes |
| CN113066523A (en) * | 2021-04-16 | 2021-07-02 | 上海交通大学 | Lepidoptera micro-nano structure unified characterization method and system based on space trigonometric function |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Chinesta et al. | Virtual, digital and hybrid twins: a new paradigm in data-based engineering and engineered data | |
| Overby et al. | ADMM $\supseteq $ projective dynamics: Fast simulation of hyperelastic models with dynamic constraints | |
| Sulsky et al. | Implicit dynamics in the material-point method | |
| Washabaugh et al. | On the use of discrete nonlinear reduced-order models for the prediction of steady-state flows past parametrically deformed complex geometries | |
| Choi et al. | SNS: A solution-based nonlinear subspace method for time-dependent model order reduction | |
| US11763048B2 (en) | Computer simulation of physical fluids on a mesh in an arbitrary coordinate system | |
| CN112182938A (en) | Mesoscopic structural part mechanical property prediction method based on transfer learning-multi-fidelity modeling | |
| CN101706835A (en) | Method for designing micro/nano-scale nonstandard product structure | |
| US20210173979A1 (en) | Geometrical Dimensionality Control in Optimization | |
| Washabaugh | Faster fidelity for better design: A scalable model order reduction framework for steady aerodynamic design applications | |
| Xiao et al. | Interrogation of spline surfaces with application to isogeometric design and analysis of lattice-skin structures | |
| Gallivan et al. | Model reduction and the solution of Sylvester equations | |
| Nikishkov et al. | An analytical-numerical alternating method for elastic-plastic analysis of cracks | |
| Dogančić et al. | Discretization and model reduction error estimation of interconnected dynamical systems | |
| CN104361633A (en) | Data-dependent physically-real restoration method of object deformation sequences | |
| El Halabi et al. | Multiparametric response surface construction by means of proper generalized decomposition: An extension of the PARAFAC procedure | |
| Roe | Compounded of many simples | |
| Uekermann et al. | Coupling Algorithms for Partitioned Multi-Physics Simulations. | |
| Buljak et al. | Efficient methods for optimal space filling in model reduction techniques | |
| CN117252130B (en) | Near-field pressure distribution prediction method, system and related equipment for aircraft | |
| Gounley et al. | Response and recovery times of elastic and viscoelastic capsules in shear flow | |
| Clark | Reliability-Based Topology Optimization with Analytic Sensitivities | |
| Shabana | Modeling of Flexible Bodies | |
| Charest et al. | A High-Order Finite-Volume Method for Compressible Flows on Moving Tetrahedral Grids | |
| Rush | Real-Time Simulation of Fluid Flow Based on Sensor Data Using ODE Constrained Optimization |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Open date: 20100512 |