CN101673015B - Active-element array substrate and display panel - Google Patents
Active-element array substrate and display panel Download PDFInfo
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- CN101673015B CN101673015B CN2009102041842A CN200910204184A CN101673015B CN 101673015 B CN101673015 B CN 101673015B CN 2009102041842 A CN2009102041842 A CN 2009102041842A CN 200910204184 A CN200910204184 A CN 200910204184A CN 101673015 B CN101673015 B CN 101673015B
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Abstract
The invention discloses a display panel comprising an active-element array substrate, a counter substrate and a display medium, wherein the active-element array substrate comprises a substrate, a plurality of scanning wires, a plurality of data wires, a plurality of pixel cells and a plurality of data signal transmission wires; the scanning wires and the data wires define a plurality of pixel regions on the substrate; the pixel cells are respectively allocated in the corresponding pixel regions, and each pixel cell comprises a plurality of pixel subcells; the pixel subcells in one pixel cell are electrically connected with one data wire and respectively electrically connected with one corresponding scanning wire; the data signal transmission wires are respectively electrically connected with one corresponding data wire; and the extension direction of the data signal transmission wires is essentially parallel to the extension direction of the scanning wires.
Description
Technical field
The present invention relates to a kind of active component array base board and display panel, and particularly relevant for a kind of active component array base board and display panel with narrow edge (slim border).
Background technology
Generally speaking, display panel is to be made up of active component array base board, subtend substrate and display medium.When making active cell array, can make simultaneously and chip-glass joint technology or perimeter circuit that chip-the film joint technology matches in the non-display area (neighboring area) of active component array base board usually.
Fig. 1 is the schematic top plan view of known a kind of active component array base board.Fig. 2 is the local enlarged diagram of the active component array base board of Fig. 1.Please with reference to Fig. 1 and Fig. 2, active component array base board 101 comprises substrate 110, multi-strip scanning line 122, many data lines 132, a plurality of pixel cell 140 and chip for driving 150.Substrate 110 has viewing area 112 and non-display area 114, and wherein non-display area 114 is positioned at viewing area 112 peripheries and has edge 114a, 114b.Multi-strip scanning line 122 is interlaced with each other with many data lines 132, is positioned at a plurality of pixel cells 140 of viewing area 112 with formation.Chip for driving 150 is arranged in the non-display area 114 of substrate 110, and sweep trace 122 and data line 132 and chip for driving 150 electric connections.Especially, many data lines 132 through the viewing area about in the of 112 the edge 114b of both sides carry out the cabling layout (wire routing) of perimeter circuit, to be electrically connected at chip for driving 150.
For instance; Utilizing three primary colors (RGB) to carry out in colourity adjustment and the display panel of resolution for demonstration drawing array (VGA) 640 * 480; The sweep trace 122 of above-mentioned active component array base board 101 has 480 (G1, G2, G3...G480); And data line 132 has 1920 (640 * 3=1920, S1, S2, S3...S1920).Therefore, the viewing area about in the of 112 one of them of both sides edge 114b must have enough spaces, carry out the cabling layout of perimeter circuit so that 960 (1920/2=960) data lines 132 to be provided respectively.In other words, active component array base board 101 must have enough edge width W, so that data line 132 electrically connects with chip for driving 150.At this, the edge width W of active component array base board 101 for example is greater than 1.2 centimeters.
Yet, because many application of display panel are gradually towards light, thin, short, little trend, as: electronic products such as mobile phone, digital camera.Therefore, how to reduce the edge width W of active component array base board 101, to improve the portability of electronic product, real is a current problem that needs to be resolved hurrily.
Summary of the invention
The present invention provides a kind of active component array base board, and it has narrow edge, can improve space availability ratio.
The present invention provides a kind of display panel again, and it has said active element array substrate, can reduce manufacturing cost, increase the product portability.
The present invention proposes a kind of display panel, and it comprises active component array base board, subtend substrate and display medium.Active component array base board comprises substrate, multi-strip scanning line, many data lines, a plurality of pixel cell and many data-signal transfer lines.The multi-strip scanning line parallel is disposed on the substrate.Many data line configured in parallel are on substrate, and wherein multi-strip scanning line and many data lines are interlaced with each other, on substrate, to define a plurality of pixel regions.Each pixel cell is disposed at respectively in the corresponding pixel region; Each pixel cell comprises a plurality of sub-pixel unit; And a plurality of sub-pixel unit in the same pixel cell and same data line electrically connect, and each sub-pixel unit in the same pixel cell electrically connects with a corresponding sweep trace respectively.Many the data-signal transfer line is disposed on the substrate, and wherein each data-signal transfer line electrically connects with a corresponding data line respectively, and the bearing of trend of data-signal transfer line is parallel in fact with the bearing of trend of sweep trace.The subtend substrate is disposed at the active component array base board top.Display medium is disposed between subtend substrate and the active component array base board.
In one embodiment of this invention, the bearing of trend of above-mentioned sweep trace is in fact perpendicular to the bearing of trend of data line.
In one embodiment of this invention, the quantity of above-mentioned data-signal transfer line is less than the quantity of sweep trace.
In one embodiment of this invention, above-mentioned each data-signal transfer line lays respectively between the pixel cell of adjacent two row.
In one embodiment of this invention, above-mentioned each data-signal transfer line lays respectively between the sub-pixel unit of adjacent two row.
In one embodiment of this invention; Aforesaid substrate have the viewing area and with the non-display area of viewing area adjacency; A plurality of pixel cells are disposed in the viewing area, and multi-strip scanning line, many data lines and many data-signal transfer lines extend to non-display area from the viewing area.
In one embodiment of this invention, above-mentioned active component array base board more comprises the chip for driving that is disposed on the non-display area, and wherein chip for driving and multi-strip scanning line, many data lines and many data-signal transfer lines electrically connect.
In one embodiment of this invention; Above-mentioned active component array base board more comprises the integrated gate driver circuit (GOA) that is disposed on the non-display area, and wherein integrated gate driver circuit and multi-strip scanning line, many data lines and many data-signal transfer lines electrically connect.
In one embodiment of this invention, above-mentioned chip for driving and integrated gate driver circuit are positioned at the same side of pixel cell.
In one embodiment of this invention, above-mentioned chip for driving and integrated gate driver circuit are positioned at the not homonymy of pixel cell.
The present invention proposes a kind of active component array base board again, comprises substrate, multi-strip scanning line, many data lines, a plurality of pixel cell and many data-signal transfer lines.The multi-strip scanning line parallel is disposed on this substrate.Many data line configured in parallel are on substrate, and wherein multi-strip scanning line and many data lines are interlaced with each other, on substrate, to define a plurality of pixel regions.Each pixel cell is disposed at respectively in the corresponding pixel region; Each pixel cell comprises a plurality of sub-pixel unit; And a plurality of sub-pixel unit in the same pixel cell and same data line electrically connect, and each sub-pixel unit in the same pixel cell electrically connects with a corresponding sweep trace respectively.Many the data-signal transfer line is disposed on the substrate, and wherein each data-signal transfer line electrically connects with a corresponding data line respectively, and the bearing of trend of data-signal transfer line is parallel in fact with the bearing of trend of sweep trace.
Based on above-mentioned, because active component array base board of the present invention has unique line design, so the present invention can reduce the edge width, and then improves space availability ratio.In addition, because display panel of the present invention has said active element array substrate, so the present invention can reduce manufacturing cost and increase the product portability.
For letting the above-mentioned feature and advantage of the present invention can be more obviously understandable, hereinafter is special lifts embodiment, and cooperates appended accompanying drawing to elaborate as follows.
Description of drawings
Fig. 1 is the schematic top plan view of known a kind of active component array base board;
Fig. 2 is the local enlarged diagram of the active component array base board of Fig. 1;
Fig. 3 is the synoptic diagram of the display panel of one embodiment of the invention;
Fig. 4 is in the display panel of Fig. 3, the schematic top plan view of active component array base board;
Fig. 5 is the local schematic top plan view of Fig. 4;
Fig. 6 is the local enlarged diagram of Fig. 5;
Fig. 7 is the local enlarged diagram of the active component array base board of another embodiment of the present invention;
Fig. 8 is the schematic top plan view of the active component array base board of one embodiment of the invention;
Fig. 9 is the schematic top plan view of the active component array base board of one embodiment of the invention.
Wherein, Reference numeral
101,201,301,401: active component array base board 110,210: substrate
112,212: viewing area 114,214: non-display area
114a, 114b, 214a, 214b: edge 122,222, G1, G2, G3...G1440:
Sweep trace
132,232, S1, S2, S3...S1920: data line 140,240: pixel cell
150,250: chip for driving 200: display panel
203: subtend substrate 205: display medium
212a: pixel region 242a, 242b, 242c: sub-pixel unit
260: data-signal transfer line 370: integrated gate driver circuit
W: edge width
Embodiment
Fig. 3 is the synoptic diagram of the display panel of one embodiment of the invention.Please with reference to Fig. 3, display panel 200 comprises active component array base board 201, subtend substrate 203 and display medium 205.Subtend substrate 203 is disposed at active component array base board 201 tops.Display medium 205 is disposed between subtend substrate 203 and the active component array base board 201.Display panel 200 for example is display panels, electrophoresis type display panel or other display panels.Subtend substrate 203 for example is a colored optical filtering substrates, and display medium 205 then for example is liquid crystal layer or other material.In the present embodiment, display panel 200 for example is the display panel of a kind of horizontal demonstration (Landscape viewing).
Fig. 4 is in the display panel of Fig. 3, the schematic top plan view of active component array base board.Fig. 5 is the local schematic top plan view of Fig. 4.Fig. 6 is the local enlarged diagram of Fig. 5.Please with reference to Fig. 4, Fig. 5 and Fig. 6, further, active component array base board 201 comprises substrate 210, multi-strip scanning line 222, many data lines 232, a plurality of pixel cell 240 and many data-signal transfer lines 260.
In the present embodiment, substrate 210 have viewing area 212 and with the non-display area 214 of viewing area 212 adjacency.With regard to the active component array base board 201 that Fig. 4 illustrated, non-display area 214 comprises the edge 214b of edge 214a and the viewing area both sides about in the of 212 in 212 left sides, viewing area.Wherein, a plurality of pixel cells 240 are disposed in the viewing area 212, and multi-strip scanning line 222, many data lines 232 and many data-signal transfer lines 260 212 extend to non-display area 214 from the viewing area.
More detailed; Each pixel cell 240 is disposed at respectively in the corresponding pixel region 212a; Each pixel cell 240 comprises three sub-pixel elements 242a, 242b, 242c; And three sub-pixel elements 242a in the same pixel cell 240,242b, 242c and same data line 232 electrically connect, and same pixel cell 240 interior each sub-pixel unit 242a, 242b, 242c electrically connect with a corresponding sweep trace 222 respectively. Sub-pixel unit 242a, 242b, 242c for example can correspond respectively to redness, green, blue color color filtering optical layer (not illustrating), demonstrate the color of different colourities with collocation.In brief, active component array base board 201 is the active component array base board that a kind of three grids (Tri-Gate) structure drives.
Because three sub-pixel elements 242a, 242b, 242c in the same pixel cell 240 are that shared same data line 232 transmits pairing data-signal, under this kind structure, the quantity of sweep trace 222 increases, and the quantity of data line 232 is then reduced.The quantity of the source driving chip (not illustrating) that in other words, engages with active component array base board 201 can reduce effectively.Because the cost of source driving chip is comparatively expensive, the use amount that therefore reduces source driving chip helps to save cost.On the other hand, because the handled signal of source driving chip is comparatively complicated, power consumption is higher, so the quantity of source driving chip is few more, then active component array base board 201 power savings more.
Please continue with reference to Fig. 3, Fig. 4, Fig. 5 and Fig. 6; Many data-signal transfer line 260 is disposed on the substrate 210; Wherein each data-signal transfer line 260 electrically connects with a corresponding data line 232 through corresponding tie point (Node) or contact plunger (Contact plug) respectively, and the bearing of trend of data-signal transfer line 260 is parallel in fact with the bearing of trend of sweep trace 222.At this, data-signal transfer line 260 for example can adopt the configuration of multiple layer metal layer, is arranged at the top of sweep trace 222, so, can avoid the aperture opening ratio of display panel 200 to be affected.In addition, active component array base board 201 more comprises the chip for driving 250 that is disposed on the non-display area 214, and wherein chip for driving 250 electrically connects with multi-strip scanning line 222, many data lines 232 and many data-signal transfer lines 260.
In the present embodiment, the quantity of data-signal transfer line 260 is less than the quantity of sweep trace 222.That is to say that only partial data line 232 connects with data-signal transfer line 260.In part embodiment, the quantity of data-signal transfer line 260 for example is 1/3rd or 2/3rds of data line 232 quantity.
For instance, the resolution of display panel 200 is demonstration drawing array (VGA) 640 * 480, and active component array base board 201 is to use three above-mentioned grid structures to drive.Therefore, the data line 232 of active component array base board 201 has 640 (S1, S2, S3...S640), and sweep trace 222 has 1440 (480 * 3=1440, G1, G2, G3...G1440).In the present embodiment, each data-signal transfer line 260 for example is to lay respectively between the pixel cell 240 of adjacent two row, and the quantity of data-signal transfer line 260 has 480 (TGP1, TGP2...TGP480).Because data line 232 can be electrically connected at chip for driving 250 through data-signal transfer line 260; Therefore; In the non-display area 214 of active component array base board 201, only there are 160 (640-480=160) data lines 232 need carry out the cabling layout of perimeter circuit.In other words, active component array base board about in the of 201 two edge 214b one of them, only need carry out the cabling layout of 80 (160/2=80) data lines 232.
Through above-mentioned line design, the active component array base board 201 of present embodiment, its edge width W can be less than 1 millimeter.That is to say that compared to known active component array base board 101, active component array base board 201 can have narrower edge 214b, and then the room for promotion utilization factor.Thus, use the product of active component array base board 201, it can have preferable portability.
Fig. 7 is the local enlarged diagram of the active component array base board of another embodiment of the present invention.Please refer to Fig. 7, in another embodiment, each data-signal transfer line 260 of active component array base board 201 also can lay respectively between the sub-pixel unit 242 of adjacent two row.In other words, the quantity of data-signal transfer line 260 can further increase, thereby reduces the needed edge width W of data line 232 cablings, even can all data lines 232 be connected data-signal transfer line 260, and reaches the effect of no frame.
In part embodiment, the quantity of data-signal transfer line 260 and data line 232 can be for equating that promptly data line 232 can utilize data-signal transfer line 260 and chip for driving 250 to electrically connect fully.In other words, active array substrate 201 can further reduce the edge width W again, to obtain better space availability ratio.Yet above-mentioned being merely illustrates, and the present invention is the quantity and the position of restricting data signal transfer line 260 not, and this area has common knowledge the knowledgeable, when the quantity and the position of the transfer line of the logarithm number of it is believed that optionally 260 change.
Fig. 8 is the schematic top plan view of the active component array base board of one embodiment of the invention.Please with reference to Fig. 8, active component array base board 301 has all members of above-mentioned active component array base board 201, and wherein identical member is represented with identical label, no longer repeated at this.
Particularly; Active component array base board 301 more comprises integrated gate driver circuit (the Gate Driver On Array that is disposed on the non-display area 214; GOA) 370, wherein integrated gate driver circuit 370 electrically connects with multi-strip scanning line 222, many data lines 232 and many data-signal transfer lines 260.Here be noted that in said active element array substrate 201 quantity of sweep trace 222 increases because the quantity of data line 232 reduces, so the demand of grid drive chip (not illustrating) will improve.Therefore, in active component array base board 301, the setting of integrated gate driver circuit 370 can help to reduce sweep trace 222 employed grid drive chip quantity, and then reduces manufacturing cost.
At this, chip for driving 250 is the same sides that are positioned at pixel cell 240 with integrated gate driver circuit 270, but, the invention is not restricted to this.In other embodiment, active component array base board 401 as shown in Figure 9, chip for driving 250 also can be the not homonymy that is positioned at pixel cell 240 with integrated gate driver circuit 370, the consideration during this part viewable design is adjusted.
In sum; Active component array base board of the present invention has unique line design; Therefore it has reduced the quantity of data line and source driving chip, and active component array base board of the present invention has narrow edge at least, space availability ratio is good and advantage such as low power consumption.In addition, because display panel of the present invention has said active element array substrate, so the present invention can reduce manufacturing cost, increase the product portability.
Certainly; The present invention also can have other various embodiments; Under the situation that does not deviate from spirit of the present invention and essence thereof; Those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (18)
1. a display panel is characterized in that, comprising:
One active component array base board has one or three grid structures, and this active component array base board comprises:
One substrate, this substrate have a viewing area and one and the non-display area of this viewing area adjacency;
The multi-strip scanning line, configured in parallel is on this substrate;
Many data lines, configured in parallel are on this substrate, and wherein said sweep trace and said data line are interlaced with each other, on this substrate, to define a plurality of pixel regions;
A plurality of pixel cells; Be disposed in this viewing area on this substrate; Wherein each said pixel cell is disposed at respectively in the corresponding pixel region; Each said pixel cell comprises three sub-pixel elements, and the said sub-pixel unit in the same pixel cell and same data line electrically connect, and each the said sub-pixel unit in the same pixel cell electrically connects with a corresponding sweep trace respectively;
Many data-signal transfer lines; Be disposed on this substrate in this viewing area; And the bearing of trend of said data-signal transfer line is parallel in fact with the bearing of trend of said sweep trace, and wherein each bar data line electrically connects with corresponding said data-signal transfer line respectively;
One subtend substrate is disposed at this active component array base board top; And
One display medium is disposed between this subtend substrate and this active component array base board.
2. display panel according to claim 1 is characterized in that, the bearing of trend of said sweep trace is in fact perpendicular to the bearing of trend of said data line.
3. display panel according to claim 1 is characterized in that, the quantity of said data-signal transfer line is less than the quantity of said sweep trace.
4. display panel according to claim 3 is characterized in that, each said data-signal transfer line lays respectively between the sub-pixel unit of adjacent two row.
5. display panel according to claim 1 is characterized in that, said sweep trace, said data line and said data-signal transfer line extend to this non-display area from this viewing area.
6. display panel according to claim 5; It is characterized in that; This active component array base board comprises that also one is disposed at the chip for driving on this non-display area, and wherein this chip for driving and said sweep trace, said data line and said data-signal transfer line electrically connect.
7. display panel according to claim 5; It is characterized in that; This active component array base board comprises that also one is disposed at the integrated gate driver circuit on this non-display area, and wherein this integrated gate driver circuit and said sweep trace, said data line and said data-signal transfer line electrically connect.
8. display panel according to claim 7 is characterized in that, this chip for driving and this integrated gate driver circuit are positioned at the same side of said pixel cell.
9. display panel according to claim 7 is characterized in that, this chip for driving and this integrated gate driver circuit are positioned at the not homonymy of said pixel cell.
10. an active component array base board has one or three grid structures, it is characterized in that, comprising:
One substrate, this substrate have a viewing area and one and the non-display area of this viewing area adjacency;
The multi-strip scanning line, configured in parallel is on this substrate;
Many data lines, configured in parallel are on this substrate, and wherein said sweep trace and said data line are interlaced with each other, on this substrate, to define a plurality of pixel regions;
A plurality of pixel cells; Be disposed in this viewing area on this substrate; Wherein each said pixel cell is disposed at respectively in the corresponding pixel region; Each said pixel cell comprises three sub-pixel elements, and the said sub-pixel unit in the same pixel cell and same data line electrically connect, and each the said sub-pixel unit in the same pixel cell electrically connects with a corresponding sweep trace respectively; And
Many data-signal transfer lines; Be disposed on this substrate in this viewing area; And the bearing of trend of said data-signal transfer line is parallel in fact with the bearing of trend of said sweep trace, and wherein each bar data line electrically connects with corresponding said data-signal transfer line respectively.
11. active component array base board according to claim 10 is characterized in that, the bearing of trend of said sweep trace is in fact perpendicular to the bearing of trend of said data line.
12. active component array base board according to claim 10 is characterized in that, the quantity of said data-signal transfer line is less than the quantity of said sweep trace.
13. active component array base board according to claim 12 is characterized in that, each said data-signal transfer line lays respectively between the sub-pixel unit of adjacent two row.
14. active component array base board according to claim 10 is characterized in that, said sweep trace, said data line and said data-signal transfer line extend to this non-display area from this viewing area.
15. active component array base board according to claim 14 is characterized in that, comprises that also one is disposed at the chip for driving on this non-display area, wherein this chip for driving and said sweep trace, said data line and said data-signal transfer line electrically connect.
16. active component array base board according to claim 14; It is characterized in that; Comprise that also one is disposed at the integrated gate driver circuit on this non-display area, wherein this integrated gate driver circuit and said sweep trace, said data line and said data-signal transfer line electrically connect.
17. active component array base board according to claim 16 is characterized in that, this chip for driving and this integrated gate driver circuit are positioned at the same side of said pixel cell.
18. active component array base board according to claim 16 is characterized in that, this chip for driving and this integrated gate driver circuit are positioned at the not homonymy of said pixel cell.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2009102041842A CN101673015B (en) | 2009-10-19 | 2009-10-19 | Active-element array substrate and display panel |
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| CN2009102041842A CN101673015B (en) | 2009-10-19 | 2009-10-19 | Active-element array substrate and display panel |
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| CN101673015A CN101673015A (en) | 2010-03-17 |
| CN101673015B true CN101673015B (en) | 2012-05-23 |
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Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102466931B (en) * | 2010-11-03 | 2015-01-21 | 上海天马微电子有限公司 | Array substrate, manufacturing method thereof and liquid crystal display panel |
| CN102568384B (en) * | 2010-12-17 | 2016-03-16 | 上海天马微电子有限公司 | Electronic paper display device |
| TWI497159B (en) * | 2011-11-10 | 2015-08-21 | Au Optronics Corp | Display panel |
| CN103728750A (en) * | 2013-12-26 | 2014-04-16 | 京东方科技集团股份有限公司 | Display panel and production method thereof |
| CN105425439A (en) * | 2014-09-19 | 2016-03-23 | 群创光电股份有限公司 | Display device |
| CN104360558A (en) * | 2014-12-08 | 2015-02-18 | 重庆京东方光电科技有限公司 | Array substrate, display panel and display device |
| CN104570527A (en) * | 2014-12-30 | 2015-04-29 | 深圳市华星光电技术有限公司 | Array substrate and display panel |
| CN104614911A (en) * | 2015-03-03 | 2015-05-13 | 京东方科技集团股份有限公司 | Substrate as well as manufacturing method and display device thereof |
| CN107942592A (en) * | 2017-11-03 | 2018-04-20 | 惠科股份有限公司 | Display panel and display device |
| CN111796462A (en) * | 2020-07-07 | 2020-10-20 | Tcl华星光电技术有限公司 | Array substrate and display device |
| CN113341602B (en) * | 2021-05-27 | 2023-03-24 | 长沙惠科光电有限公司 | Array substrate, display panel and display device |
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