CN101651810B - Device and method for processing interlaced line-crossing stereoscopic composite video signals - Google Patents
Device and method for processing interlaced line-crossing stereoscopic composite video signals Download PDFInfo
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Abstract
The invention discloses a device and a method for processing interlaced line-crossing stereoscopic composite video signals. The method comprises the following steps: firstly, finishing decoding interlaced crossing stereoscopic composite video signals in a 3D (three-dimensional) composite video decoder; then, converting the format of the composite video signals into the format of 16-bit YUV4:2:2; controlling the storage and read-out by an SDRAM (synchronous dynamic random access memory) frame memory; passing through two alternative multiplexers, so that the left-channel video is always outputted as an odd field and the right channel video is always outputted as an even field; and finally, outputting to an OLED (organic light emitting diode) micro-screen and displaying after image zooming and OSD (on-screen display) superposition. Upon the premise that only one 32-bit frame memory SDRAM is used, the invention can achieve the frame frequency elevation to the stereoscopic composite video signals and perform the function of decoding 3D composite video signals at the same time, thereby increasing the utilization rate and bandwidth of SDRAM and the integration of the device.
Description
Technical field
The present invention relates to the binocular solid Display Technique, be specifically related to a kind of device and method of handling interlaced line-crossing stereoscopic composite video signals.
Background technology
Compare with the 2D demonstration, the scene that 3D (three-dimensional) stereo display technique can reappear the objective world truly, the depth perception of represent images, stereovision and authenticity, thereby give the observer to a certain extent with impression on the spot in person, its application is very extensive, as medical science, building, visualization in scientific computing, video display amusement, military training, video communication etc.Therefore, stereo display technique has become the development trend of following Display Technique.The binocular technology is as the representative of stereo display technique, and it makes two identical display modules be respectively applied for the images of left and right eyes demonstration, has incomparable advantage in stereoscopic display device.
Based on the three-dimensional video-frequency form of binocular parallax left and right sides form, form, stagger scheme and the form etc. that skips are up and down arranged.Wherein at present the most frequently used to be row intersection form in the alternating expression, be about to have the left eye figure odd-numbered line of stereoscopic vision and the even number line of right eye figure extracts, copy to the same position row of output map, be combined into output image.The extraction mode of second width of cloth stereogram is identical with first, and circulation can obtain consecutive image successively.Often be TSC-system (valid data 720*240, field frequency 59.94Hz) or Phase Alternation Line system (valid data 720*288, field frequency 50Hz) as the compound video that goes out of the method.
The composite video signal of input, at first finishing light tone through the analog video signal decoder separates and chrominance demodulation, then parity rows signal extraction is come out, and frame frequency lifting to the frequency of the imperceptible flicker of observer of video data is delivered to the images of left and right eyes demonstration respectively.Show that can field frequency be reduced by half: the TSC-system formula becomes 29.97Hz, and pal mode becomes 25Hz, thereby causes serious scintillation if directly the parity rows data extract is come out to deliver to respectively then right and left eyes.
The existing method of handling interlaced line intersection form stereo video signals is owing to adopt traditional analog video signal decoder, and therefore, definition is not high, bright color crosstalk is serious.
Summary of the invention
In order to obtain more high definition and bright color crosstalk still less, analog video signal decoder among the present invention adopts the 3D adaptive decoder, by access control and the operation of rational and effective memory allocation to frame memory, utilize same frame memory to finish and realize that 3D decodes and the dual-use function of the frame frequency lifting that binocular shows, the invention provides a kind of device and method of handling interlaced line intersection form stereo video signals.
For reaching above purpose, the present invention takes following technical scheme to be achieved:
A kind of device of handling interlaced line-crossing stereoscopic composite video signals, it is characterized in that, comprise a frame memory SDRAM, one contains the three-dimensional composite video data write unit that first data cache module and first is write the sdram controller, one contains the three-dimensional composite video data sensing element that second data cache module and first is read the sdram controller, a 3D adaptive decoder, a format converting module, one contains the pre-output yuv data writing unit that the 3rd data cache module and second is write the sdram controller, one contain the 4th data cache module and second reading sdram controller deposit yuv data sensing element, a two-way stereoscopic display unit and a video post-processing unit;
Described first data cache module comprises that the control submodule is write in first of signal connection successively, first decode buffer and first reads to control submodule; First writes the assigned address that the control in real time of sdram controller writes the three-dimensional composite video data high-speed of buffer memory in first data cache module frame memory SDRAM;
Described second data cache module comprises that control submodule, second decode buffer are write in second of signal connection successively, second reading controls submodule and first data are recovered submodule; First reads the real-time three-dimensional composite video data high-speed of controlling assigned address among the frame memory SDRAM of sdram controller reads into second data cache module;
Described 3D adaptive decoder comprises delegation's field extraction module, with the row in the stereoscopic composite video signals of current input, field sync signal, very, even field signal, color sub-carrier signal extraction is handled, for frame memory SDRAM read-write control and the use of two-way stereoscopic display unit; One 3D brightness and chroma separation module is separated into brightness signal Y and carrier chrominance signal C with the two-way stereoscopic composite video signals of reading current input and from second data cache module; One colourity demodulation module is demodulated into U with the carrier chrominance signal C of 3D light tone separation module output, the V color difference signal, and constitute the YUV4:4:4 signal jointly with brightness signal Y; Format converting module is the YUV4:2:2 signal with the YUV4:4:4 conversion of signals of chrominance demodulation module output, and this YUV4:2:2 signal one tunnel is exported the yuv data writing module in advance and write the assigned address of frame memory SDRAM; One the tunnel is input to two-way stereo display module;
What described the 3rd data cache module comprised that signal successively connects the 3rd writes control submodule, the 3rd decode buffer and third reading control submodule; Second writes the real-time control of sdram controller will write the assigned address of frame memory SDRAM from 3D adaptive decoder YUV4:2:2 signal at a high speed;
Described the 4th data cache module comprises that the control submodule is write in the 4th of signal connection successively, the 4th decode buffer, the 4th reads to control submodule and second data are recovered submodule; The control in real time of second reading sdram controller reads into the 4th data cache module at a high speed with the YUV4:2:2 signal of assigned address among the frame memory SDRAM, and outputs to two-way stereo display module;
The two-way stereoscopic display unit comprises left and right two alternative multi-channel video selectors, exports the strange video in left road respectively under the control of a row parity field index signal that the extraction submodule produces in the 3D adaptive decoder, right wing idol field video; Show through outputing to the little screen of OLED after video post-processing unit image zoom and the apparent subtitle superposition of screen.
In the said apparatus, described first data cache module is provided with the first data combination submodule, earlier three continuously the three-dimensional composite video data of 10bit of input again highest order is mended two 0 by the head and the tail splicing, thereby the control submodule is write in input first after forming the data of a 32bit.Described the 3rd data cache module is provided with the second data combination submodule, and the control submodule was write in input the 3rd after earlier the pre-output 16bit YUV4:2:2 data of input merged the data of a 32bit of composition continuously two.
A kind of processing interlaced line based on aforementioned means intersects the method for form stereo video signals, comprises the steps:
1) the interlaced line intersection form stereoscopic composite video signals with input divides two-way, and the 3D adaptive decoder of leading up to is finished row, field sync signal, strange, even field signal, and the extraction of color sub-carrier signal and light tone are separated; Another road writes data by three-dimensional composite video data write unit in frame memory SDRAM, promptly the video data of opposition bluk recombination earlier makes up, by the control submodule control of writing in first data cache module it is write buffer memory in first decode buffer again, reading in first data cache module controlled the data splitting that submodule control will write in first decode buffer and read, write the sdram controller by first again and produce control signal, control will write at a high speed from the data splitting that the first decode buffer high speed is read two the address bank0 and bank1 of frame memory SDRAM;
2) first of three-dimensional composite video data sensing element read the sdram controller and produce control signal, control is read the data splitting among frame memory SDRAM address bank0 and the bank1 at a high speed and is write at a high speed and carried out buffer memory in second decode buffer by the control submodule write in second data cache module; Reading in second data cache module controlled submodule control the data splitting of buffer memory in second decode buffer read at a high speed, and the 10bit stereoscopic composite video signals when importing through reverting to again behind the recovery of first data in second data cache module submodule is input to the 3D adaptive decoder;
3) the 3D adaptive decoder is decoded as the 10bit stereoscopic composite video signals of reading current input and from second data cache module the pre-output YUV4:4:4 data of 30bit, be the 10bit brightness signal Y, 10bit red color difference signal U and 10bit blue difference signal V; Be converted to 16bit YUV4:2:2 signal through format converting module again, i.e. the brightness signal Y of 8bit and alternately red color difference signal U and the blue difference signal V of the 8bit of output;
4) in frame memory SDRAM, write pre-output YUV4:2:2 data by pre-output yuv data writing unit, promptly earlier pre-output YUV4:2:2 data are made up, by the control submodule control of writing in the 3rd data cache module it is write buffer memory in the 3rd decode buffer again, reading in the 3rd data cache module controlled the pre-dateout that submodule control will write in the 3rd decode buffer and read, write the sdram controller by second again and produce control signal, control will write at a high speed two other address bank2 and bank3 of frame memory SDRAM from the pre-output YUV4:2:2 data splitting that the 3rd decode buffer high speed is read;
5) the second reading sdram controller of depositing the yuv data sensing element produces control signal, control by in the 4th data cache module writing that the control submodule is read the pre-output YUV4:2:2 data splitting of depositing among frame memory SDRAM address bank2 and the bank3 at a high speed and high speed writes in the 4th decode buffer and carries out buffer memory; Reading in the 4th data cache module controlled submodule control the pre-output YUV4:2:2 data splitting of buffer memory in the 4th decode buffer read at a high speed, two YUV4:2:2 data splittings of exporting 16bit continuously when importing through reverting to again behind the recovery of second data in the 4th data cache module submodule are input to the two-way stereoscopic display unit;
6) the two-way stereoscopic display unit is realized by two alternative multi-channel video selectors, their two input signals are identical, wherein one the tunnel is the 16bit YUV4:2:2 current data of changing from the process format converting module of 3D adaptive decoder output, the YUV4:2:2 data of the 16bit that reads among another Lu Weicong frame memory SDRAM, control signal are a row parity field index signal that the extraction submodule produces in the 3D adaptive decoder; When index signal is strange, the current strange field data of left road multi-channel video selector control output, the even field data that right wing multi-channel video selector control output is read from frame memory SDRAM; When index signal is the idol field, the strange field data that left road multi-channel video selector control output is read from frame memory SDRAM, the current even field data of right wing multi-channel video selector control output;
7) video last handling process shows through outputing to the little screen of OLED after video post-processing unit image zoom and the apparent subtitle superposition of screen.
Wherein the described opposition bluk recombination of step 1) video data make up be by the first data combination module in first data cache module three continuously the three-dimensional composite video data of 10bit of input again highest order is mended two 0 by the head and the tail splicing, thereby form the data of a 32bit.Described pre-output YUV4:2:2 data are made up of step 4) is the data that two continuous 16bit YUV4:2:2 data merged a 32bit of composition by the second data combination module in the 3rd data cache module.The described video last handling process of step 7) is specially: with the advanced row format conversion of the data of sending here, the YUV4:2:2 conversion of signals that is about to 16bit is the rgb signal of 24bit, is the resolution of the little screen of output with video scaling by the image zoom submodule in the video post-processing unit then; Simultaneously, produce display message by the character OSD submodule in the video post-processing module; On the video of the image zoom submodule that according to demand display message is added to then output, obtain mixed rgb signal and output to the little screen demonstration of OLED.
With conventional method now than, advantage of the present invention is:
1. this apparatus system has higher integrated level.It reasonably integrates 3D composite video decoder, SDRAM, frame frequency lifting, two-way output, image zoom scaler, character OSD etc., has saved hardware resource.
2. the bandwidth availability ratio of frame memory SDRAM is very high.The SDRAM that the 3D decoder is needed and the SDRAM storage control and the memory space that need when realizing two-way output frame frequency lifting combine, and not only reduce the hardware resource of use, have increased utilization rate and the bandwidth availability ratio of SDRAM simultaneously.
3. adopt the parity field index signal as control signal when realizing two-way output, control rationally makes two alternative MUX can one export strange field signal all the time, and another exports even field signal all the time.
The present invention only adopts a slice frame memory SDRAM, by optimal design to its read-write control and memory space, deposit the frame of the stereoscopic composite video signals of input when utilizing its two bank to decode as 3D and deposit, two other bank is as realizing that the frame that the binocular solid display frame frequency promotes deposits.Thereby when improving the SDRAM utilization rate, bandwidth and read or write speed have been increased.
Description of drawings
Fig. 1 is the general structure frame of apparatus of the present invention.
Fig. 2 is Fig. 1 neutral body composite video data write unit structure chart.
Fig. 3 is the data combination schematic diagram before stereoscopic composite video signals writes SDRAM.
Fig. 4 is Fig. 1 neutral body composite video data sensing element structure chart.
Fig. 5 is a pre-output yuv data writing unit structure chart among Fig. 1.
Fig. 6 is the data combination schematic diagram before 16bit YUV4:2:2 signal writes SDRAM.
Fig. 7 deposits yuv data sensing element structure chart among Fig. 1.
Fig. 8 is a schematic diagram of realizing two-way output selection control among Fig. 1.
Embodiment
The present invention is described in further detail below in conjunction with drawings and Examples.
Referring to Fig. 1, the related hardware of method of the present invention comprises: the frame memory SDRAM of 32bit, three-dimensional composite video data write unit, three-dimensional composite video data sensing element, 3D adaptive decoder, format converting module, pre-output yuv data writing unit, deposit the yuv data sensing element, two-way stereoscopic display unit, video post-processing unit.
Wherein: three-dimensional composite video data write unit comprises a data cache module 1 (fifo1), and is once parallel to the stereoscopic composite video signals that wherein writes 3 10bit according to time-delay control, is used for the stereoscopic composite video signals data that buffer memory writes SDRAM; One writes sdram controller A, is used for carrying out the assigned address that the demand in real time control of YC when separating writes the fifo1 data in buffer at a high speed SDRAM according to the 3D decoder; Wherein data cache module 1 comprises that data combination A submodule, the fifo1 of signal connection successively write control submodule, fifo1 decode buffer and fifo1 and read to control submodule.
Three-dimensional composite video data sensing element comprises a data cache module 2 (fifo2), the stereoscopic composite video signals that buffer memory is read, the stereoscopic composite video signals data of 3 10bit of a parallel read-out from SDRAM; One reads sdram controller A, is used for carrying out the demand of YC when separating according to the 3D decoder, and control in real time reads into fifo2 with the data high-speed of assigned address among the SDRAM; Wherein data cache module 2 comprises that the fifo2 of signal connection successively writes control submodule, fifo2 decode buffer, fifo2 reads to control submodule and data are recovered the A module.
The 3D decoder comprises delegation's field extraction module, with the row in the stereoscopic composite video signals synchronously, row effectively, field synchronization, effectively, signal extraction such as parity field index signal handles, for frame memory SDRAM read-write control and the use of two-way stereoscopic display unit; One 3D brightness and chroma separation module is separated into the brightness signal Y of 10bit and the carrier chrominance signal C of 10bit with the stereoscopic composite video signals of the 10bit that reads current input and from second data cache module; One colourity demodulation module is demodulated into U (red) with the carrier chrominance signal C of the 10bit of 3D light tone separation module output, V (indigo plant) color difference signal, and constitute the YUV signal of 4:4:4 jointly with the luminance signal of 10bit; Format converting module is the YUV4:2:2 signal with the YUV4:4:4 conversion of signals of chrominance demodulation module output.
Pre-output yuv data writing unit comprises a data cache module 3 (fifo3), once parallel according to sequencing control to its YUV4:2:2 signal that writes 2 16bit, be used for buffer memory and write the process 3D decoding of SDRAM and the YUV4:2:2 signal after the format converting module conversion in advance; One writes sdram controller B, data in buffer among the fifo3 is write the assigned address of SDRAM.Wherein data cache module 3 comprises that data combination B submodule, the fifo3 of signal connection successively write control submodule, fifo3 decode buffer and fifo3 and read to control submodule.
Deposit the yuv data sensing element and comprise a data cache module 4 (fifo4), the decoded stereo video signals of process 3D that buffer memory is read from SDRAM, the YUV4:2:2 video signal data of 2 16bit of a parallel read-out; One reads sdram controller B, and control will write that the data of assigned address read into fifo4 among the SDRAM.Wherein data cache module 4 comprises that the fifo4 of signal connection successively writes control submodule, fifo4 decode buffer, fifo4 reads to control submodule and data are recovered the B submodule.
8 stereoscopic composite video signals that two address bank0 among the frame memory SDRAM and bank1 need when being used for storing the 3D decoding, two other address bank2 and bank3 are realized the YUV4:2:2 signal that the binocular solid display frame frequency promotes after being used for storing 4 decodings.
Two-way stereo display module comprises two alternative multi-channel video selectors, the strange row of left side road multi-channel video selector control output all the time acts on the signal of left eye, right wing multi-channel video selector control output idol all the time row acts on the signal of right eye, wherein one the tunnel be input as the current data of exporting through the 3D decoder, the data of reading among another Lu Weicong SDRAM.
The video post-processing module comprises two image zoom scaler modules, and the two-way YUV4:2:2 video data of respectively front two alternative multi-channel videos selector being exported is converted to rgb format earlier, will finish zoom operations according to the resolution of display device then; One character OSD (On Screen Display) module is used for producing the character information screen display that is added to according to the control of outside.For example comprise signal source, listing, programme information, channel selective information etc., to make things convenient for the operation of man-machine interaction; Two rgb mixer modules are added to the figure of the rgb format of OSD module output respectively on the image of rgb format of two image zoom scaler modules outputs, and two RGB data behind the OSD that will superpose at last output to two little screens demonstrations of OLED.
A kind of method of in above-mentioned binocular solid display unit, handling interlaced line-crossing stereoscopic composite video signals, concrete steps are as follows:
1, in SDRAM, writes three-dimensional composite video data
Referring to Fig. 2, the input data are stereoscopic composite video signals of 10bit, before data enter fifo1 by data combination A module, with 3 continuous 10bit data data[9:0] be combined as the data data_out[31:0 of a 32bit], concrete compound mode is referring to Fig. 3, be per three clock cycle to produce an output enable signal, with three data of importing continuously, Dn for example, Dn+1, Dn+2 mends 0 with highest order again by the head and the tail splicing, thereby forms the data Dn_out of a 32bit, effectively utilize the data bandwidth of SDRAM, thereby reduced the SDRAM operating frequency.
Be Dn_out={2 ' b00, Dn, Dn+1, Dn+2}
Then, fifo1 writing controller module controls writes the 32bit data of exporting in the data combination modules A buffer memory in the fifo1 decode buffer of 32bit, the data that fifo1 Read Controller module controls will write among the fifo1 are read, produce control signal by writing sdram control A module again, control will write from the data high-speed that the fifo1 high speed is read the assigned address bank0 or bank1 of 32bit SDRAM.
2, the three-dimensional composite video data of depositing among the SDRAM are read
Referring to Fig. 4, read sdram controller A and produce control signal control the 32bit data among 32bit SDRAM assigned address bank1 or the bank0 are read, and by the control of fifo2 writing controller it is write and to carry out buffer memory in the 32bitfifo2 decode buffer.The control of fifo2 Read Controller is with the 32bit data data[31:0 in the fifo2 decode buffer] read at a high speed, recovering the A module recovery through data is 3 continuous 10bit stereoscopic composite video signals CVBS[9:0], recovered data delivered in the 3D decoder module handle.
3,3D decoding and format conversion
The 10bit stereoscopic composite video signals that the 3D adaptive decoder is sent last module here is decoded as the YUV4:4:4 signal of 30bit, i.e. 10bit brightness signal Y, 10bit red color difference signal U and 10bit blue difference signal V; Be converted to 16bit YUV4:2:2 signal through format converting module again, i.e. the brightness signal Y of 8bit and alternately color difference signal U or the color difference signal V of the 8bit of output.But the disclosed application number of 3D adaptive decoder request for utilization people is 200810017859.8, name is called the patent documentation of " a kind of video signal decoder based on the 3D self-adapting comb filtering ".
4, in SDRAM, write the YUV4:2:2 data of pre-output
Referring to Fig. 5; It is similar that its implementation and data cache module 1 write the implementation of three-dimensional composite video data module in the SDRAM; Different is because the YUV4:2:2 data are 16bit; So per two clock cycle produce an output enable signal; In data composite module B with the YUV4:2:2 data data[15:0 of two continuous 16bit] form the data data_out[31:0 of a 32bit]; Concrete compound mode is referring to Fig. 6; For example Dn_out is combined by Dn and Dn+1
Be Dn_out={Dn, Dn+1};
In addition, the data of 32bit are placed among two other assigned address bank2 or the bank3 in depositing SDRAM in the time.
5, the YUV4:2:2 data of depositing among the SDRAM are read
Referring to Fig. 7, it is similar that its implementation and data cache module 2 are read module with the three-dimensional composite video data of depositing among the SDRAM.Their difference is, at first it is a reading of data from the different bank of SDRAM, data for reading 32bit among bank2 or the bank3 in this programme; What the data of the 32bit that reads in this module process data were recovered the B module recovery in addition is two YUV4:2:2 data of output 16bit continuously.
6, the frame memory SDRAM of 32bit storage data
Be used for store data, preceding two bank are 8 stereoscopic composite video signals that bank0 and bank1 are used to deposit the decoder needs, and latter two bank is that bank2 and bank3 are used to deposit and realize that the two-way display frame frequency promotes needed 4 YUV4:2:2 signals.
7, the realization of two-way stereo display
Referring to Fig. 8, the two-way stereoscopic display unit is mainly realized by two alternative MUX.Wherein, the signal that left side road multi-channel video selector control output all the time is strange, the signal of right wing multi-channel video selector control output idol all the time field, their two input signals are identical, i.e. one tunnel current data that is input as from 3D decoder output wherein, i.e. data_from_decoder, the data of reading among another Lu Weicong SDRAM, be data_from_sdram, control signal is from the parity field index signal field that the extraction submodule produces of row in the 3D adaptive decoder.When current data is strange field data, left road multi-channel video selector control output current data, the even field data that right wing multi-channel video selector control output is read from SDRAM; When current data is even field data, the strange field data that left road multi-channel video selector control output is read from SDRAM, the current even field data of right wing multi-channel video selector control output.Thereby realize that left road output left_out is always strange field data, right wing output right_out is always even field data.
8, video reprocessing
At first finishing Data Format Transform, is the RGB8:8:8 signal of 24bit with the YUV4:2:2 conversion of signals of 16bit; By image zoom scaler module the video of 720*240 (NTSC) or 720*288 (PAL) resolution is satisfied the resolution of output display screen then by interpolation convergent-divergent algorithm; The display message that superposes simultaneously and produce by character OSD module; The rgb signal that obtains mixed 24bit is exported to the little screen demonstration of OLED.
9, display module
Respectively the two-way 24bitRGB signal that obtains in the entire process process of front is shown with two little screens of OLED.
Claims (7)
1. device of handling interlaced line-crossing stereoscopic composite video signals, it is characterized in that, comprise a frame memory SDRAM, one contains the three-dimensional composite video data write unit that first data cache module and first is write the sdram controller, one contains the three-dimensional composite video data sensing element that second data cache module and first is read the sdram controller, a 3D adaptive decoder, a format converting module, one contains the pre-output yuv data writing unit that the 3rd data cache module and second is write the sdram controller, one contain the 4th data cache module and second reading sdram controller deposit yuv data sensing element, a two-way stereoscopic display unit and a video post-processing unit;
Described first data cache module comprises that the control submodule is write in first of signal connection successively, first decode buffer and first reads to control submodule; First writes the assigned address that the control in real time of sdram controller writes the three-dimensional composite video data high-speed of buffer memory in first data cache module frame memory SDRAM;
Described second data cache module comprises that control submodule, second decode buffer are write in second of signal connection successively, second reading controls submodule and first data are recovered submodule; First reads the real-time three-dimensional composite video data high-speed of controlling assigned address among the frame memory SDRAM of sdram controller reads into second data cache module;
Described 3D adaptive decoder comprises delegation's field extraction module, with the row in the stereoscopic composite video signals of current input, field sync signal, very, idol index signal, color sub-carrier signal extraction is handled, for frame memory SDRAM read-write control and the use of two-way stereoscopic display unit; One 3D brightness and chroma separation module is separated into brightness signal Y and carrier chrominance signal C with the two-way stereoscopic composite video signals of reading current input and from second data cache module; One colourity demodulation module is demodulated into U with the carrier chrominance signal C of 3D brightness and chroma separation module output, the V color difference signal, and constitute the YUV4:4:4 signal jointly with brightness signal Y; Format converting module is the YUV4:2:2 signal with the YUV4:4:4 conversion of signals of chrominance demodulation module output, and this YUV4:2:2 signal one tunnel is exported the yuv data writing module in advance and write the assigned address of frame memory SDRAM; One the tunnel is input to two-way stereo display module;
What described the 3rd data cache module comprised that signal successively connects the 3rd writes control submodule, the 3rd decode buffer and third reading control submodule; Second writes the real-time control of sdram controller will write the assigned address of frame memory SDRAM from 3D adaptive decoder YUV4:2:2 signal at a high speed;
Described the 4th data cache module comprises that the control submodule is write in the 4th of signal connection successively, the 4th decode buffer, the 4th reads to control submodule and second data are recovered submodule; The control in real time of second reading sdram controller reads into the 4th data cache module at a high speed with the YUV4:2:2 signal of assigned address among the frame memory SDRAM, and outputs to two-way stereo display module;
The two-way stereoscopic display unit comprises left and right two alternative multi-channel video selectors, exports the strange video in left road respectively under the control of a row parity field index signal that the extraction submodule produces in the 3D adaptive decoder, right wing idol field video; Show through outputing to the little screen of OLED after video post-processing unit image zoom and the apparent subtitle superposition of screen.
2. the device of processing interlaced line-crossing stereoscopic composite video signals as claimed in claim 1, it is characterized in that, described first data cache module is provided with the first data combination submodule, earlier three continuously the three-dimensional composite video data of 10bit of input again highest order is mended two 0 by the head and the tail splicing, thereby the control submodule is write in input first after forming the data of a 32bit.
3. the device of processing interlaced line-crossing stereoscopic composite video signals as claimed in claim 1, it is characterized in that, described the 3rd data cache module is provided with the second data combination submodule, and the control submodule was write in input the 3rd after earlier the pre-output 16bit YUV4:2:2 data of input merged the data of a 32bit of composition continuously two.
4. a method of handling interlaced line intersection form stereo video signals based on the described device of claim 1, is characterized in that, comprises the steps:
1) the interlaced line intersection form stereoscopic composite video signals with input divides two-way, and the 3D adaptive decoder of leading up to is finished row, field sync signal, strange, an idol index signal, the extraction of color sub-carrier signal and light tone separation; Another road writes data by three-dimensional composite video data write unit in frame memory SDRAM, promptly the video data of opposition bluk recombination earlier makes up, by the control submodule control of writing in first data cache module it is write buffer memory in first decode buffer again, reading in first data cache module controlled the data splitting that submodule control will write in first decode buffer and read, write the sdram controller by first again and produce control signal, control will write at a high speed from the data splitting that the first decode buffer high speed is read two the address bank0 and bank1 of frame memory SDRAM;
2) first of three-dimensional composite video data sensing element read the sdram controller and produce control signal, control is read the data splitting among frame memory SDRAM address bank0 and the bank1 at a high speed and is write at a high speed and carried out buffer memory in second decode buffer by the control submodule write in second data cache module; Reading in second data cache module controlled submodule control the data splitting of buffer memory in second decode buffer read at a high speed, and the 10bit stereoscopic composite video signals when importing through reverting to again behind the recovery of first data in second data cache module submodule is input to the 3D adaptive decoder;
3) the 3D adaptive decoder is decoded as the 10bit stereoscopic composite video signals of reading current input and from second data cache module the pre-output YUV4:4:4 data of 30bit, be the 10bit brightness signal Y, 10bit red color difference signal U and 10bit blue difference signal V; Be converted to 16bit YUV4:2:2 signal through format converting module again, i.e. the brightness signal Y of 8bit and alternately red color difference signal U and the blue difference signal V of the 8bit of output;
4) in frame memory SDRAM, write pre-output YUV4:2:2 data by pre-output yuv data writing unit, promptly earlier pre-output YUV4:2:2 data are made up, by the control submodule control of writing in the 3rd data cache module it is write buffer memory in the 3rd decode buffer again, reading in the 3rd data cache module controlled the pre-dateout that submodule control will write in the 3rd decode buffer and read, write the sdram controller by second again and produce control signal, control will write at a high speed two other address bank2 and bank3 of frame memory SDRAM from the pre-output YUV4:2:2 data splitting that the 3rd decode buffer high speed is read;
5) the second reading sdram controller of depositing the yuv data sensing element produces control signal, control by in the 4th data cache module writing that the control submodule is read the pre-output YUV4:2:2 data splitting of depositing among frame memory SDRAM address bank2 and the bank3 at a high speed and high speed writes in the 4th decode buffer and carries out buffer memory; Reading in the 4th data cache module controlled submodule control the pre-output YUV4:2:2 data splitting of buffer memory in the 4th decode buffer read at a high speed, two YUV4:2:2 data splittings of exporting 16bit continuously when importing through reverting to again behind the recovery of second data in the 4th data cache module submodule are input to the two-way stereoscopic display unit;
6) the two-way stereoscopic display unit is realized by two alternative multi-channel video selectors, their two input signals are identical, wherein one the tunnel is the 16bit YUV4:2:2 current data of changing from the process format converting module of 3D adaptive decoder output, the YUV4:2:2 data of the 16bit that reads among another Lu Weicong frame memory SDRAM, control signal are a row parity field index signal that the extraction submodule produces in the 3D adaptive decoder; When index signal is strange, the current strange field data of left road multi-channel video selector control output, the even field data that right wing multi-channel video selector control output is read from frame memory SDRAM; When index signal is the idol field, the strange field data that left road multi-channel video selector control output is read from frame memory SDRAM, the current even field data of right wing multi-channel video selector control output;
7) video last handling process shows through outputing to the little screen of OLED after video post-processing unit image zoom and the apparent subtitle superposition of screen.
5. the method for processing interlaced line-crossing stereoscopic composite video signals as claimed in claim 4, it is characterized in that, it is by the first data combination module in first data cache module three-dimensional composite video data of the 10bit of three continuous inputs to be spliced by head and the tail again highest order is mended two 0 that the described opposition bluk recombination of step 1) video data makes up, thereby forms the data of a 32bit.
6. the method for processing interlaced line-crossing stereoscopic composite video signals as claimed in claim 4, it is characterized in that described pre-output YUV4:2:2 data are made up of step 4) is the data that two continuous 16bitYUV4:2:2 data merged a 32bit of composition by the second data combination module in the 3rd data cache module.
7. the method for processing interlaced line-crossing stereoscopic composite video signals as claimed in claim 4, it is characterized in that, the described video last handling process of step 7) is specially: with the advanced row format conversion of the data of sending here, the YUV4:2:2 conversion of signals that is about to 16bit is the rgb signal of 24bit, is the resolution of the little screen of output with video scaling by the image zoom submodule in the video post-processing unit then; Simultaneously, produce display message by the character OSD submodule in the video post-processing module; On the video of the image zoom submodule that according to demand display message is added to then output, obtain mixed rgb signal and output to the little screen demonstration of OLED.
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| CN102137268B (en) * | 2011-04-08 | 2013-01-30 | 清华大学 | Line-staggered and tessellated rendering method and device for three-dimensional video |
| CN102215405B (en) * | 2011-06-01 | 2013-10-23 | 深圳创维－Rgb电子有限公司 | 3D (three-dimensional) video signal compression coding-decoding method, device and system |
| CN103188512B (en) * | 2011-12-28 | 2015-05-27 | 华晶科技股份有限公司 | Three-dimensional image generation device |
| US20140267222A1 (en) * | 2013-03-12 | 2014-09-18 | Nvidia Corporation | Efficient autostereo support using display controller windows |
| CN104159096A (en) * | 2014-08-20 | 2014-11-19 | 深圳市麟静科技有限公司 | 3D endoscope system based on liquid crystal attached silicon and display method |
| CN104243964A (en) * | 2014-09-12 | 2014-12-24 | 西安诺瓦电子科技有限公司 | Stereoscopic LED display control system and method and display control card |
| CN105991954A (en) * | 2015-02-10 | 2016-10-05 | 上海纬而视科技股份有限公司 | Spliced display screen with built-in image processors |
| CN104965676B (en) | 2015-06-17 | 2018-10-16 | 深圳市中兴微电子技术有限公司 | A kind of access method of random access memory, device and control chip |
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