CN101640768B - Multi-cannel OSD video superposition controller - Google Patents
Multi-cannel OSD video superposition controller Download PDFInfo
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- CN101640768B CN101640768B CN 200810054007 CN200810054007A CN101640768B CN 101640768 B CN101640768 B CN 101640768B CN 200810054007 CN200810054007 CN 200810054007 CN 200810054007 A CN200810054007 A CN 200810054007A CN 101640768 B CN101640768 B CN 101640768B
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Abstract
The invention relates to a multi-channel OSD video superposition controller, which has the structure achieved on the basis of an FPGA. The multi-channel OSD video superposition controller comprises a CPU interface module, a state register module, a data buffer area module, a multi-channel video signal processing module, a display buffer area module, a multi-channel video character/image superposition control module, a video superposition OSD controller module and a memory interface module. The multi-channel OSD video superposition controller can superpose any user-defined monochrome characters/images to multi-channel non-synchronous video signals at the same time, the character/image superposition is based on a bitmap mode, and the superposition effect is outstanding and stable. The character/image is completely defined by a user, and the superposition of the multi-channel video superposition only needs to configure an ROM or a FLASH ROM at a user CPU terminal to store the characters/images, so the production cost and the use cost are reduced.
Description
Technical field
The present invention relates to the technical field of video superimpose, be specifically related to a kind ofly realize the multi-cannel OSD video superposition controller in the multichannel non-synchronous video signal that simultaneously monochromatic characters/graphics to be added to based on FPGA.
Background technology
OSD (On Screen Display) video superposition controller be a kind of in analog video signal overlaying character or graphical information, make the equipment that is superimposed with character or figure in the video image.As in video, showing: date, time, parameter, logo, camera position etc.At present, OSD video superimpose technology is applied in conglomeraties such as security protection, road and bridge monitoring, elevator demonstration, bank's counting, test measurement data demonstration and the many occasions.
The process that OSD realizes is: the content of memory (be generally internal memory a section) is corresponding one by one with the pixel on the display terminal, thisly concerns generally by the register setting, then by being responsible for realization on the hardware one to one.
The domestic OSD video superposition controller chip that generally uses is: 64 series of the production of NEC Corporation, and as the MB90092 of uPD6453, uPD6467 and company of Fujitsu (FUJITSU).And OSD video superposition controller of the prior art is representative with this two quasi-controller also.
These two kinds of controllers of NEC Corporation, very outstanding aspect the effect of the black surround of control character/figure and the overlapped information in the black surround; But aspect the stack content, the characters/graphics that uPD6467 is cured among the ROM in only can chip superposed, uPD6453 supports inner ROM and 16 characters/graphics of User Defined.Therefore two kinds of controllers only can satisfy and only require and use inner characters/graphics or the self-defined situation that is no more than 16 characters/graphics, and in actual applications, the characters/graphics that needs usually will be more than 16.
The MB90092 of Fuji Tsu, can superpose shows 8192 kinds of user defined character/figures, but its realization needs the outside to expand a slice ROM separately or FLASH ROM stores these characters/graphics information.Though MB90092 has solved the requirement for character and figure quantity, but MB90092 characters/graphics black surround calculates by move left and right characters/graphics dot matrix, the dot matrix of each characters/graphics all needs special processing, the black surround Overlay is not good, especially when monitor dimension is big, can obviously find out discontinuous black surround, destroy the characters/graphics display effect.
Two class video superposition controllers of the prior art when needing the use occasion of multi-channel video stack, need reconfigure circuit, cause the circuit complexity, and the area of PCB increases, thereby cause the integrated level of system to descend, and cost rises.Especially when using the MB90092 chip, the every road video superposition controller in the multi-channel video stack all needs the ROM or the FLASH ROM of a storage of configuration user characters/graphics separately, causes cost to rise significantly.
Summary of the invention
For solving existing problem in the above-mentioned prior art, the invention provides and a kind ofly realize the multi-cannel OSD video superposition controller in the multichannel non-synchronous video signal that simultaneously monochromatic characters/graphics to be added to based on FPGA.
The technical scheme that the present invention takes for the technical problem that exists in the solution known technology is:
Multi-cannel OSD video superposition controller of the present invention, its structure are based on the FPGA realization, and the bitmap mode is adopted in the stack of characters/graphics, comprising: the serial parallel cpu i/f module that can carry out data interaction with the user; Be used for the status register module that the video superimpose state is provided with; The data buffer zone module that is used for the video superimpose data of interruptible customer input; The multi-channel video signal processing module; The display buffer module of temporary multi-channel video video data; Produce the multi-channel video characters/graphics superposing control module of superposing control signal and overlapped information according to the content of data in the module of display buffer; The data read request and the data buffer zone data of response video signal processing module write video superimpose osd controller module and the memory interface module that request signal carries out data read-write control.
The present invention can also adopt following technical measures:
Described cpu i/f module comprises serial line interface and parallel interface, and the user can write or sense status register information by by one of described serial or parallel C PU interface; Status register is stored characters/graphics superposed positions, the stack pixel wide of every road video and whether is allowed the information of overlaying character/figure; The overlapped information of the characters/graphics of multi-channel video is write the data buffer zone module in advance, and the data buffer zone module can buffer memory characters/graphics superposition of data.
Described multi-channel video signal processing module, handle multichannel non-synchronous video signal respectively, produce correct line data reading request signal, and can produce the superposed positions skew according to the stack offset address of status register setting and enable, show enable signal according to showing that the enabled state register produces.
Data read request signal that described osd controller module is sent the multi-channel video signal processing module and the data-signal in the module of data buffer zone are coordinated; After receiving the data read request that the multi-channel video signal processing module sends, from memory, read characters/graphics data that this row will superpose in the module of corresponding video display buffer, display buffer can this road video of buffer memory video data, when if osd controller is found to have data to want write memory in the data buffer zone, write data in the memory when then waiting free time to be superimposed.
Described display buffer module has multichannel, and each module cushions for the demonstration of this road video; The display buffer uses the embedded RAM of FPGA inside to realize, data in the buffering area are upgraded by the osd controller module, after each multi-channel video signal processing module is sent request of data, the data message that the osd controller module provides according to the multi-channel video signal processing module is written in the display buffer read the data of corresponding unit in the memory by memory interface after.
Described characters/graphics superposing control module has multichannel, and each module controls overlaying character/figure is to corresponding video; When status register forbade that this road superposes, overlapping controller was ignored the superposition of data in the display buffer, does not produce control signal; When the state machine register allows this road overlaying function, the superposing control module is behind the stack commencing signal that receives the generation of multi-channel video signal processing module, produce control signal and overlapped information according to the data in the display buffer, the superposing control module can be adjusted the pixel wide that is superimposed upon the characters/graphics on the video according to the set pixel wide of status register.
Advantage and good effect that the present invention has are:
Multi-cannel OSD video superposition controller of the present invention adopts monolithic FPGA to realize, can simultaneously the monochromatic characters/graphics of any User Defined be added in the multichannel non-synchronous video signal, and characters/graphics superposes based on the bitmap mode, and Overlay is outstanding, stable.The characters/graphics that the user only need will superpose is written in the memory by the cpu i/f module and gets final product, characters/graphics is defined by user oneself fully, and the overlaying character/figure of multi-channel video writes by cpu i/f, and the multi-channel video stack only needs to come store character/figure to get final product at user CPU end configuration a slice ROM or FLASH ROM.Not only solve the shortcoming of the characters/graphics (perhaps maximum 16 user defined character/figures) that existing overlapping controller can only chip superposed inside, reduced the usage quantity of storage chip simultaneously, reduced production cost and use cost.
Description of drawings
Showed one embodiment of the present of invention in the accompanying drawing--the OSD screen overlapping controller of 8 passages, and this is elaborated.
Fig. 1 is the structured flowchart of multi-cannel OSD video superposition controller of the present invention;
Fig. 2 is a multi-cannel OSD video superposition controller of the present invention structured flowchart in actual applications.
Embodiment
Describe specific embodiments of the invention in detail below in conjunction with accompanying drawing.
Fig. 1 is the structured flowchart of multi-cannel OSD video superposition controller of the present invention.
As shown in Figure 1,8 passage OSD video superposition controllers of the present invention, the bitmap mode is adopted in the stack of characters/graphics, and its structure is based on that FPGA realizes, comprising: the serial parallel cpu i/f module that can carry out data interaction with the user; Be used for the status register module that the video superimpose state is provided with; The data buffer zone module that is used for the video superimpose data of interruptible customer input; 8 tunnel video signal processing module produce overlapped information and read request signal; The display buffer module of temporary 8 road Visual Display Datas; Produce the 8 road video characters/figure superposing control module of superposing control signal and overlapped information according to the content of data in the module of display buffer; The data read request and the data in the module of data buffer zone of response video signal processing module write video superimpose osd controller module and the memory interface module that request signal carries out data read-write control.
The cpu i/f module comprises serial line interface and parallel interface, and the user can write or sense status register information by by one of described serial or parallel C PU interface; Status register is stored characters/graphics superposed positions, the stack pixel wide of every road video and whether is allowed the information of overlaying character/figure; The superposition of data of the characters/graphics of 8 road videos is write the data buffer zone module in advance, and the data buffer zone module can buffer memory characters/graphics superposition of data.
8 tunnel video signal processing module, handle 8 road non-synchronous video signals respectively, according to the correct data read request signal of video signal generating, and can produce the superposed positions skew according to the stack offset address of status register setting and enable, show enable signal according to showing that the enabled state register produces.
Data read request signal that the osd controller module is sent 8 tunnel video signal processing module and the data write signal in the module of data buffer zone are coordinated; After receiving the data read request that 8 tunnel video signal processing module send, from memory, read the characters/graphics data that will superpose in the module of corresponding video display buffer, display buffer can this road video of buffer memory video data, when if osd controller is found to have data to want write memory in the data buffer zone, write data in the memory when then waiting free time to be superimposed.
The display buffer module has 8 the tunnel, and each module cushions for the demonstration of this road video; The display buffer uses the embedded RAM of FPGA inside to realize, data in the buffering area are upgraded by the osd controller module, after each video signal processing module is sent request of data, the data message that the osd controller module provides according to video signal processing module is written in the display buffer read the data of corresponding unit in the memory by memory interface after.
Characters/graphics superposing control module has 8 the tunnel, and each module controls overlaying character/figure is to corresponding video; When status register forbade that this road superposes, overlapping controller was ignored the superposition of data in the display buffer, does not produce control signal; When the state machine register allows this road overlaying function, the superposing control module is behind the stack commencing signal that receives the video signal processing module generation, produce control signal and overlapped information according to the data in the display buffer, the superposing control module can be adjusted the pixel wide that is superimposed upon the characters/graphics on the video according to the set pixel wide of status register.
Fig. 2 is 8 passage OSD video superposition controllers of the present invention structured flowcharts in actual applications.
As shown in Figure 2, microcontroller MCU carries out communication by serial or parallel interface and OSD video superposition controller, a row collection port of OSD video superposition controller delivered to the row field signal of this road screen by a row split circuit of video, memory links to each other with the memory interface of OSD video superposition controller, and superposing control signal character graphics inserter has just constituted 8 passages video character/figure overlapping system.
Claims (3)
1. multi-cannel OSD video superposition controller, its structure are based on that FPGA realizes, the bitmap mode is adopted in the stack of characters/graphics, comprising: the serial parallel cpu i/f module that can carry out data interaction with the user; Be used for the status register module that the video superimpose state is provided with; The data buffer zone module that is used for the video superimpose data of interruptible customer input; The multi-channel video signal processing module; The display buffer module of temporary multi-channel video video data; Produce the multi-channel video characters/graphics superposing control module of superposing control signal and overlapped information according to the content of data in the module of display buffer; The data read request and the data in the module of data buffer zone of response video signal processing module write video superimpose osd controller module and the memory interface module that request signal carries out data read-write control, it is characterized in that: data read request signal that the osd controller module is sent the multi-channel video signal processing module and the data-signal in the module of data buffer zone are coordinated; Receiving the data read request that the multi-channel video signal processing module is sent, from memory, read the characters/graphics data that will superpose in the module of corresponding video display buffer, display buffer can this road video of buffer memory video data, when if osd controller is found to have data to want write memory in the module of data buffer zone, write data in the memory when then waiting free time to be superimposed; The display buffer module has multichannel, and each module cushions for the demonstration of this road video; The display buffer uses the embedded RAM of FPGA inside to realize; Data in the buffering area are upgraded by the osd controller module, after each multi-channel video signal processing module is sent request of data, the data message that the osd controller module provides according to the multi-channel video signal processing module is written in the display buffer read the data of corresponding unit in the memory by memory interface after; Characters/graphics superposing control module has multichannel, and each module controls overlaying character/figure is to corresponding video; When status register forbade that this road superposes, overlapping controller was ignored the superposition of data in the display buffer, does not produce control signal; When status register allows this road overlaying function, the superposing control module is behind the stack commencing signal that receives the generation of row field signal acquisition module, produce control signal and overlapped information according to the data in the display buffer, the superposing control module can be adjusted the pixel wide that is superimposed upon the characters/graphics on the video according to the set pixel wide of status register.
2. multi-cannel OSD video superposition controller according to claim 1, it is characterized in that: the cpu i/f module comprises serial line interface and parallel interface, the user can write or sense status register information by by one of described serial or parallel C PU interface; Status register is stored characters/graphics superposed positions, the stack pixel wide of every road video and whether is allowed the information of overlaying character/figure; The overlapped information of the characters/graphics of multi-channel video is write video superimpose data buffer zone module in advance, and the data buffer zone module can buffer memory characters/graphics superposition of data.
3. multi-cannel OSD video superposition controller according to claim 1, it is characterized in that: the multi-channel video signal processing module, handle the signal of multichannel non-synchronous video respectively, according to the correct data read request signal of video signal generating, and can produce the superposed positions skew according to the stack offset address of status register setting and enable, show enable signal according to showing that the enabled state register produces.
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Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102281420A (en) * | 2010-06-10 | 2011-12-14 | 鸿富锦精密工业（深圳）有限公司 | System and method for GUI display in image file |
| CN102036038A (en) * | 2011-01-07 | 2011-04-27 | 天津天地伟业数码科技有限公司 | Multi-channel OSD video superposition controller |
| KR20130021988A (en) * | 2011-08-24 | 2013-03-06 | 현대모비스 주식회사 | Device for overlaying image obtained by camera for vehicle and method thereof |
| CN102857703A (en) * | 2012-09-07 | 2013-01-02 | 天津市亚安科技股份有限公司 | High-definition video character superimposing system and control method |
| CN102930849A (en) * | 2012-11-05 | 2013-02-13 | 黑龙江省电力有限公司信息通信分公司 | Displayer for pushing overlapping display content by serial communication interface |
| CN104883517B (en) * | 2014-02-27 | 2018-03-02 | 龙羽 | A kind of system and method that three tunnel high-definition video streams are overlapped |
| CN104780330B (en) * | 2015-03-30 | 2018-03-16 | 深圳市载德光电技术开发有限公司 | A kind of implementation method of high-capacity high-definition video matrix system and matrix |
| CN106357998B (en) * | 2015-11-18 | 2019-05-28 | 深圳开阳电子股份有限公司 | A kind of OSD graph display processing unit |
| CN108259797B (en) * | 2018-01-09 | 2023-05-16 | 武汉精测电子集团股份有限公司 | Method and device for carrying out character superposition on image |
| CN109672931B (en) * | 2018-12-20 | 2020-03-20 | 北京百度网讯科技有限公司 | Method and apparatus for processing video frames |
| CN110312084B (en) * | 2019-06-28 | 2022-03-25 | 南京图格医疗科技有限公司 | Multi-channel video processor and method for realizing watermark superposition based on processor |
| CN110798632A (en) * | 2019-11-28 | 2020-02-14 | 苏州长风航空电子有限公司 | OSD menu realization method based on FPGA |
| CN111405213B (en) * | 2020-03-24 | 2022-08-09 | 京东方科技集团股份有限公司 | Interface access method, display device and electronic equipment |
| CN112532992A (en) * | 2020-11-13 | 2021-03-19 | 武汉高德红外股份有限公司 | SDK development kit system and equipment |
| CN113316018B (en) * | 2021-04-12 | 2022-08-09 | 浙江华创视讯科技有限公司 | Method, device and storage medium for overlaying time information on video picture display |
| CN113190194A (en) * | 2021-04-22 | 2021-07-30 | 杭州腾纵科技有限公司 | Method and device for displaying video monitoring information |
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| CN1713264A (en) * | 2005-07-15 | 2005-12-28 | 合肥工业大学 | Digital OSD controller based on FRGA |
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| CN1713264A (en) * | 2005-07-15 | 2005-12-28 | 合肥工业大学 | Digital OSD controller based on FRGA |
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| CN101150682A (en) * | 2007-08-28 | 2008-03-26 | 西安交通大学 | A graphic OSD controller integrated into video processing chip |
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