CN101620546A - Realizing method of register window switching in binary translation - Google Patents
Realizing method of register window switching in binary translation Download PDFInfo
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Abstract
The invention relates to a realizing method of register window switching technology in dynamic binary translation, belonging to the technical field of computers. The realizing method comprises the following steps: corresponding to all register windows on a source platform by using a section of continuous memory space; storing the address of the current register window in the corresponding simulated memory space on the source platform using a virtual register and simulating a control/state register and a global register by using the other fixed memory space, wherein the control/state register and the global register are irrelevant to the register windows; determining the positions of the registers of the source platform in the simulated memory in a second-level addressing mode; and dynamically adjusting the value of the virtual register when each register window switching instruction is translated at the front end of a translator. The invention uses the second-level addressing mode to enable the value of the virtual register to be adjusted only when each register window switching instruction is translated into an intermediate instruction, thereby effectively reducing memory access frequency and further improving the execution efficiency of object codes after translation.
Description
Technical field
The present invention relates to a kind of register window changing method of field of computer technology, particularly a kind of register window switches in the implementation method in the binary translation.
Background technology
Binary translation is most widely used a kind of method in the virtual machine technique, be to solve to leave over code and improve the adaptive a kind of effective means of software platform, it is under the situation of the source code that does not need executable program, the binary program on the conversion source gallery dynamically, and make it to run on other target machine platforms.For dynamic binary translator self, execution performance is a very important measurement index.So-called execution performance is meant that the efficient of moving with source program is reference under former framework, its loss in efficiency degree under the running environment that dynamic binary translator provides is low more, and the execution performance of translater is good more.The dynamic binary translator that comprises metainstruction generally comprises front-end and back-end.Optimization to interpreter code just concentrates on intermediate language level and target machine code level, and the translation quality of front end has directly influenced the quality of the metainstruction that generates and the quality of target machine code.
Some system architecture, such as SPARC, AMD 29000 and Intel i960 have a large number of register, and work register is formed several windows, forms the structure of ring-type, utilizes the overlapping register window technology to come the running of faster procedure.The register window technology is exactly the registers group that register is divided into a lot of fixed qties, for each function call process is distributed a registers group, when calling, automatically CPU being transformed into different registers group uses, no longer need to do the operation of preserving and recovering, this registers group is a register window.The register that fixed qty is arranged between adjacent register window is overlapping, is used for carrying out between two register windows data sharing.The parameter transmission utilizes this mechanism to realize.When function call being arranged or returns from function, there is an instruction (such as on the SPARC being SAVE and RESTORE) to finish the switching of register window respectively, but owing to be not that every kind of system architecture all has corresponding mechanism, efficient seriously was affected when the program that so just causes compiling on the framework with register window technology was translated on other platform architecture, such as, be that the binary translation of front end just has significantly that performance reduces with SPARC.The solution register window switches in the method that realizes in the binary translation at present has:
Method one: the content that all registers are preserved in instruction to every SAVE, and the register read of lap got in the new register window, every RESTORE is instructed the content that reads the register of being preserved.
Method two: the data flow diagram of routine analyzer, the content that draws which register in view of the above need be used in the back of this instruction, to the content that these registers that need use are only preserved in every SAVE instruction, every RESTORE instruction is read the content of the register of being preserved.
Can see that first method all needs to carry out to duplicate between register many times operation with internal storage access for every register window switching command, efficient is very low; Second method has improved some on efficient, but need to analyze data flow diagram, increased the complexity of translater front end, and just eliminated the operation of a part of access memory, not from raising the efficiency in essence, because the frequency that the register window switching command is performed is very high, the value that at every turn will preserve some registers will certainly increase the read-write operation of many internal memories to internal memory.
Therefore, at above-mentioned technical barrier, in the prior art field, need to propose a kind of novel method that is applicable to based on the register window switching command in the binary translation of metainstruction, be used for improving the program that on platform, compiles and be translated the execution performance of back on heterogeneous platform with register window technology.
Summary of the invention
The objective of the invention is at the deficiencies in the prior art, provide a kind of register window to switch in implementation method in the binary translation.The present invention reduces the expense when moving by reducing the operation to internal memory, and the program execution performance of making has bigger lifting.
It is as follows to the present invention includes step:
1. not only with the register on the corresponding source platform of memory headroom of a register window size when the front end of translater is set up mapping relations, but with all register windows on one section contiguous memory space correspondence source platform;
2. preserve the address of current register window in the corresponding simulating memory headroom on the source platform with a virtual register, the pointer of mark register window position is set up mapping relations in this virtual register and the emulated memory space;
3. with other fixing memory headroom simulation and irrelevant control/status register and the global register of register window;
4. determine the position of source platform register in emulated memory for the metainstruction (such as the GET/PUT instruction) of map source platform registers and translater virtual register with the mode of second-level addressing, single level address be step 1. in the start address and the register number sum that will visit of memory headroom, two-level address is a single level address and the 2. value sum of middle virtual register of step;
5. when every register window switching command of translater front end translation dynamic adjustment step 2. in the value of virtual register.
Whole registers group rather than a register window by the dummy source platform when the front end at translater of step described in 1. set up mapping relations have been realized corresponding one by one with the register window of source platform very cleverly by the two-stage addressing mode then.
5. (this register is mapped to the pointer of the current register window of mark position to step by virtual register of described operation in, step 2. described in) adjust the window's position, replaced the operation that a last register window is switched to internal memory, reduced internal memory operation effectively, make the quality of intermediate code be greatly improved, thereby improved the execution efficient of object code.
Described corresponding one by one with the register window of source platform, all source-register groups and a memory headroom are set up mapping relations, the memory headroom regs of application window number size is set up upright mapping relations one by one with register window in the memory headroom of dummy source platform registers.
Binary translation of the present invention comprises two processes: the one, the reflection that moves under source platform is carried out destructing, and translate by fundamental block one by one, convert the intermediate code piece of forming by intermediate code to; The 2nd, the intermediate code block translation is become the target code block on target platform, can move.Dynamic binary translator comprises the intermediate code layer, because if will reach the translation characteristic of multi-source multi-target, many these one decks will reduce the translation path of translating target platform from source platform.Be that dynamic binary translator is divided into front-end and back-end.The quality of front end translation has directly influenced the quality of the intermediate code that generates.The present invention is used in the front end just, finishes a register window switching command simple and high-efficient and is translated as metainstruction.
The invention enables the virtual register of value only need adjust to(for) every register window switching command, i.e. the value of the pointer of the mark current register window position of step described in 2..This has significantly reduced the operation to internal memory, has improved the quality of the intermediate code that generates effectively, thereby has improved the execution performance of object code.Which compare with the method for preserving register by the decision of analysis data flow diagram, the present invention is effectively succinct, and replace traditional mode of duplicating a large amount of memory contents by the value of adjusting a virtual register and fundamentally reduced operation, thereby the execution efficient of the object code that translates is higher internal memory.
Description of drawings
Fig. 1 is the memory headroom distribution plan of the dummy source platform registers of the present invention's employing.
Embodiment
For understanding technical scheme of the present invention better, be further described below in conjunction with accompanying drawing and by specific embodiment.Following examples do not constitute limitation of the invention.
SPARC is a risc microcontroller of SUN and the cooperative development of TI company.The processor of SPARC comprises two types register: general-purpose register and control/status register, general-purpose register are divided into global register and register window.At any one time, an instruction can be visited 8 overall situation (globals) registers and a window that comprises 24 registers in the integer register cell.A register window is made up of 8 in registers, 8 local registers and 8 out registers, and wherein 8 out registers are with next identical in abutting connection with 8 in register addresss of window.The switching of SAVE and RESTORE instruction causing window.
CrossBit is a dynamic binary translation system, and it can be for carrying out the source program in multiple different architecture, and the method by translation and optimization provides the execution environment under the isomery framework.In order to realize multi-source multi-target, CrossBit has used the intermediate code layer, can reduce the translation path like this.Only need translate into the intermediate code piece to front end binary image program (front end), and then the intermediate code block translation is become corresponding target platform code (rear end), just can form a kind of binary translator.If target platform changes, only need to change a rear end.At present, CrossBit supports SimpleScalar, MIPS, X86, SPARC front end, X86 and SPARC rear end.CrossBit adopts VINST as the metainstruction collection, it is the self-designed cover metainstruction collection of CrossBit project team, be a kind of virtual machine instruction set of simplifying of low level, have infinite a plurality of 32 virtual registers, Load-Store style architecture, single inclined to one side location addressing mode.The execution framework of CrossBit is, at first load the source binary image, find out the entry address of source image, in TCache, search target code block afterwards to entering the mouth, so-called TCache is a region of memory, be used for depositing translated target code block, if search successfully, then switch contexts is carried out this target code block, if search failure, then start the front end demoder of CrossBit, to in the source image fundamental block that should the entry address being decoded into metainstruction, and be packaged into intermediate code piece (VBlock), the back-end code device that calls CrossBit then converts the metainstruction piece to target code block (TBlock).Be submitted in the TCache then, and then search TCache, TCache will occur and hit, at this moment carry out contextual switching again, carry out the execution of target code block.After target code block is finished, will turn back to the context of CrossBit, carry out the operation of next samsara.And so forth, be finished up to whole procedure.The front end binary image program (front end) of using the register window handoff technique is being translated in the process of intermediate code piece, will used method of the present invention and carry out translation the register window switching command.
A task of front end is that the register of source platform is simulated.The mode of dummy source platform registers is among the CrossBit, at first in memory headroom the application a continuous space, then the source platform register mappings in this piece memory headroom.
The present invention mainly comprises following plurality of processes, the mode of the register of the interpretative system of the initialization of the buffer status of particular source platform, register window switching command, back-end realization map source platform and the virtual register of CrossBit.Be without loss of generality, present embodiment relies on the execution framework of SPARC register window switching characteristic, CrossBit and the generation technique of target code block.
1. the buffer status of initialization source platform
I. the initialization in the emulated memory space of register window mapping
All source-register groups and a memory headroom are set up mapping relations, rather than only shine upon a register window at every turn.The application size is the memory headroom regs of REG_WINDOWS_SIZE in the SPARCProcessorState class, and this space content is initialized as 0:
volatile?XTInt32?regs[REG_WINODW_SIZE]；
UTIL::XTMemset((void*)®s，0，sizeof(regs))；
The initialization in the emulated memory space of ii. global register and control/status register mapping
Two memory headroom global[8 that initialization is other] and asr[EOASR] respectively in order to set up mapping relations with global register and the control/status register of above-mentioned SPARC, the value initialization of two memory headrooms is 0:
volatile?XTInt32?global[8]；
volatile?XTInt32?asr[EOASR]；
UTIL::XTMemset((void*)&global，0，sizeof(global))；
UTIL::XTMemset((void*)&asr，0，sizeof(asr))；
Iii. the initialization of register window pointer
The pointer of the current register window of mark position and the virtual register CWP of CrossBit set up mapping relations, and this pointer content is carried out initialization:
asr[CWP]＝REG_WINODWS_SIZE-24；
24 is numbers of register in each register window herein.
Iv. the address of source platform register in the emulated memory space
XTMemAddr get (XTRegNum reg) is the method that this class provides, and is used for obtaining the single level address of the pairing simulation address space of certain register of source platform.The performing step of XTMemAddr get (XTRegNumregNum) method is as follows:
If it is global register that register number regNum, illustrates this register so less than 8, directly return global+regNum; If register number regNum is less than 32 and be not less than 8, illustrate that then this register is a register in the register window, returns its single level address regs+regNum-8 here; If register number regNum is not less than 32, then this register is a control/status register, returns its address asr+regNum-32.
Owing to can't know the position of register window in internal memory, just can't determine the value of flag register the window's position pointer, so the position of certain register only could be determined when operation in the register window in the translating phase.So, can be when operation by the value of the pointer of the current register window of mark position being added the value of single level address, the address of source platform register in memory headroom that obtains simulateding.
2. translation register window switching command
Instruct for SAVE, the pointer of the register window position of the virtual register CWP of CrossBit and mark source platform is set up mapping relations, value with virtual register CWP deducts 16 then, promptly window is slided into adjacent next position, at last the value of window registers is shone upon back in the memory headroom of dummy source platform registers.Code is as follows:
sbb->add(LI(16，TEMPREG2))；
sbb->add(GET(CWP，CWP))；
sbb->add(SUB(CWP，TEMPREG2，CWP))；
sbb->add(PUT(CWP，CWP))；
The interpretative system of RESTORE instruction is identical substantially with the interpretative system of SAVE instruction, and unique difference is in the process of translation RESTORE instruction, need add 16 to the value of virtual register CWP, rather than deduct 16.Code is as follows:
sbb->add(LI(16，TEMPREG3))；
sbb->add(GET(CWP，CWP))；
sbb->add(ADD(CWP，TEMPREG3，CWP))；
sbb->add(PUT(CWP，CWP))；
In above-mentioned code, metainstruction GET and PUT are the instructions of centre of the virtual register of the register of map source platform and CrossBit.Can see under this interpretative system, duplicate a large amount of memory contents, but only need adjust the value of virtual register CWP no longer needing in the translation of window switching command.
3. realize the register of map source platform and the virtual register of CrossBit
The important step that the instruction of source platform machine is decoded is the mapping relations of setting up between the virtual register of the register of source platform machine and CrossBit.Comprise the register mappings of source platform virtual register (GET) to CrossBit, and the register (PUT instruction) that the virtual register of CrossBit is shone upon back the source platform machine.
In the rear end, the register of map source platform and the virtual register of CrossBit are realized by decoding metainstruction GET and metainstruction PUT.The decoding process of GET is described in detail in detail below, and the PUT instruction class seemingly.
(srcReg dstReg) is the virtual register dstReg that the register srcReg on the source platform is mapped to CrossBit to metainstruction GET.Its realization flow is as follows:
A) obtain the single level address of source platform register in the emulated memory space.
Because front end has instructed to source platform and has resolved, and can directly obtain the register number of the pairing dummy source platform registers of a certain source platform instruction here.Pass the instruction inst that comes for front end, obtain the register number of source platform instruction, call above-mentioned XTMemAddr get (XTRegNum regNum) method then and obtain the single level address of this register:
XTMemAddr?addr＝src_state->get(inst->getOperand(1).reg)；
B) obtain the CrossBit virtual register that will be mapped to
Described in a), front end has instructed to source platform and has resolved, and can directly obtain the virtual register that will be mapped to here:
XTRegNum?reg＝inst->getOperand(2).reg；
C) register in the mapping register window
According to the initialized agreement of front end, the register in the register window is a register number greater than 7 and less than 32 register.Calculated the single level address of register in the emulated memory space in the step a), here obtain the pointer src_state-of the current register window of mark position〉get (CWP), and the value of this pointer moved among the register Tsrc (implementation is X86::movwMemToReg (src_state-〉get (CWP), Tsrc)); The value of Tsrc is added single level address addr, promptly obtain the source platform register inst-that will shine upon the real address of getOperand (1) .reg in the emulated memory space.Applying for then that a register and this address are shone upon gets final product that (implementation is X86::movMemToReg (Tsrc, addr, WORD, X86RegAlloc (reg, DEF)); ).
D) shine upon other register
Other register comprises global register and control/status register.These two kinds of register addresses in the emulated memory space are fixed, therefore very simple to their processing, directly register of application gets final product address and this register mappings that obtains in a) that (implementation is X86::movwMemToReg (addr then, X86RegAlloc (reg, DEF)); ).
Claims (6)
1, a kind of register window switches in the implementation method in the binary translation, it is characterized in that, comprises the steps:
1. when the front end of translater is set up mapping relations with all register windows on the corresponding source platform in one section contiguous memory space;
2. preserve the address of current register window in the corresponding simulating memory headroom on the source platform with a virtual register, the pointer of mark register window position is set up mapping relations in this virtual register and the emulated memory space;
3. with other fixing memory headroom simulation and irrelevant control/status register and the global register of register window;
4. determine the position of source platform register in emulated memory for the metainstruction of map source platform registers and translater virtual register with the mode of second-level addressing;
5. when every register window switching command of translater front end translation dynamic adjustment step 2. in the value of virtual register.
2, register window according to claim 1 switches in the implementation method in the binary translation, it is characterized in that, described binary translation, comprise two processes: the one, the reflection that moves under source platform is carried out destructing, translate by fundamental block one by one, convert the intermediate code piece of forming by intermediate code to; The 2nd, the intermediate code block translation is become the target code block on target platform, can move.
3, register window according to claim 1 switches in the implementation method in the binary translation, it is characterized in that, when the front end at translater of step described in 1. set up mapping relations, by the whole registers group of dummy source platform, realized corresponding one by one with the register window of source platform by the two-stage addressing mode then.
4, register window according to claim 3 switches in the implementation method in the binary translation, it is characterized in that, the register window of described and source platform corresponding one by one, all source-register groups and a memory headroom are set up mapping relations, the memory headroom regs of application window number size is set up upright mapping relations one by one with register window in the memory headroom of dummy source platform registers.
5, register window according to claim 1 switches in the implementation method in the binary translation, it is characterized in that, step is adjusted the window's position by virtual register of described operation in 5., replaced the operation that a last register window is switched to internal memory, reduce internal memory operation, improved the execution efficient of object code.
6, register window according to claim 1 switches in the implementation method in the binary translation, it is characterized in that, the metainstruction of described map source platform registers and translater virtual register is the GET/PUT instruction.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102073533A (en) * | 2011-01-14 | 2011-05-25 | 中国人民解放军国防科学技术大学 | Multicore architecture supporting dynamic binary translation |
| CN103077011A (en) * | 2012-10-09 | 2013-05-01 | 华为技术有限公司 | Method and device for pre-generating machine code instruction in JavaScript scripting language |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN100462922C (en) * | 2007-11-01 | 2009-02-18 | 上海交通大学 | Binary translation method using intermediate command set |
| CN101387969B (en) * | 2008-10-16 | 2011-04-13 | 上海交通大学 | Dynamic binary translation method for cooperation design of software and hardware |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102073533A (en) * | 2011-01-14 | 2011-05-25 | 中国人民解放军国防科学技术大学 | Multicore architecture supporting dynamic binary translation |
| CN102073533B (en) * | 2011-01-14 | 2013-06-19 | 中国人民解放军国防科学技术大学 | Multicore architecture supporting dynamic binary translation |
| CN103077011A (en) * | 2012-10-09 | 2013-05-01 | 华为技术有限公司 | Method and device for pre-generating machine code instruction in JavaScript scripting language |
| CN103077011B (en) * | 2012-10-09 | 2015-12-09 | 华为技术有限公司 | A kind of method and apparatus of pre-generatmg machine code instruction in JavaScript script |
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