CN101620539B - Method for start-up and shutdown and computer - Google Patents
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Abstract
The invention discloses a method for start-up and shutdown and a computer. By using a characteristic that a non-volatile memory is capable of storing data for a long time and fast reading and writing data under the condition of no power supply, during the shutdown of the computer, a register status value of a chip set controller, a register status value of an input/output (I/O) interface and valid data in a memory are fast written into the non-volatile memory to realize fast shutdown; and during the start-up, the register status value of the chip set controller, the register status value of the I/O interface and the valid data in the memory at the shutdown time of the computer can be fast read from the non-volatile memory to realize fast recovery of an operating system. The method for start-up and shutdown not only can realize fast start-up and shutdown of the computer, but also does not have the problem of data loss due to the off of the power supply.
Description
Technical field
The present invention relates to computer realm, relate in particular to a kind of method for start-up and shutdown and computing machine.
Background technology
Along with the development of infotech, take processor as basic electronic equipment, as computing machine (PC, Personal Computer), be widely used.For general PC, after start, need through Basic Input or Output System (BIOS) (BIOS, Basic Input Output System) startup self-detection, operating system is written into the processes such as loading with application program, and this process needs the time of 1～2 minute usually; And also need the time of growing to back up preservation to the work at present data when shutdown.Especially in the situation that the PC use is more of a specified duration, because the accumulation of OS file is more and more, can makes operating system be written into the time more and more longer, thereby cause the speed of switching on and shutting down more and more slower.Above-mentioned problem, make troubles in the time of can using PC to the user; Need very long wait during due to the PC switching on and shutting down, therefore relatively lose time, can cause work efficiency to reduce, and easily allow the user produce weary mood to PC, reduce the enthusiasm of using PC.
In prior art, usually adopt the S3 mode to realize the fast open shutdown of PC, S3 refers to a kind of dormant state that PC is suspended to internal memory.PC, when entering the S3 state, keeps in program and the data of current operation system operation in internal memory, and now internal memory needs corresponding power supply to carry out maintenance work, comprises that other hardware of hard disk are in closed condition; When PC starts shooting from the S3 state, read data the recovery routine deposited from internal memory, thereby enter fast operating system.
Although this mode can realize the fast open shutdown of PC, but carry out maintenance work because the internal memory under the S3 state needs power supply, once power-off easily causes the loss of data in internal memory, cause operating system to be made mistakes, also can cause the operating system collapse in the time of serious.
In prior art, also exist a kind of employing S4 mode to realize the PC method for start-up and shutdown, S4 refers to a kind of dormant state that PC is suspended to hard disk.PC, when entering the S4 state, is stored in program and the data of current operation system operation in hard disk, now comprises that all hardware of internal memory and hard disk, all in closed condition, maintains without power supply; When PC starts shooting from the S4 state, read data the recovery routine deposited from hard disk, thereby enter operating system.
For the S4 mode, during the PC switching on and shutting down, need to from hard disk, read and write data and program, because the read or write speed of hard disk is slower, therefore, and when PC adopts the S4 mode to realize switching on and shutting down, time that need to be longer.
In sum, although existing S3 mode can realize the fast open shutdown of PC, the internal memory under the S3 state needs power supply to carry out maintenance work, once power-off easily causes the loss of data in internal memory; Although existing S4 mode not there will be loss of data, adopt the S4 mode to realize switching on and shutting down, still need to expend the longer time.
Summary of the invention
In view of this, fundamental purpose of the present invention is to provide a kind of method for start-up and shutdown and computing machine, both can realize the fast open shutdown of PC, also the phenomenon of loss of data can not occur because of closing of power supply.
For achieving the above object, technical scheme of the present invention is achieved in that
The invention provides a kind of computing machine, comprising: mainboard; Chipset, be arranged on described mainboard; Central processing unit, be arranged on described mainboard, with described chipset, is connected; Hard disk, be arranged on described mainboard, with described chipset, is connected, for storing data; Internal memory, be arranged on described mainboard, be connected with described chipset, for storage, treat the valid data that central processing unit is processed, described valid data for being written to the data in described hard disk in described internal memory the data for the treatment of that institute's central processing unit is processed after described chipset is processed; The I/O interface, be arranged on described mainboard, with described chipset, is connected; Power supply, be connected with described mainboard; Also comprise:
Control module, be arranged on described mainboard, by high-speed bus, with described chipset, is connected;
Nonvolatile memory, be arranged on described mainboard, with described control module, be connected, for to described computing machine, in shutdown, buffer status value, the buffer status value of described I/O interface and the valid data of internal memory of the controller of described chipset are stored constantly;
Wherein, described control module, be written in BIOS for the buffer status value of the controller of the described chipset that described computer shutdown is stored in constantly to described nonvolatile memory and the buffer status value of described I/O interface; The controller of described chipset reads the buffer status value of described chip combination control device from described BIOS, make described chip combination control device return to described computer shutdown duty constantly, described I/O interface reads the buffer status value of described I/O interface from described BIOS, makes described I/O interface return to described computer shutdown duty constantly; The valid data that described computer shutdown is stored in the internal memory in described nonvolatile memory constantly are written in described internal memory, described central processing unit is processed the described valid data in described internal memory, makes computer system return to described computer shutdown duty constantly.
Described control module, be further used for described computing machine in shutdown during constantly the buffer status value of the buffer status value of the valid data in internal memory, chip combination control device and I/O interface writes described nonvolatile memory.
Described nonvolatile memory is a plurality of, and described a plurality of nonvolatile memory is parallel arranged.
Described nonvolatile memory be or not quick flash memory (NandFlash Memory) or with not quick flash memory (NorFlash Memory).
Between described control module and described nonvolatile memory, by described high-speed bus, be connected.
Described high-speed bus is pci bus, PCI-E bus or SATA bus.
The present invention also provides a kind of closedown method based on above-mentioned computing machine, and described method comprises:
The shutdown command that acquisition is shut down computer;
Control module reads valid data in internal memory according to described shutdown command and by described valid data write non-volatile memory; Read by the buffer status value of the buffer status value of chip combination control device and I/O interface and by the buffer status value of the buffer status value of described chip combination control device and described I/O interface and write in described nonvolatile memory;
Cut off the power supply of described computing machine.
Described control module reads the valid data in described internal memory by pci bus, PCI-E bus or SATA bus, and the buffer status value of the buffer status value of chip combination control device and I/O interface.
The method further comprises: by described control module, by the valid data in described internal memory, and the buffer status value of the buffer status value of chip combination control device and I/O interface is written in parallel in a plurality of described nonvolatile memories.
It is a kind of based on above-mentioned opening computer method that the present invention separately provides, and described method comprises:
Obtain the open command of computing machine;
Central processing unit (CPU, Central Processing Unit) reads the initial value of described CPU internal register according to described open command, make described CPU in running order;
Described computer shutdown is stored in to the buffer status value of the chip combination control device in nonvolatile memory to control module constantly and the buffer status value of I/O (I/O, Input/Output) interface is written in basic input-output system BIOS; Described chip combination control device reads the buffer status value of described chip combination control device from described BIOS, make described chip combination control device return to described computer shutdown duty constantly, described I/O interface reads the buffer status value of described I/O interface from described BIOS, makes described I/O interface return to described computer shutdown duty constantly;
The valid data that described control module is stored in described computer shutdown in the internal memory in described nonvolatile memory constantly are written in described internal memory, described CPU processes the described valid data in described internal memory, makes computing machine return to described computer shutdown duty constantly.
Described control module is by peripheral component interconnection (PCI, Peripheral Component Interconnection) bus or peripheral component interconnection (PCI-E fast, Peripheral Component Interconnection Express) bus or Serial Advanced Technology Attachment (SATA, Serial Advanced Technology Attachment) bus reads the buffer status value of described chip combination control device, the buffer status value of I/O interface and the valid data in described internal memory from described nonvolatile memory.
The method further comprises: described control module is the parallel buffer status value of described chip combination control device, the buffer status value of I/O interface and the valid data in described internal memory of reading from a plurality of described nonvolatile memories.
Method for start-up and shutdown provided by the present invention and computing machine, utilize the nonvolatile memory can be in the situation that non-transformer supply storing data permanently and the fireballing characteristic of reading and writing data, when computer shutdown, by in the buffer status value of the buffer status value of chip combination control device, I/O interface and the valid data no write de-lay nonvolatile memory in internal memory, realize shutdown fast; And, when start, can from nonvolatile memory, read fast buffer status value, the buffer status value of I/O interface and the valid data in internal memory of computer shutdown chip combination control device constantly, realize the fast quick-recovery of operating system.The present invention compares existing S3 mode, because the data of storing in nonvolatile memory can not depend on power supply and maintain in the situation that the non-transformer supply is preserved for a long time, also just the phenomenon of loss of data can not occur because of closing of power supply; The present invention compares existing S4 mode, can realize the operation of PC switching on and shutting down faster.
The accompanying drawing explanation
The composition structural representation one that Fig. 1 is a kind of computing machine of the present invention;
The process flow diagram that Fig. 2 is a kind of closedown method of the present invention;
The process flow diagram that Fig. 3 is a kind of starting-up method of the present invention;
The composition structural representation two that Fig. 4 is a kind of computing machine of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, the technical solution of the present invention is further elaborated.
The present invention is by nonvolatile memory (NVRAM, Nonvolatile Random Access Memory) be applied in PC, for to PC, in shutdown, valid data, the buffer status value of chip combination control device and the buffer status value of I/O interface of internal memory are stored constantly.PC, when shutdown, by the buffer status value no write de-lay NVRAM of the buffer status value of the valid data in shutdown moment internal memory, chip combination control device and I/O interface, realizes shutdown fast; And, when start, can from NVRAM, read fast valid data, the buffer status value of chip combination control device and the buffer status value of I/O interface in shutdown moment internal memory, realize the fast quick-recovery of operating system.Adopt non-volatile static memory (NVSRAM in the present invention, Nonvolatile Static Random Access Memory) as a kind of preferred embodiment, realize the fast open shutdown of PC, common NV SRAM comprises NandFlash Memory and NorFlash Memory.
A kind of computing machine provided by the present invention as shown in Figure 1, comprising:
Mainboard;
Chipset, be arranged on mainboard;
CPU, be arranged on mainboard, with chipset, is connected;
Hard disk, be arranged on mainboard, with chipset, is connected, for storing data;
Internal memory, be arranged on mainboard, with chipset, is connected, and for storage, treats the valid data that CPU processes, and these valid data for being written to the data in hard disk in internal memory the data for the treatment of that the CPU of institute processes after chipset is processed;
The I/O interface, be arranged on mainboard, with chipset, is connected;
Control module, be arranged on mainboard, by high-speed bus, with chipset, is connected, and high-speed bus can be pci bus or PCI-E bus or SATA bus;
Non-volatile static memory, be arranged on mainboard, with between control module, by high-speed bus, be connected, for to computing machine, in shutdown, constantly buffer status value, the buffer status value of I/O interface and the valid data of internal memory of chip combination control device are stored;
Power supply, be connected with mainboard;
Wherein, control module, be written in BIOS for the buffer status value of the chip combination control device that computer shutdown is stored in constantly to non-volatile static memory and the buffer status value of I/O interface; The chip combination control device reads the buffer status value of chip combination control device from BIOS, make the chip combination control device return to computer shutdown duty constantly, the I/O interface reads the buffer status value of I/O interface from BIOS, makes the I/O interface return to computer shutdown duty constantly; The valid data that computer shutdown is stored in the internal memory in non-volatile static memory constantly are written in internal memory, and central processing unit is processed the valid data in internal memory, make computer system return to computer shutdown duty constantly;
For by computing machine in shutdown during constantly the buffer status value of the buffer status value of valid data, the chip combination control device of internal memory and I/O interface writes non-volatile static memory.
Computer implemented closedown method as shown in Figure 1 in the present invention as shown in Figure 2, mainly comprises the following steps:
When BIOS detects PC execution power-off operation, notice operating system stops current all programs of moving and data at once, and sends the shutdown command of closing PC to control module.
Control module by and internal memory between pci bus or PCI-E bus or SATA bus, read the valid data in internal memory, and the valid data that read write in NV SRAM.
Each chip combination control device in PC refers to the chip combination control device of the equipment such as internal memory, video card or network interface card in PC, and these chip combination control devices are controlled the duty of each equipment in PC, and has the state value of corresponding each equipment.In the PC shutdown constantly, the equipment such as internal memory, video card or network interface card quit work immediately, control module is by pci bus or PCI-E bus or SATA bus, the corresponding chip combination control device of each equipment, in PC shutdown buffer status value constantly writes NV SRAM, is stored by NVSRAM.
In the PC shutdown constantly, stop immediately the transmission of data on each I/O interface, control module, by pci bus, PCI-E bus or SATA bus, in PC shutdown buffer status value constantly writes NV SRAM, is stored each I/O interface by NV SRAM.
Because NV SRAM possesses in the situation that the characteristic of non-transformer supply storing data permanently, therefore after the PC powered-down, the buffer status value of the valid data in the internal memory of storing at NV SRAM by above-mentioned steps 202 to 204, the buffer status value of chip combination control device and I/O interface can continue to be stored in NV SRAM, can not lose.
From the closedown method shown in above-mentioned Fig. 2, because NV SRAM has reading and writing data speed fast, thereby make the closedown method shown in Fig. 2 there is data backup memory speed faster constantly in the PC shutdown; And, in the situation that the PC powered-down, the data that write in NV SRAM can be preserved for a long time, can not lose.It is to be noted, the data write operation of above-mentioned step 202, step 203 and step 204 does not have order successively, the execution sequence that is also step 202, step 203 and step 204 is not limited only to the order in the present invention, also can putting in order for other.
Computer implemented starting-up method as shown in Figure 1 in the present invention as shown in Figure 3, mainly comprises the following steps:
Executing above-mentioned steps 302 and step 303, after state when chip combination control device and I/O interface are returned to the PC shutdown, recover again the valid data in internal memory, thus can be from chip combination control device and I/O interface the valid data of the state when the shutdown starting to carry out internal memory.
From the starting-up method shown in above-mentioned Fig. 3, because NV SRAM has reading and writing data speed fast, thereby make the closedown method shown in Fig. 3 constantly there is data resume speed faster in the PC start, and then reach the purpose of quick turn-on.It is pointed out that above-mentioned step 302 and step 303 do not have sequencing, is also that step 303 also can be carried out before step 302.
In addition, in order further to accelerate the speed of PC switching on and shutting down, in the present invention, can be improved the structure of PC shown in Fig. 1.PC after improvement as shown in Figure 4, PC in Fig. 4 comprises a plurality of NV SRAM, and a plurality of NV SRAM parallel arranged, thereby in the PC shutdown constantly,, control module can be written in parallel to a plurality of NV SRAM by the buffer status value of the buffer status value of chip combination control device, I/O interface and the valid data in internal memory; In PC shutdown constantly, control module can walk abreast and read the buffer status value of the buffer status value of the chip combination control device stored in a plurality of parallel NV SRAM, I/O interface and the valid data in internal memory.For example: in the PC formed in mode arranged side by side by 8 NV SRAM, when control module writes NV SRAM in the data by a byte (Byte), can by 8 (Bit) data comprising in Byte data respectively correspondence write in 8 NV SRAM, also a NV SRAM only stores an a data in the Byte data; And, when reading out data, can walk abreast and read each Bit data of storing in 8 NV SRAM.As can be seen here, the PC shown in Fig. 4 compares the PC shown in Fig. 2, has reading and writing data speed faster, thereby can reach the speed of PC switching on and shutting down faster.
It is pointed out that the application software that the present invention is carrying out while shutting down for PC, for example: word document etc. is also to be stored in NV SRAM; When PC starts shooting, can be from the NV SRAM fast quick-recovery of application software, thus convenient for users to use.In addition, because usually reading and writing more than 100,000 times the serviceable life of NV SRAM in the present invention, and in the present invention, PC switching on and shutting down carry out the read-write of a NVSRAM, and therefore, the reading-writing life-span of 100,000 times can meet the needs of practical application.
The above, be only preferred embodiment of the present invention, is not intended to limit protection scope of the present invention.
Claims (11)
1. a computing machine, comprising: mainboard; Chipset, be arranged on described mainboard; Central processing unit, be arranged on described mainboard, with described chipset, is connected; Hard disk, be arranged on described mainboard, with described chipset, is connected, for storing data; Internal memory, be arranged on described mainboard, be connected with described chipset, for storage, treat the valid data that central processing unit is processed, described valid data for being written to the data in described hard disk in described internal memory the data for the treatment of that described central processing unit is processed after described chipset is processed; The I/O interface is arranged on described mainboard, with described chipset, is connected; Power supply, be connected with described mainboard; Characterized by further comprising:
Control module, be arranged on described mainboard, by high-speed bus, with described chipset, is connected;
Nonvolatile memory, be arranged on described mainboard, with described control module, is connected, for storing buffer status value, the buffer status value of described I/O interface and the valid data of internal memory of described computing machine at the controller of described chipset of the shutdown moment;
Wherein, described control module, for by described computing machine in shutdown during constantly the buffer status value of the buffer status value of valid data, the chip combination control device of internal memory and I/O interface writes described nonvolatile memory; Also for the buffer status value of the described chip combination control device that described computer shutdown is stored in constantly to described nonvolatile memory and the buffer status value of described I/O interface, be written in BIOS; The controller of described chipset reads the buffer status value of described chip combination control device from described BIOS, make described chip combination control device return to described computer shutdown duty constantly, described I/O interface reads the buffer status value of described I/O interface from described BIOS, makes described I/O interface return to described computer shutdown duty constantly; The valid data that described control module is stored in described computer shutdown in the internal memory in described nonvolatile memory constantly are written in described internal memory, described central processing unit is processed the described valid data in described internal memory, makes computing machine return to described computer shutdown duty constantly.
2. computing machine according to claim 1, is characterized in that, described nonvolatile memory is a plurality of, and described a plurality of nonvolatile memory is parallel arranged.
3. according to the described computing machine of claim 1 or 2, it is characterized in that, described nonvolatile memory be or not quick flash memory NorFlash Memory or with not quick flash memory NandFlash Memory.
4. according to the described computing machine of claim 1 or 2, it is characterized in that, be connected by described high-speed bus between described control module and described nonvolatile memory.
5. according to the described computing machine of claim 1 or 2, it is characterized in that, described high-speed bus is pci bus, PCI-E bus or SATA bus.
6. the closedown method based on the described computing machine of claim 1, is characterized in that, described method comprises:
The shutdown command that acquisition is shut down computer;
Control module reads valid data in internal memory according to described shutdown command and by described valid data write non-volatile memory; Read the buffer status value of the buffer status value of chip combination control device and I/O interface and the buffer status value of the buffer status value of described chip combination control device and described I/O interface is write in described nonvolatile memory.
7. closedown method according to claim 6, it is characterized in that, described control module reads valid data and the buffer status value of chip combination control device and the buffer status value of I/O interface in described internal memory by pci bus, PCI-E bus or SATA bus.
8. according to the described closedown method of claim 6 or 7, it is characterized in that, the method further comprises: described control module is by the valid data in described internal memory, and the buffer status value of the buffer status value of chip combination control device and I/O interface is written in parallel in a plurality of described nonvolatile memories.
9. one kind based on the described opening computer method of claim 1, it is characterized in that, described method comprises:
Obtain the open command of computing machine;
Central processor CPU reads the initial value of described CPU internal register according to described open command, make described CPU in running order;
Described computer shutdown is stored in to the buffer status value of the chip combination control device in nonvolatile memory to control module constantly and the buffer status value of I/O I/O interface is written in basic input-output system BIOS; Described chip combination control device reads the buffer status value of described chip combination control device from described BIOS, make described chip combination control device return to described computer shutdown duty constantly, described I/O interface reads the buffer status value of described I/O interface from described BIOS, makes described I/O interface return to described computer shutdown duty constantly;
The valid data that described control module is stored in described computer shutdown in the internal memory in described nonvolatile memory constantly are written in described internal memory, described CPU processes the described valid data in described internal memory, makes computing machine return to described computer shutdown duty constantly.
10. starting-up method according to claim 9, it is characterized in that, described control module reads the buffer status value of described chip combination control device, the buffer status value of I/O interface and the valid data in described internal memory by peripheral component interconnection pci bus, quick peripheral component interconnection PCI-E bus or Serial Advanced Technology Attachment SATA bus from described nonvolatile memory.
11. according to the described starting-up method of claim 9 or 10, it is characterized in that, the method further comprises: described control module is the parallel buffer status value of described chip combination control device, the buffer status value of I/O interface and the valid data in described internal memory of reading from a plurality of described nonvolatile memories.
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