CN101616551A - Wiring board and technology thereof - Google Patents
Wiring board and technology thereof Download PDFInfo
- Publication number
- CN101616551A CN101616551A CN200810110262A CN200810110262A CN101616551A CN 101616551 A CN101616551 A CN 101616551A CN 200810110262 A CN200810110262 A CN 200810110262A CN 200810110262 A CN200810110262 A CN 200810110262A CN 101616551 A CN101616551 A CN 101616551A
- Authority
- CN
- China
- Prior art keywords
- layer
- line
- wiring board
- route protection
- line layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The invention discloses a kind of wiring board and technology thereof.The technology of this wiring board may further comprise the steps.At first, provide a circuit base plate, it comprises one first line layer, and first line layer comprises at least one barrier layer.Then, form a local route protection layer that covers barrier layer.Then, form the dielectric layer of comprehensive covering first line layer and route protection layer.Then, form one second line layer on dielectric layer.Second line layer has at least one opening, its local dielectric layer that is positioned at the barrier layer top that exposes.Then, utilize a laser beam to remove opening institute exposed portions dielectric layer, to form a groove that exposes barrier layer and route protection layer.Afterwards, remove the barrier layer that is not covered, to form an exposed circuit by the route protection layer.The present invention can improve the quality of the electric connection between connection pad and the electronic component, and the yield of wiring board.
Description
Technical field
The invention relates to a kind of wiring board and technology thereof, and particularly relevant for a kind of wiring board and technology thereof with multilayer line (circuit).
Background technology
In wiring board technology now, Layer increasing method (build-up) is the technology that at present a lot of circuit board techniques are adopted.In known Layer increasing method, semi-solid preparation film (prepreg) is used to form the dielectric layer of wiring board usually.Generally speaking, normally form dielectric layer in the mode of line layer with pressing semi-solid preparation film.
In known Layer increasing method, for example the disclosed technical characterictic of Japanese patent laid-open 10-022645 at first forms rete in the mode of printing on inner plating, and the position of rete and the predetermined position consistency that forms opening.Then, before pressing semi-solid preparation film, can on the semi-solid preparation film, form an opening earlier in the mode of profile cutting (routing).Then, lamina rara externa and semi-solid preparation film are pressed on inner plating, so that the semi-solid preparation film is connected between lamina rara externa and the inner plating, and rete is placed in the opening.Afterwards, the predetermined position that forms opening of cutting lamina rara externa, and rete is come out by opening.At last, remove rete and form a groove on wiring board.
Yet when the mechanical registeration tool was adjusted the position of opening, the site error that the mechanical registeration tool is produced when moving opening can reduce the Aligning degree of opening, to such an extent as to opening fails to be located on the correct position, and then caused the yield of wiring board on the low side.
Summary of the invention
The technology that the purpose of this invention is to provide a kind of wiring board and wiring board is to improve the yield of wiring board.
The invention provides a kind of technology of wiring board, may further comprise the steps.At first, provide a circuit base plate, it comprises one first line layer, and first line layer comprises at least one barrier layer.Then, form a local route protection layer that covers barrier layer.Then, form one first dielectric layer, its comprehensive covering first line layer and route protection layer.Then, form one second line layer on first dielectric layer, wherein second line layer has at least one first opening, and local first dielectric layer that is positioned at the barrier layer top that exposes of first opening.Then, utilize a laser beam to remove first opening institute exposed portions first dielectric layer, to form a groove that exposes barrier layer and route protection layer.Then, remove the barrier layer that is not covered, to form an exposed circuit in this groove by the route protection layer.
In one embodiment of this invention, wherein exposed circuit comprises at least one connection pad and at least one cabling.
In one embodiment of this invention, the method that forms first dielectric layer comprises that pressing one semi-solid preparation film is on first line layer.
In one embodiment of this invention, the method that removes barrier layer comprises etch barrier.
In one embodiment of this invention, the material of above-mentioned route protection layer comprises nickel and gold.
In one embodiment of this invention, the method that forms second line layer may further comprise the steps.At first, form a conductive layer on first dielectric layer.Then, patterned conductive layer.
In one embodiment of this invention, the method for patterned conductive layer comprises conductive layer is carried out photoetching and etching.
In one embodiment of this invention, above-mentioned circuit base plate also comprises a core layer.Core layer has the lower surface of a upper surface and a relative upper surface.First line layer is disposed at upper surface.
In one embodiment of this invention, above-mentioned circuit base plate comprises that also one is disposed at the tertiary circuit layer of lower surface.
In one embodiment of this invention, the technology of above-mentioned wiring board is further comprising the steps of.Removing before the part of first dielectric layer, forming second dielectric layer of comprehensive covering second line layer.Then, form one the 4th line layer on second dielectric layer, wherein the 4th line layer has one second opening, and local second dielectric layer that is positioned at the barrier layer top that exposes of second opening.
In one embodiment of this invention, when removing part of first dielectric layer, more utilize laser beam to remove second opening institute exposed portions second dielectric layer, to expose barrier layer and route protection layer.
In one embodiment of this invention, the method that forms second dielectric layer comprises that pressing one semi-solid preparation film is on second line layer.
In one embodiment of this invention, the method that forms the 4th line layer may further comprise the steps.Form a conductive layer on second dielectric layer.Then, patterned conductive layer.
The present invention provides a kind of wiring board in addition, and it has at least one groove.Wiring board comprises: a core layer, one first line layer, a route protection layer, one first dielectric layer, one second line layer and a tertiary circuit layer.Core layer has the lower surface of a upper surface, a relative upper surface.First line layer is disposed at upper surface, and comprises an exposed circuit.The route protection layer is disposed on the exposed circuit.First dielectric layer is disposed on first line layer.Second line layer is disposed on first dielectric layer, and its further groove is positioned at upper surface, and exposes the part edge of exposed circuit, route protection layer and side surface.The tertiary circuit layer is disposed at lower surface.
In one embodiment of this invention, above-mentioned exposed circuit comprises at least one connection pad and at least one cabling.
In one embodiment of this invention, above-mentioned wiring board also comprises one second dielectric layer and one the 4th line layer.Second dielectric layer is disposed on second line layer, and the 4th line layer is disposed on second dielectric layer, and its further groove more extends to the 4th line layer from first line layer.
In one embodiment of this invention, the notch of above-mentioned groove is shaped as rectangle, U-shaped or L shaped and irregular arc.
In sum, the present invention can form the dielectric layer of comprehensive covering line layer earlier on line layer (for example first line layer and second line layer).Afterwards, utilize laser beam to remove the part dielectric layer, to form the groove that exposes exposed circuit.Therefore, the present invention needn't carry out in known technology opening being aimed at the step of connection pad.Compared to known technology, the present invention can improve the quality of the electric connection between connection pad and the electronic component, and the yield of wiring board.
For above-mentioned feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and cooperate appended diagram, be described in detail below.
Description of drawings
Figure 1A is the schematic top plan view of the wiring board of first embodiment of the invention.
Figure 1B is the generalized section of Figure 1A center line I-I.
Fig. 2 A to Fig. 2 F is the schematic diagram of circuit board technique among Figure 1B.
Fig. 3 A to Fig. 3 D is the schematic diagram of the circuit board technique of second embodiment of the invention.
Fig. 4 A to Fig. 4 C is the schematic diagram of the circuit board technique of third embodiment of the invention.
Fig. 5 is the schematic diagram of the wiring board of another embodiment of the present invention.
Description of reference numerals
100,200,300: wiring board
100 ': circuit base plate
102,102 ', 104,106,108: groove
104a, 104b: first ladder, second ladder
110: core layer
112: upper surface
114: lower surface
116: side surface
116a: edge
120,120 ': the first line layer
122,152: exposed circuit
122a: connection pad
122b: cabling
124,154: barrier layer
130,132: the route protection layer
140: the first dielectric layers
150: the second line layers
150 ', 180 ': conductive layer
160: the tertiary circuit layer
170: the second dielectric layers
180: the four line layers
B: laser beam
H1, H2: opening
Embodiment
First embodiment
Figure 1A is the schematic top plan view of the wiring board of first embodiment of the invention, and Figure 1B is the generalized section of Figure 1A center line I-I.See also Figure 1A and Figure 1B, wiring board 100 has a plurality of grooves 102,104 and 106, and the notch of these grooves 102,104 and 106 has multiple shape.For instance, in the embodiment shown in Figure 1A, being shaped as of the notch of groove 102 is L shaped, the notch of groove 104 be shaped as U-shaped, and the notch of groove 106 be shaped as rectangle.
These grooves 102,104 and 106 expose an exposed circuit 122, and exposed circuit 122 can comprise a plurality of connection pad 122a and many cabling 122b, shown in Figure 1A.By these connection pads 122a, wiring board 100 is connected outside electronic component, for example chip or passive component.Certainly, demand according to wiring board 100, in the embodiment that other do not illustrate, exposed circuit 122 can also only comprise a connection pad 122a and a cabling 122b, and wiring board 100 also can only have these grooves 102,104 and 106 one of them, and this groove only exposes a connection pad 122a and a cabling 122b.Therefore, the two quantity of the groove shown in Figure 1A, connection pad 122a and cabling 122b is only for illustrating, and non-limiting the present invention.
First dielectric layer 140 is disposed on first line layer 120, and second line layer 150 is disposed on first dielectric layer 140, and tertiary circuit layer 160 is disposed at the lower surface 114 of core layer 110.These grooves 102,104 and 106 extend to second line layer 150 from first line layer 120, and expose the part edge 116a of exposed circuit 122, route protection layer 130 and side surface 116.That is to say that these grooves 102,104 and 106 are positioned at the upper surface 112 of core layer 110, and be positioned at the edge (shown in Figure 1A) of wiring board 100.
In the present embodiment, wiring board 100 can have more at least one groove 108, and the structure of groove 108 is similar to groove 102,104 and 106.Particularly, groove 108 also exposes exposed circuit 122, and groove 108 also extends to second line layer 150 from core layer 110 surfaces.Yet the difference between groove 108 and groove 102,104 and 106 is: the part edge 116a on groove 108 unexposed side surfaces 116, promptly groove 108 does not lie in the edge (shown in Figure 1A) of wiring board 100.
Below introduce the structure of wiring board 100 in detail, next will cooperate Fig. 2 A to Fig. 2 F to describe the technology of wiring board 100 in detail.
Fig. 2 A to Fig. 2 F is the schematic diagram of circuit board technique among Figure 1B.Please consult Fig. 2 A earlier, the technology of wiring board 100 may further comprise the steps.At first, provide a circuit base plate 100 ', it comprises first line layer 120 ', core layer 110 and tertiary circuit layer 160.First line layer 120 ' is disposed at the upper surface 112 of core layer 110, and tertiary circuit layer 160 is disposed at the lower surface 114 of core layer 110.In addition, first line layer 120 ' comprises at least one barrier layer 124.
See also Fig. 2 B, then, form route protection layer 130, wherein route protection layer 130 local barrier layer 124, i.e. the route protection layer 130 expose portion barrier layer 124 of covering.The material of route protection layer 130 can comprise nickel gold or stainless steel, and the method for formation route protection layer 130 has a variety of.
For example, the method for formation route protection layer 130 can may further comprise the steps.At first, form a pattern chemoprevention coating, wherein pattern chemoprevention coating covers the upper surface 112 of first circuit 120 ' and core layer 110, and the part exposes barrier layer 124.Then, utilize galvanoplastic or electroless plating method or sputtering method to form route protection layer 130, and after circuit protective layer 130 forms, remove pattern chemoprevention coating.
In addition, the method for formation route protection layer 130 also can may further comprise the steps.At first, form the rete of comprehensive covering first line layer 120 ' and upper surface 112.Then, utilize photoetching and etching to remove the part rete.So, route protection layer 130 is formed.Except that this, route protection layer 130 also can be to form with the mode of printing.
See also Fig. 2 C, then, form first dielectric layer 140, the upper surface 112 of its comprehensive covering first line layer 120 ', route protection layer 130 and core layer 110.First dielectric layer 140 is formed by resin material or semi-solid preparation film, and the method that forms first dielectric layer 140 can be that pressing a slice semi-solid preparation film is on first line layer 120 '.
See also Fig. 2 C and Fig. 2 D, then, form second line layer 150 on first dielectric layer 140, wherein second line layer 150 has at least one opening H1, and local first dielectric layer 140 that is positioned at barrier layer 124 tops that exposes of opening H1, shown in Fig. 2 D.
In the present embodiment, the method that forms second line layer 150 can may further comprise the steps.Please consult Fig. 2 C earlier, at first, form a conductive layer 150 ' on first dielectric layer 140, form and conductive layer 150 ' can be mode, galvanoplastic or an electroless plating method with the pressing Copper Foil.See also Fig. 2 D, then, patterned conductive layer 150 '.The method of patterned conductive layer 150 ' can be that conductive layer 150 ' is carried out photoetching and etching.So, second line layer 150 is formed.
See also Fig. 2 D and Fig. 2 E, then, utilize a laser beam B to remove opening H1 institute exposed portions first dielectric layer 140,, and expose barrier layer 124 and route protection layer 130 with formation groove 102.The material of first line layer 120 ' can be copper, silver or other conductivity good metal, and the material of route protection layer 130 can comprise anti-oxidation metals such as nickel, gold or stainless steel.
Secondly, laser beam B is provided by the carbon dioxide laser device.Therefore, the absorptivity of 124 couples of laser beam B of barrier layer of first line layer 120 ' is on the low side, to such an extent as to laser beam B is difficult for barrier layer 124 scorifications.So, barrier layer 124 is protected core layer 110 to avoid suffering the destruction of laser beam B.
See also Fig. 2 E and Fig. 2 F, then, remove the barrier layer 124 that is not covered, and after removing barrier layer 124, form first line layer 120 that comprises exposed circuit 122 by route protection layer 130.In the present embodiment, the method that removes barrier layer 124 can be an etch barrier 124.Specifically, can utilize Wet-type etching to remove barrier layer 124, and above-mentioned Wet-type etching can adopt can only etch barrier 124, and be difficult to destroy the etching soup of circuit protective layer 130.After treating that exposed circuit 122 forms, a kind of wiring board 100 has been made basically and has been finished.
What deserves to be mentioned is, present embodiment more can form at least one dielectric layer and at least one line layer under the lower surface 114 of core layer 110, so though the wiring board 100 shown in Figure 1B and Fig. 2 F comprises three layers of line layer (i.e. first line layer 120, second line layer 150 and tertiary circuit layer 160), but in the embodiment that other do not illustrate, wiring board 100 more can comprise the line layer more than four layers or four layers, and at least one layer of line layer is positioned at core layer 110 belows.Therefore, the number of the line layer shown in Figure 1B and Fig. 2 F only supplies to illustrate, and non-limiting the present invention.
Second embodiment
Fig. 3 A to Fig. 3 D is the schematic diagram of the circuit board technique of second embodiment of the invention.The circuit board technique of present embodiment is similar to first embodiment, the therefore following difference that will mainly introduce the present embodiment and first embodiment.
See also Fig. 3 A, after first dielectric layer 140 and second line layer 150 are formed at the upper surface 112 of core layer 110, form one second dielectric layer 170, wherein second dielectric layer 170 is disposed on second line layer 150, and comprehensive covering second line layer 150.The method that forms second dielectric layer 170 can be similar to the method for formation first dielectric layer 140 among first embodiment.Specifically, second dielectric layer 170 can be by pressing one semi-solid preparation film on second line layer 150 and form.
See also Fig. 3 A and Fig. 3 B, afterwards, form one the 4th line layer 180 on second dielectric layer 170, wherein the 4th line layer 180 has an opening H2.Opening H2 is local to expose second dielectric layer 170 that is positioned at barrier layer 124 tops, and the corresponding opening H1 of opening H2.Therefore, there is no line layer directly over barrier layer 124 and the route protection layer 130 distributes.The formation method of the 4th line layer 180 can be similar to the method for formation second line layer 150 among first embodiment.For example, the method that forms the 4th line layer 180 may further comprise the steps.
Please consult Fig. 3 A earlier, at first, form a conductive layer 180 ' on second dielectric layer 170.Conductive layer 180 ' can be to form with the mode of pressing Copper Foil, galvanoplastic or electroless plating method.See also Fig. 3 B, then, patterned conductive layer 180 ', to form the 4th line layer 180, wherein the method for patterned conductive layer 180 ' can be that conductive layer 180 ' is carried out photoetching and etching.
See also Fig. 3 B and Fig. 3 C, then, utilize laser beam B to remove opening H2 institute exposed portions second dielectric layer 170, be positioned at the groove 102 ' of upper surface 112 with formation.Distribute owing to there is no line layer directly over barrier layer 124 and the route protection layer 130, so first dielectric layer 140 and second dielectric layer 170 of smooth scorification barrier layer 124 tops of laser beam B energy.So, groove 102 ' is exposed barrier layer 124 and route protection layer 130, and groove 102 ' extends to the 4th line layer 180 from core layer 110 surfaces.In addition, the shape of the notch of groove 102 ' can be identical with the groove 102,104 or 106 of first embodiment.
See also Fig. 3 C and Fig. 3 D, then, remove the barrier layer 124 that is not covered by route protection layer 130.After removing barrier layer 124, form first line layer 120 that comprises exposed circuit 122.In the present embodiment, the method that removes barrier layer 124 can be an etch barrier 124.For instance, can utilize Wet-type etching to remove barrier layer 124, and above-mentioned Wet-type etching can adopt can only etch barrier 124, and be difficult to destroy the etching soup of circuit protective layer 130.So far, basically, a kind of wiring board 200 that comprises core layer 110, first line layer 120, route protection layer 130, first dielectric layer 140, second line layer 150, tertiary circuit layer 160, second dielectric layer 170 and the 4th line layer 180 has been made and has been finished.
What deserves to be mentioned is, present embodiment can also form at least one dielectric layer and at least one line layer under the lower surface 114 of core layer 110 or on the 4th line layer 180, so though the wiring board 200 shown in Fig. 3 D comprises four layers of line layer (i.e. first line layer 120, second line layer 150, tertiary circuit layer 160 and the 4th line layer 180), but in the embodiment that other do not illustrate, wiring board 200 can also comprise the line layer more than five layers or five layers.Therefore, the number of the line layer shown in Fig. 3 D only supplies to illustrate, and non-limiting the present invention.
The 3rd embodiment
Fig. 4 A to Fig. 4 C is the schematic diagram of the circuit board technique of third embodiment of the invention.The circuit board technique of present embodiment is similar to second embodiment, the therefore following difference that will mainly introduce the present embodiment and second embodiment.
See also Fig. 4 A, first line layer has first barrier layer and the local first route protection layer that covers first barrier layer, and second line layer has second barrier layer and the local second route protection layer that covers second barrier layer.Second dielectric layer is between second line layer and the 4th line layer, and the 4th line layer has opening H2.Opening H2 is local to expose second dielectric layer 170 that is positioned at second barrier layer, 124 tops, and the size of opening H2 is greater than opening H1.Therefore, there is no line layer directly over first barrier layer 124 and the first route protection layer 130 and distribute, and there is no the line layer distribution directly over second barrier layer 154 and the second route protection layer 132.
See also Fig. 4 B, afterwards, utilize laser beam B to remove opening H2 institute exposed portions second dielectric layer 170 and part of first dielectric layer 140, to form a stepped groove 104.So, the ladder of groove 104 extends to the 4th line layer 180 from core layer 110 surfaces, and then exposes first barrier layer 124, the first route protection layer 130, second barrier layer 154 and the second route protection layer 132.
See also Fig. 4 C, then, remove first barrier layer 124 that is not covered, and remove second barrier layer 154 that is not covered by the second route protection layer 132 by the first route protection layer 130.After removing first barrier layer 124, form first line layer 120 that comprises exposed circuit 122.After removing second barrier layer 154, form second line layer 150 that comprises exposed circuit 152.In the present embodiment, the method that removes first, second barrier layer 124,154 can be etching.For instance, can utilize Wet-type etching to remove first, second barrier layer 124,154.So far, basically, a kind of wiring board 300 with cascade groove 104 has been made and has been finished.
Then, please refer to Fig. 5, in another embodiment, be formed with the first relative ladder 104a and the second ladder 104b in the groove 104, the first ladder 104a extends to the 4th line layer 180 by core layer 110 surfaces to a side, and the second ladder 104b extends to the 4th line layer 180 by core layer 110 surfaces to opposite side.Because the circuit board technique of present embodiment is similar to the 3rd embodiment; the manufacture method and the step of therefore relevant first line layer 120, the first route protection layer 130, first dielectric layer 140, second line layer 150, the second route protection layer 132, tertiary circuit layer 160, second dielectric layer 170 and the 4th line layer 180; can adjust a little according to the 3rd embodiment and learn, not repeat them here.
In sum, the present invention is the dielectric layer that forms comprehensive covering line layer (for example first line layer and second line layer) earlier.Afterwards, utilize laser beam to remove the part dielectric layer, to form the groove that exposes exposed circuit.Therefore, the present invention need not the semi-solid preparation film is carried out the profile nicking with the formation opening, and the present invention more needn't carry out opening is aimed at the step of connection pad.Compared to known technology, the present invention can improve the quality of the electric connection between connection pad and the electronic component.
Secondly, because groove of the present invention is to utilize laser beam to form, therefore groove can be formed at the lip-deep optional position of wiring board, for example groove can be formed at central authorities' (as groove among Figure 1A 108) of PCB surface, or groove can be formed at the edge (as the groove among Figure 1A 102～106) of wiring board, and the present invention more can form the groove of different notch shape, and for example notch shape is the groove of L shaped, U-shaped or rectangle.Compared to the prior art, circuit board technique of the present invention more can satisfy diversified circuit design.
In addition,, form, so the Stability Analysis of Structures of wiring board of the present invention is difficult for producing the influence to dysplasia via this dielectric layer of laser beam scorification because groove is after forming dielectric layer.Moreover the present invention can improve the quality of the electric connection between connection pad and the electronic component.Therefore, compared to known technology, the present invention can improve the yield of wiring board.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; those of ordinary skill in the technical field under any; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking appended the claim person of defining.
Claims (10)
1, a kind of technology of wiring board comprises:
One circuit base plate is provided, and it comprises one first line layer, and this first line layer comprises at least one first barrier layer;
Form local first a route protection layer that covers this first barrier layer;
Form one first dielectric layer, this first line layer of its comprehensive covering and this first route protection layer;
Form one second line layer on this first dielectric layer, wherein this second line layer has at least one first opening, local this first dielectric layer that is positioned at this barrier layer top that exposes of this first opening;
Utilize a laser beam to remove this first opening institute this first dielectric layer of exposed portions, to form a groove that exposes this barrier layer and this first route protection layer; And
Remove this first barrier layer that is not covered, to form an exposed circuit in this groove by this first route protection layer.
2, the technology of wiring board as claimed in claim 1, wherein this circuit base plate also comprises a core layer, and this core layer has the lower surface of a upper surface, relative this upper surface, and this first line layer is disposed at this upper surface.
3, the technology of wiring board as claimed in claim 2, wherein this circuit base plate comprises that also one is disposed at the tertiary circuit layer of this lower surface.
4, the technology of wiring board as claimed in claim 3 also comprises:
Removing before this first dielectric layer of part, form second dielectric layer of this second line layer of comprehensive covering;
Form one the 4th line layer on this second dielectric layer, wherein the 4th line layer has one second opening, and local this second dielectric layer that is positioned at this first barrier layer top that exposes of this second opening; And
When removing this first dielectric layer of part, more utilize this laser beam to remove this second opening institute this second dielectric layer of exposed portions, to expose this first barrier layer and this first route protection layer.
5, the technology of wiring board as claimed in claim 4; wherein this second line layer also comprises at least one second barrier layer and local second a route protection layer that covers this second barrier layer; and when removing this second opening institute this second dielectric layer of exposed portions with this laser beam, also comprise exposing this second barrier layer and this second route protection layer.
6, a kind of wiring board has at least one groove, and this wiring board comprises:
One core layer has the lower surface of a upper surface, relative this upper surface;
One first line layer is disposed at this upper surface, and comprises one first exposed circuit;
One first route protection layer is disposed on this first exposed circuit;
One first dielectric layer is disposed on this first line layer;
One second line layer is disposed on this first dielectric layer, and wherein this groove is positioned at this upper surface, and exposes this first exposed circuit and this first route protection layer; And
One tertiary circuit layer is disposed at this lower surface.
7, wiring board as claimed in claim 6, wherein this first exposed circuit comprises at least one connection pad and at least one cabling.
8, wiring board as claimed in claim 6 also comprises:
One second dielectric layer is disposed on this second line layer; And
One the 4th line layer is disposed on this second dielectric layer, and wherein this groove more extends to the 4th line layer from this first line layer.
9, wiring board as claimed in claim 6, wherein the notch shape of this groove is rectangle, U-shaped or L shaped.
10, wiring board as claimed in claim 6; wherein this second line layer comprises that also one second exposed circuit and is disposed at the second route protection layer on this second exposed circuit; the second exposed circuit and this second route protection layer are revealed in this groove, and the notch shape of this groove is stepped.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008101102628A CN101616551B (en) | 2008-06-23 | 2008-06-23 | Circuit board and process thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008101102628A CN101616551B (en) | 2008-06-23 | 2008-06-23 | Circuit board and process thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101616551A true CN101616551A (en) | 2009-12-30 |
| CN101616551B CN101616551B (en) | 2011-08-10 |
Family
ID=41495842
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008101102628A Active CN101616551B (en) | 2008-06-23 | 2008-06-23 | Circuit board and process thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101616551B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103889152A (en) * | 2012-12-20 | 2014-06-25 | 深南电路有限公司 | Printed circuit board processing method |
| CN108882562A (en) * | 2017-05-10 | 2018-11-23 | 欣兴电子股份有限公司 | Wiring board unit and its production method |
| CN110660679A (en) * | 2018-06-29 | 2020-01-07 | 欣兴电子股份有限公司 | Method for joining electronic components |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1728920A (en) * | 2004-07-29 | 2006-02-01 | 欣兴电子股份有限公司 | Wire connection structure and program |
-
2008
- 2008-06-23 CN CN2008101102628A patent/CN101616551B/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103889152A (en) * | 2012-12-20 | 2014-06-25 | 深南电路有限公司 | Printed circuit board processing method |
| CN108882562A (en) * | 2017-05-10 | 2018-11-23 | 欣兴电子股份有限公司 | Wiring board unit and its production method |
| CN108882562B (en) * | 2017-05-10 | 2020-11-10 | 欣兴电子股份有限公司 | Circuit board unit and manufacturing method thereof |
| CN110660679A (en) * | 2018-06-29 | 2020-01-07 | 欣兴电子股份有限公司 | Method for joining electronic components |
| CN110660679B (en) * | 2018-06-29 | 2021-10-08 | 欣兴电子股份有限公司 | Method for joining electronic components |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101616551B (en) | 2011-08-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101025520B1 (en) | manufacturing method for multi-layer PCB | |
| CN101272663B (en) | Method for manufacturing multi-layer wiring substrate | |
| US20090026168A1 (en) | Method for manufacturing a rigid-flex circuit board | |
| US10356901B2 (en) | Manufacturing method of circuit board structure | |
| EP2644010B1 (en) | Printed circuit board and method for manufacturing the same | |
| EP2656703B1 (en) | Printed circuit board and method for manufacturing the same | |
| US11723153B2 (en) | Printed circuit board and method of fabricating the same | |
| CN103404244B (en) | Printed circuit board and manufacturing methods | |
| KR101164957B1 (en) | PCB within cavity and Fabricaring method of the same | |
| CN102573278A (en) | Multilayer wiring substrate | |
| US20030168249A1 (en) | Wiring board and method for producing the same | |
| US20070272654A1 (en) | Method for Manufacturing Circuit Board | |
| CN103489796B (en) | The manufacture method of element built-in type semiconductor package | |
| CN101616551B (en) | Circuit board and process thereof | |
| US9690046B2 (en) | Optical circuit board and method for producing the same | |
| US10939561B1 (en) | Wiring structure and method of manufacturing the same | |
| KR20110021435A (en) | A printed circuit board comprising a dummy pattern and a method of manufacturing the same | |
| US9433107B2 (en) | Printed circuit board and method of manufacturing the same | |
| JP4203425B2 (en) | Method for manufacturing double-sided circuit wiring board | |
| KR101987378B1 (en) | Method of manufacturing printed circuit board | |
| US6360434B1 (en) | Circuit fabrication | |
| KR20130046717A (en) | The method for manufacturing the printed circuit board | |
| KR101558579B1 (en) | Printed circuit board and method for fabricating the same | |
| TWI785868B (en) | Wiring substrate and method of manufacturing the same | |
| KR20230045837A (en) | Multilayer substrate and manufacturing method thereof, and electronic apparatus including the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |