CN101602479A - Capacitive sensing device and manufacturing method thereof - Google Patents

Capacitive sensing device and manufacturing method thereof Download PDF

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CN101602479A
CN101602479A CNA2008101004451A CN200810100445A CN101602479A CN 101602479 A CN101602479 A CN 101602479A CN A2008101004451 A CNA2008101004451 A CN A2008101004451A CN 200810100445 A CN200810100445 A CN 200810100445A CN 101602479 A CN101602479 A CN 101602479A
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insulating barrier
sensing device
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capacitive sensing
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梁伟成
林昶伸
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Xinqiao Technology Co ltd
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Xinqiao Technology Co ltd
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Abstract

A capacitive sensing device and a method for fabricating the same, the capacitive sensing device includes: a substrate, the upper surface of which is provided with a positioning layer and an opening part at a preset position; a polysilicon layer arranged on the substrate, a diaphragm formed at the opening part and a plurality of adjusting holes arranged on the diaphragm; a first insulating layer arranged on the polysilicon layer and forming a cavity part above the diaphragm; the first metal layer is arranged on the first insulating layer and is provided with a plurality of through holes connected with the cavity part; the polysilicon layer and the first metal layer form a sensing capacitor which is connected with a sensing circuit to sense through the vibration of the diaphragm. The method mainly uses polysilicon as a sacrificial layer, and can achieve the purpose of precise etching by matching with an oxide layer and a positioning layer. Polysilicon is used as a vibrating diaphragm to form a sensing capacitor by matching with a metal layer, and another metal layer can be additionally arranged to form a reference capacitor, so that the structural strength of the component can be greatly improved in addition to the functions required by the circuit.

Description

电容式感测装置及其制作方法 Capacitive sensing device and manufacturing method thereof

技术领域 technical field

本发明涉及一种电容式感测装置及其制作方法,尤其涉及一种可利用CMOS(互补式金属氧化物半导体)工艺大量制造并降低成本的电容式感测装置及其制作方法。The present invention relates to a capacitive sensing device and a manufacturing method thereof, in particular to a capacitive sensing device and a manufacturing method thereof which can be mass-manufactured by using a CMOS (Complementary Metal Oxide Semiconductor) process and can reduce costs.

背景技术 Background technique

请参阅图1,为现有技术的微机电麦克风的构造剖面图。如图所示,其主要构造包含有一硅基板12、一振动膜14及一背板16。其中,该硅基板12的上下表面分别设有一介电层121、123,中间开设有一共振室125。振动膜14由多晶硅沉积并掺杂硼或磷离子而形成。Please refer to FIG. 1 , which is a structural cross-sectional view of a MEMS microphone in the prior art. As shown in the figure, its main structure includes a silicon substrate 12 , a diaphragm 14 and a back plate 16 . Wherein, the upper and lower surfaces of the silicon substrate 12 are respectively provided with a dielectric layer 121 , 123 , and a resonant chamber 125 is provided in the middle. The vibrating membrane 14 is formed by depositing polysilicon and doping with boron or phosphorus ions.

振动膜14的上则沉积一磷硅玻璃做为牺牲层。在牺牲层上依序沉积一绝缘层161、多晶硅并掺杂硼或磷离子的背板16及一保护层163。之后再蚀刻于该保护层蚀刻出两个接触窗,并于各接触窗形成金属焊垫181、183,分别连接振动膜14及背板16。另于背板16上蚀刻形成多数个音孔165,并将该牺牲层蚀刻去除。A phosphorosilicate glass is deposited on the vibrating membrane 14 as a sacrificial layer. An insulating layer 161 , a backplane 16 of polysilicon doped with boron or phosphorus ions, and a protection layer 163 are sequentially deposited on the sacrificial layer. Afterwards, two contact windows are etched on the protection layer, and metal pads 181 and 183 are formed on each contact window to connect the vibrating film 14 and the back plate 16 respectively. In addition, a plurality of sound holes 165 are etched on the back plate 16, and the sacrificial layer is etched away.

此一构造的微机电麦克风虽可达到感应收音的效果,然其背板16主要由多晶硅构成,质地较为脆弱,容易于加工过程中毁损。Although the micro-electromechanical microphone with this structure can achieve the effect of inductive sound collection, its back plate 16 is mainly composed of polysilicon, which is relatively fragile and easily damaged during processing.

另外,其牺牲层采用磷硅玻璃制作,于蚀刻去除牺牲层时难度较高,容易侵蚀到组件的其它部分,如多晶硅的背板16及振动膜14,以及同是氧化物的绝缘层161,蚀刻的精确度难以掌握。有可能造成振动膜14厚度不均匀,甚至产生穿孔,而背板16的强度也会更加脆弱。In addition, the sacrificial layer is made of phosphosilicate glass, which is difficult to etch to remove the sacrificial layer, and it is easy to corrode other parts of the component, such as the polysilicon back plate 16 and the vibrating film 14, and the insulating layer 161, which is also an oxide. The precision of etching is difficult to master. It may cause uneven thickness of the vibrating membrane 14, or even perforation, and the strength of the back plate 16 will be more fragile.

发明内容 Contents of the invention

本发明所要解决的技术问题在于提供一种电容式感测装置,其主要利用多晶硅制作振膜并与一金属层形成感测电容,可强化装置的结构强度。The technical problem to be solved by the present invention is to provide a capacitive sensing device, which mainly uses polysilicon to make a diaphragm and forms a sensing capacitor with a metal layer, which can strengthen the structural strength of the device.

本发明的另一目的在于提供一种电容式感测装置,其振膜上设有多数个调整孔,可依需求调整振膜的弹性系数等参数。Another object of the present invention is to provide a capacitive sensing device, in which a plurality of adjustment holes are provided on the diaphragm, so that parameters such as the elastic coefficient of the diaphragm can be adjusted according to requirements.

本发明的又一目的在于提供一种电容式感测装置,尚可增设另一金属层而与原金属层形成一参考电容,并可进一步强化装置的结构强度。Another object of the present invention is to provide a capacitive sensing device, in which another metal layer can be added to form a reference capacitance with the original metal layer, and the structural strength of the device can be further strengthened.

本发明的又一目的在于提供一种电容式感测装置的制作方法,其主要利用多晶硅制作牺牲层,可于去除牺牲层时提高蚀刻的精确度。Another object of the present invention is to provide a method for manufacturing a capacitive sensing device, which mainly uses polysilicon to make a sacrificial layer, which can improve the etching accuracy when removing the sacrificial layer.

本发明的又一目的在于提供一种电容式感测装置的制作方法,可制作足够强度的感测装置,利于后续的应用及制作。Another object of the present invention is to provide a method for manufacturing a capacitive sensing device, which can manufacture a sensing device with sufficient strength, which is beneficial for subsequent application and manufacturing.

本发明的又一目的在于提供一种电容式感测装置的制作方法,使用CMOS工艺制作,可将电容式感测装置整合至集成电路中。Yet another object of the present invention is to provide a method for manufacturing a capacitive sensing device, which is manufactured using a CMOS process and can integrate the capacitive sensing device into an integrated circuit.

为实现上述目的,本发明提供一种电容式感测装置,其主要构造包含有:一基板,其上表面设有一定位层,并于预设位置设有一开口部;一多晶硅层,设于该基板上,于该开口部处形成一振膜,并于该振膜上设有多数个调整孔;一第一绝缘层,设于该多晶硅层上,并于该振膜上方形成一空腔部;及一第一金属层,设于该第一绝缘层上,设有多数个通孔连接该空腔部;其中,该多晶硅层与第一金属层形成一感测电容,可连接一感测电路而通过振膜的振动进行感测。To achieve the above object, the present invention provides a capacitive sensing device, the main structure of which includes: a substrate with a positioning layer on its upper surface and an opening at a preset position; a polysilicon layer on the On the substrate, a vibrating film is formed at the opening, and a plurality of adjustment holes are arranged on the vibrating film; a first insulating layer is arranged on the polysilicon layer, and a cavity is formed above the vibrating film; and a first metal layer, disposed on the first insulating layer, provided with a plurality of through holes connected to the cavity; wherein, the polysilicon layer and the first metal layer form a sensing capacitor, which can be connected to a sensing circuit The vibration of the diaphragm is used for sensing.

本发明还提供一种电容式感测装置的制作方法,其主要包含有下列步骤:提供一基板,并于该基板的上表面形成一定位层;沉积一多晶硅层于该定位层上,并于预设位置蚀刻形成多数个蚀刻孔;于该多晶硅层的预设表面包含各蚀刻孔形成一氧化层;于该氧化层上沉积一多晶硅牺牲层;沉积二氧化硅形成一第一绝缘层覆盖该牺牲层及多晶硅层;沉积或溅镀一第一金属层于该第一绝缘层上;由第一金属层的预设位置蚀刻多数个通孔至该牺牲层;蚀刻去除该牺牲层,形成一空腔部;将基板的预设位置蚀刻至该定位层,形成一开口部;及蚀刻去除开口部位置的定位层。The present invention also provides a method for manufacturing a capacitive sensing device, which mainly includes the following steps: providing a substrate, and forming a positioning layer on the upper surface of the substrate; depositing a polysilicon layer on the positioning layer, and Etching at preset positions forms a plurality of etching holes; forming an oxide layer including each etching hole on the predetermined surface of the polysilicon layer; depositing a polysilicon sacrificial layer on the oxide layer; depositing silicon dioxide to form a first insulating layer covering the a sacrificial layer and a polysilicon layer; depositing or sputtering a first metal layer on the first insulating layer; etching a plurality of via holes to the sacrificial layer from preset positions of the first metal layer; etching and removing the sacrificial layer to form a hollow a cavity; etching a preset position of the substrate to the positioning layer to form an opening; and etching away the positioning layer at the position of the opening.

本发明的电容式感测装置使用标准CMOS工艺制作,故可于电路规划时直接将电容式感测装置整合于集成电路中,不仅可提高产品的可靠度,其生产成本也可因工艺简化而大幅降低。The capacitive sensing device of the present invention is manufactured using a standard CMOS process, so the capacitive sensing device can be directly integrated into the integrated circuit during circuit planning, which not only improves the reliability of the product, but also reduces the production cost due to the simplification of the process. significantly reduce.

以下结合附图和具体实施例对本发明进行详细描述,但不作为对本发明的限定。The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

附图说明 Description of drawings

图1为现有技术的微机电麦克风的构造剖面图;Fig. 1 is the structural sectional view of the MEMS microphone of prior art;

图2A至图2K为分别为本发明一较佳实施例的各步骤示意图;2A to 2K are schematic diagrams of each step of a preferred embodiment of the present invention;

图3A及图3B为分别为本发明另一实施例的部分步骤示意图;3A and 3B are schematic diagrams of some steps of another embodiment of the present invention;

图4A及图4B为分别为图3B所示实施例的封装态样示意图;FIG. 4A and FIG. 4B are schematic diagrams of the packaging state of the embodiment shown in FIG. 3B respectively;

图5本发明又一实施例的构造剖面图;Fig. 5 is a structural sectional view of another embodiment of the present invention;

图6本发明又一实施例的构造剖面图。Fig. 6 is a structural sectional view of another embodiment of the present invention.

其中,附图标记:Among them, reference signs:

12:硅基板             121:介电层12: Silicon substrate 121: Dielectric layer

123:介电层            125:共振室123: Dielectric layer 125: Resonance chamber

14:振动膜             16:背板14: Diaphragm 16: Backplane

161:绝缘层            163:保护层161: insulating layer 163: protective layer

165:音孔              181:焊垫165: Sound hole 181: Welding pad

183:焊垫183: welding pad

20:电容式感测装置     22:基板20: Capacitive sensing device 22: Substrate

221:定位层            223:开口部221: Positioning layer 223: Opening

24:多晶硅层           241:蚀刻孔24: Polysilicon layer 241: Etched hole

243:氧化层            245:调整孔243: oxide layer 245: adjustment hole

247:振膜              25:牺牲层247: Diaphragm 25: Sacrificial layer

255:空腔部            26:第一绝缘层255: cavity part 26: first insulating layer

28:第一金属层         281:保护层28: The first metal layer 281: Protective layer

283:通孔283: Through hole

30:电容式感测装置     32:第二绝缘层30: Capacitive sensing device 32: Second insulating layer

34:第二金属层         341:保护层34: Second metal layer 341: Protective layer

343:通孔343: Through hole

42:封装层             44:封装层42: Encapsulation layer 44: Encapsulation layer

445:凹槽445: Groove

50:电容式感测装置     52:凸缘50: Capacitive sensing device 52: Flange

60:电容式感测装置60: Capacitive sensing device

具体实施方式 Detailed ways

首先,请参阅图2A至图2K,分别为本发明一较佳实施例的各步骤示意图。如图所示,本实例的制作流主要先提供一基板22,并于该基板22的上表面沉积一定位层221。再于该定位层221上沉积一多晶硅层24,如图2A所示。First, please refer to FIG. 2A to FIG. 2K , which are schematic diagrams of various steps of a preferred embodiment of the present invention. As shown in the figure, the manufacturing flow of this example mainly provides a substrate 22 first, and deposits an alignment layer 221 on the upper surface of the substrate 22 . A polysilicon layer 24 is then deposited on the positioning layer 221, as shown in FIG. 2A.

其中,该基板22可为一硅基板。该定位层221可选择为一氮化硅层及一二氧化硅层的其中之一。Wherein, the substrate 22 can be a silicon substrate. The alignment layer 221 can be selected as one of a silicon nitride layer and a silicon dioxide layer.

多晶硅层24沉积完成后,于其预设位置蚀刻形成多数个蚀刻孔241,如图2B所示。由于定位层221为二氧化硅或氮化硅,与多晶硅的化学特性差异大,故蚀刻可精确达到定位层221而停止。After the deposition of the polysilicon layer 24 is completed, a plurality of etching holes 241 are formed by etching at the preset positions, as shown in FIG. 2B . Since the alignment layer 221 is made of silicon dioxide or silicon nitride, which has a large chemical property difference from polysilicon, the etching can precisely reach the alignment layer 221 and stop.

蚀刻完成后,在该多晶硅层24的预设表面包含各蚀刻孔241的侧边形成一氧化层243,如图2C所示。After the etching is completed, an oxide layer 243 is formed on the predetermined surface of the polysilicon layer 24 including the sides of the etching holes 241 , as shown in FIG. 2C .

于该氧化层243上沉积多晶硅形成一牺牲层25,如图2D所示。Polysilicon is deposited on the oxide layer 243 to form a sacrificial layer 25, as shown in FIG. 2D.

沉积二氧化硅覆盖该牺牲层25及多晶硅层24形成一第一绝缘层26,如图2E所示。其中该第一绝缘层26尚可于二氧化硅中掺杂硼、磷及其组合式的其中的一。Deposit silicon dioxide to cover the sacrificial layer 25 and the polysilicon layer 24 to form a first insulating layer 26, as shown in FIG. 2E. Wherein, the first insulating layer 26 can still be doped with one of boron, phosphorus and combinations thereof in the silicon dioxide.

于该第一绝缘层26上沉积、蒸镀或溅镀形成一第一金属层28,如图2F所示。还可依需求于该第一金属层28上沉积形成一保护层281,如图2G所示。A first metal layer 28 is formed on the first insulating layer 26 by depositing, evaporating or sputtering, as shown in FIG. 2F . A protection layer 281 can also be deposited and formed on the first metal layer 28 as required, as shown in FIG. 2G .

第一金属层28或保护层281完成后,再由第一金属层28或保护层281的预设位置进行蚀刻,形成多数个连接到牺牲层25的通孔283,如图2H所不。After the first metal layer 28 or the protective layer 281 is completed, etching is performed on the preset position of the first metal layer 28 or the protective layer 281 to form a plurality of via holes 283 connected to the sacrificial layer 25, as shown in FIG. 2H .

然后,再由各通孔283以蚀刻液将牺牲层25蚀刻去除,形成一空腔部255,如图2I所示。由于本发明使用多晶硅制作牺牲层25,且牺牲层25的外围分别由第一绝缘层26、氧化层243及定位层221等二氧化硅材质或氮化硅材质所包围,故进行牺牲层25去除蚀刻时,可精确去除牺牲层25,不会残留也不会侵蚀其它部位。Then, the sacrificial layer 25 is etched away with an etchant through the through holes 283 to form a cavity portion 255, as shown in FIG. 2I. Since the present invention uses polysilicon to make the sacrificial layer 25, and the periphery of the sacrificial layer 25 is surrounded by silicon dioxide or silicon nitride materials such as the first insulating layer 26, the oxide layer 243, and the alignment layer 221, the sacrificial layer 25 is removed. During etching, the sacrificial layer 25 can be accurately removed without remaining or eroding other parts.

去除牺牲层25后,再对基板22进行蚀刻,将对应于空腔部25的部分去除,形成一开口部223,如图2J所示。再将开口部223位置的定位层221蚀刻去除,令多晶硅层24位于空腔部255与开口部223间的部分形成一振膜247,即可完成本实施例电容式感测装置20的制作,如图2K所示。After the sacrificial layer 25 is removed, the substrate 22 is etched to remove the portion corresponding to the cavity portion 25 to form an opening portion 223 , as shown in FIG. 2J . Then the positioning layer 221 at the position of the opening 223 is etched away, so that the part of the polysilicon layer 24 located between the cavity 255 and the opening 223 forms a diaphragm 247, and the fabrication of the capacitive sensing device 20 of this embodiment can be completed. As shown in Figure 2K.

其中,原多晶硅层24的蚀刻孔241成为调整孔245。调整孔245设置的位置及数量,可依振膜247的弹性系数或其它参数需求而进行调整。该多晶硅层24与第一金属层28形成一感测电容,可依振膜247的振动或变形产生的电容量变化而由一感测电路进行感测。Wherein, the etching hole 241 of the original polysilicon layer 24 becomes the adjustment hole 245 . The position and quantity of the adjustment holes 245 can be adjusted according to the elastic coefficient of the diaphragm 247 or other parameter requirements. The polysilicon layer 24 and the first metal layer 28 form a sensing capacitor, which can be sensed by a sensing circuit according to the capacitance change generated by the vibration or deformation of the diaphragm 247 .

请参阅图3A及图3B,分别为本发明另一实施例的部分步骤示意图。Please refer to FIG. 3A and FIG. 3B , which are schematic diagrams of some steps of another embodiment of the present invention.

本实施例的前段制作步骤与图2A至图2F所示步骤相同,其主要于图2The front stage manufacturing steps of the present embodiment are the same as those shown in Fig. 2A to Fig. 2F, and it is mainly shown in Fig. 2

F的步骤后,于该第一金属层28上沉积二氧化硅形成一第二绝缘层32。并于第二绝缘层32上沉积、蒸镀或溅镀形成一第二金属层34。还可依需求于该第二金属层34上沉积形成一保护层341,如图3A所示。After step F, silicon dioxide is deposited on the first metal layer 28 to form a second insulating layer 32 . And a second metal layer 34 is formed on the second insulating layer 32 by depositing, evaporating or sputtering. A protection layer 341 can also be deposited and formed on the second metal layer 34 as required, as shown in FIG. 3A .

然后,由第二金属层34或保护层341的预设位置进行蚀刻,形成多数个连接到牺牲层25的通孔343。再由各通孔343以蚀刻液将牺牲层25蚀刻去除,形成一空腔部255。Then, the second metal layer 34 or the passivation layer 341 are etched to form a plurality of via holes 343 connected to the sacrificial layer 25 . Then, the sacrificial layer 25 is etched away with an etching solution through each through hole 343 to form a cavity portion 255 .

去除牺牲层25后,再对基板22进行蚀刻,将对应于空腔部25的部分去除,形成一开口部223,并将开口部223位置的定位层221蚀刻去除。则多晶硅层24位于空腔部255与开口部223间的部分即可形成一振膜247,而本实施例电容式感测装置30的制作也完成,如图3B所示。After the sacrificial layer 25 is removed, the substrate 22 is etched to remove the portion corresponding to the cavity portion 25 to form an opening 223 , and the positioning layer 221 at the position of the opening 223 is etched away. Then the part of the polysilicon layer 24 located between the cavity 255 and the opening 223 can form a diaphragm 247 , and the fabrication of the capacitive sensing device 30 of this embodiment is also completed, as shown in FIG. 3B .

其中,该多晶硅层24与第一金属层28形成一感测电容,可依振膜247的振动或变形产生的电容量变化而由一感测电路进行感测。而第二金属层34则可选择与第一金属层28形成一参考电容,可供感测电路参考应用。该第二金属层34也可因应需求而独立形成一遮蔽层,或者单纯成为强化感测装置的构造等等。Wherein, the polysilicon layer 24 and the first metal layer 28 form a sensing capacitance, which can be sensed by a sensing circuit according to the capacitance change generated by the vibration or deformation of the diaphragm 247 . The second metal layer 34 can optionally form a reference capacitor with the first metal layer 28 , which can be used as a reference for the sensing circuit. The second metal layer 34 can also independently form a shielding layer according to requirements, or simply become a structure for strengthening the sensing device, and the like.

请参阅图4A及图4B,分别为图3B所示实施例的封装态样示意图。如图所示,本发明的电容式感测装置30于封装时可选择不同的封装态样。Please refer to FIG. 4A and FIG. 4B , which are schematic diagrams of the packaging of the embodiment shown in FIG. 3B . As shown in the figure, the capacitive sensing device 30 of the present invention can be packaged in different packaging styles.

若封装时选择于电容式感测装置30的基板22下表面形成一封装层42,则开口部223成为一背腔,提供共振的效果。而各通孔343则成为音孔,供音波或气压的变化进入,使振膜产247产生振动或变形,如图4A所示。If an encapsulation layer 42 is formed on the lower surface of the substrate 22 of the capacitive sensing device 30 during encapsulation, the opening 223 becomes a back cavity to provide a resonance effect. And each through hole 343 becomes a sound hole, for the change of sound wave or air pressure to enter, so that the diaphragm 247 vibrates or deforms, as shown in FIG. 4A .

若封装时选择于电容式感测装置30的第二金属层34上形成一封装层44,则此时该空腔部255成为背腔,提供共振的效果。而开口部223则为音孔,供音波或气压变化的传递,如图4B所示。考虑空腔部255的空间大小与共振频率的搭配问题,还可依需求于封装层44的对应位置形成适当大小的一凹槽445,与空腔部255共同形成背腔。If an encapsulation layer 44 is selected to be formed on the second metal layer 34 of the capacitive sensing device 30 during encapsulation, the cavity portion 255 becomes a back cavity at this time, providing a resonance effect. The opening 223 is a sound hole for transmission of sound waves or changes in air pressure, as shown in FIG. 4B . Considering the matching of the space size of the cavity portion 255 and the resonant frequency, a groove 445 of an appropriate size can also be formed at a corresponding position of the packaging layer 44 as required, and form a back cavity together with the cavity portion 255 .

上述各封装态样也可实施于图2K所示的实施例。The above packaging aspects can also be implemented in the embodiment shown in FIG. 2K .

请参阅图5,为本发明又一实施例的构造剖面图。如图所示,本发明如图3B所示实施例还可进行进一步蚀刻,将氧化层243去除,成为本实施例的电容式感测装置50。由于氧化层243与第一绝缘层26同化氧化物,蚀刻时将会同时对第一绝缘层26产生侵蚀,可于各通孔343间形成凸缘52,可防止振膜247沾粘。Please refer to FIG. 5 , which is a cross-sectional view of another embodiment of the present invention. As shown in the figure, the embodiment of the present invention shown in FIG. 3B can be further etched to remove the oxide layer 243 to become the capacitive sensing device 50 of this embodiment. Since the oxide layer 243 and the first insulating layer 26 assimilate the oxide, the first insulating layer 26 will be corroded during etching, and the flanges 52 can be formed between the through holes 343 to prevent the diaphragm 247 from sticking.

请参阅图6,为本发明又一实施例的构造剖面图。如图所示,本实施例的电容式感测装置60于形成第一绝缘层26后,先将牺牲层25上方的部位蚀刻去除再进行后续步骤。Please refer to FIG. 6 , which is a cross-sectional view of another embodiment of the present invention. As shown in the figure, in the capacitive sensing device 60 of this embodiment, after the first insulating layer 26 is formed, the portion above the sacrificial layer 25 is etched and removed before subsequent steps are performed.

由于本发明的电容式感测装置使用标准CMOS工艺制作,故可于电路规划时直接将电容式感测装置整合于集成电路中,不仅可提高产品的可靠度,其生产成本也可因工艺简化而大幅降低。Since the capacitive sensing device of the present invention is produced using a standard CMOS process, the capacitive sensing device can be directly integrated into the integrated circuit during circuit planning, which not only improves the reliability of the product, but also simplifies the production cost due to the process And significantly reduced.

当然,本发明还可有其它多种实施例,在不背离本发明精神及其实质的情况下,熟悉本领域的技术人员当可根据本发明作出各种相应的改变和变形,但这些相应的改变和变形都应属于本发明所附的权利要求的保护范围。Certainly, the present invention also can have other multiple embodiments, without departing from the spirit and essence of the present invention, those skilled in the art can make various corresponding changes and deformations according to the present invention, but these corresponding Changes and deformations should belong to the scope of protection of the appended claims of the present invention.

Claims (12)

1. a capacitive sensing device is characterized in that, includes:
One substrate, its upper surface is provided with an alignment layers, and is provided with a peristome in predeterminated position;
One polysilicon layer is located on this substrate, forms a vibrating diaphragm in this peristome place, and is provided with most adjustment holes in this vibrating diaphragm;
One first insulating barrier is located on this polysilicon layer, and forms a cavity portion in this vibrating diaphragm top; And
One the first metal layer is located on this first insulating barrier, is provided with most through holes and connects this cavity portion;
Wherein, this polysilicon layer and the first metal layer form a sense capacitance, connect a sensing circuit and carry out sensing by the vibration of vibrating diaphragm.
2. capacitive sensing device according to claim 1 is characterized in that, this substrate is a silicon substrate, and this alignment layers then is silicon dioxide layer or silicon nitride layer.
3. capacitive sensing device according to claim 1 is characterized in that the upper surface of this vibrating diaphragm is provided with an oxide layer, and this first metal layer is provided with a protective layer.
4. capacitive sensing device according to claim 1 is characterized in that, this first insulating barrier is a silicon dioxide layer, and this silicon dioxide layer is doped with boron or phosphorus.
5. capacitive sensing device according to claim 1 is characterized in that, includes:
One second insulating barrier is located on this first metal layer; And
One second metal level is located on this second insulating barrier;
Each through hole runs through second insulating barrier and second metal level respectively.
6. capacitive sensing device according to claim 5 is characterized in that, this first metal layer and second metal level form a reference capacitance, and this second insulating barrier is a silicon dioxide layer, and this second metal level is provided with a protective layer.
7. the preparation method of a capacitive sensing device is characterized in that, includes the following step:
One substrate is provided, and forms an alignment layers in the upper surface of this substrate;
Deposit a polysilicon layer on this alignment layers, and form most etch-holes in the predeterminated position etching;
The side that comprises each etch-hole in the default surface of this polysilicon layer forms an oxide layer;
Deposit spathic silicon forms a sacrifice layer on this oxide layer;
Deposition of silica forms one first insulating barrier and covers this sacrifice layer and polysilicon layer;
Deposition, evaporation or sputter one the first metal layer are on this first insulating barrier;
By most through holes of the predeterminated position etching of the first metal layer to this sacrifice layer;
This sacrifice layer is removed in etching, forms a cavity portion;
The predeterminated position of substrate is etched to this alignment layers, forms a peristome; And
The alignment layers of peristome position is removed in etching.
8. preparation method according to claim 7 is characterized in that, remove the step of this sacrifice layer in this etching after, include the step that this oxide layer is removed in an etching.
9. preparation method according to claim 7 is characterized in that, this alignment layers selects to deposit a silicon dioxide layer on substrate or a silicon nitride layer forms, and the silica of this first insulating barrier then is doped with boron or phosphorus.
10. preparation method according to claim 7 is characterized in that, includes the step that forms a protective layer on this first metal layer.
11. preparation method according to claim 7 is characterized in that, this deposition, evaporation or sputter one the first metal layer include the following step after the step on this first insulating barrier:
Deposition of silica forms one second insulating barrier on this first metal layer; And
Deposition, evaporation or sputter one second metal level are on this second insulating barrier;
The most individual through holes of this predeterminated position etching by the first metal layer to the step of this sacrifice layer then is:
By most through holes of the predeterminated position etching of second metal level to this sacrifice layer.
12. preparation method according to claim 11 is characterized in that, includes a step that forms a protective layer on this second metal level.
CNA2008101004451A 2008-06-11 2008-06-11 Capacitive sensing device and manufacturing method thereof Pending CN101602479A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102205940A (en) * 2011-04-25 2011-10-05 北京理工大学 Bicrystal electrothermal actuator for MEMS (Micro-electromechanical System)
CN104066040A (en) * 2013-03-19 2014-09-24 财团法人工业技术研究院 Pressure sensor and method for manufacturing the same
CN104936123A (en) * 2015-05-22 2015-09-23 北京卓锐微技术有限公司 Silicon capacitive microphone manufacturing method
CN108632689A (en) * 2017-03-24 2018-10-09 中芯国际集成电路制造(上海)有限公司 Microphone and production method
CN108882132A (en) * 2017-05-11 2018-11-23 现代自动车株式会社 microphone and its manufacturing method
CN110267184A (en) * 2019-06-29 2019-09-20 瑞声科技(南京)有限公司 MEMS microphone

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102205940A (en) * 2011-04-25 2011-10-05 北京理工大学 Bicrystal electrothermal actuator for MEMS (Micro-electromechanical System)
CN104066040A (en) * 2013-03-19 2014-09-24 财团法人工业技术研究院 Pressure sensor and method for manufacturing the same
CN104936123A (en) * 2015-05-22 2015-09-23 北京卓锐微技术有限公司 Silicon capacitive microphone manufacturing method
CN104936123B (en) * 2015-05-22 2018-10-09 山东共达电声股份有限公司 A kind of manufacturing method of silicon capacitor microphone
CN108632689A (en) * 2017-03-24 2018-10-09 中芯国际集成电路制造(上海)有限公司 Microphone and production method
CN108882132A (en) * 2017-05-11 2018-11-23 现代自动车株式会社 microphone and its manufacturing method
CN108882132B (en) * 2017-05-11 2021-07-06 现代自动车株式会社 Microphone and method for manufacturing the same
CN110267184A (en) * 2019-06-29 2019-09-20 瑞声科技(南京)有限公司 MEMS microphone

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