CN101600574B

CN101600574B - Fluid ejection device with data signal latch circuitry

Info

Publication number: CN101600574B
Application number: CN2006800568969A
Authority: CN
Inventors: T·本贾明; J·P·阿克斯特尔
Original assignee: Hewlett Packard Development Co LP
Current assignee: Hewlett Packard Development Co LP
Priority date: 2006-11-30
Filing date: 2006-11-30
Publication date: 2011-11-23
Anticipated expiration: 2026-11-30
Also published as: KR101274187B1; PL2089230T3; EP2089230B1; MX2009005701A; AU2006351225A1; AU2006351225B2; WO2008066551A3; CN101600574A; CA2671448C; HK1136248A1; JP2010511530A; DK2089230T3; EP2089230A2; BRPI0622069A2; JP5586957B2; BRPI0622069B1; KR20090087065A; ES2394495T3; PT2089230E; CA2671448A1

Abstract

A fluid ejection device (22/40) includes a first fire line (110a-110n/214a-214f), a second fire line (110a-110n/214a-214f), data lines (108a-108m/208a-208h), latch circuitry (152,404/162/184,186), first drop generators (60), and second drop generators (60). The first fire line is adapted to conduct a first energy signal including first energy pulses and the second fire line is adapted to conduct a second energy signal including second energy pulses. The data lines are adapted to conduct data signals that represent an image and the latch circuitry is configured to latch the data signals to provide latched data signals based on at least one clock signal. The first drop generators are configured to respond to the first energy signal to eject fluid based on the latched data signals and the second drop generators are configured to respond to the second energy signal to eject fluid based on the latched data signals.

Description

The liquid injection apparatus that has data signal latch circuitry

Background technology

As the ink-jet print system of an embodiment of liquid injection system, can comprise printhead, provide the black source of liquid China ink and the electronic controller of control printhead for printhead.As the printhead of an embodiment of liquid injection apparatus by a plurality of apertures or nozzle ejection ink droplet.China ink sprays with print image on print media towards the print media such as paper.Nozzle is settled with one or more arrays usually, makes when printhead and print media are mobile relative to each other, and suitably the China ink from nozzle of ordering sprays and causes character or other image are printed at print media.

In a typical thermal inkjet-printing system, printhead comes by the nozzle ejection ink droplet by the low capacity China ink that Fast Heating is arranged in vaporization chamber.China ink utilizes the little electric heater heating such as the thin film resistor that is referred to herein as the emission resistor.Heated ink makes the China ink evaporation and passes through nozzle ejection.

For spraying a China ink, the electronic controller of control printhead activates the electric current from the power supply of the outside that is positioned at printhead.Electric current with the China ink of heating in corresponding selected vaporization chamber, sprays China ink by respective nozzles by selected emission resistor.Known droplet generator comprises emission resistor, corresponding vaporization chamber and respective nozzles.

Along with the evolution of ink jet-print head, the number of the droplet generator in printhead increases, to improve print speed and/or quality.The increase of the number of the droplet generator in each printhead has caused the corresponding increase of number of required input liner on the print head chip, so that for increasing the emission resistor energy supply of number.In one type printhead, it is that the emission resistor provides energy with the power supply that each emission resistor is couple to corresponding input liner.When the quantity of emission resistor increased, each emission resistor had an input liner just to become unrealistic.

In the printhead of the another kind of type with primitive (primitive), the number of the droplet generator of each input liner significantly increases.Single power transmission line is emission resistor power supply all in the primitive.Leakage-source path the coupled in series of each emission resistor and power transmission line and corresponding field-effect transistor (FET).The address leads of energy supply separately that the grid of each field-effect transistor in the primitive and a plurality of primitive are shared couples.

Manufacturer continues to increase the number that each imports the droplet generator of liner by number that reduces the input liner and/or the number that increases the droplet generator on the print head chip.Generally the cost than the printhead that more input liner is arranged is low to have the printhead of still less importing liner.In addition, have the printhead of more droplet generators generally with higher quality and/or print speed printing faster.

Because the reason of these and other has needs of the present invention.

Summary of the invention

One aspect of the present invention provides a kind of liquid injection apparatus, comprises first line of departure, second line of departure, data wire, latch cicuit, first droplet generator and second droplet generator.First line of departure is suitable for conducting first energy signal that comprises first energy pulse, and second line of departure is suitable for conducting second energy signal that comprises second energy pulse.Data wire is suitable for conducting the data-signal of presentation video, and latch cicuit is configured to based at least one clock signal latch data signal so that the latched data signal is provided.First droplet generator is configured to respond first energy signal and comes based on latched data signal atomizing of liquids, and second droplet generator is configured to respond second energy signal and comes based on latched data signal atomizing of liquids.

Description of drawings

With reference to following accompanying drawing to understand embodiments of the invention better.Part among the figure is not necessarily proportional each other.Identical Reference numeral refers to corresponding like.

Fig. 1 shows an embodiment of ink-jet printing system.

Fig. 2 is the figure of a part of an embodiment of explanation print head chip.

Fig. 3 is the figure of the layout of the droplet generator along ink feed slot established of explanation in an embodiment of print head chip.

Fig. 4 is the figure that an embodiment of the transmitter unit that adopts in an embodiment of print head chip is described.

Fig. 5 is the schematic diagram of an embodiment of explanation ink jet-print head transmitter unit array.

Fig. 6 is the schematic diagram of an embodiment of explanation precharge transmitter unit.

Fig. 7 is the schematic diagram of an embodiment of explanation ink jet-print head transmitter unit array.

Fig. 8 is the sequential chart of operation of an embodiment of explanation transmitter unit array.

Fig. 9 is the schematic diagram that an embodiment of the precharge transmitter unit that is configured to latch data is described.

Figure 10 is the schematic diagram of an embodiment of explanation double data rate transmitter unit circuit.

Figure 11 is the sequential chart of operation of an embodiment of explanation double data rate transmitter unit circuit.

Figure 12 is the schematic diagram of an embodiment of explanation precharge transmitter unit.

Figure 13 is the sequential chart of operation of an embodiment of the double data rate transmitter unit circuit of the explanation precharge transmitter unit that adopts Figure 12.

Figure 14 is the schematic diagram that the explanation bilateral is crossed an embodiment of transistors precharge transmitter unit.

Figure 15 is that explanation adopts the bilateral of the precharge transmitter unit of Figure 12 and Figure 14 to cross the sequential chart of operation of an embodiment of the double data rate transmitter unit circuit of transistors precharge transmitter unit.

The specific embodiment

In the detailed description below, accompanying drawing is quoted from, accompanying drawing constitutes the part of specification, and the mode with the enforceable specific embodiment of explanation invention in specification describes.In this respect, the term of directionality, for example " top ", " bottom ", " front ", " back ", " taking the lead ", " trailing " etc. are to use with reference to the direction of the figure that is illustrated.Because the parts of embodiments of the invention can place on a plurality of different directions, so, direction-sense term be used for illustrative and not restrictive.Be appreciated that the embodiment that can implement other, also can carry out the change of structure or logic and do not depart from the scope of the present invention.Therefore, following detailed description not will be understood that it is restrictive, and scope of the present invention will be defined by appended right.

Fig. 1 shows an embodiment of ink-jet print system 20.Ink-jet print system 20 has constituted an embodiment of liquid injection system, and this liquid injection system comprises such as the liquid injection apparatus of inkjet printhead assembly 22 with such as the liquid provisioning component of black provisioning component 24.Ink-jet print system 20 also comprises installation component 26, medium transmission assembly 28 and electronic controller 30.At least one power supply 32 provides power supply for each electric parts of ink-jet print system 20.

In one embodiment, inkjet printhead assembly 22 comprises at least one printhead or print head chip 40, and this printhead or print head chip 40 spray ink droplet by a plurality of apertures or nozzle 34 to print media 36, so that print on print media 36.Printhead 40 is embodiment of liquid injection apparatus.Print media 36 can be the suitable page or leaf sheet material of any kind, for example paper stock of paper, fabrication sheet, slide, polyester film, fabric etc.In general, nozzle 34 is with arrangements such as one or more row or arrays, make that when print head assembly 22 and print media 36 were relative to each other mobile, suitably the China ink from nozzle 34 of ordering sprayed character, symbol and/or other figure or image are printed at print media 36.Spray China ink though following explanation is meant from print head assembly 22, should be understood that and to spray other liquid, liquid or the flowable materials that comprises transparency liquid from print head assembly 22.

Black provisioning component 24 as an embodiment of liquid provisioning component provides China ink for print head assembly 22, and comprises the accumulator 38 that stores China ink.Like this, China ink flows to inkjet printhead assembly 22 from accumulator 38.China ink provisioning component 24 and inkjet printhead assembly 22 can form unidirectional black transfer system or recirculation ink transfer system.In unidirectional black transfer system, the China ink of nearly all supply inkjet printhead assembly 22 consumes during printing.In the recirculation ink transfer system, only some consumes during printing the China ink of supply print head assembly 22.Therefore, the China ink that does not consume during the printing returns black provisioning component 24.

In one embodiment, inkjet printhead assembly 22 and black provisioning component 24 place print cartridge or pen in the lump.This print cartridge or pen are embodiment of liquid injection apparatus.In another embodiment, black provisioning component 24 is what to separate with inkjet printhead assembly 22, and is connected to inkjet printhead assembly 22 ink supply by the interface such as the supply pipe (not shown).In arbitrary embodiment, the accumulator 38 of black provisioning component 24 can be removed, be replaced and/or be recharged.In one embodiment, inkjet printhead assembly 22 and black provisioning component 24 place print cartridge in the lump, and accumulator 38 comprises the local accumulator that is arranged in print cartridge, may also comprise the bigger accumulator that position and print cartridge separate.Like this, that separate, bigger accumulator can be filled local accumulator.Correspondingly, that separate, bigger accumulator and/or local accumulator can be removed, be replaced and/or be recharged.

Installation component 26 is with respect to medium transmission assembly 28 location inkjet printhead assemblies 22, and medium transmission assembly 28 is with respect to inkjet printhead assembly 22 positions print media 36.Therefore, adjacent nozzles 34 defines print zone 37 in the zone between inkjet printhead assembly 22 and print media 36.In one embodiment, inkjet printhead assembly 22 is sweep type print head assemblies.Like this, installation component 26 comprises and is used for moving the carriage (not shown) of inkjet printhead assembly 22 with scanning and printing medium 36 with respect to medium transmission assembly 28.In another embodiment, inkjet printhead assembly 22 is non-sweep type print head assemblies.Like this, installation component 26 is fixed on inkjet printhead assembly 22 with respect to medium transmission assembly 28 predefined positions.Therefore, medium transmission assembly 28 is with respect to inkjet printhead assembly 22 positions print media 36.

Electronic controller or printer controller 30 generally include processor, firmware, other electronic product or it makes up arbitrarily, to get in touch with inkjet printhead assembly 22, installation component 26 and medium transmission assembly 28 and to control them.The data 39 of electronic controller 30 receptions from coming such as prevention of computer host system, and generally include the temporary transient storage data 39 of internal memory.Usually, data 39 send ink-jet print system 20 to along electronics, infrared ray, light or out of Memory transmission path.Document and/or file that data 39 expressions for example will be printed.Like this, data 39 form the print job of ink-jet print system 20, and comprise one or more print job command and/or command parameter.

In one embodiment, electronic controller 30 control inkjet printhead assemblies 22 spray ink droplet from nozzle 34.Like this, electronic controller 30 has defined and has formed character, symbol and/or other figure on print media 36 or the pattern of the injection ink droplet of image.The pattern of the ink droplet that sprays depends on print job command and/or command parameter.

In one embodiment, inkjet printhead assembly 22 comprises a printhead 40.In another embodiment, inkjet printhead assembly 22 is print head assemblies of wide array or multiple print head.In a wide array implement example, inkjet printhead assembly 22 comprises carrier, this carrier carrying print head chip 40 provides the electrical communication between print head chip 40 and the electronic controller 30, and the liquid communication between print head chip 40 and the black provisioning component 24 is provided.

Fig. 2 is the figure of a part of an embodiment of explanation print head chip 40.Print head chip 40 comprises the array of printing or liquid ejection element 42.Type element 42 forms on substrate 44, is formed with ink feed slot 46 in this substrate.Like this, ink feed slot 46 provides the supply of liquid China ink for type element 42.Ink feed slot 46 is embodiment of liquid source of supply.Other embodiment of liquid source of supply includes but not limited to each corresponding independent ink supply aperture and a plurality of short ink supply ditch into each corresponding vaporization chamber supply, and each ink supply ditch is the group supply of the liquid ejection element of correspondence.Membrane structure 48 has the ink-feed channel 54 that forms therein, and this ink-feed channel 54 is communicated with the ink feed slot 46 that forms in substrate 44.The jet hole 34 that orifice layer 50 has positive 50a and forms on positive 50a.Orifice layer 50 also has nozzle box or the vaporization chamber 56 that forms therein, and it is communicated with the ink-feed channel 54 of jet hole 34 and membrane structure 48.Emission resistor 52 places vaporization chamber 56, and lead-in wire 58 will be launched resistor 52 and apply the circuit electric coupling of electric current by selected emission resistor with control.Here the droplet generator of mentioning 60 comprises emission resistor 52, nozzle box or vaporization chamber 56 and jet hole 34.

In print procedure, China ink flow to vaporization chamber 56 from ink feed slot 46 by ink-feed channel 54.Jet hole 34 is upward related with 52 operations of emission resistor, makes in a single day to give the emission resistor 52 energy supplies, and the ink droplet in vaporization chamber 56 just sprays to print media 36 by jet hole 34 (for example, being substantially perpendicular to the plane of launching resistor 52).

The enforcement sample of print head chip 40 comprises thermal printer head, piezoelectric printhead, electrostatic printheads or any liquid injection apparatus that can be integrated into other type in the sandwich construction known in the art.Substrate 44 is for example formed by silicon, glass, pottery or stable polymer, and membrane structure 48 forms passivation or the insulating barrier that comprises one or more silica, carborundum, silicon nitride, tantalum, polysilicon glass or other material that is fit to.Membrane structure 48 also comprises at least one conductive layer of definition emission resistor 52 and lead-in wire 58.Conductive layer is fabricated to and for example comprises aluminium, gold, tantalum, tantalum-aluminium or other metal or metal alloy.In one embodiment, as following detailed description the in detail, the transmitter unit circuit is to implement in such as the substrate of substrate 44 and membrane structure 48 and thin layer.

In one embodiment, orifice layer 50 comprises photoimageable epoxy, for example, and Massachusetts newton city (Newton, the epoxy resin that is called SU8 that littleization MA) (Micro-Chem) company sells.Model's technology with SU8 or other polymer manufacture orifice layer 50 has detailed explanation in U.S. Patent number 6162589, here with it as quoting introducing.In one embodiment, orifice layer 50 is called the independently layer of barrier layer (for example dry film photoresistance barrier layer) and a metal orifice layer (for example nickel, copper, iron/nickel alloy, palladium, gold or the rhodium layer) formation that forms by two on barrier layer.Yet, can adopt other suitable material to form orifice layer 50.

Fig. 3 is the figure that the droplet generator of establishing along ink feed slot 46 in an embodiment of print head chip 40 60 is described.Ink feed slot 46 comprises the limit 46a and the 46b of relative ink feed slot.Droplet generator 60 is provided with along the limit 46a and the 46b of each relative ink feed slot.N droplet generator 60 established along ink feed slot 46 altogether, has m droplet generator 60 to be positioned on the limit 46a of ink feed slot, has n-m droplet generator 60 to be positioned on the limit 46b of ink feed slot.In one embodiment, n equals 200 droplet generators 60 establishing along ink feed slot 46, and m equals along the limit 46a of each relative ink feed slot and 46b and 100 droplet generators 60 establishing.The droplet generator 60 of any proper number can be set along ink feed slot 46 in other embodiments.

Ink feed slot 46 provides black in n the droplet generator 60 that is provided with along ink feed slot 46 each.In n droplet generator 60 each all comprises emission resistor 52, vaporization chamber 56 and nozzle 34.In n vaporization chamber 56 each by at least one ink-feed channel 54 and ink feed slot 46 liquid couple.Emission resistor 52 in the droplet generator 60 is with in check order energy supply, to pass through nozzle 34, print image on print media 36 from vaporization chamber 56 atomizing of liquids.

Fig. 4 is the figure that an embodiment of the transmitter unit 70 that adopts in an embodiment of print head chip 40 is described.Transmitter unit 70 comprises emission resistor 52, resistor driving switch 72 and memory circuit 74.Emission resistor 52 is parts of droplet generator 60.Driving switch 72 and memory circuit 74 are that the control electric current applies the part by the circuit of emission resistor 52.Form transmitter unit 70 in membrane structure 48 and on the substrate 44.

In one embodiment, emission resistor 52 is thin film resistors, and driving switch 72 is field-effect transistor (FET).Leakage-source path the electric coupling of emission resistor 52 and the line of departure 76 and driving switch 72.Leakage-the source path of driving switch 72 also with reference line 78 electric couplings, this reference line 78 couples with reference voltage such as ground.Memory circuit 74 electric couplings of the state of the grid of driving switch 72 and control driving switch 72.

Memory circuit 74 and data wire (DATA) 80 and enable line (ENABLE) 82 electric couplings.Data wire 80 receives the data-signal of the part of presentation video, and enable line 82 receives enable signal, with the operation of control store circuit 74.Memory circuit 74 is enabled signal when enabling, storage one digit number certificate.The logic level of data bit stored is provided with the state (for example, close or close, conducting or not conducting) of driving switch 72.Enable signal can comprise one or more selection signals and one or more address signal.

The line of departure (FIRE) 76 receives the energy signal that comprises energy pulse, and provides energy pulse for launching resistor 52.In one embodiment, energy pulse is provided by electronic controller 30, have regularly zero-time and regularly the duration, produced the concluding time regularly, provide an amount of energy to heat and evaporate liquid in the vaporization chamber 56 of droplet generator 60.If driving switch 72 is conducting (conduction), energy pulse just adds heat emission resistor 52, the heating and from droplet generator 60 atomizing of liquids.If driving switch 72 disconnects (non-conducting), energy pulse does not just add heat emission resistor 52, and liquid remains in the droplet generator 60.

Fig. 5 is the schematic diagram of an embodiment of explanation ink jet-print head transmitter unit array 100.Transmitter unit array 100 comprises a plurality of transmitter units 70 that are arranged as n emission group 102a-102n.In one embodiment, transmitter unit 70 is arranged as 6 emission group 102a-102n.In other embodiments, transmitter unit 70 can be arranged as the emission group 102a-102n of any suitable number, for example 4 or more a plurality of emission group 102a-102n.

Transmitter unit 70 in the array 100 schematically is arranged in the capable m row of L.The L of transmitter unit 70 capable with enable line (ENABLE) 104 electric couplings that receive enable signal.Each row of transmitter unit 70 (the row group or the son group that are called transmitter unit 70 here) and one group of son group enable line 106a-106L electric coupling.Child group enable signal SG1, the SG2 of the respective sub-set of son group enable line 106a-106L reception enable transmission unit 70 ... SGL.

M row respectively with m the data wire 108a-108m electric coupling that receives data-signal D1, D2...Dm.In the m row each comprises the transmitter unit 70 among n the emission group 102a-102n each, and each row of transmitter unit 70 (being called data line group or data group here) are conductively coupled among the data wire 108a-108m.In other words, each transmitter unit 70 electric coupling in each among the data wire 108a-108m and the row, these row are included in the transmitter unit 70 in each of emission group 102a-102n.For example, each electric coupling of the transmitter unit 70 in the row of data wire 108a and left, these row are included in the transmitter unit 70 in each of emission group 102a-102n.Each electric coupling of transmitter unit 70 in data wire 108b and the adjacent row, so analogize, up to and comprise data wire 108m, each electric coupling of transmitter unit 70 in this data wire 108m and the most right-hand row, these row are included in the transmitter unit 70 in each of emission group 102a-102n.

In one embodiment, array 100 is arranged to six emission group 102a-102n, and each of six emission group 102a-102n comprises 13 son groups and 8 data line group.In other embodiments, array 100 can be arranged to the emission group 102a-102n of any suitable number and the child group and the data line group of any suitable number.In arbitrary embodiment, emission group 102a-102n is not limited to the child group and the data line group of similar number.On the contrary, each of emission group 102a-102n is compared with any other emission group 102a-102n, and the child group and/or the data line group of different numbers can be arranged.In addition, each son group is compared with any other son group, and the transmitter unit 70 of different numbers can be arranged, and each data line group is compared with any other data line group, and the transmitter unit 70 of different numbers can be arranged.

Transmitter unit 70 in each emission group 102a-102n and an electric coupling among the line of departure 110a-110n.In emission group 102a, each transmitter unit 70 transmits or the line of departure 110a electric coupling of energy signal FIRE1 with receiving.In emission group 102b, each transmitter unit 70 transmits or the line of departure 110b electric coupling of energy signal FIRE2 with receiving, so analogize, up to and comprise emission group 102n, wherein each transmitter unit 70 transmits or the line of departure 110n electric coupling of energy signal FIREn with receiving.In addition, each of the transmitter unit 70 in each of emission group 102a-102n and common reference line 112 electric couplings of linking ground.

In operation, on child group enable line 106a-106L, provide son group enable signal SG1, SG2 ... SGL comes a son group of enable transmission unit 70.Data-signal D1, the D2...Dm that provides on the data wire 108a-108m is provided the transmitter unit 70 that is enabled.Data-signal D1, D2...Dm are stored in the memory circuit 74 of the transmitter unit 70 that is enabled.Each of stored data signal D1, D2...Dm has been set the state of the driving switch 72 among in the transmitter unit 70 that is enabled one.Driving switch 72 is set at conducting or not conducting based on the stored data signal value.

After the state of selected driving switch 72 is set, on the line of departure 110a-110n corresponding, provide energy signal FIRE1 to FIREn with the emission group 102a-102n of the child group that comprises selected transmitter unit 70.This energy signal FIRE1 comprises energy pulse to FIREn.On selected line of departure 110a-110n, provide energy pulse, be emission resistor 52 energy supplies in the transmitter unit 70 with conducting driving switch 72.By the heating of the emission resistor 52 of energy supply and on print media 36, spray China ink, come the represented image of print data signal D1, D2...Dm.Before print finishing, the child group of enable transmission unit 70, memory data signal D1, D2...Dm and provide energy signal FIRE1 to come to FIREn to continue to carry out in the child group that is enabled for the process of emission resistor 52 energy supplies in the child group that is enabled.

In one embodiment, when energy signal FIRE1 when FIREn offers selected emission group 102a-102n, son group enable signal SG1, SG2 ... SGL change with select with enable different emission group 102a-102n in another height group.Data-signal D1, the D2...Dm that provides on the data wire 108a-108m is provided the child group that newly enables, and energy signal FIRE1 provides to FIREn in line of departure 110a-110n, is emission resistor 52 energy supplies in the transmitter unit 70 that newly enables.At any one time, have only one of transmitter unit 70 son group quilt group enable signal SG1, SG2 ... SGL enables to be stored in data-signal D1, the D2...Dm that provides on the data wire 108a-108m.In this respect, data-signal D1, the D2...Dm on data wire 108a-108m is the time multiplexing date signal.In addition, when energy signal FIRE1 when FIREn offers selected emission group 102a-102n, in selected emission group 102a-102n, have only a son group to comprise the driving switch 72 that is set to conducting.Yet, the energy signal FIRE1 that offers different emission group 102a-102n to FIREn can and overlapping really.

Fig. 6 is the schematic diagram of an embodiment of explanation precharge transmitter unit 120.Precharge transmitter unit 120 comprises the driving switch 172 that is conductively coupled to emission resistor 52.In one embodiment, driving switch 172 is the field-effect transistors that comprise leakage-source path, leakage-source path one end and a terminal electric coupling, the other end and reference line 122 electric couplings of launching resistor 52.Reference line 122 is to connect together with reference voltage such as ground.Another end and the reception of emission resistor 52 comprises the line of departure 124 electric couplings of transmitting of energy pulse or energy signal FIRE.If driving switch 172 is connected (conducting), energy pulse just is 52 energy supplies of emission resistor.

The grid of driving switch 172 forms memory node electric capacity 126, and this memory node electric capacity 126 works as memory component, according to precharge transistor 128 with select the order of transistor 130 to activate and the storage data.Memory node electric capacity 126 is shown in broken lines, because it is the part of driving switch 172.Replacedly, the capacitor that separates with driving switch 172 can be used as memory element.

Leakage-the source path of precharge transistor 128 and grid are conductively coupled to the pre-charge line (PRECHARGE) 132 that receives precharging signal.Leakage-source path the electric coupling of the leakage-source path of the grid of driving switch 172 and precharge transistor 128 and selection transistor 130.Select the grid and selection line (SELECT) 134 electric couplings that receive the selection signal of transistor 130.Precharging signal is a kind of pulse charging control signal.The pulse charging control signal of another kind of type is a kind of discharge signal that adopts in the embodiment of the transmitter unit that discharges.

Data transistor 136, first address transistor 138 and second address transistor 140 comprise the leakage-source path of parallel electric coupling.The The parallel combined of data transistor 136, first address transistor 138 and second address transistor 140 is electric coupling between the leakage-source path of selecting transistor 130 and reference line 122.Comprise node capacitor 126 electric couplings of striding driving switch 172 with the parallel serial circuit that combines the selection transistor 130 that couples of data transistor 136, first address transistor 138 and second address transistor 140.The grid of data transistor 136 and data wire 142 electric couplings that receive data-signal～DATA.First address wire, 144 electric couplings of the grid of first address transistor 138 and receiver address signal～ADDRESS1, second address wire, 146 electric couplings of the grid of second address transistor 140 and receiver address signal～ADDRESS2.Data-signal～DATA and address signal～ADDRESS1 ,～ADDRESS2 low (signal name begin the place indicate tilde is arranged～) time activates.Node capacitor 126, precharge transistor 128, selection transistor 130, data transistor 136 and address transistor 138,140 are formed memory cell.

In operation, node capacitor 126 is that to pass through precharge transistor 128 by the potential pulse that high-amplitude is provided on pre-charge line 132 precharge.In one embodiment, behind the potential pulse of the high-amplitude on the pre-charge line 132, on data wire 142, provide data-signal～DATA so that the state of data transistor 136 to be set, on

address wire

144 and 146, provide address signal～ADDRESS1 ,～ADDRESS2 to be to be provided with the state of first address transistor 138 and second address transistor 140.Selecting to provide the high-amplitude potential pulse to select transistor 130 on the line 134 to open, if data transistor 136, first address transistor 138 and/or 140 conducting of second address transistor, just discharge of node capacitor 126.Alternately, if data transistor 136, first address transistor 138 and second address transistor 140 all disconnect, node capacitor 126 is just kept charging.

If two address signal～ADDRESS1 ,～ADDRESS2 is low, and precharge transmitter unit 120 is exactly the transmitter unit that is addressed; If data-signal～DATA is high, just discharge of node capacitor 126, if data-signal～DATA is low, node capacitor 126 just keeps charging.If address signal～ADDRESS1 and～among the ADDRESS2 at least one be high, precharge transmitter unit 120 is not the transmitter unit that is addressed just; No matter data-signal～DATA voltage amplitude how, node capacitor 126 all discharges.First address transistor 136 and second address transistor 138 constitute address decoder, if precharge transmitter unit 120 is addressed, data transistor 136 just is controlled at the voltage amplitude on the node capacitor 126.

Fig. 7 is the schematic diagram of an embodiment of explanation ink jet-print head transmitter unit array 200.Transmitter unit array 200 comprises a plurality of precharge transmitter units 120 that are arranged to 6 emission group 202a-202f.Precharge transmitter unit 120 among each emission group 202a-202f schematically is arranged to 13 row, 8 row.Emission group 202a-202f in the array 200 and precharge transmitter unit 120 schematically are arranged to 78 row, 8 row.

Eight row precharge transmitter units 120 respectively with receive data-signal～D1 ,～8 data wire 208a-208h electric couplings of D2...～D8.8 row each in (being called data line group or data group here) is included in the precharge transmitter unit 120 among among six emission group 202a-202f each.An electric coupling among in the transmitter unit 120 in each row precharge transmitter unit 120 each and the data wire 208a-208h.All precharge transmitter units 120 and same data wire 208a-208h electric coupling in the data line group, the grid electric coupling of the data transistor 136 of the precharge transmitter unit 120 in this same data wire 208a-208h and this row.In one embodiment, data-signal～D1 ,～D2 ... the part of each presentation video of～D8.Also have, in one embodiment, each among the data wire 208a-208h is by corresponding interface data pad and external control circuit electric coupling.

Data wire 208a and each electric coupling in the precharge transmitter unit 120 of left column are included in the precharge transmitter unit among each emission group 202a-202f.Each electric coupling in the precharge transmitter unit 120 of data wire 208b and adjacent column, so analogize, up to comprise data wire 208h, this data wire 208h and each electric coupling in the precharge transmitter unit 120 of right column are included in the precharge transmitter unit 120 among each emission group 202a-202f.

78 the row precharge transmitter units 120 respectively with receiver address signal～A1 ,～A2 ... the address wire 206a-206g electric coupling of～A7.Each precharge transmitter unit 120 in the precharge transmitter unit 120 of delegation (the child group that is called row group or precharge transmitter unit 120 here) and two electric couplings among the address wire 206a-206g.All precharge transmitter units 120 and two identical address wire 206a-206g electric couplings in the row group.

The child group of emission group 202a-202f be identified as in emission group 1 (FG1) 202a child group SG1-1 to SG1-13, in emission group 2 (FG2) 202b child group SG2-1 to SG2-13 ... up to and be included in child group SG6-1 among emission group 6 (FG6) 202f to SG6-13.In some other embodiment, each emission group 202a-202f can comprise the child group of any suitable number, for example 14 or more son group.

Precharge transmitter unit 120 and two address wire 206a-206g electric couplings of each son group.First and

second address transistors

138 and 140 electric couplings corresponding to all precharge transmitter units 120 in sub two address wire 206a-206g that organize and this child group.One grid electric coupling in address wire 206a-206g and first and

second address transistors

138 and 140, the grid electric coupling of another in another address wire 206a-206g and first and second address transistors 138 and 140.Address wire 206a-206g receiver address signal～A1 ,～A2...～A7, by the child group for array 200 as follows provide address signal～A1 ,～A2...～A7:

The sub-group address signal of row	Row group
		～A1，～A2	SG1-1，SG2-1...SG6-1
～A1，～A3	SG1-2，SG2-2...SG6-2
		～A1，～A4	SG1-3，SG2-3...SG6-3
～A1，～A5	SG1-4，SG2-4...SG6-4
		～A1，～A6	SG1-5，SG2-5...SG6-5
～A1，～A7	SG1-6，SG2-6...SG6-6
		～A2，～A3	SG1-7，SG2-7...SG6-7
～A2，～A4	SG1-8，SG2-8...SG6-8
		～A2，～A5	SG1-9，SG2-9...SG6-9
～A2，～A6	SG1-10，SG2-10...SG6-10
		～A2，～A7	SG1-11，SG2-11...SG6-11
～A3，～A4	SG?1-12，SG2-12...SG6-12
		～A3，～A5	SG?1-13，SG?2-13...SG6-13

In other embodiments, with the couple child group that address wire 206a-206g be conductively coupled to array 200 of any suitable address wire 206a-206g, so that any suitable mapping from the sub-group address signal of row to row group to be provided with the son group.

The child group of precharge transmitter unit 120 by on address wire 206a-206g, provide address signal～A1 ,～A2...～A7 comes addressing.In one embodiment, address wire 206a-206g and the one or more address generator electric couplings that on print head chip 40, provide.In other embodiments, address wire 206a-206g is by interface liner and external control circuit electric coupling.

Pre-charge line 210a-210f receives precharging signal PRE1, PRE2...PRE6, for corresponding emission group 202a-202f provides precharging signal PRE1, PRE2...PRE6.All precharge transmitter unit 120 electric couplings among pre-charge line 210a and the FG1 202a.All precharge transmitter unit 120 electric couplings among pre-charge line 210b and the FG2 202b so continue, until and comprise pre-charge line 210f, all precharge transmitter unit 120 electric couplings among this pre-charge line 210f and the FG6 202f.The grid and the leakage-source path electric coupling of each pre-charge line 210a-210f and all precharge transistors 128 in corresponding emission group 202a-202f, 120 of all the precharge transmitter units of an emission group 202a-202f and a pre-charge line 210a-210f electric coupling.The node capacitor 126 of all the precharge transmitter units 120 among therefore, the emission group 202a-202f is by providing corresponding precharging signal PRE1, PRE2...PRE6 to charge for corresponding pre-charge line 210a-210f.In one embodiment, each of pre-charge line 210a-210f is by corresponding interface liner and external control circuit electric coupling.

Select line 212a-212f to receive and select signal SEL1, SEL2...SEL6, and select signal SEL1, SEL2...SEL6 for corresponding emission group 202a-202f provides.Select all precharge transmitter unit 120 electric couplings among line 212a and the FG1 202a.Select all precharge transmitter unit 120 electric couplings among line 212b and the FG2202b, so analogize, until and comprise and select line 212f, all precharge transmitter unit 120 electric couplings among this selection line 212f and the FG6 202f.Among each that select line 212a-212f and the corresponding emission group 202a-202f all are selected the grid electric coupling of

transistors

130, and 120 of all precharge transmitter units of an emission group 202a-202f are selected line 212a-212f electric coupling with one.In one embodiment, each of selection line 212a-212f is by corresponding interface liner and external control circuit electric coupling.Also have, in one embodiment, some pre-charge line 210a-210f and some are selected line 212a-212f electric coupling shared interface liner together.

Line of departure 214a-214f receives and to transmit or energy signal FIRE1, FIRE2...FIRE6, and provides energy signal FIRE1, FIRE2...FIRE6 for corresponding emission group 202a-202f.All precharge transmitter unit 120 electric couplings among line of departure 214a and the FG1 202a.All precharge transmitter unit 120 electric couplings among line of departure 214b and the FG2 202b are so analogized, until and comprise line of departure 214f, all precharge transmitter unit 120 electric couplings among this line of departure 214f and the FG6 202f.120 of all precharge transmitter units in all emission resistor 52 electric couplings among each of line of departure 214a-214f and the corresponding emission group 202a-202f, emission group 202a-202f and a line of departure 214a-214f electric coupling.Line of departure 214a-214f is by appropriate interface liner and outside supply circuit electric coupling.All precharge transmitter units 120 and reference line 216 electric couplings of array 200, this reference line 216 is connected with reference voltage such as ground.Therefore, the precharge transmitter unit 120 and identical address wire 206a-206g, pre-charge line 210a-210f, selection line 212a-212f and line of departure 214a-214f electric coupling in a row group of precharge transmitter unit 120.

In operation, in one embodiment, select emission group 202a-202f to launch continuously.Before FG2 202b, select FG1 202a, before FG3, select FG2 202b, and the like, up to FG6 202f.After FG6 202f, the circulation of emission group restarts with FG1 202a.

Address signal～A1 ,～A2...～A7 cycles through the sub-group address of 13 row, and then the sub-group address of repeated rows.In each cycle period by emission group 202a-202f, the address signal～A1 that on address wire 206a-206g, provides ,～A2...～A7 is set to a row group address.To once circulation by emission group 202a-202f, address signal～A1 ,～A2...～A7 selects a row group in each emission group 202a-202f.To next circulation by emission group 202a-202f, change address signal～A1 ,～A2...～A7 to be to be chosen in another row group among each emission group 202a-202f.This operation continues to carry out, up to address signal～A1 ,～A2...～A7 selects the last row group among the emission group 202a-202f.In the end after the row group, address signal～A1 ,～A2...～A7 selects first row to organize once more the start address circulation.

In operation on the other hand, by on the pre-charge line 210a-210f of an emission group 202a-202f, providing precharging signal PRE1, PRE2...PRE6, one of this among the operation issue group 202a-202f.Precharging signal PRE1, PRE2...PRE6 defined precharge time at interval or during, at this section in the period, node capacitor 126 on each driving switch 172 in this emission group 202a-202f is charged to high voltage amplitude, with to this emission group 202a-202f precharge.

On address wire 206a-206g, provide address signal～A1 ,～A2...～A7 so that in each emission group 202a-202f one of addressing row group, be included in a row group among the precharge emission group 202a-202f.On data wire 208a-208h, provide data-signal～D1 ,～D2...～D8, come for all emission group 202a-202f provide data, be included in the row group of addressing among the precharge emission group 202a-202f.

Then, on the selection line 212a-212f of precharge emission group 202a-202f, provide selection signal SEL1, SEL2...SEL6 to select precharge emission group 202a-202f.Selection signal SEL1, SEL2...SEL6 have defined interval discharge time that the node capacitor 126 on each driving switch 172 in such precharge transmitter unit 120 is discharged, described precharge transmitter unit 120 or in the row group that is addressed in selected emission group 202a-202f, perhaps in the emission group 202a-202f that selects, be addressed and receive high level data-signal～D1 ,～D2...～D8.Node capacitor 126 does not discharge in such precharge transmitter unit 120, described precharge transmitter unit 120 in selected emission group 202a-202f, be addressed and receive low level data-signal～D1 ,～D2...～D8.High voltage amplitude on node capacitor 126 is opened (conducting) with driving switch 172.

After driving switch 172 in selected emission group 202a-202f is set as conducting or not conducting, on the line of departure 214a-214f of selected emission group 202a-202f, provide energy pulse or potential pulse.Precharge transmitter unit 120 conductive electric currents with conducting driving switch 172 are by emission resistor 52, heated ink and ink-jet from corresponding droplet generator 60.

202a-202f operates successively along with the emission group, selection signal SEL1, the SEL2...SEL6 of an emission group 202a-202f is used as precharging signal PRE1, the PRE2...PRE6 of next emission group 202a-202f.Precharging signal PRE1, the PRE2...PRE6 of an emission group 202a-202f is prior to selection signal SEL1, SEL2...SEL6 and energy signal FIRE1, the FIRE2...FIRE6 of this emission group 202a-202f.After precharging signal PRE1, PRE2...PRE6, data-signal～D1 ,～D2...～D8 is by time division multiplex, and be stored in the row group by this emission group 202a-202f that selects signal SEL1, SEL2...SEL6 addressing.Selection signal SEL1, the SEL2...SEL6 of selected emission group 202a-202f also are precharging signal PRE1, the PRE2...PRE6 of next emission group 202a-202f.After selection signal SEL1, the SEL2...SEL6 of selected emission group 202a-202f finish, provide selection signal SEL1, the SEL2...SEL6 of next emission group 202a-202f.When the energy signal FIRE1, the FIRE2...FIRE6 that comprise energy pulse offer selected emission group 202a-202f, the precharge transmitter unit 120 in selected child group based on stored data signal～D1 ,～D2...～D8 emission or heated ink.

Fig. 8 is the sequential chart of operation of an embodiment of explanation transmitter unit array 200.According to the 300 data-signal～D1 that indicate ,～after D2...～D8 is 120 energy supplies of precharge transmitter unit, selected emission group 202a-202f.Shown in 302, to each row group address and emission group 202a-202f combination, the data-signal～D1 that indicates at 300 places ,～D2...～D8 changes as required.On address wire 206a-206g, be provided at 304 places address signal～A1 ,～A2...～A7 is with row of addressing in from emission group 202a-202f each group.To the circulation of traversal emission group 202a-202f, the address signal～A1 at 304 places ,～A2...～A7 is configured to an address that indicates at 306 places.After circulation is finished, the address signal～A1 at 304 places ,～A2...～A7 changes at 308 places, so that the different row group of addressing in each from emission group 202a-202f.The address signal～A1 at 304 places ,～A2...～A7 increases progressively traversal row group, organizes to return 1 addressed row with continuous order from 1 to 13.In other embodiments, can be arranged on 304 places address signal～A1 ,～A2...～A7 comes to organize with any suitable sequential addressing row.

In the circulation of traversal emission group 202a-202f, the selection line 212f that couples with FG6 202f and receive the SEL6/PRE1 signal 309 that comprises SEL6/PRE1 signal pulse 310 with pre-charge line 210a that FG1 202a couples.In one embodiment, select line 212f to receive identical signal with pre-charge line 210a electric coupling together.In another embodiment, select line 212f not have electric coupling to be in the same place, but receive similar signal with pre-charge line 210a.

On the pre-charge line 210a at 310 SEL6/PRE1 signal pulse to all transmitter unit 120 precharge among the FG1 202a.Each node capacitor 126 of the precharge transmitter unit 120 among the FG1 202a is charged to high voltage amplitude.The node capacitor 126 of the precharge transmitter unit 120 in a row group SG1-K (indicating at 311 places) is pre-charged to high voltage amplitude 312.Row group address chooser group SG1-K 306 is that the data transistor 136 in all precharge transmitter units 120 of all emission group 202a-202f of the row group SG1-K that comprises that this address chooses is provided at 314 set of data signals.

The selection line 212a of FG1 202a and the pre-charge line 210b of FG2 202b receive the SEL1/PRE2 signal 315 that comprises SEL1/PRE2 signal pulse 316.SEL1/PRE2 signal pulse 316 on selecting line 212a is opened the selection transistor 130 in each precharge transmitter unit 120 among the FG1 202a.To each the precharge transmitter unit 120 of the row group SG1-K that does not choose among the FG1 202a, node capacitor 126 discharges in the address.Shown in 318, in the row group SG1-K that the address is chosen, the data at 314 places are stored in the node capacitor 126 of the driving switch 172 among the son group SG1-K that is expert at, and driving switch are opened (conducting) or are disconnected (not conducting).

On the pre-charge line 210b at 316 SEL1/PRE2 signal pulse to all transmitter unit 120 precharge among the FG2 202b.Each node capacitor 126 of the precharge transmitter unit 120 among the FG2 202b is charged to high voltage amplitude.The node capacitor 126 of the precharge transmitter unit 120 in a row group SG2-K (indicating 319) is pre-charged to high voltage amplitude 320.Choose son group SG2-K in 306 row group address, the set of data signals 328 offers the data transistor 136 in all precharge transmitter units 120 of all emission group 202a-202f that comprise the row group SG2-K that chooses the address.

Line of departure 214a receives the energy signal FIRE1 (indicating 323) be included in 322 energy pulse and come to be emission resistor 52 energy supplies in the precharge transmitter unit 120 that conducting driving switch 172 is arranged in FG1 202a.When SEL1/PRE2 signal pulse 316 was just actively being dragged down for node capacitor 126 high and on non-conduction driving switch 172, FIRE1 energy pulse 322 uprised, and this has sign on 324 energy signal FIRE1 323.When node capacitor 126 is just actively dragged down energy pulse 322 being switched to height has avoided node capacitor 126 to be charged by driving switch 172 unintentionally when energy pulse 322 uprises.SEL1/PRE2 signal 315 step-downs, energy pulse 322 offer the FG1 202a scheduled time and spray China ink with heated ink and by the nozzle 34 corresponding to the precharge transmitter unit 120 of conducting.

The selection line 212b that is used for FG2 202b receives the SEL2/PRE3 signal 325 that comprises SEL2/PRE3 signal pulse 326 with the pre-charge line 210c that is used for FG3 202c.At SEL1/PRE2 signal pulse 316 step-downs and energy pulse 322 when being high, selecting SEL2/PRE3 signal pulse 326 on the line 212b to open selection transistor 130 at each precharge transmitter unit 120 of FG2 202b.To all the precharge transmitter units 120 of the row group SG2-K that does not choose among the FG2 202b, node capacitor 126 discharges in the address.Shown in 330, the set of data signals 328 that is used for son group SG2-K is stored in the precharge transmitter unit 120 of son group SG2-K driving switch 172 is opened (conducting) or disconnected (not conducting).All the precharge transmitter units 120 of SEL2/PRE3 signal pulse precharge FG3 202c on pre-charge line 210c.

Line of departure 214b receives the energy signal FIRE2 (indicating 331) that comprises energy pulse 332, is 52 power supplies of the emission resistor in the precharge transmitter unit 120 with conducting driving switch 172 in FG2 202b.Illustrate 334, when SEL2/PRE3 signal pulse 326 when being high, FIRE2 energy pulse 332 raises.SEL2/PRE3 signal pulse 326 step-downs, FIRE2 energy pulse 332 remain high with heating with from corresponding droplet generator 60 injection China inks.

After SEL2/PRE3 signal pulse 326 step-downs and energy pulse 332 when being high provides the SEL3/PRE4 signal to select FG3 202c and precharge FG4 202d.Precharge, select and provide the process of the energy signal that comprises energy pulse to proceed, until and comprise FG6 202f.

All transmitter units 120 on the SEL5/PRE6 signal pulse precharge FG6 202f on the pre-charge line 210f.Each node capacitor 126 of the precharge transmitter unit 120 of FG6 202f is charged to high voltage amplitude.To be pre-charged to high voltage amplitude 341 at the node capacitor 126 of the precharge transmitter unit 120 among one shown in the 339 row group SG6-K.Row group address chooser group SG6-K 306 offers data transistor 136 in all precharge transmitter units 120 of all emission group 202a-202f that comprise the row group SG6-K that the address is selected with set of data signals 338.

The selection line 212f that is used for FG6 202f receives the 2nd SEL6/PRE1 signal pulse with the pre-charge line 210a that is used for FG1 202a 336.Open selection transistor 130 in each precharge transmitter unit 120 at FG6 202f selecting the 2nd SEL6/PRE1 signal pulse 336 on the line 212f.To not all the precharge transmitter units 120 in the row group SG6-K that the address is chosen among the FG6 202f, node capacitor 126 discharges.In the row group SG6-K that the address is chosen, data 338 are stored in the node capacitor 126 of each driving switch 172 to open or to disconnect driving switch 340.

SEL6/PRE1 signal on pre-charge line 210a is pre-charged to high voltage amplitude with the node capacitor 126 in all transmitter units 120 (being included in the transmitter unit 120 among the 342 row group SG1-K that indicate) of FG1 202a.Address signal～A1 ,～A2...～A7 304 selects row group SG1-K, SG2-K or the like, in the time of child group SG6-K, transmitter unit 120 precharge among the FG1 202a.

Line of departure 214f receive be included in 344 energy pulse at the 343 energy signal FIRE6 that indicate, come emission resistor 52 energy supplies for the precharge transmitter unit 120 that has conducting driving switch 172 among the FG6 202f.When SEL6/PRE1 signal pulse 336 is high, and the node capacitor on the non-conduction driving switch 172 126 is when just actively being dragged down (indicating 346), and energy pulse 344 uprises.When node capacitor 126 is actively dragged down, energy pulse 344 is switched to height, prevented that node capacitor 126 is unintentionally by driving switch 172 chargings when energy pulse 344 uprises.SEL6/PRE1 signal pulse 336 step-downs, energy pulse 344 remain high one period scheduled time with heated ink and by nozzle 34 ink-jets corresponding to the precharge transmitter unit 120 of conducting.

After SEL6/PRE1 signal pulse 336 step-downs and energy pulse 344 when being high, 308 change address signal～A1 ,～A2...～A7 to be to select another group group SG1-K+1, SG2-K+1 or the like up to SG6-K+1.The selection line 212a that is used for FG 1 202a receives SEL1/PRE2 signal pulse (indicating 348) with the pre-charge line 210b that is used for FG2 202b.Open selection transistor 130 in each precharge transmitter unit 120 at FG1 202a selecting SEL1/PRE2 signal pulse 348 on the line 212a.To not each the precharge transmitter unit 120 in the child group SG1-K+1 that the address is chosen among the FG1 202a, node capacitor 126 discharges.The set of data signals 350 that is used for row group SG1-K+1 is stored in the precharge transmitter unit 120 of son group SG1-K+1 with driving switch 172 conductings or disconnection.All transmitter unit 120 precharge among 348 couples of FG2 202b of SEL1/PRE2 signal pulse on pre-charge line 210b.

Line of departure 214a received energy pulse 352 is emission resistor 52 energy supplies of the precharge transmitter unit 120 with conducting driving switch 172 of FG1 202a.When the SEL1/PRE2 signal pulse 348 was high, energy pulse 352 uprised.SEL1/PRE2 signal pulse 348 step-downs, energy pulse 352 are kept high with heating and from corresponding droplet generator 60 ink-jets.This process will last till prints end.

Fig. 9 is the schematic diagram that an embodiment of the precharge transmitter unit 150 that is configured to latch data is described.In one embodiment, precharge transmitter unit 150 is parts of current emission group, and the part that current emission group is an ink jet-print head transmitter unit array.Ink jet-print head transmitter unit array comprises a plurality of emission groups.

Precharge transmitter unit 150 is similar to the precharge transmitter unit 120 of Fig. 6, comprises the memory cell of driving switch 172, emission resistor 52 and precharge transmitter unit 120.The parts of precharge transmitter unit 150 and parts unanimity precharge transmitter unit 120 and the parts of precharge transmitter unit 120 digital identical, electric coupling together and be couple to holding wire as illustrating in the explanation of Fig. 6, difference is, the grid of data transistor 136 and latch data line 156 electric couplings that receive latch data signal～LDATAIN, rather than couple with the data wire 142 that receives data-signal～DATA.In addition, the parts of the precharge transmitter unit 150 consistent with precharge transmitter unit 120 work as illustrating in the explanation of Fig. 6 and operate.

Precharge transmitter unit 150 comprises data latch transistor 152, and this data latch transistor is included in the leakage-source path of electric coupling between data wire 154 and the latch data line 156.Data wire 154 receives data-signal～DATA, and data latch transistor 152 is latched into precharge transmitter unit 150 so that latch data signal～LDATAIN to be provided with data.Signal name begin that the place has data-signal～DATAIN that tilde (～) indicates and latch data signal～LDATAIN in low level the time be active.Pre-charge line (PRECHARGE) 132 electric couplings of the precharging signal of the grid of data latch transistor 152 and the current emission group of reception.

In another embodiment, the grid of data latch transistor 152 not with pre-charge line 132 electric couplings of current emission group.On the contrary, the different holding wire electric coupling that pulse signal is provided of the grid of data latch transistor 152 and the pre-charge line of for example another emission group.

In one embodiment, data latch transistor 152 is transistors of minimum dimension, so that when high voltage amplitude is transformed into the low-voltage amplitude, make to share to the electric charge between the source node to minimize at the grid of latch data line 156 and data latch transistor 152 at precharging signal.Electric charge is shared the latch data that has reduced high voltage amplitude.Also have, in one embodiment, when precharging signal is that the transistor of low-voltage amplitude and minimum dimension makes this electric capacity remain when low the electric capacity that the drain electrode decision of data latch transistor 152 is seen on data wire 154.

Data latch transistor 152 will reach latch data line 156 and latch data memory node electric capacity 158 from the data of data wire 154 by the precharging signal of high-amplitude.When precharging signal from high-amplitude when low amplitude is changed, these data are latched on latch data line 154 and the latch data memory node electric capacity 158.This latch data memory node electric capacity 158 is shown in broken lines, because it is the part of data transistor 136.Replacedly, can use the capacitor that separates with data transistor 136 to store latched data.

Latch data memory node electric capacity 158 is enough big, thus when precharging signal when high-amplitude is converted to low amplitude, it remains essentially in high-amplitude.Also have, latch data memory node electric capacity 158 is enough big, so that when energy pulse being provided by the FIRE that transmits and high potential pulse is provided in selection signal SELECT, this latch data memory node electric capacity keeps low amplitude basically.In addition, data transistor 136 is enough little, make when the grid of driving switch 172 discharges, on latch data memory node electric capacity 158, keep low amplitude, data transistor 136 is enough big again, makes before the beginning of the energy pulse in the FIRE that transmits that the grid with driving switch 172 discharges fully.

In one embodiment, a plurality of precharge transmitter units use identical data, share identical data latch transistor 152 and at latch data signal～LDATAIN of 156.Latch data signal～LDATAIN 156 latchs once, is used by these a plurality of precharge transmitter units.The electric capacity that this has increased on any single latch data line 156 makes it stand switching problem less, and reduces the total capacitance that drives by data wire 154.

In operation, data wire 154 receives data-signal～DATAIN, by the potential pulse of high-amplitude is provided, this data-signal～DATAIN is sent to latch data line 156 and latch data memory node electric capacity 158 by data latch transistor 152 on pre-charge line 132.Also have, memory node electric capacity 126 is to utilize high-amplitude potential pulse on pre-charge line 132, precharge by precharge transistor 128.When the potential pulse on the pre-charge line 132 when high voltage amplitude is converted to the low-voltage amplitude, turn-off data latch transistor 152 provides latch data signal～LDATAIN.The data that will be latched in the precharge transmitter unit 150 are provided when precharging signal is in high voltage amplitude, and remain to precharging signal and be converted to after the low-voltage amplitude.On the contrary, when selecting signal to be in high voltage amplitude, provide the data in the precharge transmitter unit 120 that will be latched into Fig. 6.

In another embodiment, the grid of data latch transistor 152 not with pre-charge line 132 electric couplings of current emission group.The substitute is the pre-charge line electric coupling of the grid of data latch transistor 152 and another emission group.Data wire 154 receives data-signal～DATAIN, and by the high-amplitude potential pulse being provided on the pre-charge line of this another emission group, being sent to latch data line 156 and latch data memory node electric capacity 158 by data latch transistor 152.When high voltage amplitude was converted to the low-voltage amplitude, data latch transistor 152 disconnected, so that latch data signal～LDATAIN to be provided at the potential pulse on the pre-charge line of this another emission group.Memory node electric capacity 126 passes through precharge transistor 128 precharge by the high-amplitude potential pulse on the pre-charge line 132.After the potential pulse on the pre-charge line of this another emission group was converted to the low-voltage amplitude from high voltage amplitude, the high voltage pulse on pre-charge line 132 took place.

In one embodiment, the grid and the first pre-charge line electric coupling that is different from the first emission group of current emission group such as the data latch transistor of data latch transistor 152 of the first precharge transmitter unit of current emission group.Also have the grid and the second pre-charge line electric coupling that is different from the second emission group of the first emission group and current emission group such as the data latch transistor of data latch transistor 152 of the second precharge transmitter unit of current emission group.Data wire 154 provides data when the precharging signal of the first and second emission groups is high voltage amplitude.Precharging signal and selection signal by current emission group use the data that are latched in the first and second precharge transmitter units.In one embodiment, data wire 154 not with ink jet-print head transmitter unit array in each emission group electric coupling.

In an embodiment of precharge transmitter unit 150, after the high-amplitude potential pulse on pre-charge line 132, on

address wire

144 and 146, provide address signal～ADDRESS1 and～ADDRESS2 is provided with the state of first address transistor 138 and second address transistor 140.Selecting to provide the high voltage amplitude pulse to open selection transistor 130 on the line (SELECT) 134, if data transistor 136, first address transistor 138 and/or second address transistor 140 are open-minded, just discharge of memory node electric capacity 126.Replacedly, if data transistor 136, first address transistor 138 and second address transistor 140 all disconnect, memory node electric capacity 126 just keeps charging.

If two address signal～ADDRESS1 and～ADDRESS2 is low, precharge transmitter unit 150 is exactly the transmitter unit that is addressed, if latch data signal～LDATAIN is high, just discharge of memory node electric capacity 126, if perhaps latch data signal～LDATAIN is low, memory node electric capacity 126 just keeps charging.If have at least an address signal～ADDRESS1 and～ADDRESS2 is for high, precharge transmitter unit 150 is not the transmitter unit that is addressed just, no matter the voltage amplitude of latch data signal～LDATAIN how, memory node electric capacity 126 all discharges.First and

second address transistors

136 and 138 constitute address decoder, if precharge transmitter unit 150 is addressed, data transistor 136 is with regard to the voltage amplitude on the control store node capacitor 126.

Figure 10 is the schematic diagram of an embodiment of explanation double data rate transmitter unit circuit 400.Under double data rate transmitter unit circuit 400 each high voltage pulse in precharging signal, latch two data bit from each data wire.Therefore, do not increase tranmitting frequency or the input liner number just can be the emission resistor energy supply of twice number.By the number that for example increases the droplet generator on the printhead and the input liner that uses similar number or on printhead, use the droplet generator of similar number to reduce the number of input liner, can improve the number of the ink-droplet generator of each input liner.The printhead that more droplet generators are arranged is usually with higher quality and/or print speed printing faster.Also have, the printhead with less input liner is generally lower than the printhead cost with more input liner.

Double data rate transmitter unit circuit 400 comprises such as a plurality of emission groups of emission group 402 and a clock latch cicuit 404.Emission group 402 comprises a plurality of precharge transmitter units 150 of being configured to latch data and such as a plurality of row groups of row group 406.Row group 406 comprises precharge transmitter unit 150a-150m.

Each precharge transmitter unit 150 in the emission group 402 and pre-charge line 408 electric couplings are selected signal SELECT with selecting line 410 electric couplings to receive to receive precharging signal PRECHARGE, with the line of departure 412 electric couplings with the reception FIRE that transmits.Each precharge transmitter unit 150a-150m in the row group 406 and first address wire, 414 electric couplings to be receiving first address signal～ADDRESS1, with second address wire, 416 electric couplings to receive second address signal～ADDRESS2.Precharge transmitter unit 150 received signals are also operated as in the explanation of Fig. 9.

Clock latch cicuit 404 comprises clock latch transistor 418a-418n.The grid of each clock latch transistor 418a-418n and clock line 420 electric couplings are to receive data clock signal DCLK.An electric coupling among the leakage-source path of each clock latch transistor 418a-418n and the data wire 422a-422n is to be received in the; in～Dn of the data-signal～D1 shown in 422.The opposite side of leakage-source path of each clock latch transistor 418a-418n is by corresponding clock data wire 424a-424n, with precharge transmitter unit 150 electric couplings in all other emission groups in emission group 402 and the double data rate transmitter unit circuit 400.Allow all precharge transmitter units 150 in the data line group guarantee on the data wire 424a-424n of clockization, enough electric capacity is arranged with an electric coupling among the clock latch transistor 418a-418n, to guarantee that clock data-signal～DC1 is enough little to the electric charge that～DCn shares, so that when precharging signal is converted to the low-voltage amplitude and when 420 data clock signal DCLK is converted to the low-voltage amplitude, is enough to keep the high voltage amplitude of minimum level in the data that latch in precharge transmitter unit 150.

In other embodiments, each clock latch transistor 418a-418n and corresponding clock data wire 424a-424n can be divided into a plurality of transistors and a plurality of data wire.In one embodiment, with clock latch transistor 418a-418n in corresponding a plurality of transistors in one and with clock data line 424a-424n in corresponding a plurality of data wires in a nozzle with emission group on a side of fluid passage couple.With in same corresponding a plurality of transistors among the clock latch transistor 418a-418n another and with clock data line 424a-424n in same corresponding a plurality of data wires in another nozzle with emission group on the opposite side of fluid passage couple.In one embodiment, each nozzle can by in a plurality of data wires independent one with a plurality of transistors in independent one couple.

Clock latch transistor 418a comprise at one end with data wire 422a electric coupling to receive leakage-source path of data-signal～D1.The other end of leakage-source path of clock latch transistor 418a is at 424a and precharge transmitter unit 150a and all and precharge transmitter unit 150a same column or with precharge transmitter unit 150 electric couplings of data line group, comprises precharge transmitter unit 150 in the emission group 402 and other emission group in the double data rate transmitter unit circuit 400.Leakage-source path the electric coupling of the data latch transistor 152 in the leakage-source path of clock latch transistor 418a and data wire 154 and each the precharge transmitter unit 150 in corresponding data line group.Clock latch transistor 418a receives data-signal～D1 at 422a, and provides clock data-signal～DC1 at 422a for the data line group that comprises precharge transmitter unit 150a.

Data wire 422a also with precharge transmitter unit 150b and all and precharge transmitter unit 150b same column or with precharge transmitter unit 150 electric couplings of data line group, comprises the precharge transmitter unit 150 in other emission group in emission group 402 and the double data rate transmitter unit circuit 400.Leakage-source path the electric coupling of the data latch transistor 152 in data wire 422a and data wire 154 and each the precharge transmitter unit 150 in corresponding data line group.The data line group that comprises precharge transmitter unit 150b receives data-signal～D1 at 422a.

Clock latch transistor 418b comprise at one end with data wire 422b electric coupling to receive leakage-source path of data-signal～D2.The other end of leakage-source path of clock latch transistor 418b is included in the precharge transmitter unit 150 in emission group 402 and other emission group in double data rate transmitter unit circuit 400 at 424b and precharge transmitter unit 150c with precharge transmitter unit 150c same column or with all precharge transmitter unit 150 electric couplings of data line group.Leakage-source path the electric coupling of the data latch transistor 152 in the leakage-source path of clock latch transistor 418b and data wire 154 and each the precharge transmitter unit 150 in corresponding data line group.Clock latch transistor 418b receives data-signal～D2 at 422b, and provides clock data-signal～DC2 at 424b for the data line group that comprises precharge transmitter unit 150c.

Data wire 422b also with precharge transmitter unit 150d with precharge transmitter unit 150d same column or with all precharge transmitter unit 150 electric couplings of data line group, is included in the precharge transmitter unit 150 in emission group 402 and other emission group in double data rate transmitter unit circuit 400.Leakage-source path the electric coupling of the data latch transistor 152 in data wire 422b and data wire 154 and each the precharge transmitter unit 150 in corresponding data line group.The data line group that comprises precharge transmitter unit 150d receives data-signal～D2 at 422b.

Precharge transmitter unit 150 electric couplings in the same and double data rate transmitter unit circuit 400 of remaining clock latch transistor 418 in the clock latch cicuit 404, until and comprise clock latch transistor 418n, this clock latch transistor 418n comprise at one end with data wire 422n electric coupling to receive leakage-source path of data-signal～Dn.The other end of leakage-source path of clock latch transistor 418n is included in the precharge transmitter unit 150 in emission group 402 and other emission group in double data rate transmitter unit circuit 400 at 424n and precharge transmitter unit 150m-1 with precharge transmitter unit 150m-1 same column or with all precharge transmitter unit 150 electric couplings of data line group.Leakage-source path the electric coupling of the data latch transistor 152 in the leakage-source path of clock latch transistor 418n and data wire 154 and each the precharge transmitter unit 150 in corresponding data line group.Clock latch transistor 418n receives data-signal～Dn at 422n, and provides clock data-signal～DCn at 424n for the data line group that comprises precharge transmitter unit 150m-1.

Data wire 422n also with precharge transmitter unit 150m with precharge transmitter unit 150m same column or with all precharge transmitter unit 150 electric couplings of data line group, is included in the precharge transmitter unit 150 in emission group 402 and other emission group in double data rate transmitter unit circuit 400.Leakage-source path the electric coupling of the data latch transistor 152 in data wire 422n and data wire 154 and each the precharge transmitter unit 150 in corresponding data line group.The data line group that comprises precharge transmitter unit 150m receives data-signal～Dn at 422n.

Each of data wire 422a-422n is by the charging of 152 pairs of latch data lines of the data latch transistor node in such precharge transmitter unit 150, and described precharge transmitter unit 150 is in the emission group that receives the high voltage amplitude precharging signal.In addition, under each data wire 422a-422n each high voltage pulse in data clock signal CLK clock data wire 424a-424n is charged, and the latch data line node that is connected by 152 pairs of the data latch transistors in such precharge transmitter unit 150 charging, described precharge transmitter unit 150 is in the emission group that receives the high voltage amplitude precharging signal.Back end by data wire 422a-422n charging has the bigger electric capacity of grid capacitance than non-double data rate transmitter unit circuit.

In the present embodiment, the precharge transmitter unit 150 of half couples with receive clock data-signal～DC1 and arrives～DCn substantially, and the precharge transmitter unit 150 of half couples to receive data-signal～D1 and arrives～Dn substantially.In addition, precharge transmitter unit 150 electric couplings every in the son group of being expert at arrive～DCn with receive clock data-signal～DC1, and coupling to receive data-signal～DC1 of other arrived～Dn.In other embodiments, the precharge transmitter unit 150 that can couple any suitable percentage arrives～DCn with receive clock data-signal～DC1, can couple any suitable percentage and arrive～Dn to receive data-signal～D1.In other embodiments, can couple precharge transmitter unit 150 with any suitable order or pattern or basic not sequentially receive clock data-signal～DC1 to～DCn and data-signal～D1 to～Dn.

Each data-signal～DC1 comprises first data bit, comprise second data bit during the latter half of high voltage pulse to～Dn during the first half of the high voltage pulse of precharging signal PRECHARGE.Also have, comprise high voltage pulse during the first half of the high voltage pulse of clock signal DCLK in precharging signal PRECHARGE.

In operation, precharging signal PRECHARGE and clock signal DCLK are converted to high voltage amplitude, data-signal～D1 each in～Dn comprises first data bit, and this first data bit offers corresponding clock latch transistor 418a-418n during the high voltage pulse of clock signal DCLK.Clock latch transistor 418a-418n passes to the corresponding data line group up to 150m-1 such as

precharge transmitter unit

150a, 150c with first data bit.When the high voltage pulse among the clock signal DCLK was converted to the low-voltage amplitude, clock latch transistor 418a-418n latched first data bit and arrives～DCn so that clock data-signal～DC1 to be provided.Also provide first data bit until the corresponding data line group of 150m for

precharge transmitter unit

150b, 150d etc.

Then, each data-signal～D1 comprises second data bit, offers the corresponding data line group until 150m such as corresponding clock latch transistor 418a-418n and

precharge transmitter unit

150b, 150d etc. during the latter half of the high voltage pulse of this second data bit in precharging signal PRECHARGE to～Dn.Clock latch transistor 418a-418n disconnects by the clock signal clk of low-voltage amplitude, prevents that second data bit is delivered to the corresponding data line group up to 150m-1 such as

precharge transmitter unit

150a, 150c.

Second data bit of clock data-signal～DC1 in to～DCn and data-signal～D1 to～Dn received by all the precharge transmitter units 150 in the corresponding data line group in the double data rate transmitter unit circuit 400.In emission group 402, second data bit of clock data-signal～DC1 in to～DCn and data-signal～D1 to～Dn received by the data wire in the precharge transmitter unit 150 154, and the high voltage amplitude pulse by data latch transistor 152 and precharging signal PRECHARGE passes to latch data line 156 and latch data memory node electric capacity 158.Also have, in emission group 402, utilize the high voltage amplitude pulse among the precharging signal PRECHARGE, by 128 pairs of memory node electric capacity 126 precharge of precharge transistor.Then, in emission group 402, data latch transistor 152 disconnects second data bit in to～DCn and data-signal～D1 to～Dn with latch clock data-signal～DC1, so that latch data signal～LDATAIN to be provided when precharging signal PRECHARGE is converted to the low-voltage amplitude.

In an embodiment of precharge transmitter unit 150, in the high voltage amplitude pulse transition of precharging signal PRECHARGE during to the low-voltage amplitude, provide address signal～ADDRESS1 and～ADDRESS2 to be to select row group 406, provides the high voltage amplitude pulse to select transistor 130 to open in selecting signal SELECT.In the son group 406 of being expert at, if latch data signal～LDATAIN is high, just discharge of memory node electric capacity 126, if latch data signal～LDATAIN is low, memory node electric capacity 126 just keeps charging.In the row group that is not addressed, no matter the voltage amplitude of latch data signal～LDATAIN how, memory node electric capacity 126 all discharges.In the FIRE that transmits, provide energy pulse, so that for organizing emission resistor 52 energy supplies that the conducting driving switch 172 in 406 couples with row.

In one embodiment, by clockization in first data bit and in another emission group to transmitter unit 150 precharge, the energy supply of the precharge transmitter unit 150 in the double data rate transmitter unit circuit 400 is continued.The clock data-signal and second data bit are latched to precharge transmitter unit 150 by the trailing edge of precharging signal, provide address signal to select row group.Provide select the high voltage amplitude pulse signal in the signal and transmit in energy pulse so that encourage the precharge transmitter unit 150 of the conducting in other emission group.Till this process lasts till that atomizing of liquids is finished.

In other embodiments, the transmitter unit circuit can comprise the clock latch cicuit such as any suitable quantity of clock latch cicuit 404, latchs data bit such as the suitable number of 3 or 4 or more a plurality of data bit with each high voltage pulse at precharging signal PRECHARGE.For example, the transmitter unit circuit can comprise the second clock latch cicuit, this second clock latch cicuit is by second data clock clockization in the 3rd data bit, and at precharging signal PRECHARGE when high voltage amplitude forwards the low-voltage amplitude to, the transmitter unit circuit latchs first, second and the 3rd data bit, makes that the transmitter unit circuit is three data rate transmitter unit circuit.

Figure 11 is the sequential chart of operation of an embodiment of the double data rate transmitter unit circuit 400 of explanation Figure 10.Double data rate transmitter unit circuit 400 comprises that the first emission group FG1, the second emission group FG2, the 3rd emission group FG3 and other emission group are until emission group FGn.Double data rate transmitter unit circuit 400 receives precharge/selection signal S0, S1, S2 and other precharge/selection signal until Sn.Precharge/selection signal S0-Sn is used as the precharging signal in the double data rate transmitter unit circuit 400 and/or selects signal.

The first emission group FG1 is received in 500 signal S0 as precharging signal, is received in 502 signal S1 as selecting signal.The second emission group FG2 is received in 502 signal S1 as precharging signal, is received in 504 signal S2 as selecting signal.The 3rd emission group FG3 is received in 504 signal S2 as precharging signal, received signal S3 (not shown) is as selecting signal or the like, up to received signal Sn-1 (not shown) as precharging signal and signal Sn (not shown) as the emission group FGn that selects signal.

Clock latch cicuit 404 is received in 506 data clock signal DCLK, is received in data-signal～D1 of 508 to～Dn, is provided at clock data-signal～DC1 of 510 to～DCn.Emission group FG1 to FGn be latched in data-signal～D1 of 508 to～Dn and at clock data-signal～DC1 of 510 to～DCn, to be provided for opening latch clock data-signal and the latch data signal that driving switch 172 is emission resistor 52 energy supplies of selection.Each emission winding receives and transmits that described transmitting is included as the energy pulse of selected emission resistor 52 energy supplies.In one embodiment, the energy pulse middle part or the afterbody of the high voltage pulse in the selection signal of emission group basically begins, so that be selected emission resistor 52 energy supplies in the emission group.

The first emission group FG1 be latched in data-signal～D1 of 508 to～Dn and at clock data-signal～DC1 of 510 to～DCn, so that be provided at 512 the first emission group clock data-signal FG1C that latchs and at 514 the first emission group data-signal FG1D that latchs.The second emission group FG2 be latched in data-signal～D1 of 508 to～Dn and at clock data-signal～DC1 of 510 to～DCn, so that be provided at 516 the second emission group clock data-signal FG2C that latchs and at 518 the second emission group data-signal FG2D that latchs.The 3rd emission group FG3 be latched in data-signal～D1 of 508 to～Dn and at clock data-signal～DC1 of 510 to～DCn, so that be provided at 520 the 3rd emission group clock data-signal FG3C that latchs and at 522 the 3rd emission group data-signal FG3D that latchs.Other emission group and emission group FG1 are similar to FG3, also be latched in data-signal～D1 of 508 to～Dn and at clock data-signal～DC1 of 510 to～DCn, so that latch clock data-signal and latch data signal are provided.

At first, the signal S0 500 provides the high voltage pulse 524 in the precharging signal of the first emission group FG1, and during the first half of the high voltage pulse 524, the data clock signal DCLK 506 provides the high voltage pulse 526.Clock latch cicuit 404 is received in 526 high voltage pulse, is delivered in data-signal～D1 of 508 to～Dn, to be provided at clock data-signal～DC1 of 510 to～DCn.

Be positioned at the first half of 524 high voltage pulse, be positioned at data-signal～D1 of 508 and be included in 528 the first emission group clock data-signal 1C to～Dn, this first emission group clock data-signal 1C be provided at by clock latch cicuit 404 clock data-signal～DC1 of 510 in the～DCn at 530 the first emission group clock data-signal 1C.Also have, the first emission group clock data-signal 1C 530 is by the data latch transistor 152 in the precharge transmitter unit 150 of the first emission group FG1, be provided among 512 the first emission group clock data-signal FG1C that latchs at 532 the first emission group clock data-signal 1C.When high voltage pulse 526 was converted to low logic level, clock data-signal～DC1～DCn that the first emission group clock data-signal 1C 530 is used as 510 latched.The first emission group clock data-signal 1C 528 must remain to high voltage pulse 526 be converted to be lower than transistorized threshold value after.

Be positioned at the latter half of 524 high voltage pulse, the data-signal～D1 508 is included in 534 the first emission group data-signal 1D to～Dn.Data latch transistor 152 in the precharge transmitter unit 150 of the first emission group FG1 of the first emission group data- signal 1D 534 by linking data wire 422, be provided among 514 the first emission group data-signal FG1D that latchs at 536 the first emission group data-signal 1D.When high voltage pulse 524 is converted to low logic level, the first emission group clock data-signal 1C 532 and in 536 the first emission group data-signal 1D is latched to precharge transmitter unit 150 among the first emission group FG1.The first emission group data- signal 1D 534 must remain to high voltage pulse 524 be converted to be lower than transistorized threshold value after.

Provide address signal select row group, signal S1 502 provide in the precharging signal of the selection signal of the first emission group FG1 and the second emission group FG2 at 538 high voltage pulse.Open selection transistor 130 in the precharge transmitter unit 150 of the first emission group FG1 at 538 high voltage pulse.In the row group of addressing, if the first emission group data FG1C that latchs 512 and at 514 FG1D for high, memory node electric capacity 126 is discharge just, if be low at 512 the first emission group data FG1C that latchs with at 514 FG1D perhaps, memory node electric capacity 126 just keeps charging.In the row group of addressing not, be that height is low no matter at 512 the first emission group data FG1C that latchs with at the voltage amplitude of 514 FG1D, memory node electric capacity 126 all discharges.In transmitting, the first emission group provides energy pulse, so that be emission resistor 52 energy supplies that the conducting driving switch 172 in organizing with row of addressing couples.

Be positioned at the first half of 538 high voltage pulse, the data clock signal DCLK 506 provides the high voltage pulse 540.Clock latch cicuit 404 is received in 540 high voltage pulse, is delivered in data-signal～D1 of 508 to～Dn, so that be provided at clock data-signal～DC1 of 510 to～DCn.

Be positioned at the first half of 538 high voltage pulse, be positioned at data-signal～D1 of 508 and be included in 542 the second emission group clock data-signal 2C to～Dn, this second emission group clock data-signal 2C is by clock latch cicuit 404, be provided at clock data-signal～DC1 of 510 in the～DCn at 544 the second emission group clock data-signal 2C.Also have, the second emission group clock data-signal 2C 544 is by the data latch transistor 152 in the precharge transmitter unit 150 of the second emission group FG2, be provided among 516 the second emission group clock data-signal FG2C that latchs at 546 the second emission group clock data-signal 2C.When high voltage pulse 540 was converted to low logic level, the second emission group clock data-signal 2C 544 was used as at clock data-signal～DC1 of 510 and latchs to～DCn.The second emission group clock data-signal 2C 542 must remain to high voltage pulse 540 be converted to be lower than transistorized threshold value after.

Be positioned at the latter half of 538 high voltage pulse, the data-signal～D1 508 is included in 548 the second emission group data-signal 2D to～Dn.Data latch transistor 152 in the precharge transmitter unit 150 of the second emission group FG2 of the second emission group data- signal 2D 548 by linking data wire 422, be provided among 518 the second emission group data-signal FG2D that latchs at 550 the second emission group data-signal 2D.When high voltage pulse 538 is converted to low logic level, the second emission group clock data-signal 2C 546 and in 550 the second emission group data-signal 2D is latched to precharge transmitter unit 150 among the second emission group FG2.The second emission group data- signal 2D 548 must remain to high voltage pulse 538 be converted to be lower than transistorized threshold value after.

Provide address signal select row group, signal S2 504 provide in the precharging signal of the selection signal of the second emission group FG2 and the 3rd emission group FG3 at 552 high voltage pulse.Open selection transistor 130 in the precharge transmitter unit 150 of the second emission group FG2 at 552 high voltage pulse.In the row group that is addressed, if the second emission group data FG2C that latchs 516 and at 518 FG2D for high, memory node electric capacity 126 is discharge just, if be low at 516 the second emission group data FG2C that latchs with at 518 FG2D perhaps, memory node electric capacity 126 just keeps charging.In the row group of addressing not, be that height is low no matter at 516 the second emission group data FG2C that latchs with at the voltage amplitude of 518 FG2D, memory node electric capacity 126 all discharges.In transmitting, the second emission group provides energy pulse, so that be emission resistor 52 energy supplies that the conducting driving switch 172 in organizing with row of addressing couples.

Be positioned at the first half of 552 high voltage pulse, the data clock signal DCLK 506 provides the high voltage pulse 554.Clock latch cicuit 404 is received in 554 high voltage pulse, is delivered in data-signal～D1 of 508 to～Dn, so that be provided at clock data-signal～DC1 of 510 to～DCn.

Be positioned at the first half of 552 high voltage pulse, be positioned at data-signal～D1 of 508 and be included in 556 the 3rd emission group clock data-signal 3C to～Dn, the 3rd emission group clock data-signal 3C be provided at by clock latch cicuit 404 clock data-signal～DC1 of 510 in the～DCn at 558 the 3rd emission group clock data-signal 3C.Also have, the 3rd emission group clock data-signal 3C 558 is by the data latch transistor 152 in the precharge transmitter unit 150 of the 3rd emission group FG3, be provided among 520 the 3rd emission group clock data-signal FG3C that latchs at 560 the 3rd emission group clock data-signal 3C.When high voltage pulse 554 was converted to low logic level, the 3rd emission group clock data-signal 3C 558 was used as at clock data-signal～DC1 of 510 and latchs to～DCn.The 3rd emission group clock data-signal 3C 556 must remain to high voltage pulse 554 be converted to be lower than transistorized threshold value after.

Be positioned at the latter half of 552 high voltage pulse, the data-signal～D1 508 is included in 562 the 3rd emission group data-signal 3D to～Dn.Data latch transistor 152 in the precharge transmitter unit 150 of the 3rd emission group FG3 of the 3rd emission group data-signal 3D 562 by linking data wire 422, be provided among 522 the 3rd emission group data-signal FG3D that latchs at 564 the 3rd emission group data-signal 3D.When high voltage pulse 552 is converted to low logic level, the 3rd emission group clock data-signal 3C 560 and in 564 the 3rd emission group data-signal 3D is latched to precharge transmitter unit 150 among the 3rd emission group FG3.The 3rd emission group data-signal 3D 562 must remain to high voltage pulse 552 be converted to be lower than transistorized threshold value after.

This process continue to proceed to and comprise received signal Sn-1 as precharging signal and received signal Sn as the emission group FGn that selects signal.This process is carried out again since the first emission group FG1 then, till atomizing of liquids finishes.

Figure 12 is the schematic diagram that an embodiment of the precharge transmitter unit 160 that can be used for based on multiple data rates transmitter unit circuit is described.Precharge transmitter unit 160 is similar with the precharge transmitter unit 120 of Fig. 6, comprises the memory cell of driving switch 172, emission resistor 52 and precharge transmitter unit 120.Precharge transmitter unit 160 have the numeral identical with the parts of precharge transmitter unit 120 with parts corresponding components precharge transmitter unit 120, electric coupling is couple to holding wire together like that as described in Figure 6, difference is that the grid of data transistor 136 is conductively coupled to the latch data line 166 that receives latch data signal～LDATAIN, rather than is couple to the data wire 142 of reception data-signal～DATA.In addition, precharge transmitter unit 160 work as in the explanation of Fig. 6 with parts corresponding components precharge transmitter unit 120 and operate.

Precharge transmitter unit 160 comprises data latch transistor 162, and this data latch transistor 162 is included in leakage-source path that data wire 164 and data latch electric coupling between the line 166.Data wire 164 receives data-signal～DATAIN, and data latch transistor 162 is latched into precharge transmitter unit 160 so that latch data signal～LDATAIN to be provided with data.Data-signal～DATAIN and latched data signal～LDATAIN are active when low, indicate with the tilde (～) in the front of signal name.The grid of data latch transistor 162 is conductively coupled to the data select line 170 that receives data select signal DATASEL.

In one embodiment, data latch transistor 162 is transistors of minimum dimension, so that when high voltage amplitude is transformed into the low-voltage amplitude, electric charge between the grid-source node of latch data line 166 and data latch transistor 162 is shared is minimized at data select signal.Electric charge is shared the latch data that has reduced high voltage amplitude.Also have, in one embodiment, when data select signal is that the transistor of low-voltage amplitude and minimum dimension makes this electric capacity remain when low the electric capacity that the drain electrode decision of data latch transistor 162 is seen on data wire 164.

Data latch transistor 162 will reach latch data line 166 and latch data memory node electric capacity 168 from the data of data wire 164 by the data select signal of high-amplitude.When data select signal from high voltage amplitude when the low-voltage amplitude is changed, these data are latched in latch data line 164 and the latch data memory node electric capacity 168.This latch data memory node electric capacity 168 is shown in broken lines, because it is the part of data transistor 136.Replacedly, can use the capacitor that separates with data transistor 136 to store latched data.

Latch data memory node electric capacity 168 is enough big, thus when data select signal when high-amplitude is converted to low amplitude, it remains essentially in high-amplitude.Also have, latch data memory node electric capacity 168 is enough big, so that when energy pulse being provided by the FIRE that transmits, selecting to provide high potential pulse among the signal SELECT and high potential pulse is provided in precharging signal PRECHARGE, this latch data memory node electric capacity keeps low amplitude basically.In addition, data transistor 136 is enough little, make when the grid of driving switch 172 discharges, on latch data memory node electric capacity 168, keep low amplitude, data transistor 136 is enough big again, makes it possible to energy pulse in the FIRE that transmits and the grid of driving switch 172 is discharged fully before beginning.

In an embodiment of the double data rate transmitter unit circuit that uses precharge transmitter unit 160, each data select line 170 and pre-charge line, first clock or second clock electric coupling.In some emission groups, data select line 170 electric couplings of first clock and some precharge transmitter units 160, data select line 170 electric couplings in emission group pre-charge line and other precharge transmitter units 160.In other emission group, data select line 170 electric couplings in second clock and some the precharge transmitter units 160, data select line 170 electric couplings in emission group pre-charge line and other precharge transmitter units 160.The first half of each high voltage pulse of first clock in the precharging signal of the emission group that couples with first clock comprises high voltage pulse.The first half of each high voltage pulse of second clock in the precharging signal of the emission group that couples with second clock comprises high voltage pulse.Therefore, in some emission groups, first clock and precharging signal latch two data bit during each high voltage pulse of precharging signal, in other emission group, second clock and precharging signal latch two data bit during each high voltage pulse of precharging signal.In other embodiment of the based on multiple data rates transmitter unit circuit that uses precharge transmitter unit 160, can during high voltage pulse, use the clock signal of any suitable number to latch for example a plurality of data bit of three or more data bit at precharging signal.

In the based on multiple data rates transmitter unit circuit that uses precharge transmitter unit 160, some data wires are at every turn to the charging of the latch data line node in the emission group, wherein the high voltage amplitude of each emission group of received in should the precharging signal of emission group.Other data wire is to the charging of the latched data line node in a plurality of emission groups, the high voltage pulse of wherein a plurality of emission group of received in clock signal.

In the operation of precharge transmitter unit 160, data wire 164 receives data-signal～DATAIN, by on data select line 170, providing high voltage pulse, this data-signal～DATAIN is sent to latch data line 166 and latch data memory node electric capacity 168 by data latch transistor 162.Memory node electric capacity 126 is to utilize high voltage pulse on pre-charge line 132, precharge by precharge transistor 128.When the potential pulse on the data select line 170 when high voltage amplitude is converted to the low-voltage amplitude, turn-off data latch transistor 162 is to provide latched data signal～LDATAIN.The data that will be latched in the precharge transmitter unit 160 are provided when data select signal is in high voltage amplitude, and remain to till data select signal is converted to after the low-voltage amplitude.Produce during the high voltage pulse of high voltage pulse in the data select signal in precharging signal, perhaps it is the high voltage pulse in the precharging signal.Different therewith is when selecting signal to be in high voltage amplitude, to provide the data in the precharge transmitter unit 120 that will be latched into Fig. 6.

In an embodiment of precharge transmitter unit 160, after the high voltage pulse on data select line 170, on

address wire

144 and 146, provide address signal～ADDRESS1 and～ADDRESS2 sets the state of first address transistor 138 and second address transistor 140.Selecting to provide the high voltage amplitude pulse to select transistor 130 on the line 134 to open, if data transistor 136, first address transistor 138 and/or second address transistor 140 are open-minded, just discharge of memory node electric capacity 126.Replacedly, if data transistor 136, first address transistor 138 and second address transistor 140 all disconnect, memory node electric capacity 126 just keeps charging.

If two address signal～ADDRESS1 and～ADDRESS2 is low, precharge transmitter unit 160 is exactly the transmitter unit that is addressed, if latch data signal～LDATAIN is high, just discharge of memory node electric capacity 126, if perhaps latch data signal～LDATAIN is low, memory node electric capacity 126 just keeps charging.If have at least an address signal～ADDRESS1 and～ADDRESS2 is for high, precharge transmitter unit 160 is not the transmitter unit that is addressed just, no matter the voltage amplitude of latch data signal～LDATAIN how, memory node electric capacity 126 all discharges.First and

second address transistors

136 and 138 constitute address decoder, if precharge transmitter unit 160 is addressed, data transistor 136 is with regard to the voltage amplitude on the control store node capacitor 126.

Figure 13 is the sequential chart of operation of an embodiment of the explanation double data rate transmitter unit circuit that adopts precharge transmitter unit 160.Each data select line 170 is conductively coupled to pre-charge line, first data clock or second data clock.Double data rate transmitter unit circuit comprises that the first emission group FG1, the second emission group FG2, the 3rd emission group FG3 and other emission group are until emission group FGn.Double data rate transmitter unit circuit receives precharge/selection signal S0, S1, S2 and other precharge/selection signal until Sn.This precharge/selection signal S0-Sn is used as the precharging signal of double data rate transmitter unit circuit and/or selects signal.

The first emission group FG1 is received in 600 signal S0 as precharging signal, is received in 602 signal S1 as selecting signal.The second emission group FG2 is received in 602 signal S1 as precharging signal, is received in 604 signal S2 as selecting signal.The 3rd emission group FG3 is received in 604 signal S2 as precharging signal, received signal S3 (not shown) is as selecting signal or the like, up to received signal Sn-1 (not shown) as precharging signal and signal Sn (not shown) as the emission group FGn that selects signal.

Double data rate transmitter unit circuit is received in 606 the first data clock signal DCLK1 by first data clock, is received in 608 the second data clock signal DCLK2 by second data clock.First data clock and data select line 170 electric couplings such as the only about half of precharge transmitter unit 160 in the emission group of the odd-numbered of the first emission group FG1 and the 3rd emission group FG3.About second half data select line 170 electric couplings of precharge transmitter unit 160 in the emission group of the pre-charge line of each emission group and odd-numbered.Second data clock and data select line 170 electric couplings such as the only about half of precharge transmitter unit 160 in the emission group of the even-numbered of the second emission group FG2 and the 4th emission group FG4, about second half data select line 170 electric couplings of precharge transmitter unit 160 in the emission group of the pre-charge line of each emission group and even-numbered.

The first half of each high voltage pulse of the first data clock signal DCLK1 606 in the precharging signal of the emission group that couples with first data clock comprises high voltage pulse, and the first half of each high voltage pulse of the second data clock signal DCLK2 608 in the precharging signal of the emission group that couples with second data clock comprises high voltage pulse.Data wire is provided at data-signal～D1 of 610 to～Dn, wherein be provided at data-signal～D1 of 610, and first data bit in～Dn during the first half of the high voltage pulse of each data wire in precharging signal, second data bit is provided during the latter half of the high voltage pulse in precharging signal.Precharge transmitter unit 160 electric couplings in each data wire and all the emission groups.Also have, each data wire and precharge transmitter unit 160 electric couplings that have in the emission group of the data select line 170 that couples with first or second data clock, and precharge transmitter unit 160 electric couplings in the emission group of the data select line 170 that couples with the pre-charge line that has with the emission group.

In the emission group of odd-numbered, latch two data bit during the first data clock signal DCLK1 606 and precharging signal each high voltage pulse at precharging signal.In the emission group of even-numbered, latch two data bit during the second data clock signal DCLK2 608 and precharging signal each high voltage pulse at precharging signal.In other embodiment of the based on multiple data rates transmitter unit circuit that uses precharge transmitter unit 160, can use the data clock signal of any suitable number during the high voltage pulse of precharging signal, to latch for example a plurality of data bit of three or more data bit.

Emission group FG1 is latched in data-signal～D1 of 610 to～Dn to FGn, to be provided for opening driving switch 172 for the latch clock data-signal of selected emission resistor 52 energy supplies with latch the pre-charging data signal.Each emission group of received is included as the transmitting of energy pulse of selected emission resistor 52 energy supplies.In one embodiment, energy pulse is that the centre or the afterbody of the high voltage pulse in the selection signal of emission group begins basically, and coming is selected emission resistor 52 energy supplies in the emission group.

The first emission group FG1 is latched in data-signal～D1 of 610 to～Dn, to be provided at 612 the first emission group clock data-signal FG1C that latchs and at 614 the first emission group pre-charging data signal FG1P that latchs.The second emission group FG2 is latched in data-signal～D1 of 610 to～Dn, to be provided at 616 the second emission group clock data-signal FG2C that latchs and at 618 the second emission group pre-charging data signal FG2P that latchs.The 3rd emission group FG3 is latched in data-signal～D1 of 610 to～Dn, to be provided at 620 the 3rd emission group clock data-signal FG3C that latchs and at 622 the 3rd emission group pre-charging data signal FG3P that latchs.Other emission group also is latched in data-signal～D1 of 610 to～Dn, with provide with emission group FG1 to the similar latch clock data-signal of FG3 with latch the pre-charging data signal.

At first, in the precharging signal of the first emission group FG1, provide high voltage pulse at 600 signal S0 624.Be positioned at the first half of 624 high voltage pulse, the first data clock signal DCLK1 606 provides the high voltage pulse 626.Data-signal～D1 610 is included in 628 the first emission group clock data-signal 1C to～Dn, they passed the data latch transistor 162 that couples with first data clock among the first emission group FG1, be provided among 612 the first emission group clock data-signal FG1C that latchs at 630 the first emission group clock data-signal 1C.The first emission group clock data-signal 1C 630 is latched when high voltage pulse 626 forwards low logic level to.The first emission group clock data-signal 1C 628 must remain to high voltage pulse 626 be converted to be lower than transistorized threshold value after.

During being positioned at the latter half of 624 high voltage pulse, the data-signal～D1 610 is included in 632 the first emission group pre-charging data signal 1P to～Dn.The data latch transistor 162 of the pre-charge line of the first emission group pre-charging data signal 1P 632 by being couple to the first emission group FG1, be provided among 614 the first emission group pre-charging data signal FG1P that latchs at 634 the first emission group pre-charging data signal 1P.When high voltage pulse 624 was converted to low logic level, the first emission group pre-charging data signal 1P 634 was latched in the precharge transmitter unit 160 among the first emission group FG1.The first emission group pre-charging data signal 1P 632 must remain to high voltage pulse 624 be converted to be lower than transistorized threshold value after.

Provide address signal select row group, signal S1 602 provide in the selection signal of the first emission group FG1 at 636 high voltage pulse and the precharging signal of the second emission group FG2.Open selection transistor 130 in the precharge transmitter unit 160 of the first emission group FG1 at 636 high voltage pulse.In the row group that is addressed, if the first emission group data FG1C that latchs 612 and at 614 FG1P for high, memory node electric capacity 126 is discharge just, if be low at 612 the first emission group data FG1C that latchs with at 614 FG1P perhaps, memory node electric capacity 126 just keeps charging.In the row group that is not addressed, be that height is low no matter at 612 the first emission group data FG1C that latchs with at the voltage amplitude of 614 FG1P, memory node electric capacity 126 all discharges.In transmitting, the first emission group provides energy pulse, so that be emission resistor 52 energy supplies that the conducting driving switch 172 in organizing with row of addressing couples.

Be positioned at the first half of 636 high voltage pulse, the second data clock signal DCLK2 608 is provided at 638 high voltage pulse.Data-signal～D1 610 is included in 640 the second emission group clock data-signal 2C to～Dn, their data latch transistors 162 by coupling with second data clock among the second emission group FG2, be provided among 616 the second emission group clock data-signal FG2C that latchs at 642 the second emission group clock data-signal 2C.When high voltage pulse 638 was converted to low logic level, the second emission group clock data-signal 2C 642 was latched.The second emission group clock data-signal 2C 640 must remain to high voltage pulse 638 be converted to be lower than transistorized threshold value after.

Be positioned at the latter half of 636 high voltage pulse, the data-signal～D1 610 is included in 644 the second emission group data-signal 2P to～Dn.The second emission group pre-charging data signal 2P 644 is by the data latch transistor 162 that the pre-charge line with the second emission group FG2 couples, be provided among 618 the second emission group pre-charging data signal FG2P that latchs at 646 the second emission group pre-charging data signal 2P.When high voltage pulse 636 was converted to low logic level, the second emission group pre-charging data signal 2P 646 was latched in the precharge transmitter unit 160 among the second emission group FG 2.The second emission group pre-charging data signal 2P 644 must remain to high voltage pulse 636 be converted to be lower than transistorized threshold value after.

Provide address signal to select row group, the signal S2 604 provides the high voltage pulse 648 in the precharging signal of the selection signal of the second emission group FG2 and the 3rd emission group FG3.Opened selection transistor 130 in the precharge transmitter unit 160 of the second emission group FG2 at 648 high voltage pulse.In the row group of addressing, if the second emission group data FG2C that latchs 616 and at 618 FG2P for high, memory node electric capacity 126 is discharge just, if be low at 616 the second emission group data FG2C that latchs with at 618 FG2P perhaps, memory node electric capacity 126 just keeps charging.In the row group of addressing not, be that height is low no matter at 616 the second emission group data FG2C that latchs with at the voltage amplitude of 618 FG2P, memory node electric capacity 126 all discharges.In transmitting, the second emission group provides energy pulse, so that be emission resistor 52 energy supplies that the conducting driving switch 172 in organizing with row of addressing couples.

Be positioned at the first half of 648 high voltage pulse, being positioned at 606 the first data clock signal DCLK1 provides high voltage pulse 650.Data-signal～D1 610 is included in 652 the 3rd emission group clock data-signal 3C to～Dn, the data latch transistor 162 of the 3rd emission group clock data-signal 3C by coupling with first data clock among the 3rd emission group FG3, be provided among 620 the 3rd emission group clock data-signal FG3C that latchs at 654 the 3rd emission group clock data-signal 3C.When high voltage pulse 650 was converted to low logic level, the 3rd emission group clock data-signal 3C 654 was latched.The 3rd emission group clock data-signal 3C 652 must remain to high voltage pulse 650 be converted to be lower than transistorized threshold value after.

Be positioned at the latter half of 648 high voltage pulse, the data-signal～D1 610 is included in 656 the 3rd emission group pre-charging data signal 3P to～Dn.The 3rd emission group pre-charging data signal 3P 656 is by the data latch transistor 162 that the pre-charge line with the 3rd emission group FG3 couples, be provided among 622 the 3rd emission group pre-charging data signal FG3P that latchs at 658 the 3rd emission group pre-charging data signal 3P.When high voltage pulse 648 was converted to low logic level, the 3rd emission group pre-charging data signal 3P 658 was latched in the precharge transmitter unit 160 among the 3rd emission group FG3.The 3rd emission group pre-charging data signal 3P 656 must remain to high voltage pulse 648 be converted to be lower than transistorized threshold value after.

Figure 14 is the schematic diagram that the explanation bilateral is crossed an embodiment of transistors precharge transmitter unit 180.This precharge transmitter unit 180 can be used from based on multiple data rates transmitter unit circuit with the precharge transmitter unit 160 1 of Figure 12.In an embodiment of the multidata transfer rate transmitter unit circuit of the precharge transmitter unit 160 that only uses Figure 12, some data wires pair and the latch data line node charging that the data latch transistor 162 that is received in the high voltage pulse in the data clock signal couples comprise the latch data node in all emission groups that receive this data clock signal.In these based on multiple data rates transmitter unit circuit, bilateral is crossed transistors precharge transmitter unit 180 and be can be used for substituting the precharge transmitter unit 160 that receives data clock signal.Bilateral is crossed transistors precharge transmitter unit 180 and has been reduced data line capacitance, makes, data wire only charges to the latch data line node in that emission group of the high voltage pulse in the precharging signal that receives the emission group.

Precharge transmitter unit 180 is similar with the precharge transmitter unit 120 of Fig. 6, comprises the memory cell of driving switch 172, emission resistor 52 and precharge transmitter unit 120.Parts with parts unanimity precharge transmitter unit 120 precharge transmitter unit 180 have the numeral identical with the parts of precharge transmitter unit 120, electric coupling is couple to holding wire together as illustrating in the explanation of Fig. 6, difference is, the grid of data transistor 136 and latch data line 182 electric couplings that receive latch data signal～LDATAIN, rather than couple with the data wire 142 that receives data-signal～DATA.In addition, the parts of the precharge transmitter unit 180 consistent with the parts in the precharge transmitter unit 120 work as illustrating in the explanation of Fig. 6 and operate.

Precharge transmitter unit 180 comprises that clock data latch transistor 184 and precharge are by transistor 186.Clock data latch transistor 184 be included in precharge by transistor 186 leakage-source path and latch data line 182 between the leakage-source path of electric coupling.Leakage-the source path of precharge by transistor 186 be electric coupling between the leakage-source path of clock data latch transistor 184 and data wire 188.The grid of clock data latch transistor 184 and data clock line 190 electric couplings that receive data clock signal DCLK, precharge is by the grid and pre-charge line 132 electric couplings that receive precharging signal PRECHARGE of transistor 186.Data clock signal DCLK 190 comprises high voltage pulse during the high voltage pulse of precharging signal PRECHARGE.Data wire 188 receives data-signal～DATAIN, and clock data latch transistor 184 is latched into precharge transmitter unit 180 with data, so that latched data signal～LDATAIN to be provided.When data-signal～DATAIN that tilde (～) indicates and latched data signal～LDATAIN are arranged in the front of signal name in low level is active.

Data wire 188 receives data-signal～DATAIN, and precharge reaches clock latch transistor 184 with data from data wire 188 by the high voltage pulse in the precharging signal by transistor 186.Clock latch transistor 184 reaches latch data line 182 and latch data memory node electric capacity 192 by the high voltage pulse in data clock signal with data.High voltage pulse in data clock signal occurs in during the high voltage pulse of precharging signal.

When data clock signal when high voltage forwards the low-voltage amplitude to, data are latched into latch data line 182 and latch data memory node electric capacity 192.This latch data memory node electric capacity 192 is shown in broken lines, because it is the part of data transistor 136.Replacedly, can use the capacitor that separates with data transistor 136 to store latch data.

Latch data memory node electric capacity 192 is enough big, thus when data clock signal when high level is converted to low level, it remains essentially in high level.Also have, latch data memory node electric capacity 192 is enough big, so that when energy pulse being provided by the FIRE that transmits, selecting to provide high potential pulse among the signal SELECT and high potential pulse is provided in precharging signal PRECHARGE, this latch data memory node electric capacity 192 keeps low level basically.In addition, data transistor 136 is enough little, make when the grid of driving switch 172 discharges, on latch data memory node electric capacity 192, keep low level, data transistor 136 is enough big again, makes energy pulse in the FIRE that transmits before beginning the grid of driving switch 172 be discharged fully.

Using precharge transmitter unit 160 and bilateral to cross among the embodiment of double data rate transmitter unit circuit of transistors precharge transmitter unit 180, each emission group comprises that only about half of precharge transmitter unit 160 and only about half of bilateral cross transistors precharge transmitter unit 180.The data select line 170 of all the precharge transmitter units 160 in the emission group and the pre-charge line electric coupling of this emission group.Also have, the precharge of all the precharge transmitter units 180 in the emission group is by the pre-charge line electric coupling of transistor 186 with this emission group.All data clock line 190 electric couplings of the precharge transmitter unit 180 in first clock and some the emission groups, all data clock line 190 electric couplings of the precharge transmitter unit 180 in second clock and other emission group.First clock comprises high voltage pulse at the first half of each high voltage pulse of the precharging signal of the emission group that couples with first clock.Second clock comprises high voltage pulse at the first half of each high voltage pulse of the precharging signal of the emission group that couples with second clock.Like this, in some emission groups, first clock and precharging signal latch two data bit during each high voltage pulse of precharging signal, in other emission group, second clock and precharging signal latch two data bit during each high voltage pulse of precharging signal.Using precharge transmitter unit 160 and bilateral to cross in this many haplotype datas speed transmitter unit circuit of transistors precharge transmitter unit 160, data wire is to the latch data line node charging of the emission group of reception high voltage amplitude precharging signal.

In the operation of precharge transmitter unit 180, data wire 188 receives data-signal～DATAIN and by high voltage pulse being provided, being sent to clock data latch transistor 184 by precharge by transistor 186 in precharging signal.Clock data latch transistor 184 is passed to latch data line 182 and latch data memory node electric capacity 192 by the high voltage pulse in data clock signal with data.High voltage pulse in data clock signal takes place during the high voltage pulse of precharging signal.

Memory node electric capacity 126 utilizes the high voltage pulse in the precharging signal to pass through precharge transistor 128 precharge.Clock data latch transistor 184 disconnects, so that the high voltage pulse in data clock signal provides latched data signal～LDATAIN when high voltage amplitude transfers the low-voltage amplitude to.The data that are latched into precharge transmitter unit 180 are provided when data clock signal is in high voltage amplitude, and are maintained to data clock signal and go to after the low-voltage amplitude, this occurs in during the high voltage pulse of precharging signal.On the contrary, when selecting signal, provide data in the precharge transmitter unit 120 that will be latched into Fig. 6 for high voltage amplitude.

In an embodiment of precharge transmitter unit 180, after the high voltage pulse in data clock signal, on

address wire

144 and 146, provide address signal～ADDRESS1 and～ADDRESS2 sets the state of first address transistor 138 and second address transistor 140.Selecting to provide high voltage pulse to open selection transistor 130 on the line 134, if data transistor 136, first address transistor 138 and/or second address transistor 140 are opened just discharge of memory node electric capacity 126.Replacedly, if data transistor 136, first address transistor 138 and second address transistor 140 all disconnect, memory node electric capacity 126 just keeps charging.

If two address signal～ADDRESS1 and～ADDRESS2 is low, precharge transmitter unit 180 is exactly the transmitter unit that is addressed, if latch data signal～LDATAIN is high, just discharge of memory node electric capacity 126, if perhaps latch data signal～LDATAIN is low, memory node electric capacity 126 just keeps charging.If have at least an address signal～ADDRESS1 and～ADDRESS2 is for high, precharge transmitter unit 180 is not the transmitter unit that is addressed just, no matter the voltage amplitude of latch data signal～LDATAIN how, memory node electric capacity 126 all discharges.First and

second address transistors

136 and 138 constitute address decoder, if precharge transmitter unit 180 is addressed, data transistor 136 is with regard to the voltage amplitude on the control store node capacitor 126.

Figure 15 is that explanation uses precharge transmitter unit 160 and bilateral to cross the sequential chart of operation of an embodiment of the double data rate transmitter unit circuit of transistors precharge transmitter unit 180.This double data rate transmitter unit circuit comprises a plurality of emission groups, and each emission group comprises that only about half of precharge transmitter unit 160 and only about half of bilateral cross transistors precharge transmitter unit 180.

Double data rate transmitter unit circuit comprises that the first emission group FG1, the second emission group FG2, the 3rd emission group FG3 and other emission group are until emission group FGn.Double data rate transmitter unit circuit signal receives precharge/selection signal S0, S1, S2 and other precharge/selection signal until Sn.The first emission group FG1 is received in 700 signal S0 as precharging signal, is received in 702 signal S1 as selecting signal.The second emission group FG2 is received in 702 signal S1 as precharging signal, is received in 704 signal S2 as selecting signal.The 3rd emission group FG3 is received in 704 signal S2 as precharging signal, received signal S3 (not shown) is as selecting signal or the like, up to received signal Sn-1 (not shown) as precharging signal and signal Sn (not shown) as the emission group FGn that selects signal.

Double data rate transmitter unit circuit is received in 706 the first data clock signal DCLK1 by first data clock, is received in 708 the second data clock signal DCLK2 by second data clock.First data clock and total data clock line 190 electric couplings such as the precharge transmitter unit 180 in the emission group of the odd-numbered of the first emission group FG1 and the 3rd emission group FG3.Second data clock and total data clock line 190 electric couplings such as the precharge transmitter unit 180 in the emission group of the even-numbered of the second emission group FG2 and the 4th emission group FG4.The data select line 170 of all the precharge transmitter units 160 in emission group and the pre-charge line electric coupling of this emission group.In addition, the precharge of all the precharge transmitter units 180 in emission group is by the pre-charge line electric coupling of transistor 186 with this emission group.

The first half of each high voltage pulse of the first data clock signal DCLK1 706 in the precharging signal of the emission group that couples with first data clock comprises high voltage pulse, and the first half of each high voltage pulse of the second data clock signal DCLK2 708 in the precharging signal of the emission group that couples with second data clock comprises high voltage pulse.Data wire is provided at data-signal～D1 of 710 to～Dn, wherein be provided at data-signal～D1 of 710, and first data bit in～Dn during the first half of the high voltage pulse of each data wire in precharging signal, second data bit is provided during the latter half of the high voltage pulse in precharging signal.Each data wire and emission group FG1 cross transistors precharge transmitter unit 180 electric couplings to precharge transmitter unit 160 and bilateral in each of FGn.

In the emission group of odd-numbered, latch two data bit during the first data clock signal DCLK1 706 and precharging signal each high voltage pulse at precharging signal.In the emission group of even-numbered, latch two data bit during the second data clock signal DCLK2 708 and precharging signal each high voltage pulse at precharging signal.Use precharge transmitter unit 160 and bilateral to cross among other embodiment of many haplotype datas speed transmitter unit circuit of transistors precharge transmitter unit 180, can use the data clock signal of any suitable number to come during the high voltage pulse of precharging signal, to latch for example a plurality of data bit of three or more data bit.

Emission group FG1 be latched in to FGn data-signal～D1 of 710 to～Dn to be provided for opening driving switch 172 for the latch clock data-signal of selected emission resistor 52 energy supplies with latch the pre-charging data signal.Each emission group of received is included as the transmitting of energy pulse of selected emission resistor 52 energy supplies.In one embodiment, energy pulse is that the centre or the afterbody of the high voltage pulse in the selection signal of emission group begins basically, and coming is selected emission resistor 52 energy supplies in the emission group.

The first emission group FG1 be latched in data-signal～D1 of 710 to～Dn to be provided at 712 the first emission group clock data-signal FG1C that latchs and at 714 the first emission group pre-charging data signal FG1P that latchs.The second emission group FG2 be latched in data-signal～D1 of 710 to～Dn to be provided at 716 the second emission group clock data-signal FG2C that latchs and at 718 the second emission group pre-charging data signal FG2P that latchs.The 3rd emission group FG3 be latched in data-signal～D1 of 710 to～Dn to be provided at 720 the 3rd emission group clock data-signal FG3C that latchs and at 722 the 3rd emission group pre-charging data signal FG3P that latchs.Other emission group also is latched in data-signal～D1 of 710 to～Dn, with provide with emission group FG1 to the similar latch clock data-signal of FG3 with latch the pre-charging data signal.

Signal S0 700 provides the high voltage pulse 724 in the precharging signal of the first emission group FG1.Be positioned at the first half of 724 high voltage pulse, the first data clock signal DCLK1 706 provides the high voltage pulse 726.Data-signal～D1 710 is included in 728 the first emission group clock data-signal 1C to～Dn, they passed the clock data latch transistor 184 of precharge by coupling with first data clock among the transistor 186 and the first emission group FG1 that the pre-charge line with the first emission group FG1 couples, be provided among 712 the first emission group clock data-signal FG1C that latchs at 730 the first emission group clock data-signal 1C.The first emission group clock data-signal 1C 730 is latched when high voltage pulse 726 forwards low logic level to.The first emission group clock data-signal 1C 728 must remain to high voltage pulse 726 be converted to be lower than transistorized threshold value after.

During being positioned at the latter half of 724 high voltage pulse, the data-signal～D1 710 is included in 732 the first emission group pre-charging data signal 1P to～Dn.The first emission group pre-charging data signal 1P 732 is by the data latch transistor 162 that the pre-charge line with the first emission group FG1 couples, be provided among 714 the first emission group pre-charging data signal FG1P that latchs at 734 the first emission group pre-charging data signal 1P.When high voltage pulse 724 was converted to low logic level, the first emission group pre-charging data signal 1P 734 was latched in the precharge transmitter unit 160 among the first emission group FG1.The first emission group pre-charging data signal 1P 732 must remain to high voltage pulse 724 be converted to be lower than transistorized threshold value after.

Provide address signal select row group, signal S1 702 provide in the precharging signal of the selection signal of the first emission group FG1 and the second emission group FG2 at 736 high voltage pulse.Open selection transistor 130 in the precharge transmitter unit 160 of the first emission group FG1 and the selection transistor 130 in precharge transmitter unit 180 at 736 high voltage pulse.In the row group that is addressed, if the first emission group data FG1C that latchs 712 and at 714 FG1P for high, memory node electric capacity 126 is discharge just, if be low at 712 the first emission group data FG1C that latchs with at 714 FG1P perhaps, memory node electric capacity 126 just keeps charging.In the row group of addressing not, be that height is low no matter at 712 the first emission group data FG1C that latchs with at the voltage amplitude of 714 FG1P, memory node electric capacity 126 all discharges.In transmitting, the first emission group provides energy pulse, so that be emission resistor 52 energy supplies that the conducting driving switch 172 in organizing with row of addressing couples.

Be positioned at the first half of 736 high voltage pulse, the second data clock signal DCLK2 708 is provided at 738 high voltage pulse.Data-signal～D1 710 is included in 740 the second emission group clock data-signal 2C to～Dn, they are by the clock data latch transistor 184 of precharge by coupling with second data clock among the transistor 186 and the second emission group FG2 that the pre-charge line with the second emission group FG2 couples, be provided among 716 the second emission group clock data-signal FG2C that latchs at 742 the second emission group clock data-signal 2C.When high voltage pulse 738 was converted to low logic level, the second emission group clock data-signal 2C 742 was latched.The second emission group clock data-signal 2C 740 must remain to high voltage pulse 738 be converted to be lower than transistorized threshold value after.

Be positioned at the latter half of 736 high voltage pulse, the data-signal～D1 710 is included in 744 the second emission group pre-charging data signal 2P to～Dn.The second emission group pre-charging data signal 2P 744 is by the data latch transistor 162 that the pre-charge line with the second emission group FG2 couples, be provided among 718 the second emission group pre-charging data signal FG2P that latchs at 746 the second emission group data-signal 2P.When high voltage pulse 736 was converted to low logic level, the second emission group pre-charging data signal 2P 746 was latched in the precharge transmitter unit 160 among the second emission group FG2.The second emission group pre-charging data signal 2P 744 must remain to high voltage pulse 736 be converted to be lower than transistorized threshold value after.

Provide address signal to select row group, the signal S2 704 provides the high voltage pulse 748 in the precharging signal of the selection signal of the second emission group FG2 and the 3rd emission group FG3.Selection transistor 130 and the selection transistor 130 in the precharge transmitter unit 180 of the second emission group FG2 in the precharge transmitter unit 160 of the second emission group FG2 have been opened at 748 high voltage pulse.In the row group that is addressed, if the second emission group data FG2C that latchs 716 and at 718 FG2P for high, memory node electric capacity 126 is discharge just, if be low at 716 the second emission group data FG2C that latchs with at 718 FG2P perhaps, memory node electric capacity 126 just keeps charging.In the row group of addressing not, be that height is low no matter at 716 the second emission group data FG2C that latchs with at the voltage amplitude of 718 FG2P, memory node electric capacity 126 all discharges.In transmitting, the first emission group provides energy pulse, so that be emission resistor 52 energy supplies that the conducting driving switch 172 in organizing with row of addressing couples.

Be positioned at the first half of 748 high voltage pulse, being positioned at 706 the first data clock signal DCLK1 provides high voltage pulse 750.The clock data latch transistor 184 that this has opened in the emission group of odd-numbered comprises the clock data latch transistor 184 among the first emission group FG1.When the clock data latch transistor 184 of the first emission group FG1 was opened, the data in 712 the first emission group clock data-signal FG1C that latchs became uncertain 752.

Data-signal～D1 710 is included in 754 the 3rd emission group clock data-signal 3C to～Dn, the 3rd emission group clock data-signal 3C is by the clock data latch transistor 184 of precharge by coupling with first data clock among transistor 186 and the 3rd emission group FG3 that the pre-charge line with the 3rd emission group FG3 couples, be provided among 720 the 3rd emission group clock data-signal FG3C that latchs at 756 the 3rd emission group clock data-signal 3C.When high voltage pulse 750 was converted to low logic level, the 3rd emission group clock data-signal 3C 756 was latched.The 3rd emission group clock data-signal 3C 754 must remain to high voltage pulse 750 be converted to be lower than transistorized threshold value after.

Be positioned at the latter half of 748 high voltage pulse, the data-signal～D1 710 is included in 758 the 3rd emission group pre-charging data signal 3P to～Dn.The 3rd emission group pre-charging data signal 3P 758 is by the data latch transistor 162 that the pre-charge line with the 3rd emission group FG3 couples, be provided among 722 the 3rd emission group pre-charging data signal FG3P that latchs at 760 the 3rd emission group pre-charging data signal 3P.When high voltage pulse 748 was converted to low logic level, the 3rd emission group pre-charging data signal 3P 760 was latched in the precharge transmitter unit 160 among the 3rd emission group FG3.The 3rd emission group pre-charging data signal 3P 758 must remain to high voltage pulse 748 be converted to be lower than transistorized threshold value after.

During the first half of the high voltage pulse in signal S3 (not shown), the second data clock signal DCLK2 708 provides high voltage pulse (indicating 762).The clock data latch transistor 184 that this has opened in the emission group of even-numbered comprises the clock data latch transistor 184 among the second emission group FG2.When clock data latch transistor 184 conductings in the second emission group FG2, the data in 716 the second emission group clock data-signal FG2C that latchs become uncertain 764.This process is proceeded, until and comprise received signal Sn-1 as precharging signal and received signal Sn as the emission group FGn that selects signal.Then, this process repeats since the first emission group FG1, till atomizing of liquids is finished.

Though this paper diagram and specific embodiment has been described it will be apparent to one skilled in the art that and not depart from scope of the present invention with illustrated specific embodiment shown in can substituting with various replacements and/or the realization that is equal to.The application is intended to contain any modification or the change of specific embodiment discussed here.Therefore, be intended to the present invention is only limited by claim and equivalent thereof.

Claims

1. a liquid injection apparatus (22/40) comprising:

First line of departure (110a-110n/214a-214f) is suitable for conducting first energy signal that comprises first energy pulse;

Second line of departure (110a-110n/214a-214f) is suitable for conducting second energy signal that comprises second energy pulse;

Data wire (108a-108m/208a-208h) is suitable for conducting the data-signal of presentation video;

Latch cicuit (152,404/162/184,186) is configured to by clock signal latch data signal to provide clock data-signal and the charging control signal latch data signal by pulse and clock data-signal so that the latched data signal to be provided;

First droplet generator (60) is configured to respond first energy signal and comes based on latched data signal atomizing of liquids; With

Second droplet generator (60) is configured to respond second energy signal and comes based on latched data signal atomizing of liquids.

2. liquid injection apparatus as claimed in claim 1, wherein in first energy pulse comprises time started and concluding time, one in second energy pulse started between described time started and described concluding time.

3. liquid injection apparatus as claimed in claim 1, wherein first line of departure and second line of departure electric insulation.

4. a liquid injection apparatus (22/40) comprising:

The line of departure (124) is suitable for conducting the energy signal that comprises energy pulse; And

A plurality of transmitter units, each transmitter unit (150/160/180) in wherein said a plurality of transmitter units comprising:

Emission resistor (52);

Driving switch (172) is configured to make the emission resistor can respond energy signal;

First data switch (152/162/184) is configured to receive the data-signal of presentation video and latchs this data-signal so that the latched data signal to be provided; With

Second data switch (136) is configured to receive the latched data signal, and makes the emission resistor can respond energy signal and the heating liquid that will spray based on latched data signal controlling driving switch.

5. liquid injection apparatus as claimed in claim 4 comprises:

Data wire (422) is suitable for the conductive data line data-signal; With

The 3rd data switch (418a-418n), be configured to receive data wire data-signal and latch data line data-signal so that the clock data-signal to be provided, each transmitter unit in wherein said a plurality of transmitter unit one of receives in data wire data-signal and the clock data-signal data-signal that receives as first data switch, first in described a plurality of transmitter unit receives the data wire data-signal as the data-signal at the first data switch place, and the second portion receive clock data-signal in described a plurality of transmitter units is as the data-signal at the first data switch place.

6. liquid injection apparatus as claimed in claim 4, wherein said a plurality of transmitter units comprise:

First group of transmitter unit, wherein first data switch is configured to by clock signal latch data signal; With

Second group of transmitter unit, wherein first data switch is configured to by precharging signal latch data signal.

7. liquid injection apparatus as claimed in claim 6, wherein each of the transmitter unit in first group of transmitter unit comprises:

The 3rd data switch (186) is configured to based on precharging signal data-signal be passed to first data switch.

8. the method for an operating liquid injection apparatus (22/40) comprising:

First energy signal that comprises first energy pulse by first line of departure (110a-110n/214a-214f) conduction;

Second energy signal that comprises second energy pulse by second line of departure (110a-110n/214a-214f) conduction;

Data-signal by data wire (108a-108m/208a-208h) conduction presentation video;

By the first clock signal latch data signal, so that the first clock data-signal to be provided; And the charging control signal latch data signal and the first clock data-signal by pulse, so that the latched data signal to be provided;

Responding first energy signal comes based on latched data signal atomizing of liquids; With

Responding second energy signal comes based on latched data signal atomizing of liquids.

9. method as claimed in claim 8 comprises:

Based on the charging control signal of pulse, by transmitting switch (186) communicated data signal.