CN101582801B - E1 interface data collection device and method for realizing time slot scanning - Google Patents
E1 interface data collection device and method for realizing time slot scanning Download PDFInfo
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- CN101582801B CN101582801B CN2009101076736A CN200910107673A CN101582801B CN 101582801 B CN101582801 B CN 101582801B CN 2009101076736 A CN2009101076736 A CN 2009101076736A CN 200910107673 A CN200910107673 A CN 200910107673A CN 101582801 B CN101582801 B CN 101582801B
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Abstract
The invention provides an E1 interface data collection device with time slot scanning function. The device comprises a clock processing unit, an E1 input interface unit and a central processing unit, wherein the clock processing unit provides clock processing reference for the E1 input interface unit and the central processing unit; the E1 input interface unit realizes the code type transformationof an input E1 signal and then sends to the central processing unit; and the central processing unit scans and collects all the input signaling data. Meanwhile, the invention provides an E1 interface data collection method with the time slot scanning function, by the use of the device and the method, the signaling and voice time slot changes in an E1 interface and the signaling rate type changes can be automatically adapted to, thereby extracting the accurate signaling data and further avoiding the problem that the signaling time slot data can not be accurately or comprehensively collected.
Description
Technical field
The present invention relates to data collecting field, be specifically related to a kind of E1 interface data collection device and method that realizes time slot scanning function.
Background technology
The E1 interface is a pair of coaxial wire that draws from switch, and message transmission rate is 2.048Mbps (2M) on cable, can hold voice or the signaling data of 32 time slot * 64Kbps simultaneously.The major function of E1 interface data collecting device is to finish the signal collecting and the SIP signaling filtering partly in the signalling time slot of input E1 link, uses very extensive in the signalling system No.7 centralized monitoring system.As accompanying drawing 1, the E1 signaling link of office side is through transferring at the DDF frame behind the high-ohmic cross-connection, and the signaling link after the switching is directly connected to E1 interface data collecting device.
Traditional E1 interface data collecting device is under the situation of signalling time slot and signaling rate in each bar E1 link is provided the signalling time slot of E1 interface to be gathered.Because the E1 link that inserts is many, and the signalling time slot in the E1 link is different with signaling rate, sometimes, signalling time slot is the flexible configuration that requires according to operator, signaling rate has a variety of simultaneously, comprise 64Kbps, high speed 2Mbps and N*64Kbps and ABIS interface, wherein there are 64Kbps, 32Kbps, 16Kbps and 8Kbps etc. in the signalling time slot.Therefore, the signalling time slot of many E1 links and signaling rate are for traditional E1 interface data collecting device and be not easy to understand, traditional like this E1 interface data collecting device just can not be correctly or comprehensively collected the data in signalling time slot.
These problems are greatly perplexing signaling centralized monitoring system engineering staff and attendant, therefore the E1 interface data collecting device that will look for novelty has all the time slot signaling scan functions to all input E1 links, realize of the configuration of E1 interface data collecting device, thereby the signaling of various different time-gaps and different rates type all correctly and is all sidedly collected the E1 link.
Simultaneously, the result of time slot scanning can feed back to network management system or the simple and easy serial port terminal that prints to, and engineering staff and attendant just can easily obtain all time slot signaling essential informations of all links.
And because the data that a large amount of signaling datas is not the user to be needed, the overload of business diagnosis, so the hash filtering function also is essential, only stays the data that the user needs, and can improve the performance of collecting device like this, reduces the load of business diagnosis.
Summary of the invention
In view of this, main purpose of the present invention is to provide a kind of E1 interface data collection device and method with time slot scanning function, make to adapt in the E1 interface signaling automatically and the voice time slot changes and the variation of signaling rate type and extract correct signaling data, can not be correctly or comprehensively collect the problem of the data in signalling time slot thereby avoid.
A kind of E1 interface data collection device of realizing time slot scanning function, this device comprises: clock processing unit, E1 input interface unit, CPU, wherein:
The clock processing unit is handled benchmark for E1 input interface unit and CPU provide clock;
The E1 input interface unit is realized the E1 signal code conversion of input, sends to CPU then;
CPU scans and gathers all signaling datas of input; Wherein, CPU further comprises time division multiplexing tdm interface module, time slot scanning function module and Ethernet processing module; Described TDM interface module receives the data of described E1 input interface unit, sends to described time slot scanning function module then the signaling data of all time slots of input is scanned; Described time slot scanning function module comprises serial line interface processing module, Multi Channel Controller module and data processing module, serial line interface processing module and Multi Channel Controller module are carried out the collection of data together, send to data processing module then data are analyzed; Described serial line interface processing module comprises the time slot allocation device, serial line interface route RAM and RAM control, serial line interface route RAM respectively with time slot allocation device and RAM control connection, RAM control realizes control serial line interface route RAM and time slot allocation device; Described serial line interface processing module of rate configuration and Multi Channel Controller according to the e1 port of setting, the passage mode of operation that comprises the serial line interface route RAM in the configuration serial line interface processing module is normal mode, the passage that uses common passage, this route RAM correspondence, position framing mode, and, finish scanning and collection to all signaling datas of input e1 port by RAM control, time slot allocation device and serial line interface HW signal realization position framing coupling and time slot coupling to input.
Data processing module is responsible for data are analyzed, comprise: the speed type of analyzing the data that collect, the type of service characteristic of the position of the time slot of data and the signaling of data, thereby the result of the time slot that obtains scanning are determined time slot position and rate corresponding type.
The present invention also provides a kind of E1 interface data acquisition method of realizing time slot scanning function, and this method comprises:
The described CPU of rate configuration according to the e1 port of setting;
Gather the actual input of the e1 port signaling data consistent with the speed of above-mentioned setting;
The speed type of the E1 of the input of continue to change setting constantly repeats above-mentioned layoutprocedure, realizes the time slot scanning to a plurality of E1 signals of input, up to all e1 ports correct collect signaling data.
Apparatus and method provided by the present invention also have following advantage and characteristics:
These apparatus and method can adapt to automatically that signaling and voice time slot in the E1 interface change and the variation of signaling rate type and extract correct signaling data, thereby comprehensively collect the data in signalling time slot.Simultaneously, the SIP signaling filtering function realizes the filtration to different signalings, only the signaling data that is used for business diagnosis that needs is delivered to data processor.Can save the cpu resource and the internal memory of E1 collection and data processor so greatly.
This E1 interface data collecting device is widely used in the monitoring signaling field, and time slot scanning and SIP signaling filtering function are safeguarded and provided convenient greatly and help for carrying out fault location and beginning with the network maintenance staff after sale.
Description of drawings
Fig. 1 is for using signaling acquisition system of the present invention;
Fig. 2 is a detailed diagram of the present invention
Fig. 3 is the block diagram of CPU
Fig. 4 is a time slot scanning function module diagram of the present invention
Fig. 5 forms for the time slot among the E1 of the present invention and the position in one of them signalling time slot is formed and the framing mode
Fig. 6 is a time slot scanning block diagram of the present invention
Embodiment
The present invention is described in further detail below in conjunction with accompanying drawing.
Basic thought of the present invention is: correct signaling data is extracted in the variation by variation of signaling and voice time slot and signaling rate type in the automatic adaptation E1 interface, realize the configuration of CPU 202, realization is to the signaling scan function of all time slots of all input e1 ports, can not be correctly or comprehensively collect the problem of the data in signalling time slot thereby avoid.
Wherein the E1 interface comprises common 64Kbps, high speed 2Mbps, N*64Kbps and ABIS interface (being the communication interface between BTS and the BSC) etc.As accompanying drawing 1, the E1 interface is delivered to E1 interface collecting device behind the DDF frame.
The embodiment of the invention have time slot scanning function the E1 interface data collection device structure as shown in Figure 2, comprising: clock processing unit 201, E1 input interface unit 204, CPU 202, webmaster 203 and signaling interface unit 205.
Wherein, clock processing unit 201 is a benchmark with the 8Kbps synchronizing signal of extracting in the E1 input interface unit 204, phase-locked loop carries out phase-locked, the signal of phase-locked back output 2Mbps is distributed to E1 input interface unit 204 and CPU 202 through clock driver, handles benchmark as clock separately.When E1 input interface unit 204 was not imported the E1 link, clock processing unit 201 provided the free oscillation clock.
E1 input interface unit 204 is realized the E1 signal code conversion of input, and the electrical signal conversion of the 2Mbps of input is delivered to CPU 202 for the HW bus.The present invention has a plurality of E1 input interfaces, delivers to the time division multiplexing tdm of CPU 202 (Time Division Multiplex) interface through being converted to many HW buses behind the E1 input interface unit 204.
Please refer to Fig. 3-Fig. 4, CPU 202 is made up of TDM interface module 301, time slot scanning function module 306 and Ethernet processing module 305.
Time slot scanning function module 306 is seen part in the frame of broken lines inner in the accompanying drawing 3, comprises serial line interface processing module 302, Multi Channel Controller module 303 and data processing module 304.Comprise time slot allocation device 401, serial line interface route RAM402 and RAM control 403 in the serial line interface processing module 302, control serial line interface route RAM402 is responsible in RAM control 403, thereby realize control, thereby the time that is implemented in expectation is routed to a suitable passage with the data flow of the TDM of certain time slot to time slot allocation device 401.Multi Channel Controller module 303 contains HDLC (High Level Data Link Control) framer, and framer is realized the extraction to the signaling data of each time slot the HW signal of bringing from the TDM interface.
The HW bus that 301 receptions of TDM interface module are come out from E1 input interface unit 204, send into serial line interface processing module 302 then, serial line interface processing module 302 and multichannel control module 303 are finished the collection of data together, data processing module 304 is responsible for data are analyzed, and comprising: the speed type of analyzing the data that collect; The time slot of the data that analysis collects; The data that analysis collects are which positions of time slot, for example which position in the 0-7 position; Analyze the type of service characteristic of the signaling of the data of gathering, and the signaling of filtering unwanted business, the signaling of the business that reservation needs, thus the result of the time slot that obtains scanning determines time slot position and rate corresponding type.Also the useful signaling data can be reported signaling interface unit 205 by Ethernet processing module 305.
Time slot scanning function module 306 possesses the signaling scan function to all time slots of all input e1 ports, just to being configured of CPU 202, comprise 303 of the serial line interface processing module 302 that disposes CPU 202 and multichannel control moulds etc. according to the information that scans.Like this no matter how signalling time slot and signaling rate in the E1 interface change, all the time can be correct collect signaling in the E1 interface.
The step of time slot scanning such as accompanying drawing 6.Describe this process below in detail.Many the HW buses of bringing through E1 input interface unit 204 are delivered to a plurality of TDM interfaces of CPU 202, send into serial line interface processing module 302 then.
The E1 that sets the e1 port input is certain speed (for example ABIS of 8Kbps), the data processing module 304 of CPU 202 at first disposes serial line interface route RAM402 in the serial line interface processing module 302 according to this speed of setting, the passage mode of operation that comprises each route RAM of configured port correspondence is a normal mode, use common passage, the passage of this route RAM correspondence, position framing mode (which position in the time slot in the 0-7 position), and by RAM control 403, time slot allocation device 401 and serial line interface are realized position framing coupling and time slot coupling to the HW signal of input, as accompanying drawing 5.After the coupling, Multi Channel Controller module 303 is set correctly then.Because a plurality of e1 port signaling rates are different,, so just can correct framing collect if so wherein the speed with setting of the actual input of e1 port is consistent and signaling data is arranged.Continue to change the speed type of the E1 that sets input, constantly repeat above-mentioned layoutprocedure, can correct framing collect signaling data up to all e1 ports.Search the route RAM of the data correspondence that collects then conversely, thereby can obtain passage, the position framing mode of these data.Because during the passage of configuration route RAM correspondence, therefore corresponding some concrete gap informations can obtain this data time slot corresponding information.The above-mentioned configuration of doing at the speed of all settings can all be preserved, and no longer needs to reconfigure CPU 202 so behind the end of scan.Also can be according to the deletion of the actual conditions of RAM resource, if deletion need to reconfigure CPU 202 so again behind the end of scan, like this could be continuous correct collect signaling in the E1 interface.
Describe this corresponding relation below in detail: each 2M signal has 32 time slots, and wherein time slot 0 is a synchronization slot, and other 31 time slots may be voice or signaling.For the mode of 1-7 position framing,, be exactly the ABIS data of corresponding speed type as long as satisfy the ABIS agreement.This data time slot corresponding information that setting obtains is time slot X, and is 1 bit data framing, and then this time slot is the ABIS data of 8Kbps, if 2 bit data framing, then this time slot is the ABIS data of 16Kbps, and the like, if 7 bit data framing, then this time slot is the ABIS data of 54Kbps.
If 8 bit data framing, then this time slot is that the ABIS data of 64Kbps may be common 64Kbps, high speed 2Mbps, N*64Kbps data.Mode for 8 framing, a lot of agreements all is this form, in order to distinguish, must analyze the type of service characteristic of the data that collect, if the traffic performance of common 64Kbps is exactly the data of common 64Kbps, if the traffic performance of high speed 2Mbps is exactly the data of high speed 2Mbps, and the like.
According to the difference of each time slot framing figure place and the different time slot allocation devices 401 that dispose of each signaling and voice time slot, send into Multi Channel Controller module 303 through the signal of time slot allocation device 401 like this, in 303, realize HDLC framing, the extraction of each time slot data in the HW signal of successfully realizing E1 input interface unit 204 is brought.The data based Signaling System Number 7 that extracts and the protocal analysis of 3G related protocol and ABIS interface are judged whether to be signaling data.So just successfully realized extraction, realized time slot scanning function a plurality of E1 signals of input to the signaling data of each time slot.
The result of time slot scanning can report webmaster 203 or check by serial ports, also can realize configuration, thereby make the E1 collecting device can adapt to automatically that signaling and voice time slot in the E1 signal change and the variation of signaling rate type and extract correct signaling data CPU 202.
The SIP signaling filtering function can be as required, and selection need filter out those unconcerned signaling datas flexibly, offers the signaling data of necessity of care by signaling interface unit 205.By from signaling, extracting control information OPC, DPC, FSN etc. in frame head information such as the Signaling System Number 7, according to these control informations, can extract the signaling data that needs, filter out unwanted data.
Other as ABIS interface or common 64Kbps, high speed 2Mbps, N*64Kbps data, can realize the function of SIP signaling filtering equally in this way.The SIP signaling filtering function comprises filtration of the filtration of common 64Kbps, high speed 2Mbps, N*64Kbps interface data and ABIS interface data etc.
Flexible function of the present invention, performance brilliance, easy to maintenance, have vast market prospect in the monitoring signaling field; Design philosophy of the present invention and implementation method also can be applicable to the other types data collecting field except that being applied to signaling data collection field.
The above only is preferred embodiment of the present invention;, not should be pointed out that for the person of ordinary skill of the art in order to restriction the present invention; any modification of being done within every the spirit and principles in the present invention, be equal to and replace or improvement etc., all should be included within protection scope of the present invention.
Claims (6)
1. an E1 interface data collection device of realizing time slot scanning is characterized in that, comprising: clock processing unit, E1 input interface unit and CPU, wherein:
Described clock processing unit is handled benchmark for E1 input interface unit and CPU provide clock;
Described E1 input interface unit is realized the E1 signal code conversion of input, sends to CPU then;
Described CPU scans and gathers all signaling datas of input;
Wherein, CPU further comprises time division multiplexing tdm interface module, time slot scanning function module and Ethernet processing module; Described TDM interface module receives the data of described E1 input interface unit, sends to described time slot scanning function module then the signaling data of all time slots of input is scanned; Described time slot scanning function module comprises serial line interface processing module, Multi Channel Controller module and data processing module, serial line interface processing module and Multi Channel Controller module are carried out the collection of data together, send to data processing module then data are analyzed; Described serial line interface processing module comprises the time slot allocation device, serial line interface route RAM and RAM control, serial line interface route RAM respectively with time slot allocation device and RAM control connection, RAM control realizes control serial line interface route RAM and time slot allocation device; Described serial line interface processing module of rate configuration and Multi Channel Controller according to the e1 port of setting, the passage mode of operation that comprises the serial line interface route RAM in the configuration serial line interface processing module is normal mode, the passage that uses common passage, this route RAM correspondence, position framing mode, and, finish scanning and collection to all signaling datas of input e1 port by RAM control, time slot allocation device and serial line interface HW signal realization position framing coupling and time slot coupling to input.
2. device as claimed in claim 1 is characterized in that: described E1 input interface unit is the HW bus with the electrical signal conversion of the 2Mbps of input.
3. device as claimed in claim 1 is characterized in that: described Ethernet processing module, receive the data after data processing module is analyzed, and realization is mutual with the webmaster control information.
4. device as claimed in claim 1, it is characterized in that: data processing module is responsible for data are analyzed, comprise: the speed type of analyzing the data that collect, the type of service characteristic of the position of the time slot of data and the signaling of data, thereby the result of the time slot that obtains scanning determines time slot position and rate corresponding type.
5. the E1 interface data of the realization time slot scanning of a device that is applied to claim 1 method of gathering comprises the steps:
The described CPU of rate configuration according to the e1 port of setting;
Gather the actual input of the e1 port signaling data consistent with the speed of above-mentioned setting;
The speed type of the E1 of the input of continue to change setting constantly repeats above-mentioned layoutprocedure, realizes the time slot scanning to a plurality of E1 signals of input, up to all e1 ports correct collect signaling data.
6. method as claimed in claim 5 is characterized in that: if the configuration of doing according to the speed of all settings is all preserved, do not need to reconfigure CPU so behind the end of scan; Also can delete configuration, behind the end of scan, need to reconfigure again CPU so.
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| CN102202243B (en) * | 2011-06-21 | 2014-04-09 | 珠海市佳讯实业有限公司 | Method and device for detecting signalling No.7 channel based on E1 |
| CN102281346B (en) * | 2011-08-08 | 2013-12-11 | 北京六捷科技有限公司 | GSM-R network sound recording system |
| CN102594514B (en) * | 2012-03-28 | 2014-12-10 | 广东宜通世纪科技股份有限公司 | Signaling link access and identification method |
| CN103078755B (en) * | 2012-12-31 | 2014-09-17 | 中国人民解放军总参谋部第五十四研究所 | No.7 signaling acquisition and injection system |
| CN103259693B (en) * | 2013-04-07 | 2016-01-27 | 吴建进 | A kind of method and system of link automatic scan |
| CN108566574B (en) * | 2018-02-26 | 2024-04-16 | 柳州达迪通信技术股份有限公司 | Multipath signaling acquisition device and acquisition method thereof |
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Effective date of registration: 20171107 Address after: 075000 No. 42 View Street, Xuanhua District, Hebei, Zhangjiakou Patentee after: Li Dianping Address before: 518057 Nanshan District Guangdong high tech Industrial Park, South Road, science and technology, ZTE building, Ministry of Justice Patentee before: ZTE Corporation |
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Inventor after: Li Dianping Inventor before: Zhou Jianguo Inventor before: Wang Chengyan Inventor before: Yuan Yuchang |
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