CN101563763B - 用于降低阻挡层和铜布线之间的界面氧化接触的方法和系统 - Google Patents
用于降低阻挡层和铜布线之间的界面氧化接触的方法和系统 Download PDFInfo
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- CN101563763B CN101563763B CN2007800468895A CN200780046889A CN101563763B CN 101563763 B CN101563763 B CN 101563763B CN 2007800468895 A CN2007800468895 A CN 2007800468895A CN 200780046889 A CN200780046889 A CN 200780046889A CN 101563763 B CN101563763 B CN 101563763B
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- copper
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- 230000004888 barrier function Effects 0.000 title claims abstract description 287
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 256
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 256
- 239000010949 copper Substances 0.000 title claims abstract description 256
- 238000000034 method Methods 0.000 title claims abstract description 100
- 238000001465 metallisation Methods 0.000 title abstract description 7
- 238000000151 deposition Methods 0.000 claims abstract description 121
- 230000008021 deposition Effects 0.000 claims abstract description 112
- 239000000758 substrate Substances 0.000 claims abstract description 44
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 26
- 239000001301 oxygen Substances 0.000 claims abstract description 26
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 26
- 230000003647 oxidation Effects 0.000 claims abstract description 15
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 15
- 238000012546 transfer Methods 0.000 claims abstract description 15
- 239000004065 semiconductor Substances 0.000 claims abstract description 13
- 238000012545 processing Methods 0.000 claims description 38
- 229910052751 metal Inorganic materials 0.000 claims description 36
- 239000002184 metal Substances 0.000 claims description 36
- 229910052715 tantalum Inorganic materials 0.000 claims description 24
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 24
- 229910052723 transition metal Inorganic materials 0.000 claims description 18
- 150000003624 transition metals Chemical class 0.000 claims description 18
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 17
- 229910052757 nitrogen Inorganic materials 0.000 claims description 16
- 150000001879 copper Chemical class 0.000 claims description 12
- 150000002736 metal compounds Chemical class 0.000 claims description 12
- 230000005540 biological transmission Effects 0.000 claims description 11
- 230000005518 electrochemistry Effects 0.000 claims description 10
- 238000003860 storage Methods 0.000 claims description 9
- 239000002243 precursor Substances 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 150000004767 nitrides Chemical class 0.000 claims description 3
- VMQMZMRVKUZKQL-UHFFFAOYSA-N Cu+ Chemical compound [Cu+] VMQMZMRVKUZKQL-UHFFFAOYSA-N 0.000 claims description 2
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 claims description 2
- 150000002927 oxygen compounds Chemical class 0.000 claims 1
- 238000000231 atomic layer deposition Methods 0.000 abstract 6
- 239000010410 layer Substances 0.000 description 323
- 230000008569 process Effects 0.000 description 55
- 238000005516 engineering process Methods 0.000 description 22
- 239000000463 material Substances 0.000 description 22
- 239000011261 inert gas Substances 0.000 description 8
- 238000005240 physical vapour deposition Methods 0.000 description 8
- 239000005749 Copper compound Substances 0.000 description 7
- 150000001880 copper compounds Chemical class 0.000 description 7
- 238000002360 preparation method Methods 0.000 description 7
- 229910044991 metal oxide Inorganic materials 0.000 description 6
- 150000004706 metal oxides Chemical class 0.000 description 6
- 239000000126 substance Substances 0.000 description 6
- 230000008901 benefit Effects 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000005137 deposition process Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 238000007772 electroless plating Methods 0.000 description 5
- 239000012530 fluid Substances 0.000 description 5
- 238000007747 plating Methods 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000003344 environmental pollutant Substances 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 231100000719 pollutant Toxicity 0.000 description 4
- 238000010301 surface-oxidation reaction Methods 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 3
- 238000007872 degassing Methods 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 238000002156 mixing Methods 0.000 description 3
- 238000010561 standard procedure Methods 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- JXXICDWXXTZTHN-UHFFFAOYSA-M N.[O-2].[O-2].[OH-].O.[Ta+5] Chemical compound N.[O-2].[O-2].[OH-].O.[Ta+5] JXXICDWXXTZTHN-UHFFFAOYSA-M 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000007613 environmental effect Effects 0.000 description 2
- 238000011010 flushing procedure Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 125000002524 organometallic group Chemical group 0.000 description 2
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 2
- 238000004062 sedimentation Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 229910001936 tantalum oxide Inorganic materials 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 229910000531 Co alloy Inorganic materials 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYVFRCHFRAPULL-UHFFFAOYSA-N [B].[P].[W].[Co] Chemical compound [B].[P].[W].[Co] VYVFRCHFRAPULL-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000003190 augmentative effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- JPNWDVUTVSTKMV-UHFFFAOYSA-N cobalt tungsten Chemical compound [Co].[W] JPNWDVUTVSTKMV-UHFFFAOYSA-N 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052743 krypton Inorganic materials 0.000 description 1
- DNNSSWSSYDEUBZ-UHFFFAOYSA-N krypton atom Chemical compound [Kr] DNNSSWSSYDEUBZ-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 229910052754 neon Inorganic materials 0.000 description 1
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 230000027756 respiratory electron transport chain Effects 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 239000004576 sand Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 230000001235 sensitizing effect Effects 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000003756 stirring Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/1601—Process or apparatus
- C23C18/1633—Process of electroless plating
- C23C18/1646—Characteristics of the product obtained
- C23C18/165—Multilayered product
- C23C18/1653—Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/02—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material
- C23C28/023—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material only coatings of metal elements only
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
- C23C28/32—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer
- C23C28/322—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer only coatings of metal elements only
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
- C23C28/34—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
-
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
- C23C28/34—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
- C23C28/341—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates with at least one carbide layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
- H01L21/28562—Selective deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76862—Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76874—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroless plating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- H—ELECTRICITY
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Abstract
本发明涉及半导体器件布线的方法和系统。本发明的一方面是将铜层沉积到阻挡层上以便在其间产生基本上不含氧的分界面的方法。在一个实施例中,该方法包括提供基本上没有氧化物的阻挡层表面。该方法还包括在该没有氧化物的阻挡层表面上沉积一定量的原子层沉积(ALD)铜,其有效防止该阻挡层的氧化。该方法进一步包括在该ALD铜上方沉积填隙铜层。本发明的另一方面是将铜层沉积到阻挡层上以便在其间产生基本上不含氧的分界面的系统。在一个实施例中,该集成系统包括至少一个阻挡层沉积模块。该系统还包括ALD铜沉积模块,配置为通过原子层沉积来沉积铜。该系统进一步包括铜填隙模块和至少一个连接至该至少一个阻挡层沉积模块和该ALD铜沉积模块的传送模块。该传送模块配置为该基片可在这些该模块传递而基本上不暴露于氧化物形成环境。
Description
交叉参考
本申请涉及美国专利申请目录#XCR-001,主题为“METHODS AND SYSTEMS FOR BARRIER LAYER SURFACEPASSIVATION”,授予YezdiDORDI,JohnBOYD,FritzREDEKER,WilliamTHIE,TirachirapalliARUNAGIRI和AlexYOON,递交于2006年12月18日;美国专利申请S/N11/382,906,递交于2006年5月25日;美国专利申请S/N11/427,266,递交于2006年6月28日;美国专利申请S/N11/461,415,递交于2006年7月27日;美国专利申请S/N11/514,038,递交于2006年8月30日;美国专利申请S/N10/357,664,递交于2003年2月3日;美国专利申请S/N10/879,263,递交于2004年6月28日;以及美国专利申请S/N10/607,611,递交于2003年6月27日;所有这些专利和/或申请的全部内容通过引用结合在这里。
背景技术
本发明涉及改进的用于如集成电路、存储器单元等使用铜布线(metallization)的半导体器件的布线的方法和系统;更具体地,本发明涉及硅集成电路上基于铜的布线的方法和系统。
半导体器件制造的重要部分是器件的布线以电连接器件元件。对于许多这样的器件,布线的选择包括使用铜金属线。使用铜金属线的布线系统还必须使用阻挡层材料以将铜与电子器件的铜敏感区域隔开。一些铜布线所使用的阻挡层是如钽和如氮化钽的材料。使用铜的布线系统的通常制造工艺包括将铜沉积在该阻挡层上。一种优选的将铜沉积在阻挡层上的工艺是无电镀铜沉积。
用于铜布线的标准技术中存在的一个问题是许多优选的阻挡层材料如钽和氮化钽,如果长期暴露于空气会在阻挡层表面形成氧化物如氧化钽和氮氧化钽。已知,如果在阻挡层上存在氧化物,将抑制将铜无电镀沉积到阻挡层上。另外,铜不粘附于阻挡层上的氧化物,粘附于纯阻挡材料或富金属阻挡层表面,如钽和氮化钽上的富钽表面。钽和/或氮化钽阻挡层这里仅作为示例表述;对于其他阻挡层材料也发生类似问题。较差的粘附力会不利地影响半导体器件的电子迁移性能。另外,阻挡层表面上形成氧化钽或氮氧化钽会增加阻挡层的电阻。更具体地,阻挡层和铜化合物之间氧化物的存在会降低电子器件的性能,以及降低使用标准铜布线技术制造的电子器件的可靠性。
明显,许多应用要求高性能、高可靠性的电子器件。使用铜布线制造电子器件的标准技术中出现的问题表明需要使得使用铜布线制造的电子器件具有提高的性能和提高的可靠性的方法和系统。
发明内容
本发明涉及制造半导体器件的方法和系统。本发明寻求克服一个或多个使用铜布线制造半导体器件(如集成电路、存储单元等)的标准技术中的缺陷。
本发明的一方面为集成电路布线将填隙铜层沉积到基片上的过渡金属阻挡层或过渡金属化合物阻挡层上以便在其间产生基本上不含氧的分界面的方法。在一个实施例中,该方法包括提供基本上没有氧化物的阻挡层的表面。该方法还包括在该阻挡层基本上没有氧化物的表面上沉积一定量的原子层沉积(ALD)铜,其有效防止该阻挡层的氧化。该方法进一步包括在该ALD铜上沉积填隙铜层。
本发明的另一方面是为电子器件布线将铜层沉积基片上的过渡金属阻挡层或过渡金属化合物阻挡层上以便在其间产生基本上不含氧的分界面的系统。在一个实施例中,该集成系统包括至少一个阻挡层沉积模块,配置为在基片上形成阻挡层。该系统还包括ALD铜沉积模块,配置为通过原子层沉积来沉积铜。该系统进一步包括铜填隙模块和至少一个连接至该至少一个阻挡层沉积模块和该ALD铜沉积模块的传送模块。该传送模块配置为该基片可在这些模块之间传递而基本上不暴露于氧化物形成环境。
应当理解本发明的应用不限于结构细节和在下面的描述或者附图中所说明的部件的布置。本发明能够做出别的实施例并且以多种方式实现和实施。另外,要理解这里所使用的措辞和术语是为了描述的目的而不应当认为是限制。
这样,本领域技术人员将认识到这个公开内容所基于的概念可以做为设计其它用于实施本发明概念的结构、方法和系统的基础。所以,重要的是,权利要求应当认为包括这样的等同结构,只要它们不背离本发明主旨和范围。
附图说明
图1是本发明一实施例的工艺流程图。
图2是本发明一实施例的工艺流程图。
图3是本发明一实施例的图解。
图4是本发明一实施例的图解。
图5是本发明一实施例的图解。
图6是本发明一实施例的图解。
图7是本发明一实施例的图解。
技术人员明白,附图中的元件只是简单和清楚地描述而不必按照尺寸绘制。例如,图中一些元件的尺寸相对于其它元件放大以帮助理解本发明的实施例。
具体实施方式
本发明涉及使用阻挡层和铜线对半导体器件布线。下面将主要在用于硅集成电路的过渡金属阻挡层或转变金属过渡金属负荷阻挡层和铜线的背景中讨论本发明实施例的步骤。然而,要理解按照本发明的实施例可用于其它布线系统,其中在阻挡层和金属之间需要基本不含氧的分界面。
在下面对附图的描述中,当标示基本上完全相同的原件或这些附图公共的步骤时,使用完全相同的参考标号。
现在参照图1,其中示出按照本发明一个实施例的工艺流程图20。工艺流程图20示出一种为集成电路布线将填隙铜层沉积在过渡金属阻挡层或过渡金属化合物阻挡层上以便在该阻挡层和该铜层之间产生基本上不含氧的分界面的方法。工艺流程图20包括步骤25、步骤30和步骤35。步骤25包括在基片上形成具有基本不含氧化物的表面的阻挡层。步骤30包括将ALD铜层沉积在该基本上不含氧化物的阻挡层表面。沉积该ALD铜层从而有效地基本上防止该阻挡层氧化。步骤35包括沉积该填隙铜层。执行工艺流程20从而在该阻挡层和该ALD铜层之间基本上没有氧化物存在。因此,该填隙铜层沉积在基本上不含氧化物的阻挡层上。
选择执行工艺流程图20示出的步骤的各种不同的选择可以得到本发明许多实施例。步骤25可使用多种工艺进行,如物理气相沉积、化学气相沉积、原子层沉积。许多材料或材料系统可用于在步骤25中形成的该阻挡层。所选取的用于该阻挡层的材料将是影响选择用来形成该阻挡层的工艺的因素。在本发明的优选实施例中,步骤25包括形成阻挡层,该阻挡层包括过渡金属或过渡金属化合物。对铜布线系统,对于本发明的实施例的优选阻挡层材料是钽、氮化钽或这两个的组合。钽和氮化钽可通过物理气相沉积来沉积。然而,对于本发明的优选实施例,步骤25使用原子层沉积来沉积氮化钽阻挡层。
进一步的步骤(图1中未示),其对于本发明的一些实施例是可选的,包括在形成阻挡层之后处理该阻挡层的表面。处理该阻挡层的表面可通过许多方式进行。进行该步骤以便为下面的工艺步骤准备好该阻挡层的表面。处理该阻挡层的表面主要是提高该表面粘附力或提高沉积在该阻挡层上的层的接触电阻。按照本发明一个实施例,处理该阻挡层的表面通过使该阻挡层的表面经历含氢等离子来完成。该含氢等离子可配置为去除该阻挡层的表面上的污染物,以便分解形成在该阻挡层的表面上的金属氧化物,以便在该阻挡层的表面产生富金属表面。用于处理该阻挡层的表面的合适的含氢等离子的示例在共有美国专利申请第11/514,038中描述,递交于2006年8月30日,并且全部内容通过引用结合在这里。
作为另一个选择,处理该阻挡层的该表面可包括利用金属富化该阻挡层的表面,如通过将金属沉积到该阻挡层的表面上。作为一个选择,如物理气相沉积工艺的工艺可用来利用金属富化该阻挡层的表面。用于本发明实施例的处理该阻挡层表面的优选的方法包括使用等离子注入工艺来将金属与该阻挡层的表面结合的工艺。优选地,处理该阻挡层表面的步骤可以作为步骤25的一部分执行或在该工艺中沉积该ALD铜层之前的另一时间点执行。用来富化该阻挡层的表面的优选金属是过渡金属,如钽。要理解不是本发明的所有实施例都需要处理该阻挡层表面。
铜原子层沉积的通常工艺是本领域公知的。对于步骤30的ALD铜层沉积,有多种工艺可以选择。如上所述,沉积用于本发明的优选实施例的该ALD铜层以便有效地基本上防止该阻挡层表面氧化。更具体地,这意味着沉积该ALD铜层以便在该ALD铜层沉积期间基本上防止该阻挡层的氧化。这还意味着沉积该ALD铜层以便具有合适的厚度和微结构属性组合,从而下面的工艺中基本上不会发生形成氧化物的物质向该阻挡层的表面扩散的情况。换句话说,沉积该ALD铜层以作为该阻挡层的氧化保护层。对于本发明的一个实施例,该ALD铜层厚度大约1nm至大约2nm。按照本发明的一个优选实施例,该ALD铜层的厚度足以防止下层阻挡层的氧化,并且该ALD铜层具有足够的厚度从而该ALD铜层可用作电化学镀铜填隙层的铜种子层。
对于本发明的一个优选实施例,使用不包含与该阻挡层表面上的金属形成金属氧化物的元素或化合物的沉积化学制剂来沉积该ALD铜层。用于该ALD铜层沉积的示范性工艺化学制剂使用前体铜化合物如(N,N′-二异丙基acetamidinato)铜(l)以及如(N,N′-二-仲丁基acetamidinato)铜(l)。这两种化合物可从许多供应商以商业方式获得,如Sigma-AldrichCorp.,St.Louis,Missouri。适于该ALD铜沉积的工艺化学制剂的其他示例是铜(II)(tmhd)2(tmhd=四甲基-3,5-庚二酮(heptanedionate))和铜(I)1,3-二酮亚胺(diketiminates)。
对于工艺流程20的步骤35,可使用多种工艺和工艺条件。作为步骤35的一个选择,可使用无电镀沉积将该填隙铜层沉积到步骤30中形成的ALD铜层上。在一个优选实施例中,步骤30中形成的ALD铜层足够厚以用作铜种子层,以及步骤35包括在步骤30中形成的ALD铜层上沉积电镀铜填隙层。无电镀铜沉积和电化学镀工艺是公知的湿工艺。
在本发明又一优选实施例中,工艺流程20进一步包括将在该阻挡层上带有该ALD铜层的基片存储一段时间,或将在该阻挡层上带有该ALD铜层的基片传输到准备模块用以准备对该基片沉积该填隙铜层。如果该ALD铜层能够在传输期间或存储期间保护下层的阻挡层不形成氧化物,该传输步骤或存储持续很长时间或者发生在真空传输模块或受控环境传输模块之外的环境条件中,本发明的这个实施例是合适的。更具体地,本发明的这个实施例使用ALD铜层,其可以在很长一段时间或者暴露在没有该ALD铜层时可能会也可能不会导致氧化物形成的工艺条件时防止在下层的阻挡层上形成大量氧化物。换句话说,本发明的一个实施例包括工艺流程20,其中该ALD铜层配置为防止在含氧环境中传输或存储具有该ALD铜层的阻挡层时大量氧化物在该阻挡层形成。
现在参照图2,其中示出按照本发明一个实施例的工艺流程图22。工艺流程图22示出一种为集成电路布线将填隙铜层沉积到过渡金属阻挡层或过渡金属化合物阻挡层上从而在该阻挡层和该铜层之间产生基本上不含氧的分界面的方法。工艺流程图22包括步骤25、步骤30、步骤33和步骤35。步骤25包括在基片上形成具有基本上不含氧化物的表面的阻挡层。步骤30包括将ALD铜层沉积到该基本上不含氧化物的阻挡层表面上。沉积该ALD铜层从而有效地基本上防止该阻挡层氧化。步骤33包括通过无电镀沉积将铜种子层沉积到该ALD铜层上。步骤35包括沉积该填隙铜层。执行工艺流程20从而在该阻挡层和该ALD铜层之间基本上没有氧化物存在。因此,该铜层沉积在不含氧化物的该阻挡层的表面。
工艺流程图22所示的步骤选择不同的选项可以获得本发明的许多实施例。步骤25可使用多种工艺执行,如物理气相沉积、化学气相沉积和原子层沉积。多种材料或材料系统可用于在步骤25中形成的阻挡层。为该阻挡层选择的材料将是影响选择用来形成该阻挡层的工艺的因素。在本发明的优选实施例中,步骤25包括形成阻挡层,该阻挡层包括过渡金属或过渡金属化合物。对于铜布线系统,本发明的实施例优选的阻挡层材料是钽、氮化钽或这两者的组合。钽和氮化钽可通过物理气相沉积工艺沉积。然而对于本发明的优选实施例,步骤25使用原子层沉积来沉积氮化钽阻挡层。
进一步的步骤(图2中未示),其对于本发明的一些实施例是可选的,包括在该阻挡层形成之后处理该阻挡层的表面。处理该阻挡层的表面可以多种方法进行。执行该步骤以便为下面的工艺步骤准备该阻挡层的表面。处理该阻挡层的表面主要是为了提高该表面粘附力或提高该阻挡层上的沉积层的接触电阻。按照本发明一个实施例,处理该阻挡层的表面包括使该阻挡层的表面经受含氢等离子。该含氢等离子可配置为去除该阻挡层的表面上的污染物,如分解形成在该阻挡层的表面上的金属氧化物,以便在该阻挡层的表面产生富金属表面。
作为另一个选择,处理该阻挡层的表面可包括利用金属富化该阻挡层的表面,如通过将该金属沉积到该阻挡层的表面上。作为一个选择,如物理气相沉积工艺的工艺可用来利用金属富化该阻挡层的表面。一种处理该阻挡层的表面的本发明实施例的优选的方法包括使用等离子注入工艺沉积金属以将该金属与该阻挡层的表面结合。优选地,处理该阻挡层表面或者作为步骤25的一部分执行,或在该工艺中该ALD铜层沉积之前的另一时间点执行。用于富化该阻挡层的表面的优选材料是过渡金属如钽。要理解,处理该阻挡层表面不是本发明所有实施例都要求的步骤。
铜原子层沉积的通常工艺是本领域公知的。步骤30的ALD铜层沉积有多种工艺可以选择。如上所述,对于本发明的优选实施例,沉积该ALD铜层从而有效地基本上防止从而有效地基本上防止该阻挡层表面氧化。更具体地,这意味着沉积该ALD铜层从而基本上防止该阻挡层在该ALD铜层沉积期间氧化。这还意味着沉积该ALD铜层为具有合适的厚度和微结构从而对于最后的工艺基本不会出现氧化物形成物质基本扩散至该阻挡层的表面。换句话说,沉积该ALD铜层以用作对该阻挡层的氧化保护。对于本发明的一个实施例,该ALD铜层厚度大约1nm至大约2nm。
对于本发明的一个优选实施例,使用不包含与该阻挡层表面上的金属形成金属氧化物的元素或化合物的沉积化学制剂来沉积该ALD铜层。用于该ALD铜层沉积的示范性工艺化学至今使用前驱体铜化合物如(N,N′-二异丙基acetamidinato)铜(l)以及如(N,N′-二-仲-丁基acetamidinato)铜(l)。
步骤33包括使用无电镀沉积将该铜种子层沉积到该ALD铜层上。工艺流程22中包含步骤33对于本发明的实施例是必需的,在实施例中该ALD铜层可能不适于用作沉积铜填隙层的种子层。优选地,步骤35包括在步骤33中形成的铜种子层上沉积电镀铜填隙层。换句话说,本发明的一个优选实施例包括沉积ALD铜层为足以防止下层的阻挡层氧化。该ALD铜层沉积之后沉积铜种子层,从而存在该量的铜足以允许沉积电镀铜填隙层。
在本发明又一优选实施例中,工艺流程22进一步包括将在该阻挡层上带有该ALD铜层的基片存储一段时间,将在该阻挡层上带有该ALD铜层的基片传输到准备模块用以预备对该基片沉积该填隙铜层,或两者皆有。如果该ALD铜层能够在传输期间或存储期间保护下层的阻挡层不形成氧化物,该传输步骤或存储持续很长时间或者发生在真空传输模块或受控环境传输模块之外的环境条件中,则本发明的这个实施例是合适的。更具体地,本发明的这个实施例使用ALD铜层,其可以在很长一段时间或者暴露在没有该ALD铜层时可能会也可能不会导致氧化物形成的工艺条件时防止在下层的阻挡层上形成大量氧化物。换句话说,本发明的一个实施例包括工艺流程22,其中该ALD铜层配置为防止在含氧环境中传输或存储具有该ALD铜层的阻挡层时大量氧化物在该阻挡层形成。
现在参照图3,其中示出按照本发明一个实施例,示范性集成系统50的示意图,为集成电路布线在过渡金属阻挡层或过渡金属化合物阻挡层上沉积铜层。集成系统50配置为在该阻挡层和该铜层之间产生基本上不含氧的分界面。集成系统50的优选实施例配置为基本上执行工艺流程20的步骤(图1)及其变化,或执行工艺流程22的步骤(图2)及其变化。
对于图3所示的实施例,集成系统50包括至少一个传送模块52、阻挡层沉积模块58、阻挡层处理模块60、ALD铜沉积模块62和铜填隙模块65。集成系统50配置为使得基片表面在不希望形成氧化物的关键步骤中最低限度地暴露于氧气。另外,由于其是集成系统,该基片可以从一个工艺模块立即传送到下一个工作台,这限制了暴露于氧气的时间。
按照本发明一个实施例,集成系统50配置为通过图1的工艺流程20及其变化的全部工序处理基片。更具体地,阻挡层沉积模块58配置为在基片上形成阻挡层。优选地,阻挡层沉积模块58配置为沉积阻挡层材料,如钽、氮化钽和两者的组合。作为一个选择,阻挡层沉积模块58可配置为进行该阻挡层的物理气相沉积或该阻挡层的原子层沉积。在一个优选实施例中,阻挡层沉积模块58配置为进行原子层沉积。在一个可能的配置中,阻挡层沉积模块58配置为在小于1托压力下进行原子层沉积工艺。作为另一个选择,阻挡层沉积模块58配置为进行用以使用超临界CO2和有机金属前体(organometallic precursor)以形成该阻挡层的高压工艺的原子层沉积。在又一配置中,阻挡层沉积模块58配置为进行工作在小于1托压力下的物理气相沉积工艺。超临界CO2的高压工艺的示范性反应器的细节在共同转让的申请No.10/357,664中描述,主题为“Methodand Apparatus for Semiconductor Wafer Cleaning UsingHigh-Frequency Acoustic Energy with supercritical Fluid”,递交于2003年2月3日,其通过引用结合在这里。一旦形成该阻挡层,该基片应当在受控周边环境中传送以限制暴露于氧气;这利用传送模块52完成。
阻挡层处理模块60配置为在该阻挡层形成之后处理该阻挡层的表面。更具体地,阻挡层处理模块60配置为为之后的工艺步骤准备该阻挡层的表面。主要地,阻挡层处理模块113配置为提高该表面粘附力或提高沉积在该阻挡层上的层的接触电阻。按照本发明一个实施例,阻挡层处理模块60包括等离子室,配置为使该阻挡层的表面经历含氢等离子以便去除该阻挡层的表面上的污染物或分解形成在该阻挡层的表面上的金属氧化物,从而在该阻挡层的表面上产生富金属表面。作为另一个选择,阻挡层处理模块113配置为利用金属富化该阻挡层的表面,如通过将金属沉积到该阻挡层的表面上。在优选的配置中,阻挡层处理模块113包括等离子室,配置为进行金属的等离子注入。所注入的金属与该阻挡层的表面结合以产生该阻挡层的富金属表面。优选地该阻挡层的表面利用过渡金属富化。对于将钽或氮化钽用于该阻挡层的应用,阻挡层处理模块60优选地配置为利用钽富化该阻挡层的表面。
ALD铜沉积模块65配置为在基本上不会导致在基本上没有氧化物的阻挡层表面或金属富化阻挡层表面上形成氧化物的条件下沉积ALD铜层。ALD铜沉积模块65配置为沉积铜层,其对于基本上防止该阻挡层表面氧化有效的。更具体地,这意味着ALD铜沉积模块65配置为沉积铜层以在该ALD铜层沉积期间基本上防止该阻挡层氧化。ALD铜沉积模块65配置为沉积具有合适的厚度和微结构属性组合的ALD铜层从而在随后的工艺条件不会发生氧化物形成物质扩散到该阻挡层的表面。
对于本发明的一个优选实施例,ALD铜沉积模块65配置为使用不包括与该阻挡层表面的金属形成氧化物的元素或化合物的化学制剂。配置ALD铜沉积模块65所使用的示范性ALD铜沉积工艺化学制剂包括,但不限于,前体铜化合物如(N,N′-二异丙基acetamidinato)铜(l)形成的ALD铜沉积和前体铜化合物如(N,N′-二-仲-丁基acetamidinato)铜(l)形成的ALD铜沉积。
铜填隙模块65配置为沉积填隙铜层。可选地,铜填隙模块65可配置为使用无电镀沉积、电化学镀或无电镀沉积和电化学镀沉积该填隙铜层。更具体地,铜填隙模块65可配置为在该阻挡层表面沉积共形铜种子层,之后接着厚铜填隙(或块填充)工艺。在一个实施例中,铜填隙模块65配置为执行无电镀工艺以产生共形铜种子层。铜填隙模块65可进一步配置为通过无电镀工艺或电化学镀工艺进行厚铜块填充工艺。无电镀铜沉积和电化学镀工艺是公知的湿法工艺。对于集成到上面已经描述的具有受控处理和传输环境的系统中的湿法工艺,该反应器需要集成有冲洗/干燥器以具有干进/干出工艺能力。另外,该系统需要填充惰性气体以确保该基片最低程度暴露于氧气。进一步,该工艺中使用的所有流体都是除气的,即溶解的氧气通过可通过商业途径获得的除气系统去除。
还需要控制该用于无电镀沉积的环境以提供低(或有限)程度的氧气和湿气(水蒸汽)。惰性气体也可用于铜填隙模块65以确保该处理环境中的低程度氧气。铜填隙模块65可配置为以许多方式执行该无电镀沉积工艺,如搅拌镀(puddle-plating),其中将流体分散到基片上并允许在静止模式反应,之后去除并丢弃反应物,或回收。在另一实施例中,铜填隙模块65包括邻近处理头以限制该无电镀工艺液体从而其只是在受限的区域上接触该基片表面。不在该邻近处理头下的基片表面是干的。这样的工艺和系统的细节可在美国申请No.10/607,611中找到,主题为“Apparatus and Method ForDepositing and Planarizing Thin Films Of Semiconductor Wafers”,递交于2003年6月7日,以及美国申请No.10/879,263,主题为“Methodand Apparatus For Plating Semiconductor Wafers”,递交于2004年6月28日,两者全部内容都结合在这里。
该至少一个传送模块52配置为真空传送该基片或在受控环境传送该基片。或者,该至少一个传送模块52可包括多个传送模块,其中一个传送模块配置为进行真空传送,而第二传送模块配置为受控环境传送。传送模块52连接于该阻挡层沉积模块58、阻挡层处理模块60、ALD铜沉积模块62和铜填隙模块65。传送模块52配置为该基片可在多个模块之间传送而基本上不暴露于含氧环境或氧化物形成环境。
湿法工艺(如铜填隙模块65中执行的那些)通常在接近大气压的压力下进行,而干法工艺(如阻挡层沉积模块58、阻挡层处理模块60和ALD铜沉积模块62中执行的那些)通常在小于1托的压力进行。所以,集成系统50需要能够处理干法和湿法工艺的混合。该至少一个传送模块52装备有一个或多个机器人以将该基片从一个工艺区域移到另一个工艺区域。该工艺区域可以是基片盒、反应器或装载锁(盒与装载锁图3中未示)。
如上所述,重要的是控制处理和传输环境以在该ALD铜层沉积之前最小化该阻挡层表面暴露于氧气,以便避免在该阻挡层上形成氧化物。该基片应当在受控环境中处理,其中该环境或者是在真空下或者填充一种或多种惰性气体以限制该基片暴露于氧气。为了提供用于基片传送的受控环境,传送模块52配置为可以控制该环境不含氧。在一个示范性的配置中,传送模块52配置为在基片传送期间使惰性气体填充该传送模块。另外,这些工艺中使用的全部流体都是除气的,即所溶解的氧气通过商业途径可以得到的系统去除。示范性惰性气体包括氮气(N2)、氦气(He)、氖气(Ne)、氩气(Ar)、氪气(Kr)和氙气(Xe)。
现在参照图4,其中示出按照本发明另一实施例的示范性集成系统75的示意图,为集成电路布线将铜层沉积到基片上的过渡金属阻挡层或过渡金属化合物阻挡层上。集成系统75配置为在该阻挡层和该铜层之间产生基本上不含氧的分界面。集成系统75的优选实施例配置为基本上执行工艺流程22的步骤(图2)及其变化,或执行工艺流程22的步骤(图2)及其变化。
集成系统75包括与阻挡层沉积模块108、装载锁110、阻挡层处理模块113和ALD铜沉积模块117连接的真空传送模块105。集成系统75还包括与铜种子沉积模块128和铜填隙模块130连接的受控环境传送模块120。第二装载锁123包括在集成系统75中,用以将传送模块105与受控环境传送模块120结合。
对于集成系统75,阻挡层沉积模块108配置为实际上具有与如上所述的用于阻挡层沉积模块58的相同的配置。阻挡层表面清洁113配置为实际上具有与如上所述的用于阻挡层表面清洁模块60的相同的配置。ALD铜沉积模块117配置为实际上与如上所述的用于ALD铜沉积模块62的相同的配置。提供装载锁110以允许为真空传送模块105传送基片同时保持真空传送模块105的真空状态。
真空传送模块105配置为在真空(<1托)下运行。受控环境传送模块120配置为在大约1个大气压下运行。装载锁123设在真空传送模块105和受控环境传送模块125之间以允许在两个运行在不同压力下的模块之间传送基片同时保持每个传送模块中的环境完整。装载锁123配置为运行在压力小于1托的真空或者实验室环境或者待填充从一组惰性气体中选择的惰性气体。
阻挡层处理模块113配置为在形成该阻挡层之后处理该阻挡层的表面。更具体地,阻挡层处理模块113配置为为随后的工艺步骤准备该阻挡层的表面。主要地,阻挡层处理模块113配置为提高该表面粘附力或提高沉积在该阻挡层上的层的接触电阻。按照本发明一个实施例,阻挡层处理模块113包括等离子室,配置为使该阻挡层的表面经历含氢等离子以便去除该阻挡层的表面上的污染物或分解形成在该阻挡层的表面上的金属氧化物以便在该阻挡层的表面产生富金属表面。作为另一个选择,阻挡层处理模块113配置为利用金属富化该阻挡层的表面,如通过将该金属沉积到该阻挡层的表面上。在优选的配置中,阻挡层处理模块113包括等离子室,配置为等离子注入金属。所注入的金属与该阻挡层的表面结合以产生该阻挡层的富金属表面。
ALD铜沉积模块117配置为在基本上不会导致在基本上没有氧化物的阻挡层表面或金属富化阻挡层表面上形成氧化物的条件下沉积ALD铜层。ALD铜沉积模块117配置为沉积铜层,其对于基本上防止该阻挡层表面氧化是有效的。更具体地,这意味着ALD铜沉积模块117配置为沉积铜层以在该ALD铜层沉积期间基本上防止该阻挡层氧化。ALD铜沉积模块117配置为沉积具有合适的厚度和微结构属性组合的ALD铜层从而在随后的工艺条件不会发生氧化物形成物质扩散到该阻挡层的表面。
对于本发明的一个优选实施例,ALD铜沉积模块117配置为使用不包括与该阻挡层表面的金属形成氧化物的元素或化合物的化学制剂。配置ALD铜沉积模块117所使用的示范性ALD铜沉积工艺化学制剂包括,但不限于,从前体铜化合物如(N,N′-二异丙基acetamidinato)铜(l)形成的ALD铜沉积和前体铜化合物如(N,N′-二-仲-丁基acetamidinato)铜(l)形成的ALD铜沉积。
铜种子沉积模块128配置为在该ALD铜沉积层上沉积共形铜种子层。优选地,铜种子沉积模块128配置进行无电镀工艺以产生该铜种子层。铜填隙模块130配置为通过无电镀工艺或电化学镀工艺进行厚铜块填充工艺。如上所述,无电镀铜沉积和电化学镀是公知的湿法工艺。对于集成到上面已经描述的具有受控处理和传输环境的系统中的湿法工艺,该反应器需要集成有冲洗/干燥器以具有干进/干出工艺能力。另外,该系统需要填充惰性气体以确保该基片最低程度暴露于氧气。进一步,该工艺中使用的所有流体都是除气的,即溶解的氧气通过可通过商业途径获得的除气系统去除。
湿法工艺(如铜种子沉积模块128和铜填隙模块130中执行的那些)通常在接近大气压的压力下进行,而干法工艺(阻挡层沉积模块108、ALD铜沉积模块117和阻挡层处理模块113中执行的那些)通常在小于1托的压力进行。所以,集成系统75需要能够处理干法和湿法工艺的混合。真空传送模块105和受控环境传送模块120装备有一个或多个机器人以将该基片从一个工艺区域移到另一个工艺区域。该工艺区域可以是基片盒、反应器或装载锁(盒在图4中未示)。
现在参照图5,其中示出按照本发明另一实施例,示范性集成系统75A的示意图,为集成电路布线将铜层沉积基片上的过渡金属阻挡层或过渡金属化合物阻挡层上。集成系统75A配置为在该阻挡层和该铜层之间产生基本上不含氧的分界面。集成系统75A的优选实施例配置为基本上执行工艺流程20的步骤(图1)及其变化。
集成系统75A包括与阻挡层沉积模块108、装载锁110、阻挡层处理模块113和ALD铜沉积模块117连接的真空传送模块105。集成系统75A还包括与铜填隙模块130连接的受控环境传送模块120。第二装载锁123包括在集成系统75A中,用以将真空传送模块105和受控环境传送模块120结合。
集成系统75A实际上与图4中描述的集成系统75相同,除了集成系统75A配置为ALD铜沉积模块117产生对于防止下层阻挡层氧化有效以及还用作铜种子层的ALD铜层。这意味着集成系统75A不需要无电镀铜沉积模块。集成系统75A配置为将该填隙铜层沉积到该ALD铜层上。
现在参照图6,其示出按照本发明另一实施例的示范性集成系统75B的示意图,为集成电路布线将铜层沉积到基片上的过渡金属阻挡层或过渡金属化合物阻挡层上。集成系统75B配置为在该阻挡层和该铜层之间产生基本上不含氧的分界面。集成系统75B的优选实施例配置为基本上执行工艺流程22的步骤(图2)及其变化。
集成系统75B包括与阻挡层沉积模块108、装载锁110和ALD铜沉积模块117连接的真空传送模块105。集成系统75B还包括与铜种子沉积模块128和铜填隙模块130连接的受控环境传送模块120。第二装载锁123包括在集成系统75B中,用以将传送模块105与受控环境传送模块120结合。
集成系统75B实际上与图4中描述的集成系统75相同,集成系统75B不包括单独的模块来处理该阻挡层表面以去除氧化物或金属富化该表面。对于本发明的实施例的一些应用,阻挡层处理可能不是必须的。或者,本发明进一步的实施例可配置为该阻挡层可以在例如该阻挡层形成模块中处理或在又如该ALD铜沉积模块中处理。
现在参照图7,其中示出按照本发明一个实施例,集成电路150中铜布线的一部分的侧面剖视图。集成电路150包括半导体155,其中具有多个集成电路元件(电路元件未在图7中示出),以及该半导体上的介电层160。该集成电路元件与布线线路电连接。介电层160具有容纳该布线线路的沟槽。集成电路150进一步包括内衬沟槽的底部和侧面的阻挡层165、在阻挡层165上的ALD铜层170、ALD铜层170上的铜种子层175,和从铜种子层175长出并完成该布线的铜部分的铜填隙层180。该沟槽的顶部利用第二阻挡层185和更多电介质190密封。第二阻挡层185可以是选择性的金属阻挡层,如由钽、氮化钽、或氮化钽和钽层的组合、钨钴合金(CoW)、钴钨硼磷(CoWBP)和钌形成的阻挡层。或者,阻挡层185可以是电绝缘阻挡材料,如碳化硅、氮化硅或氮碳化硅,或选择性的金属阻挡层和非选择性金属阻挡层的混合。第二介电层190可包括与介电层160相同的材料,或其可包括与介电层160不同的材料。
本领域一般技术人员将明白种子层170对于本发明的具有足够厚度的ALD铜层的实施例是可选的。更具体地,对于本发明的一些实施例,将ALD铜层170做成足够厚以用作铜填隙层180的电化学镀的种子层。
集成电路150包括阻挡层165和ALD铜层170之间基本上不含氧化物的分界面。一个优选实施例包括在与ALD铜层170的分界面上具有过渡金属富化表面的阻挡层165。阻挡层165和ALD铜层170之间的不含氧化物的分界面利用不使用氧或含氧化学制剂的ALD铜沉积工艺化学制剂完成。用于ALD铜层170沉积的两种合适的工艺化学制剂的示例已经在上面给出。
在前面的说明中,参照多个具体实施例描述本发明。然而,本领域一般技术人员认识到在不背离下面的权利要求所阐述的本发明的范围的情况下,可进行各种不同的修改和改变。所以,该说明书和附图应当认为是说明性的而不是限制目的,并且所有这样的修改确定为包括在本发明的范围内。
上面关于多个具体实施例描述了其有益处、优点和对问题的解决方案。然而,这些益处、优点和对问题的解决方案,以及可能导致益处、优点或方案产生或变得更加明显的任何元件应当认为是任何或全部权利要求的关键的、必须或本质特征。
如这里所使用的,词语“包括”、“包含”、“具有”、“其至少一个”或者它们的任何变形应当认为是非排他性的包含。例如,包括一列要素的工艺、方法、物品或设备不必定地只是限于那些要素,而是可包括没有清楚的列出或这样的工艺、方法、物品或设备固有的要素。进一步,除非进行清楚地相反陈述,否则“或”指的是包括或不是排除或。例如,条件A或B可由下一列任一条件满足:A为真(或存在)和B为假(或不存在),A为假(或不存在)和B为真(或存在),以及A和B都为真(或存在)。
进一步,除非进行清楚地相反陈述,“其至少一个”应当解释为意思是“一个或多个”。例如,工艺、方法、物品或设备包括一列要素中的一个或多个以及如果一个或多个要素包括子要素的子列,那么这些子要素应当认为与这些要素为相同方式。例如,A和B的至少一个由下面任一条件满足:A为真(或存在)和B为假(或不存在),A为假(或不存在)和B为真(或存在),以及A和B都为真(或存在)。
Claims (23)
1.一种制造具有铜布线和过渡金属阻挡层或过渡金属化合物阻挡层的半导体器件以在该阻挡层和该铜布线之间产生基本上不含氧的分界面的方法,该方法包括:
(a)提供阻挡层表面,在含氢等离子中处理该阻挡层以提供基本上没有氧化物的阻挡层表面;
(b)在该没有氧化物的阻挡层表面上沉积一定量的纯原子层沉积(ALD)铜,其有效防止该阻挡层的氧化;以及
(c)在该量的铜上电镀填隙铜层。
2.根据权利要求1所述的方法,进一步包括在电镀该填隙铜层之前将铜种子层无电镀沉积到该ALD铜上。
3.根据权利要求1所述的方法,进一步包括下面步骤的至少一个:
1.将具有该ALD铜的基片存储一段时间,和
2.传输该具有该ALD铜的基片。
4.根据权利要求1所述的方法,其中沉积该ALD铜排除氧化合物或氧。
5.根据权利要求1所述的方法,其中将具有该ALD铜的基片存储一段时间和传输该具有该ALD铜的基片发生在含氧环境中。
6.根据权利要求1所述的方法,其中将具有该ALD铜的基片存储一段时间和传输该具有该ALD铜的基片发生在基本上不含氧的环境中。
7.根据权利要求1所述的方法,其中提供该基本上不含氧化物的阻挡层表面包括该阻挡层的原子层沉积。
8.根据权利要求1所述的方法,其中提供该基本上不含氧化物的阻挡层表面包括钽或氮化钽的原子层沉积。
9.根据权利要求1所述的方法,其中提供该基本上不含氧化物的阻挡层表面包括氮化钽的原子层沉积,以及沉积一定量的ALD铜利用铜(II)(tmhd)2(tmhd=四甲基-3,5-庚二酮)和铜(I)1,3-二酮亚胺,(N,N′-二异丙基acetamidinato)铜(l),或(N,N′-二-仲-丁基acetamidinato)铜(l)来完成。
10.根据权利要求1所述的方法,其中提供该基本上不含氧化物的阻挡层表面通过该阻挡层的氮化钽原子层沉积并在含氢等离子中处理该阻挡层表面来完成。
11.根据权利要求1所述的方法,其中提供该基本上不含氧化物的阻挡层表面通过该阻挡层的氮化钽原子层沉积并在含氢等离子中处理该阻挡层表面来完成;该方法进一步包括将铜种子层无电镀沉积到该ALD铜上。
12.根据权利要求1所述的方法,其中提供该基本上不含氧化物的阻挡层表面包括利用过渡金属富化该阻挡层的表面。
13.根据权利要求1所述的方法,其中提供该基本上不含氧化物的阻挡层表面包括利用钽富化该阻挡层的表面。
14.根据权利要求1所述的方法,其中该阻挡层包括钽或氮化钽。
15.一种为集成电路布线将铜层沉积在基片上的过渡金属阻挡层或过渡金属化合物阻挡层上以便在其间产生基本上不含氧的分界面的集成系统,该集成系统包括:
阻挡层沉积模块,配置为在基片上形成阻挡层;
ALD铜沉积模块,配置为在该阻挡层上进行铜的原子层沉积;
铜填隙模块,配置为电化学镀铜填隙层;和
至少一个传送模块,配置为真空传送该基片或受控环境传送该基片,该至少一个传送模块连接到该阻挡层沉积模块、该ALD铜沉积模块和该铜填隙模块,从而该基片可在这些模块之间传递而基本上不暴露于含氧环境。
16.根据权利要求15所述的系统,进一步包括配置为形成铜种子层的无电镀铜沉积模块。
17.根据权利要求15所述的系统,进一步包括配置为生成含氢等离子的阻挡层处理模块。
18.根据权利要求15所述的系统,进一步包括配置为在该阻挡层的表面等离子注入金属的阻挡层处理模块。
19.根据权利要求15所述的系统,进一步包括配置为在该阻挡层的表面等离子注入钽的阻挡层处理模块。
20.根据权利要求15所述的系统,其中该阻挡层沉积模块配置为通过原子层沉积来沉积钽。
21.根据权利要求15所述的系统,其中该阻挡层沉积模块配置为通过原子层沉积来沉积氮化钽。
22.根据权利要求15所述的系统,其中该ALD铜沉积模块配置为通过原子层沉积从非氧化合物前体沉积铜。
23.根据权利要求15所述的系统,其中该至少一个传送模块包括真空传送模块和受控环境传送模块,该阻挡层沉积模块连接到该真空传送模块,该ALD铜沉积模块连接到该真空传送模块,该铜填隙模块连接到该受控环境传送模块;和该系统进一步包括连接该真空传送模块和该受控环境传送模块的装载锁。
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US8872341B2 (en) * | 2010-09-29 | 2014-10-28 | Infineon Technologies Ag | Semiconductor structure having metal oxide or nirtride passivation layer on fill layer and method for making same |
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CN101563763A (zh) | 2009-10-21 |
TWI496214B (zh) | 2015-08-11 |
US20100267229A1 (en) | 2010-10-21 |
WO2008076678A1 (en) | 2008-06-26 |
US20080142972A1 (en) | 2008-06-19 |
TW200839873A (en) | 2008-10-01 |
KR101094125B1 (ko) | 2011-12-15 |
KR20090091336A (ko) | 2009-08-27 |
US8053355B2 (en) | 2011-11-08 |
US7749893B2 (en) | 2010-07-06 |
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