CN101562148B - Method for carbon nano tube to achieve vertical interconnection of upper and lower layers of conductive material - Google Patents
Method for carbon nano tube to achieve vertical interconnection of upper and lower layers of conductive material Download PDFInfo
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- CN101562148B CN101562148B CN2009100829004A CN200910082900A CN101562148B CN 101562148 B CN101562148 B CN 101562148B CN 2009100829004 A CN2009100829004 A CN 2009100829004A CN 200910082900 A CN200910082900 A CN 200910082900A CN 101562148 B CN101562148 B CN 101562148B
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Abstract
The invention discloses a method for a carbon nano tube to achieve vertical interconnection of upper and lower layers of a conductive material, and belongs to the interconnection technology in an integrated circuit. The method comprises the following steps: preparing a vertical structure comprising upper and lower horizontal planes on a substrate; depositing the conductive material on the verticalstructure to form upper and lower conductive layers; preparing carbon nano tube solution, dripping the carbon nano tube solution onto the vertical structure, applying direct current or alternating cu rrent between the upper and lower conductive layers, and lapping two ends of the carbon nano tube to the two conductive material layers; and depositing an insulating medium material to form a carbon nano tube through hole structure so as to achieve the vertical interconnection of the upper and lower layers of the conductive material. The preparation and assembly processes of the carbon nano tube are carried out respectively, and the assembly process is carried out at room temperature; therefore, the interconnection technology can avoid polluting a circuit chip during the preparation of the carbon nano tube, and can be compatible with the prior CMOS technology.
Description
Technical field
The invention relates to the interconnection technique in the integrated circuit, be specifically related to the perpendicular interconnection method between a kind of upper and lower two layers of conductive material.
Background technology
Interconnection in the integrated circuit mainly comprises two kinds, and a kind of is that another kind is the perpendicular interconnection between the different layers, i.e. through hole with the horizontal interconnect in the layer.Constantly scaled along with the integrated circuit characteristic size, integrated level constantly increases, and the size of interconnection line also diminishes thereupon in the integrated circuit, and the interconnection number of plies is on the increase, and the through hole as the perpendicular interconnection that connects levels in the integrated circuit is also more and more.Yet along with reducing of live width, cause the resistivity of traditional copper interconnecting line increasing by grain boundary scattering and rough surface, thereby make the delay that is brought by interconnection line become big, circuit speed reduces; In addition because copper connecting lines surpasses 10 in current density
6A/cm
2The time tangible electromigration can appear, thereby cause the circuit actual effect.And the current transfer of carbon nano-tube is very capable, and the highest current density that can bear can reach 10
9A/cm
2, add its distinctive trajectory current characteristics, make on its resistivity theory very for a short time, studies show that after the 22nm node, the advantage of carbon nanotube interconnect is higher than copper-connection far away, so carbon nano-tube is fit to do interconnection material very much, particularly the through-hole interconnection material.
According to ITRS prediction, under 90nm node in 2010, the through hole height is minimum will accomplish 144nm.Because the mean free path of carbon nano-tube can reach several microns, therefore under this node, if with carbon nano-tube as through-hole interconnection, then can realize the direct ballistic transport of electric current, thereby effectively improve circuit speed.But because the conductive characteristic of carbon nano-tube is relevant with its chirality and physical dimension, and the size of through hole is less, how to design the structure of carbon nano-tube through hole, and select the carbon nano-tube of particular chiral and physical dimension as required, thereby effectively up and down two conductive layers to couple together be the basis of realizing carbon nanotube interconnect.
The method of the through-hole structure of preparation carbon nano-tube mainly contains at present: from the bottom to top at Si/SiO
2Utilize Ni to do the carbon nano-tube bundle that method that catalyst utilizes plasma enhanced chemical vapor deposition prepares perpendicular interconnection on the/Cr, and then deposit SiO with CVD
2Fill up the gap between the carbon nano-tube, the method for using chemico-mechanical polishing again is with SiO
2Carbon nano-tube bundle is only exposed in leveling, surface, depositing metal in the above at last, thus realize the levels carbon nanotube interconnect; Another is to utilize catalyst buried regions (3nmFe/5nmTa/150-200nmSiO
2), method with CVD in the through hole of the very large depth-width ratio of the good 20nm of photoetching prepares MWCNTs, with CMP or the method that anti-carves erosion the top of MWCNTs is exposed then, the depositing metal electrode layer again, and annealing is to reduce contact resistance under 850 ℃, and the resistivity that obtains is 7.8kohm.Owing to prepare carbon nano-tube with the PECVD method, if growth temperature lower (＜400 ℃〉easily produce amorphous carbon, and the poor quality of the nanotube for preparing, be that current all methods for preparing the carbon nano-tube through-hole interconnection all are with methods such as PECVD or CVD (in-situ) carbon nano-tube when participating in the cintest, therefore at first growth temperature can not be too low, do not meet 400 ℃ the growth temperature of being lower than of ITRS prediction.Owing to be growth when participating in the cintest, the poor quality of the carbon nano-tube for preparing controls in addition.
Summary of the invention
The present invention has overcome deficiency of the prior art, and the perpendicular interconnection method between a kind of upper and lower two layers of conductive material is provided.
Technical scheme of the present invention is:
Perpendicular interconnection method between a kind of upper and lower two layers of conductive material, its step comprises:
1) vertical stratification that preparation one comprises upper and lower two horizontal planes in substrate;
2) depositing conductive material on above-mentioned vertical stratification forms upper and lower two conductive layers;
3) the preparation carbon nano-tube solution drips to this carbon nano-tube solution on the above-mentioned vertical stratification, and apply direct current or alternating current between upper and lower conductive layer, and the two ends of carbon nano-tube are respectively closely to being overlapped on the two layers of conductive material;
4) deposit dielectric material forms the carbon nano-tube through-hole structure, thereby realizes the perpendicular interconnection between the upper and lower two layers of conductive material.
In the described step 1), described substrate can be adopted Si, Ge or GaAs semi-conducting material.
In step 2) before, but at described vertical stratification deposit one insulating medium layer.
Described step 2) in, described electric conducting material can be highly doped Si, Ge, GaAs or metal Ti/Au.
Described step 2) in, described go up the electric conducting material that conductive layer and lower conductiving layer adopted can be different.
In the described step 3), described carbon nano-tube solution contains the organic solution of single wall, double-walled, many walls or Single Walled Carbon Nanotube tube bank, and this organic solvent is ethanol, acetone, n-hexane, isopropyl alcohol, dimethyl formamide or 1, the 2-dichloroethanes.
In the described step 4), described insulating medium layer can adopt SiO
2, organic class, nitrating oxide or porousness low-K dielectric material.
Compared with prior art, the invention has the beneficial effects as follows:
Made of carbon nanotubes and assembling process carry out separately respectively among the present invention, utilize electrophoresis method, carbon nano-tube is taken structure on two layers of conductive material up and down, then deposit dielectric material, form the carbon nano-tube through-hole structure, thereby realize the vertical interconnecting structure between the upper and lower two layers of conductive material.Adopt the present invention, do not need the high temperature preparation process of various carbon nano-tube, therefore can not produce the pollution that brings by the made of carbon nanotubes process device.Secondly, for different nanotubes, as single wall and many walls nanotube, the nanotube of different-diameter, the nanotube of different length, the nanotube of different chiralitys distributions can be selected the nanotube of needs according to different structures.In addition, can control the density of nanotube interconnection by the concentration of control nanotube solution.And can be sequentially realize interconnection between the multilayer by this kind method.
Description of drawings
The schematic diagram of the upper and lower double-layer structure of the perpendicular interconnection that Fig. 1 is realized for embodiment one;
Fig. 2 is the process chart of embodiment one;
The schematic diagram of the upper and lower double-layer structure of the perpendicular interconnection that Fig. 3 is realized for embodiment two;
Fig. 4 is the process chart of embodiment two.
Embodiment
Below in conjunction with the drawings and specific embodiments the present invention is described in further detail:
Embodiment one, is example with the vertical stratification of boss type shown in Figure 1, and technical process of the present invention is described.
1) etching one boss structure on silicon base at first has a vertical plane between the upper surface of this structure and the following laminar surface, but on above-mentioned boss structure the exhausted gorgeous dielectric layer of deposit one deck, shown in Fig. 2 (a).
Substrate can be semi-conducting materials such as Si, Ge, GaAs, also can be a kind of integrated circuit structure.
Above-mentioned insulating medium layer can be SiO
2, organic class, nitrating oxide or porousness low-K dielectric material.
2) deposit conductive layer on vertical stratification;
Upper and lower two layers of conductive material can be same material, also can make the different materials of planting, and material is including, but not limited to metal, high doping semiconductor material: Si, Ge, GaAs, carbon nano-tube film or conducting polymer.Wherein, carbon nano-tube film: single-wall carbon tube film, the mixed film of many walls carbon pipe film or single wall and many walls carbon pipe, single or multiple lift graphite flake, conductive plastics polymer etc.
The structure that the deposit conductive layer forms on vertical stratification is shown in 2 (b).
3) with ultrasonic ethanol, acetone, n-hexane, isopropyl alcohol, the dimethyl formamide or 1 of being scattered in of carbon nano-tube, in the organic solutions such as 2-dichloroethanes, prepare the solution that contains carbon nano-tube.
Carbon nano-tube herein can be single wall, double-walled, many walls or Single Walled Carbon Nanotube tube bank.
4) in step 2) in deposit apply direct current or alternating current up and down between the two conductive layers, the parameter area of the alternating current that applies is V
PP=1-20V, frequency 1-10MHZ.
And the carbon nano-tube solution for preparing dripped on the boss structure, carbon nano-tube will polarize under effect of electric field, and according to the orientations of electric field, and two ends can be taken on the two layers of conductive material densely, after removing electric field, the structure of formation is shown in Fig. 2 (c).
5) the deposit dielectric comes space between the filled with nanotubes on the vertical stratification of carbon nano-tube of having taken structure, after deposit is finished, forms the carbon nano-tube through-hole structure, thereby realizes the perpendicular interconnection between the upper and lower two layers of conductive material.
Above-mentioned insulating medium layer can be SiO
2, organic class, nitrating oxide or porousness low-K dielectric material.
Embodiment two, are example with fluted body vertical stratification shown in Figure 3, and technical process of the present invention is described.
1) etching one groove structure in substrate at first is provided with three vertical planes between the upper surface of this structure and the following laminar surface, but on above-mentioned vertical stratification deposit one deck insulating medium layer, shown in Fig. 3 (a).
Substrate can be semi-conducting materials such as Si, Ge, GaAs, also can be the vertical stratification of any one integrated circuit; Material 2 is dielectric materials, can be SiO
2, organic class, nitrating oxide or porousness low-K dielectric material.
2) deposit conductive layer on double-layer structure up and down;
The conductive layer of deposit can be metals such as Ti/Au, also can be the high doping semiconductor material, Si, and Ge, GaAs etc. are shown in 3 (b).
Bilevel electric conducting material can be identical also can be different.
3) be scattered in the chemical reagent carbon nano-tube is ultrasonic, prepare the solution of carbon nano-tube.
Carbon nano-tube herein can be a Single Walled Carbon Nanotube, and multi-walled carbon nano-tubes also can be the mixing of single-wall carbon tube and many walls carbon pipe.
With ultrasonic ethanol, acetone, n-hexane, isopropyl alcohol, the dimethyl formamide or 1 of being scattered in of carbon nano-tube, in the organic solutions such as 2-dichloroethanes, prepare the solution that contains carbon nano-tube.
4) in step 2) in the logical direct current or the alternating current between the two conductive layers up and down of deposit, apply direct current or alternating current up and down between the two conductive layers, the parameter area of the alternating current that applies is V
PP=1-20V, frequency 1-10MHZ.And the carbon nano-tube solution for preparing dripped between the upper and lower two conductive layers that will form interconnection structure, carbon nano-tube will polarize under effect of electric field, orientations according to electric field, and two ends can be taken on the two layers of conductive material densely, after removing electric field, the structure of formation is shown in Fig. 3 (c).
5) the deposit dielectric comes space between the filled with nanotubes on the vertical stratification of carbon nano-tube of having taken structure, after deposit is finished, forms the carbon nano-tube through-hole structure, thereby realizes the perpendicular interconnection between the upper and lower two layers of conductive material.
Above-mentioned insulating medium layer can be SiO
2, organic class, nitrating oxide or porousness low-K dielectric material.
More than by specific embodiment perpendicular interconnection method between the upper and lower two layers of conductive material provided by the present invention has been described, it will be understood by those of skill in the art that in the scope that does not break away from essence of the present invention, can make certain deformation or modification to the present invention; Its preparation method also is not limited to disclosed content among the embodiment.
Claims (7)
1. the perpendicular interconnection method between the upper and lower two layers of conductive material, its step comprises:
1) vertical stratification that preparation one comprises upper and lower two horizontal planes in substrate;
2) depositing conductive material on above-mentioned vertical stratification forms upper and lower two conductive layers;
3) the preparation carbon nano-tube solution drips to this carbon nano-tube solution on the above-mentioned vertical stratification, and apply direct current or alternating current between upper and lower conductive layer, and the two ends of carbon nano-tube closely are overlapped on the two layers of conductive material respectively;
4) deposit dielectric material forms the carbon nano-tube through-hole structure, thereby realizes the perpendicular interconnection between the upper and lower two layers of conductive material.
2. the method for claim 1 is characterized in that, in the described step 1), Si, Ge or GaAs semi-conducting material are adopted in described substrate.
3. the method for claim 1 is characterized in that, in step 2) before, deposit one insulating medium layer on described vertical stratification.
4. the method for claim 1 is characterized in that, described step 2) in, described electric conducting material is highly doped Si, Ge, GaAs or metal Ti/Au.
5. method as claimed in claim 4 is characterized in that, described step 2) in, it is described that upward conductive layer is different with the electric conducting material that lower conductiving layer is adopted.
6. the method for claim 1, it is characterized in that, in the described step 3), described carbon nano-tube solution is the organic solution that contains single wall, double-walled or multi-walled carbon nano-tubes tube bank, the solvent of this organic solution is ethanol, acetone, n-hexane, isopropyl alcohol, dimethyl formamide or 1, the 2-dichloroethanes.
7. the method for claim 1 is characterized in that, in the described step 4), described dielectric material is SiO
2Or porousness low-K dielectric material.
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| FR2956243B1 (en) * | 2010-02-11 | 2013-10-25 | Commissariat Energie Atomique | INTERCONNECTION STRUCTURE BASED ON REDIRECTED CARBON NANOTUBES |
| CN106981720B (en) * | 2017-01-12 | 2020-07-17 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Integrated TR subassembly of millimeter wave tile formula phased array antenna |
| JP6866227B2 (en) * | 2017-05-12 | 2021-04-28 | 日立造船株式会社 | Carbon Nanotube Complex and Its Manufacturing Method |
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| CN1856871A (en) * | 2003-08-25 | 2006-11-01 | 纳米传导公司 | System and method using self-assembled nano structures in the design and fabrication of an integrated circuit micro-cooler |
| CN101094901A (en) * | 2004-11-04 | 2007-12-26 | 皇家飞利浦电子股份有限公司 | Nanotube-based directionally-conductive adhesive |
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| CN1856871A (en) * | 2003-08-25 | 2006-11-01 | 纳米传导公司 | System and method using self-assembled nano structures in the design and fabrication of an integrated circuit micro-cooler |
| CN101094901A (en) * | 2004-11-04 | 2007-12-26 | 皇家飞利浦电子股份有限公司 | Nanotube-based directionally-conductive adhesive |
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