CN101558436A - Plasma display and driving method for plasma display panel - Google Patents
Plasma display and driving method for plasma display panel Download PDFInfo
- Publication number
- CN101558436A CN101558436A CNA2008800011066A CN200880001106A CN101558436A CN 101558436 A CN101558436 A CN 101558436A CN A2008800011066 A CNA2008800011066 A CN A2008800011066A CN 200880001106 A CN200880001106 A CN 200880001106A CN 101558436 A CN101558436 A CN 101558436A
- Authority
- CN
- China
- Prior art keywords
- voltage
- pulse
- electrode
- keeping
- discharge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
- G09G3/2942—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge with special waveforms to increase luminous efficiency
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
- G09G3/2965—Driving circuits for producing the waveforms applied to the driving electrodes using inductors for energy recovery
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
- G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/292—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
- G09G3/2922—Details of erasing
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/298—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels using surface discharge panels
Abstract
In a driving method for a plasma display panel provided with a plurality of discharge cells having a display electrode pair composed of a scanning electrode and a sustain electrode, a plurality of subfields having an initialization period, a writing period, and a sustain period are provided in one field period and at least two types of sustain pulses of a first sustain pulse which is the basis and a second sustain pulse whose rising edge is steeper than that of the first sustain pulse and whose trailing edge is easier than that of the first sustain pulse are applied to the scanning electrode in the sustain period. The second sustain pulse issequentially applied by a predetermined number of times immediately before an erase ramp waveform that allows the voltage to immediately drop when it rises from a base potential toward a predetermined potential (Vers) and reaches the predetermined potential (Vers) at the end of the sustain period.
Description
Technical field
The present invention relates to a kind of plasma display system of wall hung television and large-scale monitor and driving method of Plasmia indicating panel of being used for.
Background technology
The interchange surface discharge type panel that with Plasmia indicating panel (brief description is " panel ") is representative forms a plurality of discharge cells between the front panel of arranged opposite and backplate.Front panel forms on the glass substrate many to by 1 pair of scan electrode with to keep the show electrode that electrode constitutes right in front in parallel to each other, forms dielectric layer and protective seam, so that it is right to cover these show electrodes.Backplate forms a plurality of parallel data electrodes respectively on the glass substrate overleaf, covers the dielectric layer of these data electrodes and further parallel with data electrode a plurality of next doors thereon, forms phosphor layer on the surface of dielectric layer and the side in next door.And, make show electrode pair and data electrode crossings on different level ground arranged opposite front panel and backplate and sealing, enclose at the discharge space of inside and comprise the discharge gas that intrinsic standoff ratio for example is 5% xenon.Here, at show electrode to forming discharge cell with the opposed part of data electrode.In the panel of this structure, in each discharge cell, produce ultraviolet ray by gas discharge, make redness (R), green (G) and blue (B) fluorescent material excitation luminescence of all kinds by this ultraviolet ray, carry out colour and show.
As the method that drives panel, generally use a sub method, that is, will be divided into a plurality of sons field during 1 field (field), utilize the combination of luminous son field to carry out the method that gray scale shows.
During each son field has an initialization, write during and keep during.Initialization for causing discharge during initialization then forms the required wall electric charge of write activity on each electrode, and, be used to make (priming) particle that detonates (amorce=excitation particle of discharge usefulness) that writes discharge stability and take place.During writing, the discharge cell that will show is applied write pulse voltage selectively, form the wall electric charge (below this action being designated as " writing ") that writes discharge.And, during keeping, by to by scan electrode with keep the show electrode that electrode constitutes and keep pulse voltage to alternately applying, the discharge cell that is write discharge by generation is kept discharge, make the phosphor layer of corresponding discharge cell luminous, carry out image and show.
And, even if in a son method, also disclose a kind of driving method, carry out the initialization discharge by the voltage waveform that uses slow variation, further the discharge cell of keeping discharge is carried out initialization discharge selectively, do one's utmost to reduce and show irrelevant luminously, improve the contrast ratio with gray scale.
Specifically, in a plurality of son, make whole unit initialization action of whole discharge cell initialization for causing discharges during the initialization of 1 son, during only making keeping before just during initialization of other sons, keep the selection initialization action of the discharge cell initialization for causing discharge of discharge.By driving in this wise, depend on image and show that the brightness (brief description is " a shiny black degree ") of the black viewing area of irrelevant variations in light only becomes the Weak-luminescence in whole unit initialization action, can show (for example with reference to patent documentation 1) by the high image of degree of comparing.
And, the also so-called narrow wide elimination discharge of record (narrow width erasedischarge) in the above-mentioned patent documentation 1, the last pulse width of keeping pulse in making during keeping is shorter than the pulse width that other keep pulse, relax show electrode to the potential difference (PD) of wall charge generation.By this narrow wide elimination discharge, the write activity in can making during the writing of ensuing son is stable, realizes that contrast is than high plasma display system.
In recent years, the height along with panel becomes more meticulous the further granular of propelling discharge cell.Confirmed in the discharge cell of this granular, easily produced and lose the phenomenon wall electric charge, that be called electric charge omission (charge drop).Omit if this electric charge takes place, then produce discharge failure takes place, the image display quality worsens, and perhaps makes the required problem such as voltage rising that applies of discharge that takes place.
Discharge deviation when the one of the main reasons that the generation electric charge is omitted is write activity.For example, the discharge deviation during as if write activity is big, writes discharge strongly, and then at luminous discharge cell and non-luminous discharge cell adjacent, luminous discharge cell can be captured the wall electric charge from non-luminous discharge cell, electric charge takes place omit.
Therefore, omit in order to prevent electric charge, it as far as possible stably is important making and writing discharge.
In addition, advance further big pictureization, the height of panel to become more meticulous in recent years, accompany therewith, have the tendency of the driving impedance increase of panel.And, if driving impedance increases, then from the drive waveforms that the driving circuit of panel takes place, easily produce damped oscillation waveform distortions such as (ringing).The purpose of above-mentioned narrow wide elimination discharge is to make the write activity of ensuing son stable, but for example, if produce waveform distortion in the drive waveforms that is used for taking place this narrow wide elimination discharge, then has the strong anxiety that narrow wide elimination discharge itself takes place.At this moment, existence is difficult to make the ensuing problem that discharge stability takes place that writes.
Patent documentation 1:JP spy opens the 2000-242224 communique
Summary of the invention
Panel driving method of the present invention is to possess a plurality of driving methods that have by scan electrode and keep the panel of the right discharge cell of show electrode that electrode constitutes.It is characterized in that, in 1 field interval, be provided with during having initialization, write during and keep during a plurality of sons, in during keeping, scan electrode or side's electrode of keeping electrode applied to be become the 1st of benchmark and keeps pulse and Bi Di 1 and keep pulse and rise precipitous and keep pulse the 2nd at least 2 kinds of keeping pulse that descend slowly than the 1st and keep pulse.And, the drive waveforms voltage that puts on side's electrode comprise keep during in last drive waveforms voltage and be included in last drive waveforms voltage just before continuously configuration specified quantity the described the 2nd keep pulse.
Utilize this structure,, also can make to write the generation of discharge stability ground, can improve the image display quality of panel even in the panel that big pictureization, height become more meticulous.
And, in panel driving method of the present invention, it is characterized in that, in case last driving voltage waveform be during the initialization of at least 1 of 1 field interval in the precipitous and waveform voltage arrival regulation current potential that rises of gradient ratio the 1st tilt waveform voltage then the 2nd tilt waveform voltage of decline immediately.
And, in panel driving method of the present invention, it is characterized in that: rising or the decline of keeping pulse are that right interelectrode capacitance of show electrode and inductor resonance are realized, the 2nd the time between the decrement phase of pulse of keeping be interelectrode capacitance and inductor harmonic period half more than 1.1 times and less than harmonic period.
And, in panel driving method of the present invention, also can apply the 1st tilt waveform voltage, the 2nd tilt waveform voltage and the 2nd is kept pulse to scan electrode.
Description of drawings
Fig. 1 is the exploded perspective view of the structure of the panel in the expression embodiment of the present invention 1.
Fig. 2 is the electrode spread figure of this panel.
Fig. 3 is the driving voltage waveform figure that puts on each electrode of this panel.
Fig. 4 is the circuit module figure of the plasma display system in the embodiment of the present invention 1.
Fig. 5 is the circuit diagram of the scan electrode driving circuit in the embodiment of the present invention 1.
Fig. 6 is the circuit diagram of keeping electrode drive circuit in the embodiment of the present invention 1.
Fig. 7 is the sequential chart that is used for one of the action that the scan electrode driving circuit of embodiment of the present invention 1 is described and keeps electrode drive circuit example.
Fig. 8 is the sequential chart that is used for one of the action example of the scan electrode driving circuit during whole unit initialization of embodiment of the present invention 1.
Fig. 9 is the figure of another example of the driving voltage waveform in the expression embodiment of the present invention 1.
Figure 10 is the exemplary waveforms figure that keeps pulse waveform in the embodiment of the present invention 2.
Figure 11 A be the elimination ramp voltage of expression in the embodiment of the present invention 2 just before the synoptic diagram of the situation of keeping pulse that takes place, the pulse of keeping in during expression is kept adds up to situation more than 50.
Figure 11 B be the elimination ramp voltage of expression in the embodiment of the present invention 2 just before the synoptic diagram of the situation of keeping pulse that takes place, keep the pulse sum less than 50 situation in during expression is kept.
Figure 12 is the circuit module figure of the plasma display system in the embodiment of the present invention 3.
Figure 13 A is the exemplary waveforms figure that keeps pulse waveform in the expression embodiment of the present invention 3, represents that the rate of lighting is the situation more than 85%.
Figure 13 B is the exemplary waveforms figure that keep pulse waveform of expression in the embodiment of the present invention 3, and expression is lighted rate less than 85% situation.
Symbol description
1 plasma display system
10 panels
21 (glass) front panel
22 scan electrodes
23 keep electrode
24 show electrodes are right
25,33 dielectric layers
26 protective seams
31 backplates
32 data electrodes
34 next doors
35 phosphor layers
41 imaging signal processing circuits
42 data electrode driver circuits
43 scan electrode driving circuits (driving circuit)
44 keep electrode drive circuit
45 timing generating circuits
48 light the rate testing circuit
50,60 keep pulse generating circuit
51,61 electric energy recovery circuits
52,62 clamping circuits (clamp circuit)
53 waveform of initialization generation circuit
54 scanning impulse generation circuit
55 the 1st Miller (miller) integrating circuit
56 the 2nd Miller integrators
57 the 3rd Miller integrators
Q1, Q2, Q3, Q4, Q11, Q12, Q13, Q14, Q15, Q16, Q21, Q31, Q32, Q33, Q34, Q36, Q37, Q38, Q39, QH1～QHn, QL1～QLn on-off element
C1, C10, C11, C12, C21, C30, C31 capacitor
L1, the L31 inductor
D1, D2, D12, D13, D21, D31, D32, D33 diode
AG and door
The CP comparer
R10, R11, R12, R13, R14 resistance
Embodiment
Below, use the plasma display system in the description of drawings embodiment of the present invention.
(embodiment 1)
Fig. 1 is the exploded perspective view of structure of the panel 10 of expression embodiment of the present invention 1.On the front panel 21 of glass, form a plurality of by scan electrode 22 with keep show electrode that electrode 23 constitutes to 24.And, form dielectric layer 25 so that it covers scan electrode 22 and keeps electrode 23, on this dielectric layer 25, form protective seam 26.
And; in order to reduce the discharge ionization voltage in the discharge cell, protective seam 26 uses real achievement,, MgO that permanance good big with 2 electron emission coefficiencies when enclosing neon (Ne) and xenon (Xe) gas to form as the material of principal ingredient by having as panel material.
Form a plurality of data electrodes 32 overleaf on the plate 31, form dielectric layer 33 so that its covers data electrode 32, and form the next door 34 of well word shape thereon.And, luminous one-tenth red (R), green (G) and blue (B) phosphor layer 35 of all kinds are set on the side of next door 34 and the dielectric layer 33.
The small discharge space of this front panel 21 and backplate 31 clampings its according to show electrode to 24 and the data electrode 32 mode arranged opposite of intersecting, seal by encapsulants such as glass dust at its periphery.And, enclose the mixed gas of neon and xenon as discharge gas at the discharge space of inside.In addition, in the present embodiment, in order to improve luminescence efficiency, use is established the xenon dividing potential drop and is about 10% discharge gas.Discharge space separates into a plurality of zones by next door 34, show electrode to 24 and data electrode 32 part of intersecting form discharge cell.And, by the discharge of these discharge cells, luminously come display image.
In addition, the structure of panel 10 is not limited to above-mentioned structure, for example also can possess the next door of striated.In addition, the blending ratio of discharge gas also is not limited to above-mentioned numerical value, also other blending ratio.
Fig. 2 is the electrode spread figure of the panel 10 in the embodiment of the present invention 1.On panel 10, arrange and to follow the long n bar scan electrode SC1～SCn (scan electrode 22 of Fig. 1) of direction and n bar and keep electrode SU1～SUn (Fig. 1 keep electrode 23), arrange along the long m bar data electrode D1～Dm (data electrode 32 of Fig. 1) of column direction.And, 1 couple scan electrode SCi (i=1～n) and keep electrode SUi and 1 data electrode Dj (part of j=1～m) intersect forms discharge cell, forms m * n discharge cell in discharge space.In addition, as shown in Figure 1 and Figure 2, owing to form scan electrode SCi and keep electrode SUi parallel to each other in pairs, so at scan electrode SC1～SCn with keep and have big interelectrode capacitance Cp between electrode SU1～SUn.
Below, illustrate to be used to drive the driving voltage waveform of panel 10 and the summary of its action.Plasma display system in the present embodiment by son method, promptly, 1 field interval is divided into a plurality of sons, control the luminous and not luminous of each discharge cell in each son, carry out the gray scale demonstration.During each height field has an initialization, write during and keep during.
In each son field, initialization for causing discharge during initialization forms the ensuing required wall electric charge of discharge that writes on each electrode.Outside, have the action that is used to reduce discharge delay, makes the particle that detonates (amorce=excitation particle of discharge usefulness) that writes discharge stability and take place.At this moment in the initialization action, comprising: whole unit initialization action of initialization for causing discharge in whole discharge cells; With the discharge cell of only keeping discharge in the son before just the selection initialization action of initialization for causing discharge selectively.
During writing, write discharge selectively by luminous discharge cell in during should ensuingly in the back keeping, form the wall electric charge.And, during keeping, show electrode is alternately applied the pulse of keeping that quantity is directly proportional with luminance weights to 24, keep discharge and luminous by the discharge cell that writes discharge.At this moment proportionality constant is called " brightness multiplying power ".
In the present embodiment, by 10 sons (1SF, 2SF ..., 10SF) constitute 1 field, each son field for example has the luminance weights of (1,2,3,6,11,18,30,44,60,80) respectively.And, during the initialization of 1SF, carry out whole unit initialization action, during the initialization of 2SF～10SF, select initialization action.Thus, show irrelevant luminous only luminous for the discharge of following the whole unit initialization action among the 1SF with image, do not keep the black viewing area of discharge brightness, be shiny black degree only for the Weak-luminescence in whole unit initialization action, can show by the high image of degree of comparing.And, during the keeping of each son, show electrode be multiply by the number of sustain pulses of regulation brightness multiplying power to each luminance weights that applies each son of 24.
, the luminance weights that present embodiment also can constitute sub-number of fields or each son field is not limited to above-mentioned value, and, according to sub-field structures of switching such as picture signals.
In addition, in the present embodiment, the last run-off the straight waveform voltage during keeping, thus, the write activity in making during the writing of ensuing son is stable.Below, the summary of driving voltage waveform at first is described, the structure of driving circuit then is described.
Fig. 3 is the driving voltage waveform figure that puts on each electrode of the panel 10 in the embodiment of the present invention 1.In Fig. 3, the driving voltage waveform of 2 sons is shown, promptly carries out the son (below be called " all initial beggar field, unit ") of whole unit initialization action and select the son field (below be called " selecting initial beggar field ") of initialization action.And the driving voltage waveform in other son fields is also roughly the same.And, following scan electrode SCi, keep electrode SUi, data electrode Dk and represent from each electrode the electrode selected according to view data.
At first, all 1SF of initial beggar fields, unit of conduct are described.
First half during the initialization of 1SF is to data electrode D1～Dm, keep electrode SU1～SUn and apply 0 (V) respectively.And, scan electrode SC1～SCn is applied the 1st tilt waveform voltage (below be called " up ramp voltage ") of slow rising.This up ramp voltage is to be the voltage that the voltage Vi1 below the discharge ionization voltage slowly rises to the voltage Vi2 that surpasses discharge ionization voltage from voltage scanning electrode SC1～SCn with the voltage difference of keeping electrode SU1～SUn.
In addition, in the present embodiment, the gradient that makes this up ramp voltage be about 1.3V/ μ sec takes place.
This up ramp voltage rise during, at scan electrode SC1～SCn with keep and continue to produce faint initialization discharge between electrode SU1～SUn, scan electrode SC1～SCn and the data electrode D1～Dm respectively.And, in the negative wall voltage of scan electrode SC1～SCn top savings, simultaneously, on data electrode D1～Dm top and keep electrode SU1～positive wall voltage of SUn top savings.The wall voltage on so-called this electrode top, expression by savings on the dielectric layer of coated electrode, on the protective seam, the voltage of the first-class wall charge generation of phosphor layer.
Latter half of during initialization, apply positive voltage Ve1 to keeping electrode SU1～SUn, data electrode D1～Dm is applied 0 (V).And, scan electrode SC1～SCn is applied the tilt waveform voltage (below be called " descending ramp voltage ") of slow decline.This decline ramp voltage is to be the voltage Vi3 below the discharge ionization voltage, the voltage that slowly descends to the voltage Vi4 that surpasses discharge ionization voltage from scan electrode SC1～SCn and the voltage difference of keeping electrode SU1～SUn.During this period, scan electrode SC1～SCn with keep electrode SU1～SUn, and scan electrode SC1～SCn and data electrode D1～Dm between continue the faint initialization of generation respectively and discharge.And, weaken the negative wall voltage on scan electrode SC1～SCn top and keep the positive wall voltage on electrode SU1～SUn top, the positive wall voltage on data electrode D1～Dm top is adjusted into the value that is suitable for write activity.As mentioned above, whole discharge cells is carried out whole unit initialization action end of initialization discharge.
In addition, shown in during the initialization of the 2SF of Fig. 3, also can apply the driving voltage waveform of omitting the first half during the initialization to each electrode.That is, apply voltage Ve1 to keeping electrode SU1～SUn respectively, data electrode D1～Dm is applied 0 (V), scan electrode SC1～SCn is applied the descending ramp voltage that slowly descends to voltage Vi4 from voltage Vi3 '.Thus, during the keeping of last son, cause that the faint initialization of generations is discharged in the discharge cell of keeping discharge, weaken scan electrode SCi top and keep the wall voltage on electrode SUi top.And, in that (in the discharge cell of the positive wall voltage that the top savings of k=1～m) is enough, the unnecessary part of this wall voltage of discharging is adjusted to the wall voltage that is suitable for write activity at data electrode Dk by the discharge of keeping before just.In addition, do not discharge with regard to produce the discharge cell of keeping discharge in last son field with regard to, the wall electric charge former state that remains on when finishing during the initialization of last son keeps.Omit the initialization action of first half like this, become the selection initialization action that the discharge cell of keeping action during the son field before just kept carries out the initialization discharge.
Then during writing, at first apply voltage Ve2, scan electrode SC1～SCn is applied voltage Vc keeping electrode SU1～SUn.
And when the scan electrode SC1 to the 1st row applied negative scan pulse voltage Va, (k=1～m) applied the positive pulse voltage Vd that writes to the data electrode Dk that answers the luminous discharge cell of the 1st row among data electrode D1～Dm.At this moment, data electrode Dk go up and scan electrode SC1 on the voltage difference of cross part be that poor (Vd-Va) that the outside applies voltage adds the poor of wall voltage on the data electrode Dk and the wall voltage on the scan electrode SC1, above discharge ionization voltage.Thus, between data electrode Dk and scan electrode SC1, discharge.And, owing to apply voltage Ve2 to keeping electrode SU1～SUn, thus keep that electrode SU1 goes up and scan electrode SC1 on voltage difference be the outside apply voltage poor, promptly (Ve2-Va) add the poor of the wall voltage kept on the electrode SU1 and the wall voltage on the scan electrode SC1.At this moment, by voltage Ve2 is set at the magnitude of voltage that is lower than the discharge ionization voltage degree slightly, can make to keep becomes the state that is unlikely to discharge but easily takes place to discharge between electrode SU1 and the scan electrode SC1.Thus, can make between data electrode Dk and scan electrode SC 1 discharge that takes place become inducement, discharge the keeping between electrode SU1 and the scan electrode SC1 of zone of intersecting with data electrode Dk.Like this, produce in answering luminous discharge cell and write discharge, the positive wall voltage of savings on scan electrode SC1 is being kept the negative wall voltage of savings on the electrode SU1, also puts aside negative wall voltage on data electrode Dk.
Like this, write discharge, carry out the write activity of savings wall voltage on each electrode by the luminous discharge cell of the 1st row is produced.In addition, be not no more than discharge ionization voltage owing to apply the voltage of the cross part of the data electrode D1～Dm that writes pulse voltage Vd and scan electrode SC1, so do not write discharge.Carrying out above-mentioned write activity finishes during reaching the capable discharge cell of n, writing.
Then during keeping, at first scan electrode SC1～SCn is applied positive keep pulse voltage Vs in, to keeping earthing potential that electrode SU1～SUn applies becomes reference potential, i.e. 0 (V).So, write in the discharge cell of discharge in generation, scan electrode SCi go up and keep voltage difference on the electrode SUi be keep pulse voltage Vs add on the scan electrode SCi wall voltage with keep the poor of wall voltage on the electrode SUi, surpass discharge ionization voltage.
And, at scan electrode SCi with keep between the electrode SUi to produce and keep discharge, utilizing the ultraviolet ray that at this moment takes place, phosphor layer 35 is luminous.And the negative wall voltage of savings is being kept the positive wall voltage of savings on the electrode SUi on scan electrode SCi.And, on data electrode Dk, also put aside positive wall voltage.During writing, do not produce and do not keep discharge in the discharge cell that writes discharge, the wall voltage when finishing during the maintenance initialization.
Then, respectively scan electrode SC1～SCn is applied 0 (V) that becomes reference potential, apply and keep pulse voltage Vs keeping electrode SU1～SUn.So, keep in the discharge cell of discharge in generation, because keep that electrode SUi goes up and scan electrode SCi on voltage difference above discharge ionization voltage, so keep discharge keeping between electrode SUi and the scan electrode SCi to produce once more, keeping the negative wall voltage of savings on the electrode SUi, the positive wall of savings on scan electrode SCi.Similarly later on, by to scan electrode SC1～SCn with keep electrode SU1～SUn and alternately apply luminance weights be multiply by number of sustain pulses after the brightness multiplying power, between show electrode is to 24 electrode, provide potential difference (PD), during writing, produce and continue in the discharge cell that writes discharge to carry out to keep discharge.
And, during keeping, at last scan electrode SC 1～SCn is applied the 2nd tilt waveform voltage that slowly rises to voltage Vers from 0 (V) that becomes reference potential (below be called " elimination ramp voltage ").Thus, faint discharge continue taking place, under the residual state of the positive wall voltage on the data electrode Dk, eliminates scan electrode SCi and keep part or all of wall voltage on the electrode SUi.
Particularly, after keeping electrode SU1～SUn and returning to 0 (V), for example the gradient with about 10V/ μ sec takes place promptly to eliminate ramp voltage from 0 (V) that becomes reference potential to the 2nd tilt waveform voltage that the voltage Vers that surpasses discharge ionization voltage rises, and puts on scan electrode SC1～SCn.Here, eliminating ramp voltage is that to liken to be the also precipitous gradient of up ramp voltage of the 1st tilt waveform voltage.So, keep in generation discharge discharge cell keep the faint discharge of generation between electrode SUi and the scan electrode SCi.And, this faint discharge to scan electrode SC1～SCn apply that voltage rises during continue to take place.And if the voltage that rises arrives the voltage Vers as the regulation current potential, the voltage that puts on scan electrode SC1～SCn is dropped to becomes 0 (V) of reference potential.Promptly, the 1st tilt waveform voltage that slowly rises takes place at least during the initialization of 1 of 1 field interval, if last generation gradient ratio the 1st tilt waveform voltage during keeping is precipitous and the waveform voltage that rises arrives assigned voltage then the 2nd tilt waveform voltage that descends immediately.
At this moment, the charged particle that takes place because of this faint discharge becomes the wall electric charge, puts aside all the time and is keeping on electrode SUi and the scan electrode SCi, keeps voltage difference between electrode SUi and the scan electrode SCi with mitigation.Thus, under the residual state of the positive wall electric charge on the data electrode Dk, scan electrode SC1～SCn is last and keep the wall voltage of electrode SU1～SUn between last and weaken to poor, the i.e. degree of (voltage Vers-discharge ionization voltage) that put on voltage on the scan electrode SCi and discharge ionization voltage.Below, will be called " eliminating discharge " by this last discharge of eliminating during the keeping that ramp voltage takes place.
In addition, in the present embodiment, arrive voltage Vers, then drop to 0 (V) that becomes reference potential immediately in case constitute the voltage that puts on scan electrode SC1～SCn.This be because according to experimental verification after the voltage that rises arrives voltage Vers, if it is constant to keep this voltage, paradoxical discharge then easily takes place in the discharge cell of 3 conditions below conforming with.That is,
(1) oneself is non-luminous discharge cell (discharge cell that in this child field, does not write).
(2) make the luminous discharge cell of adjacent cells (discharge cell that in this child field, does not write).
(3) keep discharge in the own son field before just.
Owing to misplace electricity during this paradoxical discharge brings out during ensuing the writing, so paradoxical discharge does not preferably take place as far as possible.Therefore, in the present embodiment, constitute when taking place to eliminate ramp voltage, the voltage that puts on scan electrode SC1～SCn arrives after the voltage Vers, drops to 0 (V) that becomes reference potential immediately.As a result, but frontier defense ends the generation of this paradoxical discharge, and the best wall voltage of adjusting in the discharge cell in limit is stably to carry out ensuing write activity.
Then because action the keeping the umber of pulse during keeping of son, with above-mentioned action much at one, so omit explanation.Above-mentioned is the summary of driving voltage waveform that puts on each electrode of the panel 10 in the present embodiment.
In addition, in the present embodiment, the magnitude of voltage of voltage Vers is set at keeps pulse voltage Vs+3 (V), about 213 (V) for example, to keep pulse voltage Vs-10 (V) above and keep the following voltage range of pulse voltage Vs+10 (V) but preferably the magnitude of voltage of voltage Vers is set in here.Because if the magnitude of voltage that makes voltage Vers is greater than its higher limit, then the adjustment of wall voltage become unnecessary, and, if less than lower limit, the adjustment deficiency of wall voltage then, the anxiety of ensuing write activity can not be stably carried out in existence respectively.
And, in the present embodiment, the structure that makes the gradient of eliminating ramp voltage be about 10V/ μ sec has been described, but preferably this gradient is set in more than the 2V/ μ sec and below the 20V/ μ sec.Because exist if make this higher limit of gradient ratio also precipitous, the discharge that then is used to adjust wall voltage does not become faint discharge, and if make this lower limit of gradient ratio also slow, then discharge itself is too faint, the anxiety that the adjustment of each wall voltage can not be carried out smoothly.
Below, the structure of the plasma display system in the present embodiment is described.Fig. 4 is the circuit module figure of the plasma display system in the embodiment of the present invention 1.Plasma display system 1 possesses panel 10, imaging signal processing circuit 41, data electrode driver circuit 42, scan electrode driving circuit 43, keep electrode drive circuit 44, timing generating circuit 45 and supply with the power circuit (not shown) of the required power supply of each circuit module.
Imaging signal processing circuit 41 converts the picture signal sig of input to expression each son luminous and non-luminous view data.Data electrode driver circuit 42 converts view data of each son to corresponding to each data electrode D1～Dm signal, drives each data electrode D1～Dm.
The various timing signals of the action of each circuit module of control take place to be output as the basis from horizontal-drive signal H and vertical synchronizing signal V in timing timing generating circuit 45, offer each circuit module.And, as mentioned above, in the present embodiment, constitute the last elimination ramp voltage that takes place during keeping, corresponding with it timing signal is outputed to scan electrode driving circuit 43 and keeps electrode drive circuit 44.Thus, realize stable initialization discharge, make the write activity stabilization.
Scan electrode driving circuit 43 has waveform of initialization generation circuit (not shown), keeps pulse generating circuit (not shown) and scanning impulse generation circuit (not shown).Here, waveform of initialization generation circuit puts on the waveform of initialization voltage of scan electrode SC1～SCn during initialization.And, keep pulse generating circuit puts on scan electrode SC1～SCn during keeping the pulse of keeping.And scanning impulse generation circuit puts on the scan pulse voltage of scan electrode SC1～SCn during writing.And scan electrode driving circuit 43 drives each scan electrode SC1～SCn respectively according to timing signal.Keep electrode drive circuit 44 and possess the circuit of keeping pulse generating circuit (not shown) and being used to take place voltage Ve1, voltage Ve2, drive according to timing signal and keep electrode SU1～SUn.
Below, scan electrode driving circuit 43 is described.Fig. 5 is the circuit diagram of the scan electrode driving circuit 43 in the embodiment of the present invention 1.Scan electrode driving circuit 43 possesses the waveform of initialization generation circuit 53 of keeping pulse generating circuit 50, initialization for causing waveform of the pulse kept, the scanning impulse generation circuit 54 of generation scanning impulse.In addition, in Fig. 5, the separation circuit that has used on-off element Q12 is shown and has used the separation circuit of on-off element Q13.And, in the following description, the action that on-off element is connected is expressed as " conducting (ON) ", the action of cutting off is expressed as " disconnecting (OFF) ", the signal that makes the on-off element conducting is expressed as " Hi ", the signal that on-off element is disconnected is expressed as " Lo ".
Keep pulse generating circuit 50 and possess electric energy recovery circuit 51 and clamping circuit 52.Electric energy recovery circuit 51 has electric energy and reclaims electricity consumption container C 1, on-off element Q1, on-off element Q2, anti-adverse current diode D1, anti-adverse current diode D2, resonance inductor L1.In addition, electric energy reclaims electricity consumption container C 1 and has the electric capacity more much bigger than interelectrode capacitance Cp, charge to half about Vs/2 of magnitude of voltage Vs, with power work as electric energy recovery circuit 51, clamping circuit 52 have be used for scan electrode SC1～SCn clamper at the on-off element Q3 of voltage Vs, be used for the on-off element Q4 of scan electrode SC1～SCn clamper at 0 (V).And, switch each on-off element according to timing signal from timing generating circuit 45 outputs, keep pulse voltage Vs.
In keeping pulse generating circuit 50, for example when keeping the pulse waveform rising, make on-off element Q1 conducting, make interelectrode capacitance Cp and inductor L1 resonance, reclaim electricity consumption container C 1 from electric energy and power to scan electrode SC1～SCn by on-off element Q1, diode D1, inductor L1.And, when the voltage of scan electrode SC1～SCn is near voltage Vs, make on-off element Q3 conducting, with scan electrode SC1～SCn clamper at voltage Vs.In addition, even if on-off element Q12 disconnects, in MOSFET, also the part reverse parallel connection ground that carries out switch motion is generated the parasitic diode that is called body diode (body diode).Here, so-called reverse parallel connection is in parallel with the part of carrying out switch motion and become forward in the opposite direction with the electric current side of flowing through because of switch motion.As a result, if make on-off element Q3 conducting, then through this body diode, with scan electrode SC1～SCn clamper at voltage Vs.
On the contrary, when keeping pulse waveform decline, make on-off element Q2 conducting, make interelectrode capacitance Cp and inductor L1 resonance, reclaim electric energy to electric energy from interelectrode capacitance Cp by inductor L1, diode D2, on-off element Q2 and reclaim electricity consumption container C 1.And, when the voltage of scan electrode SC1～SCn is near 0 (V), make on-off element Q4 conducting, with scan electrode SC1～SCn clamper at 0 (V).
And, in the present embodiment, constitute outside the tilt waveform generation circuit of the up ramp voltage when being used for the initialization for causing action, also be provided for eliminating the tilt waveform generation circuit of ramp voltage.Specifically, waveform of initialization generation circuit 53 possesses the 1st Miller integrator the 55, the 2nd Miller integrator 56 and the 3rd Miller integrator 57.Here, the 1st Miller integrator 55 has on-off element Q11, capacitor C10 and resistance R 10, is the 1st tilt waveform generation circuit that oblique line shape ground slowly rises to the up ramp voltage of voltage Vi2 takes place.And the 2nd Miller integrator 56 has on-off element Q15, capacitor C11 and resistance R 12, is the 2nd tilt waveform generation circuit that oblique line shape ground slowly rises to the elimination ramp voltage of voltage Vers takes place.And the 3rd Miller integrator 57 has on-off element Q14, capacitor C12 and resistance R 11, is the 3rd tilt waveform generation circuit that oblique line shape ground slowly drops to the descending ramp voltage of voltage Vi4 takes place.In addition, in Fig. 5, each input terminal of Miller integrator is expressed as input terminal INa, input terminal INb, input terminal INc.
And, in the present embodiment, voltage when eliminating the ramp voltage generation in order to make rises and stops accurately with voltage Vers, has on-off circuit, it relatively eliminates ramp voltage and voltage Vers, arrive voltage Vers if eliminate ramp voltage, the action of the 2nd Miller integrator that the elimination ramp voltage takes place is stopped.Specifically, possess anti-adverse current with diode D13, be used to adjust the magnitude of voltage of voltage Vers resistance R 13, be used for arriving voltage Vers and then make the input terminal INc of the 2nd Miller integrator 56 be made as on-off element Q16, protecting diode D12, the resistance R 14 of " Lo " from the voltage of waveform of initialization generation circuit 53 outputs.
On-off element Q16 is made of NPN transistor commonly used, base stage is connected in the output of waveform of initialization generation circuit 53, collector is connected in the input terminal INc of the 2nd Miller integrator 56, and resistance R 13, the diode D13 through being connected in series is connected in voltage Vs with emitter.Arrive voltage Vers from the voltage of waveform of initialization generation circuit 53 outputs then make on-off element Q16 conducting if the resistance value of resistance R 13 is set at, therefore, if arrive voltage Vers, then on-off element Q16 conducting from the voltage of waveform of initialization generation circuit 53 outputs.So in order to make the action of the 2nd Miller integrator 56, because the electric current drainage that will be input to input terminal INc is to on-off element Q16, therefore the 2nd Miller integrator 56 stops action.
Usually, Miller integrator is in the gradient of the oblique wave that takes place, and is subject to the influence of deviation of the element of the circuit of formation own.Therefore, if only generate waveform during the action of Miller integrator, then the maximum voltage value of oblique wave easily produces deviation.In addition, in the present embodiment, the maximum voltage value of confirming preferably will to eliminate ramp voltage be converged in target voltage values ± 3 (V) in, by the structure in the use present embodiment, can be converged in target voltage values ± scope about 1 (V) in, can eliminate ramp voltage accurately.
In addition, preferably voltage Vers ' is set at the magnitude of voltage that is higher than voltage Vers, in the present embodiment, voltage Vers ' is set at voltage Vs+30 (V).And, in the present embodiment, set the resistance value of resistance R 13, so that voltage Vers becomes voltage Vs+3 (V), particularly, resistance R 13 is set at 100 Ω, voltage Vs is set at 210 (V), resistance R 14 is set at 1k Ω.But these values are no more than the value of setting according to 42 inches panels of show electrode logarithm 1080, need only the specification according to panel characteristics, plasma display system, set best to get final product.
And above-mentioned waveform of initialization voltage takes place or eliminates ramp voltage according to the timing signal from timing generating circuit 45 outputs in waveform of initialization generation circuit 53.
For example, during up ramp voltage in the initialization for causing waveform, the steady current of assigned voltage (for example 15 (V)) is input to input terminal INa, makes input terminal INa become " Hi ".Thus, steady current flows to capacitor C10 from resistance R 10, and the source voltage of on-off element Q11 rises with oblique line shape, and the output voltage of scan electrode driving circuit 43 also begins to rise with oblique line shape.
And, when whole unit initialization action taking place and select descending ramp voltage in the waveform of initialization of initialization action, the steady current of assigned voltage (for example 15 (V)) is input to input terminal INb, make input terminal INb become " Hi ".So steady current flows to capacitor C12 from resistance R 11, the drain voltage of on-off element Q14 descends with oblique line shape, and the output voltage of scan electrode driving circuit 43 also begins to descend with oblique line shape.
And, when ramp voltage is eliminated in the last generation during keeping, the steady current of assigned voltage is input to input terminal INc, make input terminal INc become " Hi ".Thus, steady current flows to capacitor C11 from resistance R 12, and the source voltage of on-off element Q15 rises with oblique line shape, and the output voltage of scan electrode driving circuit 43 also begins oblique line shape ground and rises.In addition, in the present embodiment, make the resistance value of the resistance value of resistance R 12, thus, make the up ramp voltage precipitous back elimination ramp voltage that take place as 2nd tilt waveform voltage of gradient ratio as the 1st tilt waveform voltage less than resistance R 10.
And if slowly rise, be higher than voltage Vers from the driving voltage waveform of waveform of initialization generation circuit 53 outputs, then on-off element Q16 conducting, the steady current drainage that is input to input terminal INc are to on-off element Q16, and the 2nd Miller integration electricity 56 stops action.Thus, the driving voltage waveform from 53 outputs of waveform of initialization generation circuit drops to 0 (V) that becomes reference potential immediately.Like this, in the present embodiment, the voltage when adopting voltage Vers as the regulation current potential to stop to eliminate ramp voltage accurately to take place rises, and afterwards, drops to 0 (V) that becomes reference potential immediately.
Scanning impulse generation circuit 54 possesses on-off circuit OUT1～OUTn, on-off element Q21, control circuit IC1～ICn and diode D21 and capacitor C21.Here, on-off circuit OUT1～OUTn exports scan pulse voltage each of scan electrode SC1～SCn to.And, on-off element Q21 with the low voltage side clamper of on-off circuit OUT1～OUTn at voltage Va.And, control circuit IC1～ICn gauge tap circuit OUT1～OUTn.And will superpose on the voltage Va voltage Vc of voltage Vscn of diode D21 and capacitor C21 puts on the high-voltage side of on-off circuit OUT1～OUTn.And each of on-off circuit OUT1～OUTn possesses the on-off element QH1～QHn that is used for output voltage V c and is used for on-off element QL1～QLn of output voltage V a.And, according to timing signal, during writing, put on the scan pulse voltage Va of scan electrode SC1～SCn successively from timing generating circuit 45 outputs.In addition, scanning impulse generation circuit 54 is still exported the voltage waveform of waveform of initialization generation circuit 53 during initialization, and the voltage waveform of pulse generating circuit 50 is kept in former state output during keeping.
In addition,, use a plurality of FET, IGBT etc., impedance is reduced so in these on-off elements, be connected in parallel because very large electric current flows through on-off element Q3, on-off element Q4, on-off element Q12, on-off element Q13.
And, scanning impulse generation circuit 54 possess carry out logic and operation with door AG and relatively be input to the comparator C P of the input signal size of 2 input terminals.Comparator C P compares voltage (Va+Vset2) and the driving voltage waveform of the voltage Vset2 that superposeed on voltage Va, when driving voltage waveform one side is higher than voltage (Va+Vset2), and output " 0 ", otherwise output " 1 ".To importing 2 input signals, be output signal CEL1 and the switching signal CEL2 of comparator C P with door AG.As switching signal CEL2, for example can use from the timing signal of timing generating circuit 45 outputs.And, when all being " 1 ", exports arbitrary input signal " 1 " with door AG, situation output " 0 " in addition.To be input to control circuit IC1～ICn with the output of door AG, if be output as " 0 " with door AG, then through on-off element QL1～QLn outputting drive voltage waveform, if be output as " 1 ", then export the voltage Vc of the voltage Vscn that on voltage Va, superposeed through on-off element QH1～QHn with door AG.
In addition, in the present embodiment, adopt the Miller integrator that has used FET practical, relatively simple for structure in the 1st tilt waveform generation circuit, the 2nd tilt waveform generation circuit, the 3rd tilt waveform generation circuit., tilt waveform generation circuit all is not limited to this structure, so long as the circuit of up ramp voltage and descending ramp voltage can take place, any circuit can be as tilt waveform generation circuit.
Below, illustrate and keep electrode drive circuit 44.Fig. 6 is the circuit diagram of keeping electrode drive circuit 44 in the embodiment of the present invention 1.In addition, in Fig. 6, the interelectrode capacitance of panel 10 is expressed as Cp.
Keep electrode drive circuit 44 keep pulse generating circuit 60 be with scan electrode driving circuit 43 keep pulse generating circuit 50 structure much at one.Promptly keeping pulse generating circuit 60 possesses and is used for recycling and drives the electric energy recovery circuit 61 of the electric energy when keeping electrode SU1～SUn and be used for and will keep the clamping circuit 62 of electrode SU1～SUn clamper at voltage Vs and 0 (V).And, keep pulse generating circuit 60 and be connected in one of the interelectrode capacitance Cp end of panel 10, promptly keep electrode SU1～SUn.
Electric energy recovery circuit 61 has electric energy and reclaims electricity consumption container C 30, on-off element Q31, on-off element Q32, anti-adverse current diode D31, anti-adverse current diode D32, resonance inductor L30.And, make interelectrode capacitance Cp and inductor L30 carry out LC resonance, realize keeping the rising and the decline of pulse.Clamping circuit 62 has and is used for and will keeps the on-off element Q33 of electrode SU1～SUn clamper at voltage Vs, be used for and will keep the on-off element Q34 of electrode SU1～SUn clamper at voltage 0 (V).And, will keep electrode SU1～SUn through on-off element Q33 and be connected in power supply VS, clamper is at voltage Vs, makes through on-off element Q34 and keeps electrode SU1～SUn ground connection, and clamper is at 0 (V).
And, keep electrode drive circuit 44 and possess power supply VE1 and on-off element Q36, on-off element Q37, power supply Δ VE, anti-adverse current diode D33, capacitor C31 and on-off element Q38, on-off element Q39.Here, voltage Ve1 takes place in power supply VE1, voltage Ve1 is put on keep electrode SU1～SUn.Voltage Δ Ve takes place in power supply Δ VE.And, keeping electrode drive circuit 44 and possess (pump up) the electricity consumption container C 31 of boosting, the voltage Δ Ve that adds up on voltage Ve1 is as voltage Ve2.
For example, the moment that applies voltage Ve1 shown in Figure 3, make on-off element Q36, on-off element Q37 conducting, apply positive voltage Ve1 through diode D33, on-off element Q36, on-off element Q37 to keeping electrode SU1～SUn.In addition, at this moment make on-off element Q38 conducting, charge so that the voltage of capacitor 31 becomes voltage Ve1.And, in the moment that applies voltage Ve2 shown in Figure 3, under the state that makes on-off element Q36, on-off element Q37 conducting, make on-off element Q39 conducting when on-off element Q38 is disconnected.Thus, superimposed voltage Δ Ve on the voltage of capacitor C31 applies voltage (Ve1+ Δ Ve), is voltage Ve2 keeping electrode SU1～SUn.At this moment, by of the action of anti-adverse current, cut off from the electric current of capacitor C31 to power supply VE1 with diode D33.
Below, the details of the driving voltage waveform during keeping is described.Fig. 7 is the sequential chart that is used for one of action of the scan electrode driving circuit 43 of embodiment of the present invention 1 being described and keeping electrode drive circuit 44 example, is the detailed sequential chart of Fig. 3 with dashed lines part of surrounding.At first, 1 cycle of keeping the cycle repeatedly of pulse is divided into during 6 that represent with T1～T6, illustrates during each.So-called this cycle repeatedly is to put on the right interval of keeping pulse of show electrode during keeping repeatedly, for example, expression by during T1～T6 cycle repeatedly.In addition, in Fig. 7, use anodal waveform to describe, but the invention is not restricted to this.For example, though the omission of the example of the embodiment in the negative pole waveform, even if the negative pole waveform also can obtain same effect.That is, by show as in the anodal waveform that will the following describes " rising " during in the negative pole waveform, change and read to be " decline ", will in anodal waveform, show as " decline " during in the negative pole waveform, change and read to be " rising ", can obtain same effect thus.And, in the accompanying drawings the signal of on-off element conducting will be expressed as " ON ", the signal of disconnection is expressed as " OFF ".
(during T1)
Make on-off element Q2 conducting at moment t1.So the electric charge of scan electrode SC1～SCn side begins to flow to capacitor C1 by inductor L1, diode D2, on-off element Q2, the voltage of scan electrode SC1～SCn begins to descend.Because inductor L1 and interelectrode capacitance Cp form resonant circuit, so the moment t2 behind 1/2 effluxion of harmonic period, the voltage of scan electrode SC1～SCn drops near 0 (V)., the energy loss that causes because of resistance components of resonant circuit etc. is not so the voltage of scan electrode SC1～SCn can be reduced to 0 (V).In addition, during this period, on-off element Q34 keeps conducting.
(during T2)
And, make on-off element Q4 conducting at moment t2.So scan electrode SC1～SCn is by the direct ground connection of on-off element Q4, the voltage of scan electrode SC1～SCn drops to 0 (V) forcibly.
And, make on-off element Q31 conducting at moment t2.So electric current reclaims electricity consumption container C 30 from electric energy to begin to flow by on-off element Q31, diode D31, inductor L30.The voltage of keeping electrode SU1～SUn begins to rise.Because inductor L30 and interelectrode capacitance Cp form resonant circuit, so moment t3 after process 1/2 time of harmonic period, the voltage of keeping electrode SU1～SUn rises near the voltage Vs, but the energy loss because of resistance components of resonant circuit etc. causes can not rise to voltage Vs so keep the voltage of electrode SU1～SUn.
(during T3)
And, make on-off element Q33 conducting at moment t3.So, be directly connected in power supply VS owing to keep electrode SU1～SUn by on-off element Q33, rise to voltage Vs forcibly so keep the voltage of electrode SU1～SUn.So, writing in the discharge cell of discharge in generation, the voltage that scan electrode SCi-keeps between electrode SUi surpasses discharge ionization voltage, keeps discharge.
(during T4～T6)
Because putting on the pulse of keeping of scan electrode SC1～SCn is identical waveform with putting on the pulse of keeping of keeping electrode SU1～SUn, from during T4 to during T6 action, with from during T1 to during the action of T3 transposing driven sweep electrode SC1～SCn and the action of keeping electrode SU1～SUn equate, so the omission explanation.
In addition, as long as on-off element Q2 is after the moment t2, constantly disconnect till the t5, on-off element Q31 if after the moment t3, disconnection till the t4 constantly.And as long as on-off element Q32 is after the moment t5, disconnect till the next t2 constantly, on-off element Q1 if after the moment t6, disconnection till the next t1 constantly.And, in order to reduce the output impedance of keeping pulse generating circuit 50,60, preferably on-off element Q34 moment t2 just before, on-off element Q3 moment t1 just before disconnect, preferably on-off element Q4 moment t5 just before, on-off element Q33 moment t4 just before disconnect.
During keeping, according to essential umber of pulse, carry out repeatedly above during the action of T1～T6.Like this, will be indexed to the current potential of keeping discharge from 0 (V) that becomes reference potential, be voltage Vs keep pulse voltage alternately put on show electrode to 24 each, make discharge cell keep discharge.
Below, the action when ramp voltage is eliminated in last generation during keeping is described.
(during T7)
Be to put between the decrement phase of keeping pulse of keeping electrode SU1～SUn during this period, with during T4 identical.That is, by moment T7 just before on-off element Q33 disconnected, make on-off element Q32 conducting at moment t7, the electric charge of keeping electrode SU1～SUn side begins to flow to capacitor C30 by inductor L30, diode D32, on-off element Q32.The voltage of keeping electrode SU1～SUn begins to descend.And, remaining at on-off element Q4 under the state of conducting, scan electrode SC1～SCn maintains 0 (V) as reference potential.
(during T8)
Make on-off element Q34 conducting at moment t8, make the voltage of keeping electrode SU1～SUn be reduced to 0 (V) forcibly.
In addition, make input terminal INc be made as " Hi " at moment t8.Thus, constant electric current flows to capacitor C11 from resistance R 12, and the source voltage of on-off element Q15 rises with oblique line shape, and the output voltage of scan electrode driving circuit 43 begins to rise with oblique line shape with the gradient also more precipitous than up ramp voltage.Like this, the 2nd tilt waveform voltage that takes place to rise to voltage Vers from 0 (V) that becomes reference potential, promptly eliminate ramp voltage.And during this elimination ramp voltage rising, scan electrode SCi and the voltage difference of keeping between electrode SUi surpass discharge ionization voltage.At this moment, in the present embodiment, set each numerical value, with only at scan electrode SCi with keep between the electrode SUi and discharge, for example establish and keep pulse voltage Vs and be about 210 (V), establish voltage Vers and be about 213 (V), establish the gradient of eliminating ramp voltage and be about 10V/ μ sec.Thus, can and keep the faint discharge of generation between the electrode SUi, this faint discharge is proceeded during the rising of elimination ramp voltage at scan electrode SCi.
At this moment, discharge strongly if the moment that rapid change in voltage causes takes place, then a large amount of charged particles that taken place by strong discharge form big wall electric charge, to relax this rapid change in voltage, keep the wall voltage that forms in the discharge before excessively eliminating just.And, in the panel that pictureization, height become more meticulous greatly, driving impedance increases, owing in the drive waveforms that driving circuit takes place, easily produce waveform distortions such as damped oscillation, so exist in the drive waveforms of the narrow wide elimination discharge of above-mentioned generation the anxiety of the strong discharge that the generation waveform distortion causes.
, in the present embodiment, constitute to utilize to make and apply elimination ramp voltage that voltage slowly rises at scan electrode SCi with keep and continue to take place faint elimination discharge between the electrode SUi.Therefore, even if for example big pictureization, height have become more meticulous, increased the panel of driving impedance, discharge can take place stably also to eliminate, can and keep wall voltage on the electrode SUi with scan electrode SCi and be adjusted to the ensuing optimum condition that writes stably takes place.
In addition, though not shown in the accompanying drawings, owing at this moment data electrode D1～Dm is remained 0 (V), on data electrode D1～Dm, form positive wall voltage.
(during T9)
At moment t9, if arrive voltage Vers from the driving voltage waveform of waveform of initialization generation circuit 53 outputs, then on-off element Q16 conducting, in order to make 56 actions of the 2nd Miller integrator, to on-off element Q16, the 2nd Miller integrator 56 stops action with the electric current drainage that is input to input terminal INc.
In addition, as mentioned above, arrive after the voltage Vers if put on the voltage of scan electrode SC1～SCn, it is constant to keep this voltage, then has the anxiety that misplaces electric paradoxical discharge of bringing out during ensuing the writing., in the present embodiment, arrive after the voltage Vers, drop to 0 (V) that becomes reference potential immediately, so can prevent the generation of this paradoxical discharge owing to constitute the voltage that puts on scan electrode SC1～SCn.
And, after the moment t10 during the initialization that becomes next height field, if the initialization action of ensuing son, for example ensuing son is to select initial beggar field, then scan electrode SC1～SCn is applied descending ramp voltage, to keeping electrode application voltage Ve1, begin to select initialization action.
Below, the details of the driving voltage waveform during the initialization is described.Fig. 8 is the sequential chart that is used for illustrating one of the action example of scan electrode driving circuit 43 during whole unit initialization of embodiment of the present invention 1.In addition, in this accompanying drawing, the drive waveforms during with whole unit initialization action is that example illustrates, even if but in selecting initialization action, also descending ramp voltage can take place by same control.
And, in Fig. 8, the driving voltage waveform that will carry out whole unit initialization action be divided into during T10～during during the T14 represent 5, illustrate during each.And, being illustrated as voltage Vi1, voltage Vi3 and equating with voltage Vs, voltage Vi2 equates that with voltage Vr voltage Vi4 equates with the voltage (Va+Vset2) that obtains behind the voltage Vset2 that superposeed on the negative voltage Va.And, in the accompanying drawings, to input signal CEL1, the CEL2 of door AG too, " 1 " is expressed as " Hi " " 0 " is expressed as " Lo ".
And, in Fig. 8, different for generation that the generation of eliminating ramp voltage and up ramp voltage are shown, also illustrate simultaneously take place to eliminate ramp voltage during T8～during the action of T9.
In addition, here, in order voltage Vi4 to be become on negative voltage Va, superposeed the voltage (Va+Vset2) of voltage Vset2, during T10～during among the T14, switching signal CEL2 maintains " 1 ".And, though not shown, during T10～during among the T14, on-off element Q21 keeps disconnection.And, though not shown, to constituting the on-off element Q12 input and the signal that is input to the signal reversed polarity of input terminal INa of separation circuit, to constituting the on-off element Q13 input and the signal that is input to the signal reversed polarity of input terminal INb of separation circuit.
(during T8)
During among the T8, make input terminal INc become " Hi ".Thus, steady current flows to capacitor C11 from resistance R 12, and the source voltage of on-off element Q15 rises with oblique line shape, and the output voltage of scan electrode driving circuit 43 begins to rise with oblique line shape with the gradient also more precipitous than up oblique wave.
(during T9)
If after the driving voltage waveform arrival voltage Vers of waveform of initialization generation circuit 53 outputs, on-off element Q16 conducting, in order to make the action of the 2nd Miller integrator 56, to on-off element Q16, the 2nd Miller integrator 56 stops action with the electric current drainage that is input to input terminal INc.
The elimination ramp voltage of the 2nd tilt waveform voltage that rises to voltage Vers from 0 (V) that become reference potential takes place like this.
(during 10)
And, make the on-off element Q1 conducting of keeping pulse generating circuit 50.So interelectrode capacitance Cp and inductor L1 resonance reclaim electricity consumption container C 1 by on-off element Q1, diode D1, inductor L1 from electric energy, the voltage of scan electrode SC1～SCn begins to rise.
(during T11)
Then, make the on-off element Q3 conducting of keeping pulse generating circuit 50.So, through on-off element Q3 and on-off element Q12 scan electrode SC1～SCn being applied voltage Vs, the current potential of scan electrode SC1～SCn becomes voltage Vs (equating with voltage Vi1 in the present embodiment).
(during T12)
Then, make the input terminal INa of the Miller integrator that up ramp voltage takes place become " Hi ".Particularly, input terminal INa is applied for example voltage 15 (V).So steady current flows to capacitor C10 from resistance R 10, the source voltage of on-off element Q11 rises with oblique line shape, and the output voltage of scan electrode driving circuit 43 also begins to rise with oblique line shape.And this voltage rises and proceeds during input terminal INa is for " Hi ".
If this output voltage rises to voltage Vr (equating with voltage Vi2 in the present embodiment), then afterwards make input terminal INa become " Lo ".Particularly, input terminal INa is applied for example voltage 0 (V).
Like this, scan electrode SC1～SCn is applied the up ramp voltage that slowly rises to the voltage Vr (equating with voltage Vi2 in the present embodiment) that surpasses discharge ionization voltage from the voltage Vs below the discharge ionization voltage (equating with voltage Vi1 in the present embodiment).
(during T13)
If make input terminal INa become " Lo ", then the voltage of scan electrode SC1～SCn drops to voltage Vs (equating with voltage Vi3 in the present embodiment).And, afterwards, on-off element Q3 is disconnected.
(during T14)
Then, make the input terminal INb of the Miller integrator that descending ramp voltage takes place become " Hi ".Particularly, input terminal INb is applied for example voltage 15 (V).So steady current flows to capacitor C12 from resistance R 11, the drain voltage of on-off element Q14 descends with oblique line shape, and the output voltage of scan electrode driving circuit 43 also begins to descend with oblique line shape.And, before finishing during the initialization, make input terminal INb become " Lo ".Particularly, input terminal INb is applied for example voltage 0 (V).
In addition, during T14 on-off element Q13 become disconnection, but the Miller integrator that descending ramp voltage takes place can make the output voltage of scan electrode driving circuit 43 descend through the body diode of on-off element Q13.
In addition, in comparator C P, relatively this descending ramp voltage with added the voltage (Va+Vset2) of voltage Vset2 at voltage Va, switch to " 1 " at the moment t14 that descending ramp voltage becomes below the voltage (Va+Vset2) from " 0 " from the output signal of comparator C P.Because switching signal CEL2 be " 1 ", thus, with the input of door AG all be " 1 ", from door AG output " 1 ", export the voltage Vc that after the voltage Va that bears has superposeed voltage Vscn, has obtained from scanning impulse generation circuit 54.Therefore, make voltage Vi4 become the descending ramp voltage of voltage (Va+Vset2) from 54 outputs of scanning impulse generation circuit.
As mentioned above, scan electrode driving circuit 43 takes place from the 1st tilt waveform voltage that slowly rises to the voltage Vi2 that surpasses discharge ionization voltage for the voltage Vi1 below the discharge ionization voltage, is up ramp voltage, puts on scan electrode SC1～SCn.And afterwards, 43 couples of scan electrode SC1～SCn of scan electrode driving circuit apply the descending ramp voltage that slowly descends to voltage Vi4 from voltage Vi3.
In addition, though not shown, after finishing during the initialization, during ensuing writing, make on-off element Q21 be maintained in conducting.Thus, the voltage that is input to the terminal of comparator C P is negative voltage Va, is maintained " 1 " from the output signal CEL1 of comparator C P.Thus, be maintained " 1 ", export the voltage Vc that after negative voltage Va has superposeed voltage Vscn, has obtained from scanning impulse generation circuit 54 from output with door AG.And, by making switching signal CEL2 become " 0 ", become " 0 " with the output signal of door AG, from the negative voltage Va of scanning impulse generation circuit 54 outputs in the moment that negative scan pulse voltage takes place.Like this, can write during in negative scan pulse voltage.
As mentioned above, in the present embodiment, during keeping at last, promptly show electrode is kept after the pulse finishing to apply, scan electrode SC1～SCn is applied the precipitous elimination ramp voltage of the up ramp voltage of gradient ratio, continue to take place faint elimination discharge.And, constitute after the elimination ramp voltage that rises arrives voltage Vers, drop to 0 (V) that becomes reference potential immediately.As a result, even if in the panel that big pictureization, height become more meticulous, also can improve and write the required voltage that discharges, and stably write discharge, can improve the image display quality.
In addition, in the present embodiment, arrive voltage Vers, then drop to the structure of 0 (V) that become reference potential immediately if the voltage that rises in eliminating ramp voltage has been described, but in order to prevent above-mentioned paradoxical discharge, the arrival potential setting that preferably will descend is at below 70% of voltage Vers.Fig. 9 is the figure of another example of the driving voltage waveform in the embodiment of the present invention 1.For example shown in this accompanying drawing, eliminate ramp voltage and arrive after the voltage Vers, drop to voltage Vb (voltage Vb is the following voltage in voltage Vers * 0.7) immediately if constitute, then for example, even if during afterwards this voltage Vb being kept necessarily, also can prevent above-mentioned paradoxical discharge, obtain above-mentioned effect.And, in the present embodiment, the lower voltage limit value that arrives current potential though will descend is set at 0 (V) that becomes reference potential, and this lower voltage limit value is no more than the value of setting for ensuing selection initialization action based on descending ramp voltage is carried out smoothly.This lower voltage limit value all is not limited to above-mentioned value in the present embodiment, as long as set best in the scope that action is carried out smoothly after eliminating action.
In addition, in the present embodiment, illustrated that last generation during keeping eliminates ramp voltage, puts on the structure of scan electrode SC1～SCn, but by to eliminate ramp voltage just before the waveform shape of keeping pulse try every possible means, can make based on the elimination discharge of eliminating ramp voltage and more stably take place.In the embodiment 2 below, the example of this drive waveforms is described.
(embodiment 2)
Figure 10 is the exemplary waveforms figure that keeps pulse waveform in the expression embodiment of the present invention 2.In addition, in embodiment 2, constitute and different 3 kinds of waveform shape switch to take place keep pulse.And, respectively keep pulse and keep pulse generating circuit 50, keep the switching instant of each on-off element of pulse generating circuit 60, thereby control the driving time of each electric energy recovery circuit and each voltage clamp circuit and take place by control.That is, keeping pulse generating circuit 50, keeping pulse generating circuit 60 is alternately to put on show electrode to 24 the pulse generating circuit of keeping, and is the driving circuit that drives panel 10.Therefore, because the structures of other actions or each circuit etc. are identical with embodiment 1, so the aspect that they are different is described here.And in Figure 10, it is " GND " that earthing potential is recorded and narrated.
As shown in figure 10, in the present embodiment, different 3 kinds of waveform shape switch to take place respectively during keeping keep pulse.That is, 3 kinds to keep pulse be to become the 1st of benchmark to keep pulse, the 2nd and keep pulse and the 3rd and keep pulse.Here, the 2nd to keep pulse be to keep pulse than the 1st to rise precipitously, keeps pulse than the 1st simultaneously and descend and keep pulse slowly.And the 3rd to keep pulse be to keep pulse than the 2nd to descend slowlyer, and pulse width is kept the pulse of keeping that pulse also grows than the 1st simultaneously.In addition, described pulse width is to begin time when descend finishing from the rising of keeping pulse.
Particularly, make pulse width be about 2.5 μ sec, be about 550nsec between the rising stage, be about 700nsec between decrement phase, become keeping pulse, promptly the 1st keeping pulse of benchmark.
And the 2nd keeps pulse makes between the rising stage to keeping the short about 300nsec of pulse than the 1st, keeps the also precipitous rising of pulse than the 1st.And the 2nd keeps pulse makes and is made as between decrement phase than the 1st keeping the long about 900nse of pulse, keeping pulse than the 1st and descend slow.And, make pulse width be and the 1st keep the equal about 2.5 μ sec of pulse, take place the 2nd and keep pulse.
And the 3rd keeps between rising stage of pulse to keeping the short slightly about 450nsec of pulse than the 1st.And, between decrement phase for than the 2nd keep the longer about 1700nsec of pulse, to keep pulse decline than the 2nd slower.And making pulse width is to keep the also long about 10.7 μ sec of pulse than the 1st, takes place the 3rd and keeps pulse.At this moment, the 3rd keeps pulse, and to keep pulse also long than the 1st during voltage Vs by making clamper, enlarges pulse width.
In addition, the harmonic period of the LC resonance of the harmonic period of the LC resonance of the interelectrode capacitance Cp of the inductor L1 of electric energy recovery circuit 51 and panel 10, the inductor L30 that reaches electric energy recovery circuit 60 and this interelectrode capacitance Cp can pass through formula " 2 π (LCp)
1/2" obtain.Here, the inductance of establishing inductor L1, inductor L30 is respectively L.And, in the present embodiment, set inductor L1, inductor L30, so that the harmonic period in the electric energy recovery circuit 51, electric energy recovery circuit 61 is about 1500nsec.And, keep in the pulse the 1st, set for and be the time below 1/2 of this harmonic period between decrement phase.And, keep in the pulse the 2nd, set between decrement phase for this harmonic period half more than 1.1 times and less than time of harmonic period.Keep in the pulse the 3rd, setting between decrement phase is the above time of this harmonic period.
And, keep pulse, the 3rd the 2nd and keep in the decline of pulse, by the work of anti-adverse current with diode D2, diode D32, even if after surpassing 1/2 time of harmonic period, the rising of voltage does not take place yet, it is constant to remain on minimum magnitude of voltage.
Figure 11 A, Figure 11 B are the synoptic diagram of the situation of keeping pulse that has just taken place before of the elimination ramp voltage in the expression embodiment of the present invention 2.In the present embodiment, constitute during keeping to switch and take place the 1st and keep pulse, the 2nd and keep pulse and the 3rd and keep pulse, put on show electrode 24.And, recur the 2nd keep pulse in, change this frequency corresponding to the pulse sum (removing the sum of eliminating oblique wave) of keeping during keeping, the pulse of keeping during Figure 11 A is illustrated in and keeps adds up to situation more than 50, keeps the pulse sum less than 50 situation during Figure 11 B is illustrated in and keeps.In addition, should " keeping the pulse sum " be to keep the pulse sum in 1 field interval, but keep the pulse sum in during the keeping of each son, below " keeping the pulse sum " represent each son keep pulse sum (removing the sum of eliminating oblique wave).
Particularly, shown in Figure 11 A, Figure 11 B, take place to eliminate ramp voltage just before (A in the accompanying drawing), take place the 3rd and keep pulse, put on and keep electrode SU1～SUn.
And, the 3rd keep pulse just before (B1 in the accompanying drawing, B2), to applying the electrode of eliminating ramp voltage one side, being scan electrode SC1～SCn, keep pulse here to apply the 2nd continuously corresponding to the stipulated number of keeping the pulse sum during keeping.In the present embodiment, keep pulse add up to keeping more than 50 during, shown in Figure 11 A,, take place the 2nd 8 times and keep pulse continuously as the number of times of regulation.And,,, shown in Figure 11 B,, take place the 2nd 4 times and keep pulse continuously less than during 50 keep at the sum of keeping pulse as the number of times of regulation, put on scan electrode SC1～SCn.
In the present embodiment, by making this structure, can stably take place to eliminate discharge, and the ensuing discharge that writes stably takes place.This is based on following reason.
In eliminating action, by scan electrode SC1～SCn is applied the elimination ramp voltage, at scan electrode SCi with keep discharge takes place between the electrode SUi to eliminate.Therefore, must form enough wall electric charges by the discharge of keeping just, if discharge then can not stably take place to eliminate this wall electric charge deficiency.
In order to put aside the wall electric charge fully, when keeping discharge consumingly, make clamped elongatedly during the clamper of voltage Vs, it is effective enlarging the pulse width of keeping pulse.
Therefore, in the present embodiment, constitute eliminate ramp voltage just before (A in the accompanying drawing) take place the 3rd and keep pulse, put on and keep electrode SU1～SUn.Like this, by shortening the driving time of electric energy recovery circuit 51, make rising precipitous, can keep discharge consumingly thus, enough charged particles take place, and by be clamped during the clamper of voltage Vs the elongated pulse width of keeping pulse that enlarges, the charged particle that can fully put aside generation is as the wall electric charge.Thus, eliminate discharge just before can put aside enough wall electric charges, discharge can stably take place to eliminate.
And, in keeping action, if produce discharge under the precipitous state of change in voltage, then strong discharge can take place, in discharge cell, form enough wall electric charges.And, can absorb the deviation of discharge ionization voltage by under the precipitous state of change in voltage, producing discharge, suppress the deviation that each keeps the discharge cell of discharge.As a result, but adequate relief wall-forming electric charge.
Especially, put in the elimination discharge that scan electrode SC1～SCn takes place will eliminating ramp voltage, importantly till taking place to eliminate discharge, on scan electrode SCi, form enough positive wall voltages.And, according to experimental verification, before eliminating discharge, by to applying the electrode of eliminating ramp voltage one side, being the pulse of keeping that scan electrode SC1～SCn applies precipitous rising continuously, discharge can more stably take place to eliminate thus here.
Therefore, in the present embodiment, constitute as the elimination ramp voltage of the last drive waveforms voltage in during keeping just before (B1 in the accompanying drawing or B2), to applying the electrode of eliminating ramp voltage one side, being scan electrode SC1～SCn, keep pulse here to apply the 2nd continuously corresponding to the stipulated number of keeping the pulse sum during keeping.Utilize this structure, the strong discharge of keeping can take place before eliminating discharge, suppress deviation, put aside enough wall electric charges, discharge can more stably take place to eliminate.
In addition, also confirmed simultaneously if increase this make rise precipitous keep pulse apply number of times continuously, then invalid electric energy (being helpless to electric energy luminous, effective consumption) increases.Preferably this makes the precipitous number of times that applies continuously of keeping pulse that rises be set in and do not increase invalid electric energy, fully obtain the scope of above-mentioned effect, in the present embodiment, preferably is set in more than 2 times below 20 times.And, preferably set corresponding to the pulse sum of keeping in during keeping.And, in the present embodiment, constitute during keeping pulse and ading up to keeping more than 50, take place the 2nd 8 times and keep pulse (B 1 in the accompanying drawing) continuously, keeping the pulse sum less than during 50 keep, taking place the 2nd 4 times and keep pulse (B2 in the accompanying drawing) continuously.This be because according to experimental verification keep pulse sum fewer keep during in, apply the 2nd number of times of keeping pulse continuously by reducing, obtain reducing the effect of afterimage phenomenon.Here, so-called afterimage phenomenon, be long-time show rest image etc. after during the image of exhibit high brilliance, this rest image is identified as the phenomenon of afterimage.
In addition, if confirmed in keeping action in the rising of keeping pulse, to take place strong discharge, then keeping in the decline of pulse faint discharge takes place.This discharge is owing to reduce by keeping the wall electric charge that discharge forms, so in case eliminate discharge just before discharge based on this decline takes place, then have wall electric charge deficiency, make the anxiety of elimination discharge instability ground generation, thereby not ideal.And, applying the 2nd when keeping pulse, if this faint discharge takes place in decline, then exist to make the ensuing anxiety of keeping discharge instability, thereby not ideal.
And, according to experimental verification by make the required time that descends elongated, make particularly descend the required time be harmonic period half more than 1.1 times, can reduce the generation of the faint discharge in this decline thus.
Therefore, in the present embodiment, keep in the pulse keeping the 2nd of the precipitous rising of pulse, keep pulse than the 1st and descend slowly than the 1st.Therefore, make the driving time of keeping the electric energy recovery circuit 51 of pulse in descending for than the 1st half time more than 1.1 times of keeping the long harmonic period of pulse.In addition, in the present embodiment, half time more than 1.1 times of so-called harmonic period, be about 900nsec particularly.Thus, based on precipitous the keeping in the action of pulse of keeping of rising,, the ensuing discharge stability ground of keeping is taken place, discharge so can more stably take place to eliminate owing to can prevent the anxiety of the faint discharge that in the decline of keeping pulse, takes place.
And,, then can further reduce the generation of the faint discharge in this decline if confirmed to make the required time of decline elongated to harmonic period.
Therefore, in the present embodiment, eliminate ramp voltage just before (A in the accompanying drawing) take place the 3rd keep the time that pulse constitutes more than harmonic period and realize descending.In addition, in the present embodiment, the above time of harmonic period is about 1700nsec particularly.Thus, can further reduce eliminate discharge just before based on the anxiety of keeping faint discharge generations that pulse descends, can more stably take place to eliminate and discharge.
And, in the present embodiment, shown in Figure 11 A, Figure 11 B, constitute recur the 2nd keep pulse just before (C in the accompanying drawing), (applying for 2 times for scan electrode SC1～SCn) is continuous at least here becomes the 1st of benchmark and keeps pulse to applying the electrode of eliminating ramp voltage one side.
If recur the strong discharge of keeping, the moment that discharge then takes place between adjacent discharge cell exists in the discharge cell of deviation, is subjected to the influence of keeping discharge strongly that takes place in the adjacent discharge cell, the situation that the wall electric charge reduces occurs.Perhaps, at the discharge cell of keeping discharge and the adjacent position of discharge cell of not keeping discharge, even if the discharge cell of discharge take place afterwards or do not keep in the discharge cell of discharge, be subjected to the influence of keeping discharge strongly that takes place in the adjacent discharge cell, the phenomenon that the wall electric charge reduces occurs.These are called so-called electric charge and omit.
And, according to experimental verification recur the 2nd keep pulse just before (C in the accompanying drawing), by (applying more than 2 times for scan electrode SC1～SCn) is continuous here and keep pulse than the 2nd and rise and the 1st keep pulse slowly, can prevent that thus above-mentioned electric charge from omitting to applying the 2nd electrode of keeping pulse one side.Therefore, in the present embodiment, constitute recur the 2nd keep pulse just before, (apply the 1st 2 times for scan electrode SC1～SCn) is continuous at least here and keep pulse applying the electrode of eliminating ramp voltage one side.Thus, can prevent that electric charge from omitting, the discharge of keeping of keeping pulse based on the 2nd stably takes place, discharge further stably takes place to eliminate.
As mentioned above, according to present embodiment since can take place to eliminate ramp voltage just before form enough wall electric charges, so discharge can stably take place to eliminate.And, according to present embodiment,, also can not improve and write the required voltage that discharges even if in the panel that big pictureization, height become more meticulous, stably write discharge, can improve the image display quality.
In addition, in the present embodiment, making the 2nd lower limit of time of keeping the decline cost of pulse is half 1.1 times of harmonic period, but owing to As time goes on and gradually reduce by the wall electric charge of keeping discharge formation, so, then exist the ensuing anxiety of keeping discharge can not stably take place if make higher limit excessive.Therefore, in the present embodiment, if the higher limit of the time that the 2nd decline of keeping pulse spends is a harmonic period, when pulse is kept in generation the 2nd, more than 1.1 times and less than time of harmonic period of half of the harmonic period of cost interelectrode capacitance and inductor are carried out the 2nd decline of keeping pulse.
And, in the present embodiment, take place the 2nd 8 times and keep pulse continuously in illustrating during keeping pulse to add up to keeping more than 50, keeping the pulse sum less than continuous the 2nd structure of keeping pulse that takes place for 4 times in during 50 keep.; this only enumerates an example, for example also can be during keeping pulse to add up to keeping more than 30 and keep recurring number of times etc., will being used to change the 2nd threshold value of keeping the pulse sum that recurs number of times of keeping pulse and being altered to other numerical value of pulse less than changing the 2nd in during 30 keep.Perhaps, also available 6 times and 10 times are switched the 2nd and are kept recurring number of times etc., the 2nd number of times that recurs of keeping pulse being altered to other numerical value of pulse.Perhaps, also can constitute with 4 times, 6 times with switch the 2nd for 8 times and keep pulse and recur number of times etc., switch the 2nd number of times that recurs of keeping pulse with numerical value different more than 3.These each concrete numerical value are as long as cooperate the specification of plasma display system, the characteristic of panel etc., and setting gets final product best.
As mentioned above, in the present embodiment, it is characterized in that: driving circuit to scan electrode SC1～SCn apply the 1st tilt waveform voltage, the 2nd tilt waveform voltage and the 2nd is kept pulse.And slowly the 1st tilt waveform voltage of rising takes place in driving circuit during the initialization of at least 1 son field of 1 field interval.And, last make gradient ratio 1st tilt waveform voltage precipitous and in case the 2nd tilt waveform voltage that the waveform voltage arrival regulation current potential that rise just immediately descend of driving circuit during keeping.And, it is characterized in that: driving circuit during keeping in, the 2nd tilt waveform voltage just before the electrode that applies the 2nd tilt waveform voltage one side applied the 2nd continuously with stipulated number keep pulse.
In addition, in the present embodiment, illustrated according to the pulse sum of keeping during keeping and changed and recur the 2nd and keep the structure of the number of times of pulse, but also can make according to lighting the structure that rate changes.In the embodiment 3 below, the example of this drive waveforms is described.
(embodiment 3)
Figure 12 is the circuit module figure of the plasma display system in the expression embodiment of the present invention 3.Plasma display system 1 in the present embodiment constitutes to increase in the plasma display system in the embodiment shown in Figure 41 lights rate testing circuit 48.In addition, present embodiment constitutes according to lighting testing result in the rate testing circuit 48, and the 2nd number of times of keeping pulse is recurred in change, because other the action or the structure of each circuit etc. are identical with embodiment 1, so the aspect that they are different is described here.
Light the view data of rate testing circuit 48 according to each son, in each son detect light the discharge cell number to the ratio of whole discharge cell numbers, be the rate of lighting of discharge cell.And, with detected rate and the predetermined rate of the lighting threshold lighted, export the signal of representing its result of determination to timing generating circuit 45.
In addition, in the present embodiment, this is lighted the rate threshold setting become 85%., present embodiment all is not limited to this numerical value, preferably sets best value for according to the characteristic of panel, the specification of plasma display system etc.
Figure 13 A, Figure 13 B are the exemplary waveforms figure that keeps pulse waveform in the expression embodiment of the present invention 3.In the present embodiment, the rate of lighting be during the keeping more than 85% in, shown in the B1 of Figure 13 A, take place the 2nd 8 times and keep pulse continuously, in the rate of lighting less than in during 85% keep, shown in the B2 of Figure 13 B, pulse is kept in continuous 4 generations the 2nd, puts on scan electrode SC1～SCn.In addition, A in the accompanying drawing and C are identical with Figure 11 A, Figure 11 B.
In the present embodiment,, can stably take place to eliminate discharge, make the ensuing further generation stably of discharge that writes by making this structure.This is based on following reason.
The driving load of the panel of seeing from driving circuit 10 is according to the combination of lighting, the not lighting change of discharge cell.At this moment, if the rate of the lighting height of discharge cell, then driving load increases, and the result easily produces distortion in the drive waveforms, for example exist in the anxiety of keeping each discharge cell generation deviation of keeping discharge in the action.
At this moment, if under the precipitous state of change in voltage, produce discharge, then as mentioned above and since can absorb discharge ionization voltage deviation, suppress to keep the deviation of each discharge cell of discharge, so but adequate relief wall-forming electric charge.
On the contrary, when the rate of lighting is low, reduce, reduce waveform distortion, so the difficult deviation of keeping each discharge cell of discharge owing to drive load.And, according to experimental verification apply the 2nd number of times of keeping pulse continuously by reducing in this case, obtain reducing the effect of afterimage phenomenon.
Therefore, in the present embodiment, constitute the rate of lighting be during the keeping more than 85% in, as shown in FIG. 13A, take place the 2nd 8 times and keep pulse continuously,,, shown in Figure 13 B, take place the 2nd 4 times and keep pulse continuously less than in during 85% keep in the rate of lighting.Thus, no matter how light rate, discharge can take place stably all to eliminate.
In addition, in the present embodiment, illustrated and taken place the 2nd 8 times and keep pulse continuously during the rate of lighting is keeping more than 85%, in the rate of lighting less than continuous the 2nd structure of keeping pulse that takes place for 4 times during 85% keep.; this only enumerates an example, for example also can be during the rate of lighting is keeping more than 50% and keep recurring number of times etc., will being used to change the 2nd threshold value of keeping the rate of lighting that recurs number of times of pulse and being altered to other numerical value of pulse less than changing the 2nd during 50% keep.Perhaps, also can constitute the threshold value that makes the rate of lighting is more than 2, switches the 2nd number of times that recurs of keeping pulse with the different number of times more than 3.These each concrete numerical value are as long as cooperate the specification of plasma display system, the characteristic of panel etc., and setting gets final product best.
In addition, also can make the structure of combination embodiment 2 and embodiment 3.For example, also can constitute keeping the pulse sum and take place the 2nd 4 times and keep pulse less than continuous during 50 keep, in during keeping pulse to add up to keeping more than 50, taking place the 2nd 4 times and keep pulse continuously less than 85% o'clock lighting rate, is that pulse (not shown) is kept in 85% continuous 8 generations the 2nd when above in the rate of lighting.In this structure, no matter light rate, how keep the pulse sum during keeping, discharge can take place stably all to eliminate.
In addition, in embodiment 2 and embodiment 3, put on scan electrode SC1～SCn keep the pulse sum do not reach 6 or 10 the son in, for example, also can constitute recur 2 the order 1 keep pulse after, make and remainingly keep pulse and become the 2nd and keep pulse generation, put on scan electrode SC1～SCn.Here, what is called put on scan electrode SC1～SCn keep the pulse sum do not reach 6 or 10 the son, be apply to recur the 2nd stipulated number (being 4 times or 8 times here) of keeping pulse add recurring the 2nd keep pulse just before recur the 1st keep the number of times of pulse lower limit (being 2 times here) number of sustain pulses the son.Perhaps, consideration in during keeping the initial discharge of keeping that takes place compare and be difficult for taking place with the discharge of keeping that after proceeding to keep discharge, takes place, the pulse of keeping that puts on scan electrode SC1～SCn in also can be during keeping at first is the preferential waveform shape that discharges of taking place.And, also can constitute and then recur 2 order and 1 keep pulse, afterwards, make and remainingly keep pulse and become the 2nd and keep pulse generation, put on scan electrode SC1～SCn.
In addition, in embodiments of the present invention, the scan electrode driving circuit 43 shown in Fig. 5, Fig. 6, to keep electrode drive circuit 44 are circuit that a structure example only is shown, as long as can realize same action, then which kind of circuit structure is all harmless.For example, with regard to the circuit that applies voltage Ve1, voltage Ve2, be not limited to the circuit shown in Fig. 6.For example, also can constitute power supply that voltage Ve1 use to take place, the power supply of voltage Ve2 takes place and be used for each voltage is put on a plurality of on-off elements of keeping electrode SU1～SUn, in essential timing, each voltage be put on and keep electrode SU1～SUn.And the circuit that being used to shown in Fig. 5 eliminated ramp voltage also is the circuit that a structure example only is shown, and replaceable one-tenth can be realized other circuit of same action.
In addition, embodiments of the present invention, even if scan electrode SC1～SCn is divided into the 1st scan electrode group and the 2nd scan electrode group, be divided into during will writing the 1st write during and the 2nd constitute during writing, also applicable.Here, the 1st each applies scanning impulse successively to the scan electrode that belongs to the 1st scan electrode group during writing.And the 2nd each applies scanning impulse successively to the scan electrode that belongs to the 2nd scan electrode group during writing.Promptly, during the 1st writes and among the 2nd at least one side during writing, the scan electrode that belongs to the scan electrode group that applies scanning impulse is applied from the 2nd voltage transition that is higher than scan pulse voltage to become scan pulse voltage, be transformed into the scanning impulse of the 2nd voltage more successively.And, the scan electrode that belongs to the scan electrode group that does not apply scanning impulse is applied the 3rd voltage that is higher than scan pulse voltage and is higher than the 2nd voltage and the voltage of one of the 4th voltage of the 3rd voltage.And, also applicable at least to adjacent scan electrode apply scan pulse voltage during apply the 3rd voltage, so-called 2 panel driving methods that drive mutually, can obtain and above-mentioned same effect.
In addition, in embodiments of the present invention, illustrated scan electrode SC1～SCn is applied the structure of eliminating ramp voltage, but also can constitute when to apply the last electrode of keeping pulse be scan electrode SC1～SCn, applied the elimination ramp voltage keeping electrode SU1～SUn., in embodiments of the present invention, preferably make to apply the last electrode of keeping pulse, scan electrode SC1～SCn is applied the elimination ramp voltage for keeping electrode SU1～SUn.
In addition, in embodiments of the present invention, illustrated in electric energy recovery circuit 51, electric energy recovery circuit 61, the common structure of using an inductor in the rising of keeping pulse and decline is even if but constitute a plurality of inductors of use, also harmless at the rising of the keeping pulse inductor different with use in the decline.And, in this case, in above-mentioned electric energy recovery circuit 51, electric energy recovery circuit 61, set inductor and be applicable to the inductor that is used to descend so that harmonic period is about the structure of 1500nsec.And, for the inductor that is used to rise, also can be set at, for example be about 1200nsec with the different harmonic period that descends.
In addition, be that show electrode logarithm according to experiment usefulness is that the characteristic of 42 inches panels of 1080 is set in the magnitude of voltage of each the concrete numerical value shown in the embodiment of the present invention, for example voltage Vers, the gradient etc. of eliminating pulse-shaped voltage.Therefore, above-mentioned each numerical value only illustrates an example of embodiment.Embodiments of the present invention all are not limited to these numerical value, preferably set best value for according to the characteristic of panel, the specification of plasma display system etc.And these each numerical value are the numerical value of permissible variation in the scope that can obtain above-mentioned effect.
Utilizability on the industry
Even if the present invention is applicable in the panel of big picture, high-precision refinement and also can stably writes Enter discharge, the plasma display system that display quality of image is good and the driving method of panel.
Claims (4)
1, a kind of driving method of Plasmia indicating panel, described Plasmia indicating panel possess and a plurality ofly have by scan electrode and keep the right discharge cell of show electrode that electrode constitutes,
In described driving method,
In 1 field interval, be provided with during having initialization, write during and keep during a plurality of sons,
During described keeping, described scan electrode or described side's electrode of keeping electrode applied to be become the 1st of benchmark and keeps pulse and the 2nd and keep at least 2 kinds of pulse and keep pulse, the described the 2nd keeps ratio of pulse length to the total cycle length the described the 1st keeps pulse and rises precipitous and keep pulse than the described the 1st and descend slowly
Last drive waveforms voltage during the drive waveforms voltage that puts on described side's electrode comprises during described the keeping and be included in described last drive waveforms voltage just before continuously configuration specified quantity the described the 2nd keep pulse.
2, the driving method of Plasmia indicating panel according to claim 1 is characterized in that:
In case described last driving voltage waveform be during the initialization of at least 1 of 1 field interval in the precipitous and waveform voltage arrival regulation current potential that rises of gradient ratio the 1st tilt waveform voltage then the 2nd tilt waveform voltage of decline immediately.
3, the driving method of Plasmia indicating panel according to claim 2 is characterized in that:
Described rising or the decline of keeping pulse is that right interelectrode capacitance of described show electrode and inductor resonance are realized, the described the 2nd the time between the decrement phase of pulse of keeping be described interelectrode capacitance and described inductor harmonic period half more than 1.1 times and less than described harmonic period.
4, the driving method of Plasmia indicating panel according to claim 2 is characterized in that:
To described scan electrode apply described the 1st tilt waveform voltage, described the 2nd tilt waveform voltage and the described the 2nd is kept pulse.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP111284/2007 | 2007-04-20 | ||
| JP2007111284A JP4946593B2 (en) | 2007-04-20 | 2007-04-20 | Plasma display apparatus and driving method of plasma display panel |
| PCT/JP2008/000912 WO2008132781A1 (en) | 2007-04-20 | 2008-04-09 | Plasma display and driving method for plasma display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101558436A true CN101558436A (en) | 2009-10-14 |
| CN101558436B CN101558436B (en) | 2011-03-23 |
Family
ID=39925254
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008800011066A Expired - Fee Related CN101558436B (en) | 2007-04-20 | 2008-04-09 | Plasma display and driving method for plasma display panel |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8379007B2 (en) |
| JP (1) | JP4946593B2 (en) |
| KR (1) | KR101057930B1 (en) |
| CN (1) | CN101558436B (en) |
| WO (1) | WO2008132781A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110082905A (en) * | 2015-09-28 | 2019-08-02 | 株式会社尼康 | Pattern plotter device and substrate board treatment and pattern plotter method and manufacturing method |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008007619A1 (en) * | 2006-07-14 | 2008-01-17 | Panasonic Corporation | Plasma display device and method for driving plasma display panel |
| WO2008120471A1 (en) * | 2007-04-02 | 2008-10-09 | Panasonic Corporation | Plasma display and driving method for plasma display panel |
| JP2008268556A (en) * | 2007-04-20 | 2008-11-06 | Matsushita Electric Ind Co Ltd | Plasma display device and driving method of the plasma display panel |
| JP4946593B2 (en) | 2007-04-20 | 2012-06-06 | パナソニック株式会社 | Plasma display apparatus and driving method of plasma display panel |
| JP4946605B2 (en) * | 2007-04-26 | 2012-06-06 | パナソニック株式会社 | Plasma display apparatus and driving method of plasma display panel |
| KR101046815B1 (en) * | 2007-08-06 | 2011-07-06 | 파나소닉 주식회사 | Plasma display device |
| KR101353557B1 (en) * | 2008-10-01 | 2014-01-22 | 주식회사 오리온 | Method for Driving Plasma Display Panel |
| KR100998090B1 (en) * | 2008-12-10 | 2010-12-03 | 삼성에스디아이 주식회사 | Plasma display |
| CN102037505A (en) * | 2009-01-28 | 2011-04-27 | 松下电器产业株式会社 | Plasma display apparatus and driving methoid for plasma display apparatus |
Family Cites Families (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH087619A (en) * | 1994-06-21 | 1996-01-12 | Nok Corp | Sunlight transmitting tube |
| JP2976923B2 (en) * | 1997-04-25 | 1999-11-10 | 日本電気株式会社 | Drive device for capacitive loads |
| US6369781B2 (en) * | 1997-10-03 | 2002-04-09 | Mitsubishi Denki Kabushiki Kaisha | Method of driving plasma display panel |
| JP3733773B2 (en) | 1999-02-22 | 2006-01-11 | 松下電器産業株式会社 | Driving method of AC type plasma display panel |
| CN101533603B (en) * | 2001-06-12 | 2011-02-02 | 松下电器产业株式会社 | Plasma display device and method of driving the same |
| KR100574124B1 (en) * | 2002-12-13 | 2006-04-26 | 마츠시타 덴끼 산교 가부시키가이샤 | Plasma display panel drive method |
| KR100603312B1 (en) * | 2003-11-24 | 2006-07-20 | 삼성에스디아이 주식회사 | Driving method of plasma display panel |
| CN100479085C (en) * | 2004-04-26 | 2009-04-15 | 先锋株式会社 | Plasma display device and method of driving plasma display panel |
| JP4443998B2 (en) * | 2004-05-24 | 2010-03-31 | パナソニック株式会社 | Driving method of plasma display panel |
| KR100571212B1 (en) | 2004-09-10 | 2006-04-17 | 엘지전자 주식회사 | Plasma Display Panel Driving Apparatus And Method |
| US7583241B2 (en) * | 2004-11-19 | 2009-09-01 | Lg Electronics Inc. | Plasma display apparatus and driving method of the same |
| JP5061426B2 (en) * | 2005-05-17 | 2012-10-31 | パナソニック株式会社 | Image display device |
| JP4857621B2 (en) * | 2005-06-28 | 2012-01-18 | パナソニック株式会社 | Plasma display device |
| JP2007033736A (en) * | 2005-07-26 | 2007-02-08 | Matsushita Electric Ind Co Ltd | Plasma display device |
| KR100726633B1 (en) * | 2005-07-28 | 2007-06-12 | 엘지전자 주식회사 | Plasma display apparatus and driving method thereof |
| KR20070073490A (en) * | 2006-01-05 | 2007-07-10 | 엘지전자 주식회사 | Plasma display device |
| JP5092276B2 (en) * | 2006-05-10 | 2012-12-05 | パナソニック株式会社 | Plasma display panel driving method and plasma display device |
| EP1923856A4 (en) | 2006-07-11 | 2010-01-20 | Panasonic Corp | Plasma display device and method for driving plasma display panel |
| WO2008007619A1 (en) | 2006-07-14 | 2008-01-17 | Panasonic Corporation | Plasma display device and method for driving plasma display panel |
| JP2008209841A (en) * | 2007-02-28 | 2008-09-11 | Matsushita Electric Ind Co Ltd | Plasma display device and method of driving plasma display panel |
| JP4935473B2 (en) * | 2007-04-13 | 2012-05-23 | パナソニック株式会社 | Plasma display apparatus and driving method of plasma display panel |
| JP5135860B2 (en) * | 2007-04-13 | 2013-02-06 | パナソニック株式会社 | Plasma display apparatus and driving method of plasma display panel |
| JP5250994B2 (en) * | 2007-04-13 | 2013-07-31 | パナソニック株式会社 | Plasma display apparatus and driving method of plasma display panel |
| JP4946593B2 (en) | 2007-04-20 | 2012-06-06 | パナソニック株式会社 | Plasma display apparatus and driving method of plasma display panel |
| JP4935483B2 (en) * | 2007-04-20 | 2012-05-23 | パナソニック株式会社 | Plasma display apparatus and driving method of plasma display panel |
| JP4935482B2 (en) * | 2007-04-20 | 2012-05-23 | パナソニック株式会社 | Plasma display apparatus and driving method of plasma display panel |
| JP2008268556A (en) * | 2007-04-20 | 2008-11-06 | Matsushita Electric Ind Co Ltd | Plasma display device and driving method of the plasma display panel |
-
2007
- 2007-04-20 JP JP2007111284A patent/JP4946593B2/en not_active Expired - Fee Related
-
2008
- 2008-04-09 US US12/299,520 patent/US8379007B2/en not_active Expired - Fee Related
- 2008-04-09 WO PCT/JP2008/000912 patent/WO2008132781A1/en active Application Filing
- 2008-04-09 KR KR1020097001084A patent/KR101057930B1/en not_active IP Right Cessation
- 2008-04-09 CN CN2008800011066A patent/CN101558436B/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110082905A (en) * | 2015-09-28 | 2019-08-02 | 株式会社尼康 | Pattern plotter device and substrate board treatment and pattern plotter method and manufacturing method |
| CN110082905B (en) * | 2015-09-28 | 2022-06-03 | 株式会社尼康 | Pattern drawing apparatus and substrate processing apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2008268551A (en) | 2008-11-06 |
| KR101057930B1 (en) | 2011-08-19 |
| WO2008132781A1 (en) | 2008-11-06 |
| US20090167740A1 (en) | 2009-07-02 |
| CN101558436B (en) | 2011-03-23 |
| US8379007B2 (en) | 2013-02-19 |
| JP4946593B2 (en) | 2012-06-06 |
| KR20090056964A (en) | 2009-06-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101558436B (en) | Plasma display and driving method for plasma display panel | |
| CN101578644B (en) | Plasma display device, and plasma display panel driving method | |
| CN100416631C (en) | Apparatus and method of driving plasma display panel | |
| CN101563719B (en) | Plasma display and its driving method | |
| CN101617355B (en) | Plasma display device and method for driving plasma display panel | |
| CN101647053B (en) | Plasma display and driving method for plasma display panel | |
| CN101563718B (en) | Plasma display device, and its driving method | |
| CN101548307B (en) | Plasma display equipment and method of driving plasma display panel | |
| CN101351832B (en) | Plasma display panel drive method and plasma display device | |
| CN101971238B (en) | Plasma display device and plasma display panel drive method | |
| CN101351834B (en) | Plasma display device and plasma display panel drive method | |
| CN101351831B (en) | Plasma display device and plasma display panel drive method | |
| CN101326562B (en) | Plasma display panel drive method and plasma display device | |
| CN100568330C (en) | The driving method of Plasmia indicating panel and plasma display system | |
| CN101536069B (en) | Plasma display device and plasma display panel drive method | |
| CN101558437B (en) | Plasma display panel drive method | |
| CN100428306C (en) | Plasma display apparatus and driving method thereof | |
| CN101578643B (en) | Plasma display device | |
| CN102113042A (en) | Plasma display device, and method for driving plasma display panel | |
| EP1901269A2 (en) | Plasma display apparatus | |
| US20140049529A1 (en) | Method for driving plasma display panel and plasma display device | |
| US20130033478A1 (en) | Method for driving plasma display panel and plasma display device | |
| JP2011164445A (en) | Method of driving plasma display panel and plasma display device | |
| CN102714015A (en) | Plasma display panel driving method and plasma display device | |
| JP2010164743A (en) | Plasma display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110323 Termination date: 20160409 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |