A kind of power supply that is used for detecting electromagnetic valve quality of automobile
Technical field
The invention belongs to power technique fields.Be specifically related to a kind of power supply that is used for detecting electromagnetic valve quality of automobile.
Background technology
Quickening along with the automotive electronics process; The applied more and more of electron controls technology on automobile; This technology being widely used on engine and car load; Make the various operating modes of automobile be in optimum Working all the time, each item performance index obtain bigger improvement, like dynamic property, reliability, security and comfortableness of automobile or the like.No matter how excellent control computing function arranged in these electronic installations, if there is not good electricapparatus inverting element, i.e. executive component, total system is inoperable, executive component just is equivalent to the brothers of control system thus.The last output form of executive component is to be electrical signal conversion physical quantitys such as power or displacement, is exactly to be electrical signal conversion straight-line executive component like solenoid valve, thereby guarantees the realization and the completion of various control function.And along with the quickening of automotive electronics process, the developing rapidly and using of automobile hi-tech will also can be increasingly high to the requirement of output function, response speed and the precision of executive component, and be therefore also increasingly high to the performance requirement of solenoid valve.
Detection to the automobile electromagnetic valve at present only can detect the quality of solenoid valve; Detect trouble spot (gas leakage, ventilation are slow, stuffiness, coil opens circuit and short circuit, coil electrode bonding or coil minus earth etc.); And to the stable operation index of solenoid valve under long-time actual working state; Can't test like the variation of solenoid valve variation of temperature, throughput or the like performance index, not have the equipment of magnetic valve performance test.
Summary of the invention
The present invention is intended to overcome above-mentioned technological deficiency, and purpose provides a kind of power supply that can simulate the actual working state of variety classes solenoid valve.
For realizing above-mentioned purpose; The technical scheme that the present invention adopts is: three column rules of matrix keyboard are connected with single-chip microcomputer corresponding port P10~P15 with three alignments; The XTAL2 that two ports of the 12M crystal oscillator of clock circuit are corresponding with single-chip microcomputer, XTAL1 pin connect, and the reset circuit output terminal is connected with the RST pin of single-chip microcomputer; Port P00~the P07 of single-chip microcomputer is connected with LCD corresponding port DB0~DB7; The writing of single-chip microcomputer, read signal pin/WR and/RD are corresponding with LCD writes, read signal pin/WR is connected with/RD, and the P16 of single-chip microcomputer, P17 pin be corresponding with LCD/and CE, C/D pin connect; Port P00~the P07 of single-chip microcomputer is connected with FPGA corresponding port DB0~DB7; Port P20~the P22 of single-chip microcomputer is connected with FPGA corresponding port f_c, q_c, v_c; Write signal pin/the WR of single-chip microcomputer is connected with write signal pin/WR of FPGA; The reset signal pin RST of single-chip microcomputer is connected with the reset signal pin RST of FPGA; The pin clk of FPGA is connected with the pin clk of clock module, and the pin vcc of FPGA is connected with the pin vcc of power module, and the pin pwm of FPGA is connected with the input end of drive circuit module.
The program that main program module, liquid crystal writing module, keyboard processing module, liquid crystal display parameter are provided with module and data processing module writes the internal storage of single-chip microcomputer, and the inner PWM waveform generation module of FPGA is programmed with hardware description language.
Three column rules of described matrix keyboard are connected with+5V power supply through pull-up resistor R1, R2, R3, and three column rules are imported through one 3 and are connected with the INT0 pin of single-chip microcomputer.
The inner PWM waveform generation module of described FPGA is: port DB0~DB7 of FPGA, f_c, q_c, data input pin din0~din7, frequency control terminal f_c, dutycycle control end q_c, amplitude control end v_c connection that v_c is corresponding with data distributor; Data input pin din0~din7 that the data output end dout0~dout7 of data distributor is corresponding with amplitude registers, duty cycle register and frequency register respectively is connected; The data input pin din0 that the data output end dout0~dout7 of amplitude registers is corresponding with steering logic~din7 connects; The data input pin din8 that the data output end dout0~dout7 of duty cycle register is corresponding with steering logic~din15 connects; The data input pin din16 that the data output end dout0~dout7 of frequency register is corresponding with steering logic~din23 connects; The clock signal terminal clk of steering logic is connected with the pin clk of FPGA, and the pin pwm of steering logic is connected with the input end of drive circuit module.
The program circuit of described main program module is:
S1-1: liquid crystal display initialization;
S1-2: port initialization allows external interrupt INT0;
S1-3: call the liquid crystal display parameter module is set;
S1-4: judged whether that initiating key presses,, then returned S1-3 if there is not initiating key to press; If there is initiating key to press, then carry out next step;
S1-5: call data processing module;
S1-6: judged whether external interrupt,, then returned S1-3 if external interrupt is arranged; If there is not external interrupt, then return S1-5.
The program circuit of described liquid crystal writing module is:
S2-1: " state " inspection;
S2-2: write the least-significant byte address;
S2-3: " state " inspection;
S2-4: write the most-significant byte address;
S2-5: " state " inspection;
S2-6: write order word 24H.
The program circuit of described keyboard processing module is:
S3-1: put 0 for P13~P15;
S3-2: judge whether P10~P12 is 1 entirely,, then return S3-1,, then carry out next step if P10~P12 is not 1 entirely if P10~P12 is 1 entirely;
S3-3: shake is gone in time-delay;
S3-4: judge whether P10~P12 is 1 entirely,, then return S3-1,, then carry out next step if P10~P12 is not 1 entirely if P10~P12 is 1 entirely;
S3-5: put the line scanning initial value;
S3-6: scan bits is from low 6 outputs of P1 mouth;
S3-7: read P10~P12 value;
S3-8: judge whether this row has key to press,, then skip to S3-11,, then carry out next step if this row does not have key to press if this row has key to press;
S3-9: form the next line scan code;
S3-10: judge whether to scan last column,, then return S3-7,, then carry out next step if scan last column if do not scan last column;
S3-11: as the row value, keep P10~P12, P16 and P17, P13~P15 is changed to 0 as train value, row value+train value=key value to P1 mouth value at this moment;
S3-12: the key value is returned to principal function.
The program circuit that described liquid crystal display parameter is provided with module is:
S4-01: judge key assignments corresponding parameters setting option;
S4-11: frequency configuration;
S4-12: original frequency setting;
S4-13: judge whether to press definite key,, then return S4-12,, then carry out next step if supress definite key if do not press definite key;
S4-14: stop frequency configuration;
S4-15: judge whether to press definite key,, then return S4-14,, then carry out next step if supress definite key if do not press definite key;
S4-16: return principal function.
S4-21: dutycycle setting;
S4-22: initial duty cycle setting;
S4-23: judge whether to press definite key,, then return S4-22,, then carry out next step if supress definite key if do not press definite key;
S4-24: stop the dutycycle setting;
S4-25: judge whether to press definite key,, then return S4-24,, then carry out next step if supress definite key if do not press definite key;
S4-26: return principal function.
S4-31: amplitude setting;
S4-32: initial amplitude setting;
S4-33: judge whether to press definite key,, then return S4-32,, then carry out next step if supress definite key if do not press definite key;
S4-34: the termination amplitude is provided with;
S4-35: judge whether to press definite key,, then return S4-34,, then carry out next step if supress definite key if do not press definite key;
S4-36: return principal function.
S4-41: the time is provided with;
S4-42: time T is set;
S4-43: judge whether to press definite key,, then return S4-42,, then carry out next step if supress definite key if do not press definite key;
S4-44: return principal function.
The program circuit of described data processing module is:
S5-1: data initialization;
S5-2: open timer 0;
S5-3: judge whether TF0 equals 1,, then carry out next step,, then continue to judge whether TF0 equals 1 if TF0 is not equal to 1 if TF0 equals 1;
S5-4: judge whether count value reaches setting value,, then return S5-3,, then carry out next step if count value has reached setting value if do not reach setting value;
S5-5: the value that changes frequency, dutycycle and amplitude;
S5-6: judge whether to change to final data,, then return S5-3,, then return S5-1 if change to final data if do not change to final data.
Owing to adopt technique scheme; Design of power of the present invention can be provided with voltage amplitude, frequency and dutycycle arbitrarily; Its voltage amplitude variation scope is 0~32V; Frequency range is 0~25000HZ, and the change in duty cycle scope is 0~100%, can simulate the actual working state of variety classes solenoid valve.The invention design of power can also define the one-period time T, and T=N * 10s, N are positive integer.In this cycle, the power source voltage amplitude, frequency, the dutycycle that are applied to the automobile electromagnetic valve can change arbitrarily, like voltage amplitude in one-period internal linear or non-linear increase or minimizing; Frequency is in one-period internal linear or non-linear increase or minimizing; Dutycycle is the cycle infinite loop with T in one-period internal linear or non-linear increase or minimizing then; Design of power of the present invention can be passed through LCD amplitude, frequency, the dutycycle of display power supply in real time, through keyboard the needed power data of user is set.
The explanation of accompanying drawing table
Fig. 1 is a kind of structural representation of the present invention;
Fig. 2 is the circuit diagram of the matrix keyboard 3 among Fig. 1;
Fig. 3 is the structural representation of the inner PWM waveform generation module of FPGA6 among Fig. 1;
Fig. 4 is a main program module process flow diagram of the present invention;
Fig. 5 is a keyboard processing module process flow diagram of the present invention;
Fig. 6 is a liquid crystal writing module process flow diagram of the present invention;
Fig. 7 is that liquid crystal display parameter of the present invention is provided with the module process flow diagram;
Fig. 8 is a data processing module process flow diagram of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is done further description:
A kind of power supply that is used for detecting electromagnetic valve quality of automobile, the model of single-chip microcomputer 4 is AT89C55; The model of LCD5 is built-in T6963C controller LCD MODULE.Concrete structure is as shown in Figure 1: three column rules of matrix keyboard 3 are connected with single-chip microcomputer 4 corresponding port P10~P15 with three alignments; Two ports of the 12M crystal oscillator of clock circuit 2 connect with single-chip microcomputer 4 corresponding XTAL2, XTAL1 pins, and reset circuit 1 output terminal is connected with the RST pin of single-chip microcomputer 4; Port P00~the P07 of single-chip microcomputer 4 is connected with LCD5 corresponding port DB0~DB7; The writing of single-chip microcomputer 4, read signal pin/WR and/RD are corresponding with LCD5 writes, read signal pin/WR is connected with/RD, and the P16 of single-chip microcomputer 4, P17 pin be corresponding with LCD5/and CE, C/D pin connect; Port P00~the P07 of single-chip microcomputer 4 is connected with FPGA6 corresponding port DB0~DB7; Port P20~the P22 of single-chip microcomputer 4 is connected with FPGA6 corresponding port f_c, q_c, v_c; Write signal pin/the WR of single-chip microcomputer 4 is connected with write signal pin/WR of FPGA6; The reset signal pin RST of single-chip microcomputer 4 is connected with the reset signal pin RST of FPGA6; The pin clk of FPGA6 is connected with the pin clk of clock module 7, and the pin vcc of FPGA6 is connected with the pin vcc of power module 8, and the pin pwm of FPGA6 is connected with the input end of drive circuit module 9.
The program that main program module, liquid crystal writing module, keyboard processing module, liquid crystal display parameter are provided with module and data processing module writes the internal storage of single-chip microcomputer 2, and the inner PWM waveform generation module of FPGA is programmed with hardware description language.
The circuit diagram of matrix keyboard 3 is as shown in Figure 2: three column rules are connected with+5V power supply through pull-up resistor R1, R2, R3, and three column rules are imported through one 3 and are connected with the INT0 pin of single-chip microcomputer 4.
The structure of the inner PWM waveform generation module of FPGA6 is as shown in Figure 3: port DB0~DB7 of FPGA6, f_c, q_c, v_c connect with data distributor 10 corresponding data input pin din0~din7, frequency control terminal f_c, dutycycle control end q_c, amplitude control end v_c; Data output end dout0~the dout7 of data distributor 10 is connected with amplitude registers 11, duty cycle register 12 and frequency register 14 corresponding data input pin din0~din7 respectively; Data output end dout0~the dout7 of amplitude registers 11 connects with steering logic 13 corresponding data input pin din0~din7; Data output end dout0~the dout7 of duty cycle register 12 connects with steering logic 13 corresponding data input pin din8~din15; Data output end dout0~the dout7 of frequency register 14 connects with steering logic 13 corresponding data input pin din16~din23; The clock signal terminal clk of steering logic 13 is connected with the pin clk of FPGA6, and the pin pwm of steering logic 13 is connected with the input end of drive circuit module 9.
The program circuit of main program module is as shown in Figure 4:
S1-1: liquid crystal display initialization;
S1-2: port initialization allows external interrupt INT0;
S1-3: call the liquid crystal display parameter module is set;
S1-4: judged whether that initiating key presses,, then returned S1-3 if there is not initiating key to press; If there is initiating key to press, then carry out next step;
S1-5: call data processing module;
S1-6: judged whether external interrupt,, then returned S1-3 if external interrupt is arranged; If there is not external interrupt, then return S1-5.
The program circuit of keyboard processing module is as shown in Figure 5:
S3-1: put 0 for P13~P15;
S3-2: judge whether P10~P12 is 1 entirely,, then return S3-1,, then carry out next step if P10~P12 is not 1 entirely if P10~P12 is 1 entirely;
S3-3: shake is gone in time-delay;
S3-4: judge whether P10~P12 is 1 entirely,, then return S3-1,, then carry out next step if P10~P12 is not 1 entirely if P10~P12 is 1 entirely;
S3-5: put the line scanning initial value;
S3-6: scan bits is from low 6 outputs of P1 mouth;
S3-7: read P10~P12 value;
S3-8: judge whether this row has key to press,, then skip to S3-11,, then carry out next step if this row does not have key to press if this row has key to press;
S3-9: form the next line scan code;
S3-10: judge whether to scan last column,, then return S3-7,, then carry out next step if scan last column if do not scan last column;
S3-11: as the row value, keep P10~P12, P16 and P17, P13~P15 is changed to 0 as train value, row value+train value=key value to P1 mouth value at this moment;
S3-12: the key value is returned to principal function.
The program circuit of liquid crystal writing module is as shown in Figure 6:
S2-1: " state " inspection;
S2-2: write the least-significant byte address;
S2-3: " state " inspection;
S2-4: write the most-significant byte address;
S2-5: " state " inspection;
S2-6: write order word 24H.
It is as shown in Figure 7 that the liquid crystal display parameter is provided with the program circuit of module:
S4-01: judge key assignments corresponding parameters setting option;
S4-11: frequency configuration;
S4-12: original frequency setting;
S4-13: judge whether to press definite key,, then return S4-12,, then carry out next step if supress definite key if do not press definite key;
S4-14: stop frequency configuration;
S4-15: judge whether to press definite key,, then return S4-14,, then carry out next step if supress definite key if do not press definite key;
S4-16: return principal function.
S4-21: dutycycle setting;
S4-22: initial duty cycle setting;
S4-23: judge whether to press definite key,, then return S4-22,, then carry out next step if supress definite key if do not press definite key;
S4-24: stop the dutycycle setting;
S4-25: judge whether to press definite key,, then return S4-24,, then carry out next step if supress definite key if do not press definite key;
S4-26: return principal function.
S4-31: amplitude setting;
S4-32: initial amplitude setting;
S4-33: judge whether to press definite key,, then return S4-32,, then carry out next step if supress definite key if do not press definite key;
S4-34: the termination amplitude is provided with;
S4-35: judge whether to press definite key,, then return S4-34,, then carry out next step if supress definite key if do not press definite key;
S4-36: return principal function.
S4-41: the time is provided with;
S4-42: time T is set;
S4-43: judge whether to press definite key,, then return S4-42,, then carry out next step if supress definite key if do not press definite key;
S4-44: return principal function.
The program circuit of data processing module is as shown in Figure 8:
S5-1: data initialization;
S5-2: open timer 0;
S5-3: judge whether TF0 equals 1,, then carry out next step,, then continue to judge whether TF0 equals 1 if TF0 is not equal to 1 if TF0 equals 1;
S5-4: judge whether count value reaches setting value,, then return S5-3,, then carry out next step if count value has reached setting value if do not reach setting value;
S5-5: the value that changes frequency, dutycycle and amplitude;
S5-6: judge whether to change to final data,, then return S5-3,, then return S5-1 if change to final data if do not change to final data.
This embodiment design of power can be provided with voltage amplitude, frequency and dutycycle arbitrarily; Its voltage amplitude variation scope is 0~32V; Frequency range is 0~25000HZ, and the change in duty cycle scope is 0~100%, can simulate the actual working state of variety classes solenoid valve.The invention design of power can also define the one-period time T, and T=N * 10s, N are positive integer.In this cycle, the power source voltage amplitude, frequency, the dutycycle that are applied to the automobile electromagnetic valve can change arbitrarily, like voltage amplitude in one-period internal linear or non-linear increase or minimizing; Frequency is in one-period internal linear or non-linear increase or minimizing; Dutycycle is the cycle infinite loop with T in one-period internal linear or non-linear increase or minimizing then; The invention design of power can be passed through LCD amplitude, frequency, the dutycycle of display power supply in real time, through keyboard the needed power data of user is set.