CN101546959A

CN101546959A - Double-power switch and power supply circuit using double-power switch

Info

Publication number: CN101546959A
Application number: CN200810087632A
Authority: CN
Inventors: 龚能辉; 朱冠任; 陈俊聪; 邱子寰
Original assignee: Richtek Technology Corp
Current assignee: Richtek Technology Corp
Priority date: 2008-03-25
Filing date: 2008-03-25
Publication date: 2009-09-30
Anticipated expiration: 2028-03-25
Also published as: CN101546959B

Abstract

The invention provides a double-power switch and a power supply circuit using the double-power switch. The double-power switch comprises a PMOS power switch and an NMOS power switch which are connected in parallel and operated according to preset conditions respectively.

Description

Two power switchs and the power supply circuit that uses two power switchs

Technical field

The present invention relates to a kind of pair of power switch and the power supply circuit that uses two power switchs.

Background technology

Power supply circuit (voltage regulator) comprises linear power supply supply circuit (linearregulator), buck (buck converter), boost type (boost converter), step-down/up type (buck-boost converter), back pressure type (inverter converter), flyback (fly-back converter), AC-DC conversion formula (AC-DC converter) etc.In above-mentioned various power supply circuits, all must use power switch.Generally speaking, as depicted in figs. 1 and 2, power switch or use PMOS transistor (Fig. 1 10) separately or use nmos pass transistor (Fig. 2 20) separately.When

power switch

10 or 20 conductings, electric current from input Vin flow to output end vo ut (structure on power supply circuit is decided, this output end vo ut not necessarily power supply circuit to the output of load circuit; In this manual, input Vin and output end vo ut refer to the two ends of power switch respectively).

Power switch

10 or 20 operation are by 15,25 controls of control circuit.Under some was used, because NMOS power switch 20 needs higher grid voltage, the collocation charge pump 23 of therefore may still needing boosted, and makes control circuit 25 can obtain required high voltage.

The shortcoming of above-mentioned prior art is: when using the PMOS transistor separately, its conducting resistance is higher; When using nmos pass transistor separately, power dissipation is higher.Which kind of transistor the circuit designers fibrous root uses according to the incompatible judgement of applied field, and can not have both length concurrently.

Because above shortcoming, the present invention proposes a kind of pair of power switch structure.

Summary of the invention

First purpose of the present invention is at the deficiencies in the prior art, proposes a kind of pair of power switch.

Second purpose of the present invention is to propose a kind of power supply circuit.

For reaching above-mentioned purpose, from one of them angle, the invention provides a kind of pair of power switch, comprise: PMOS power switch and NMOS power switch in parallel.PMOS power switch and NMOS power switch are operated according to preset condition separately, for example can operate according to the magnitude of current of two power switchs two ends pressure reduction or arbitrary power switch.

In the above-mentioned pair of power switch, can more include first and second control circuits, to control the operation of this PMOS power switch and NMOS power switch respectively.In addition, can more include decision circuitry in two power switchs, whether enable first or second control circuit or both with decision.

The present invention also provides a kind of power supply circuit that uses above-mentioned pair of power switch.

Below by specific embodiment is illustrated in detail, when the effect that is easier to understand purpose of the present invention, technology contents, characteristics and is reached.

Description of drawings

Fig. 1 and Fig. 2 are the schematic circuit diagram of prior art;

Fig. 3 is a schematic circuit diagram, and one embodiment of the present of invention are shown;

Fig. 4 is a schematic circuit diagram, and an alternative embodiment of the invention is shown;

Fig. 5 is the more specifically embodiment of Fig. 3 circuit;

Fig. 6 is the more specifically embodiment of Fig. 4 circuit;

Fig. 7 and Fig. 8 mark the application examples that of the present invention pair of power switch is applied to the buck power supply circuit.

Symbol description among the figure

10 PMOS transistors

15 control circuits

20 nmos pass transistors

23 charge pumps

25 control circuits

30 decision circuitry

31,32 enable signal

33 comparators

34 voltage sources

35,36 comparators

38 logical circuits

R1-R6 resistance

The Vin input

The Vout output

Vref1, Vref2 reference voltage

Embodiment

Please refer to first embodiment shown in Figure 3, in the present invention,, and optionally determine to come conduction current between input Vin and output end vo ut by what person (or both) with

PMOS power switch

10 and 20 parallel connections of NMOS power switch.The operation of PMOS power switch 10 is controlled by control circuit 15, and the operation of NMOS power switch 20 is then controlled by control circuit 25.In addition, still comprise a decision circuitry 30 in the circuit, decision circuitry 30 decides and enables control circuit 15 or 25 (or both) thus.

Demand on circuit designers is decided, and decision circuitry 30 can determine whether sending and enable

signal

31,32 according to various judgment modes, and is not limited to send two and enables

signal

31,32 and control two control circuits 15 and 25.For example, can make control circuit 15 maintenance work, control two control circuits 25 and only enable signal 32 with one.

Decision circuitry 30 produces the judgment mode that enables signal, for example can be: according to the pressure reduction at power switch in parallel two ends, decide enable control circuit 15 25 or both.Again for an example more specifically, suppose to make control circuit 15 maintenance work, and the conducting resistance that makes PMOS power switch 10 is 1 ohm, the conducting resistance of NMOS power switch 20 is 0.1 ohm, then can be designed to: as Vin during Vout+0.1V, send and enable signal 32 and enable control circuit 25, when Vin＜Vout+0.001V, then stop to enable control circuit 25.

Reach the circuit of above-mentioned arbitration functions, for example can consult Fig. 5, decision circuitry 30 extracts dividing potential drop with the bleeder circuit of R1, R2 and R3, R4 from input Vin and output end vo ut respectively; After the dividing potential drop of output end vo ut extraction added the voltage of voltage source 34, the negative input end of input comparator 33 was from the dividing potential drop of the input Vin extraction direct positive input terminal of input comparator 33 then.Comparator 33 produces and enables signal 32 according to both results relatively.To enable signal 32 different with the benchmark that stops to enable signal 32 (Vout+0.1V and Vout+0.001V) because of sending, so comparator 33 should use hysteresis comparator; If both benchmarks are identical, then can use general comparator.It should be noted that in addition, voltage source 34 for conceptive be convenient to understand illustrate, represent the equivalent electric potential difference of a broad sense; In fact, might not need to be provided with the voltage source 34 of an entity.For example,, design suitable input voltage error amount (Input offset voltage), can equivalent reach the compensate function of voltage source 34 if between the input of comparator 33.

In Fig. 3 circuit, decision circuitry 30 produces the judgment mode that enables signal, also can be: according to the magnitude of current of two power switchs, decide enable control circuit 15 25 or both.See also another embodiment of Fig. 4, the magnitude of current of establishing by PMOS power switch 10 is I _PMOS, be I by the magnitude of current of NMOS power switch 20 _NMOS, then decision circuitry 30 receives relevant I respectively _PMOSAnd I _NMOSInformation, and determine whether sending according to those information and enable signal.Similarly, decision circuitry 30 is not limited to send two and enables

signal

31,32, also can only send one.This moment hypothesis makes control circuit 15 maintenance work, and to make the conducting resistance of PMOS power switch 10 be 1 ohm, and the conducting resistance of NMOS power switch 20 is 0.1 ohm, and then judgment mode for example can be: work as I _PMOSDuring 100mA, send and enable signal 32 and enable control circuit 25, and work as I _NMOSDuring＜10mA, then stop to enable control circuit 25.

Reach the circuit of above-mentioned arbitration functions, for example can consult Fig. 6, receive relevant I in the decision circuitry 30 _PMOSAnd I _NMOSInformation, those information for example are I _PMOSAnd I _NMOSFractional value (K1.I _PMOSAnd K2.I _NMOS).This two electric current is distinctly compared with reference voltage Vref 1 and Vref2 in

comparator

35,36 after being converted to magnitude of voltage by resistance R 5, R6 respectively.The comparative result of comparator 35 is represented I _PMOSWhether greater than 100mA, and the comparative result of comparator 36 is represented I _NMOSWhether greater than 10mA.The comparative result of two

comparators

35,36 carries out logical operation through logical circuit 38: work as I _PMOSDuring greater than 100mA, logical circuit 38 output high levels; Work as I _PMOSBe not more than 100mA, and I _NMOSDuring greater than 10mA, logical circuit 38 is still exported high levels; Only work as I _PMOSBe not more than 100mA, and I _NMOSWhen also being not more than 10mA, logical circuit 38 is just exported low level.Decision circuitry 30 mode according to this produces and enables signal 32, exports control circuit 25 to.

The above is only for illustrating, those skilled in the art be when can doing various conversion under instruction of the present invention, for example change power switch conducting resistance, change the judgment standard of pressure reduction or current value etc., and the hardware of decision circuitry 30 can be corresponding and changes, and will not describe in detail one by one.

Compared to prior art, advantage of the present invention is to start the NMOS power switch 20 that has than low on-resistance when heavy duty, quickens the electric current supply, then closes NMOS power switch 20 (with charge pump) when underload, lowers energy consumption.Therefore, can have the length of PMOS and two kinds of power switchs of NMOS concurrently, make circuit designers more convenient.

Fig. 7 and Fig. 8 mark the Application Example that of the present invention pair of power switch is applied to step-down switching power supply circuit.Those skilled in the art are when analogizing to learn how of the present invention pair of power switch is applied to not illustrate one by one at this in the power supply circuit of other pattern.

Below at preferred embodiment the present invention is described, just the above for making those skilled in the art be easy to understand content of the present invention, is not to be used for limiting interest field of the present invention only; For those skilled in the art, when can in spirit of the present invention, thinking immediately and various equivalence variation.For example, the present invention is not limited to and is applied in the flash of light capacitor charger, also can be applicable to any type of charger.And for example, the circuit of separate blocks that icon is depicted as might not be necessary for independently circuit, and can merge with other circuit, and for example control circuit 15 and 25 promptly may not be two circuit that separate, and can merge into a circuit.For another example, between direct-connected each element of icon or circuit box, can insert the circuit or the element that do not influence the circuit major function.So all according to a notion of the present invention and spirit impartial for it a variation or modification, all should be included in the claim scope of the present invention.

Claims

1. a two power switch is characterized in that, comprises PMOS power switch and NMOS power switch in parallel.

2. pair power switch as claimed in claim 1, wherein, when this pair power switch two ends pressure reduction during greater than first predetermined value, this NMOS power switch starts.

3. pair power switch as claimed in claim 2, wherein, when this pair power switch two ends pressure reduction during less than second predetermined value, this NMOS power switch shut-down operation.

4. pair power switch as claimed in claim 1, wherein, when the magnitude of current by this PMOS power switch during greater than the 3rd predetermined value, this NMOS power switch starts.

5. pair power switch as claimed in claim 4, wherein, when the magnitude of current by this PMOS power switch is not more than the 3rd predetermined value, and the magnitude of current by this NMOS power switch is when being not more than the 4th predetermined value, this NMOS power switch shut-down operation.

6. pair power switch as claimed in claim 1, wherein, this PMOS power switch keeps operation.

7. pair power switch as claimed in claim 1 wherein, more includes first and second control circuits, to control the operation of this PMOS power switch and NMOS power switch respectively.

8. pair power switch as claimed in claim 7 wherein, more includes decision circuitry,

Whether enable first or second control circuit or both with decision.

9. pair power switch as claimed in claim 8, wherein, this decision circuitry comprises a comparator, this comparator produces comparative result according to the pressure reduction at this pair power switch two ends.

10. pair power switch as claimed in claim 9, wherein, this comparator is a hysteresis comparator.

11. as claimed in claim 8 pair of power switch, wherein, this decision circuitry comprises:

On behalf of the signal and first reference voltage of this PMOS power switch magnitude of current, first comparator will compare;

On behalf of the signal and second reference voltage of this NMOS power switch magnitude of current, second comparator will compare; And

Logical circuit carries out logical operation to the output of first and second comparator.

12. a power supply circuit is characterized in that, this power supply circuit uses as described pair of power switch of claim 1 to 11.