CN101540322A - Semiconductor component and manufacturing method thereof - Google Patents

Semiconductor component and manufacturing method thereof Download PDF

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Publication number
CN101540322A
CN101540322A CN200810081976A CN200810081976A CN101540322A CN 101540322 A CN101540322 A CN 101540322A CN 200810081976 A CN200810081976 A CN 200810081976A CN 200810081976 A CN200810081976 A CN 200810081976A CN 101540322 A CN101540322 A CN 101540322A
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CN
China
Prior art keywords
banded
drain
metal
semiconductor element
drain metal
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Pending
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CN200810081976A
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Chinese (zh)
Inventor
薛光博
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YUANJING TECHNOLOGY Co Ltd
Himax Analogic Inc
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YUANJING TECHNOLOGY Co Ltd
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Application filed by YUANJING TECHNOLOGY Co Ltd filed Critical YUANJING TECHNOLOGY Co Ltd
Priority to CN200810081976A priority Critical patent/CN101540322A/en
Publication of CN101540322A publication Critical patent/CN101540322A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a semiconductor component, which comprises zonal polycrystalline silicon, drain metal blocks, source metal blocks, a first zonal source metal layer, a first zonal drain metal layer and a first connecting wire. The source metal blocks are positioned between the drain metal blocks, and the zonal polycrystalline silicon crosses over the drain metal blocks and the source metal blocks. The first zonal source metal layer is electrically connected with part of the source metal blocks. The first zonal drain metal layer is electrically connected with part of the drain metal blocks. The first connecting wire is coupled to the zonal polycrystalline silicon, wherein the first connecting wire is arranged in a net shape. The invention also discloses a method for manufacturing the semiconductor component.

Description

Semiconductor element and manufacture method thereof
Technical field
The present invention relates to a kind of semiconductor element and manufacture method thereof, and be particularly related to a kind of integrated circuit layout of semiconductor element.
Background technology
The physical structure of semiconductor element determines the usefulness of this semiconductor element.For instance, the channel length of semiconductor element and channel width can influence the size of current of semiconductor element.Therefore and then influence the usefulness of semiconductor element because circuit layout directly influences the physical structure of semiconductor element.
The heat energy that semiconductor element produced may damage semiconductor element.Therefore, how to reduce the important issue that heat energy is the semiconductor circuit layout always.Because the size of heat energy is directly proportional with current density, therefore when circuit layout, need reduce current density.
In the middle of semiconductor element, switch element (switch) conducts a large amount of electric currents usually, and in other words, most power consumption is to be produced by switch element.Therefore switch element has determined how many power consumptions semiconductor element can bear.In the middle of traditional switch element layout, usually polysilicon is arranged at and causes electric current on the substrate.When the polysilicon increase, current density can rise thereupon, and the current density of rising may be damaged semiconductor element.
Therefore need a new semiconductor component structure, can reduce current density by scattered current, prevent that the heat energy that is converted by power consumption from damaging semiconductor element.
Summary of the invention
Therefore an aspect of of the present present invention is providing a kind of semiconductor element exactly, can reduce current density by scattered current, avoids semiconductor to be damaged by the heat energy that power consumption produced.
According to one embodiment of the invention, semiconductor element comprises multi-ribbon shape polysilicon, a plurality of drain metal blocks, a plurality of source electrode metal blocks, the first banded source metal, the first banded drain metal layer and first connecting line.Each source metal block is between drain metal blocks, and banded polysilicon is then across drain metal blocks and source metal block.The first banded source metal electrically connects part source metal block.The first banded drain metal layer electrically connects the part drain metal blocks.First connecting line is coupled to banded polysilicon, and these first connecting lines are arranged in netted.
Another aspect of the present invention is exactly that a kind of manufacture method of semiconductor element is being provided, and the semiconductor element that manufactures with the method can reduce current density by scattered current, avoids semiconductor to be damaged by the heat energy that power consumption produced.
According to another embodiment of the present invention, the manufacture method of semiconductor element at first forms a plurality of banded polysilicons on substrate, and forms dielectric layer on these banded polysilicons.Form source metal and drain metal layer then, source electrode and drain electrode on this source metal and the drain metal layer difference contact substrate.Then many first metal wires and many second metals are coupled to drain metal layer and source metal respectively, wherein the two ends of each first metal wire are coupled to drain metal layer, and the two ends of each second metal wire are coupled to source metal.
According to the foregoing description, semiconductor component structure can reduce current density by scattered current, avoids semiconductor to be damaged by the heat energy that power consumption produced.
Description of drawings
For above-mentioned and other purposes of the present invention, feature, advantage and embodiment can be become apparent, being described in detail as follows of accompanying drawing:
Fig. 1 illustrates the semiconductor element of one embodiment of the invention.
Fig. 2 illustrates the manufacture method flow chart of one embodiment of the invention semiconductor element.
Description of reference numerals
101: drain metal blocks 103: the source metal block
105: 107: the second banded drain metal layer of banded polysilicon
111: the second connecting lines of 109: the first connecting lines
115: the three banded drain metal layer of 113: the first banded drain metal layer
119: the first banded source metal of 117: the first metal wires
123: the three banded source metal of 121: the second banded source metal
Metal wire 127 in 125: the second: contact hole
Connecting line 131 in 129: the three: contact hole
201~211: the semiconductor element manufacturing step
Embodiment
Please refer to Fig. 1, it illustrates the semiconductor element of one embodiment of the invention.Semiconductor device as transistor or switch element, mainly comprises multi-ribbon shape polysilicon 105, a plurality of drain metal blocks 101, a plurality of source electrode metal blocks 103.Each source metal block 103 is between two drain metal blocks 101, and 105 of banded polysilicons are across drain metal blocks 101 and source metal block 103.Contact hole 127 is positioned on drain metal blocks 101 and the source metal block 103, and banded polysilicon 105 then is set between two place's of connecing windows 127.To cause electric currents mobile between drain metal blocks 101 and source metal block 103 with connecing place's window 127 for banded polysilicon 105.
Semiconductor element also comprises first banded source metal 119, second banded source metal 121 and the 3rd banded source metal 123.In order to go between on the second banded source metal 121 with the reception sources pole tension, the width of the second banded source metal 121 needs greater than 65 μ m.The first banded source metal 119 electrically connects part source metal blocks 103, to compile from source metal block 103 and the electric current that comes.The 3rd banded source metal 123 electrically connects the first banded source metal 119 and the second banded source metal 121.Source voltage can be passed to the first banded source metal 119 from the second banded source metal 121, electric current thereby can be passed to the second banded source metal 121 from source metal block 103.
Under this circuit layout, source metal block 103 is divided into A, B, C three parts, and electric current also thereby be divided into three parts.In addition, many second metal wires of being made by gold (Au), aluminium (Al), platinum (Pt) or tin (Sn) 125 electrically connect the first banded source metal 119 and the second banded source metal 121, come further scattered current.In other words, electric current disperses to become a plurality of branches, and current density thereby reduce avoids transistor to be destroyed.
Semiconductor element also comprises first banded drain metal layer 113, second banded drain metal layer 107 and the 3rd banded drain metal layer 115.Receive drain voltage owing to need go between on the second banded drain metal layer 107, therefore the width of the second banded drain metal layer 107 also need be greater than 65 μ m.In order to transmit drain voltage, part drain metal blocks 101 directly electrically connects the second banded drain metal layer 107, receives drain voltage.101 of other drain metal blocks electrically connect the second banded drain metal layer 107 via the first banded drain metal layer 113 and the 3rd banded drain metal layer 115, receive drain voltage.Thus, drain metal blocks and electric current also are divided into A, B, C three parts, current density thereby reduce.
Except above-mentioned drain metal blocks and metal level, many first metal wires of making by gold (Au), aluminium (Al), platinum (Pt) or tin (Sn) 117, electrically connect the first banded drain metal layer 113 and the second banded drain metal layer 107, come further scattered current.Again, electric current is dispersed into and is a plurality of branches, and electric current reduces density, and transistor avoids suffering that heat energy destroys.
In order to connect transistorized grid, first connecting line 109 sees through contact hole 131 and is coupled to banded polysilicon 105.It is netted that first connecting line 109 and banded polysilicon 105 overlappings are shaped as H shape.Second connecting line 111 electrically connects first connecting line 109.The 3rd connecting line 129 is electrically connected to first connecting line 109 and second connecting line 111.See through the 3rd connecting line 129, grid voltage can be passed to each first connecting line 109 by second connecting line 111.
By first connecting line 109 and second connecting line 111, grid voltage or other signals can be passed to each banded polysilicon 105 equably, and each banded polysilicon 105 thereby can receive signal simultaneously makes CURRENT DISTRIBUTION more even.
Please refer to Fig. 2, and simultaneously with reference to Fig. 1.Fig. 2 illustrates the manufacture method flow chart of one embodiment of the invention semiconductor element.When making semiconductor element, for example make switch element, at first go up a plurality of banded polysilicon layers 105 of formation and (forming in the polysilicon layer, optionally forming tungsten silicide WSi at silicon substrate (Si) xLayer) (step 201), and on banded polysilicon layer 105, form dielectric layer (boron phosphorus silicate glass for example; BPSG) (step 203).
On drain electrode and source electrode, form contact hole 127 then, and on banded polysilicon 105, form contact hole 131 (step 205), at least two banded polysilicons 105 are set between wherein per two contact holes 127.After step 205, first connecting line 109 is seen through the two ends that contact hole 131 is coupled to banded polysilicon 105, and second connecting line 111 is electrically connected to first connecting line 109 (step 207).
After forming contact hole 127 and 131, form source metal and drain metal layer (step 209).Source metal and drain metal layer comprise source metal block 103, first banded source metal 119, second banded source metal the 121, the 3rd banded source metal 123 respectively, and drain metal blocks 101, first banded drain metal layer 113, second banded drain metal layer the 107, the 3rd banded drain metal layer 115.
Then, first metal wire 117 and second metal wire 125 are coupled to drain metal layer and source metal (step 211) respectively, wherein the two ends of first metal wire 117 all are coupled to drain metal layer, and the two ends of second metal wire 125 all are coupled to source metal.
According to the foregoing description, the source metal of semiconductor element, drain metal and metal wire can reduce current density by scattered current, avoid semiconductor element damaged by heat energy.In addition, because banded polysilicon is netted with adjacent first lead formation H shape, so signal, for example grid voltage can arrive at each banded polysilicon simultaneously via first lead, makes CURRENT DISTRIBUTION more even.
Though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; any technical staff in the technical field of the invention without departing from the spirit and scope of the present invention; when can being used for a variety of modifications and variations, so protection scope of the present invention should be with being as the criterion that claim was defined.

Claims (16)

1. semiconductor element comprises:
Multi-ribbon shape polysilicon;
A plurality of drain metal blocks;
A plurality of source electrode metal blocks, wherein each source metal block is between two drain metal blocks, and this band shape polysilicon is then across this drain metal blocks and this source metal block;
The first banded source metal electrically connects this source metal block of part;
The first banded drain metal layer electrically connects this drain metal blocks of part; And
Many first connecting lines are coupled to this band shape polysilicon, and wherein this first connecting line is arranged in netted.
2. semiconductor element as claimed in claim 1, wherein should the band shape polysilicon and adjacent this first connecting line be arranged in H shape.
3. semiconductor element as claimed in claim 1 also comprises second connecting line and electrically connects this first connecting line, wherein this second connecting line receiving grid pole tension.
4. semiconductor element as claimed in claim 3 also comprises at least one the 3rd connecting line and couples this first connecting line and this second connecting line, and the 3rd connecting line is passed to this first connecting line with this grid voltage by this second connecting line.
5. semiconductor element as claimed in claim 1 also comprises:
The second banded drain metal layer electrically connects this drain metal blocks of part, to receive drain voltage; And
The 3rd banded drain metal layer electrically connects this first banded drain metal layer and this second banded drain metal layer, and the 3rd banded drain metal layer is passed to this first banded drain metal layer with this drain voltage.
6. semiconductor element as claimed in claim 5, wherein the width of this second banded drain metal layer is greater than 65 μ m.
7. semiconductor element as claimed in claim 5, also comprise many first metal wires, connect this first banded drain metal layer and this second banded drain metal layer in the lead-in wire mode, this first metal wire is passed to this first banded drain metal layer with this drain voltage by this second banded drain metal layer.
8. semiconductor element as claimed in claim 7, wherein the material of this first metal wire is gold, aluminium, platinum or tin.
9. semiconductor element as claimed in claim 1 also comprises:
The second banded source metal; And
Many second metal wires electrically connect this second banded source metal and this first banded source metal.
10. semiconductor element as claimed in claim 9, wherein the material of this second metal wire is gold, aluminium, platinum or tin.
11. semiconductor element as claimed in claim 9, wherein the width of this second banded source metal is greater than 65 μ m.
12. semiconductor element as claimed in claim 1 also comprises a plurality of contact holes and is positioned on this drain metal blocks, wherein should the band shape polysilicon be arranged at this and connects between place's window.
13. the manufacture method of a semiconductor element comprises:
On substrate, form a plurality of banded polysilicons;
On this band shape polysilicon, form dielectric layer;
Form source metal and drain metal layer, wherein this source metal and this drain metal layer contact source electrode and the drain electrode on this substrate respectively;
Many first metal wires are coupled to this drain metal layer, and wherein the two ends of each first metal wire are coupled to this drain metal layer; And
Many second metal wires are coupled to this source metal, and wherein the two ends of each second metal wire are coupled to this source metal.
14. manufacture method as claimed in claim 13 also comprises the two ends that many first connecting lines are coupled to this band shape polysilicon.
15. manufacture method as claimed in claim 14 also comprises second connecting line is coupled to this first connecting line.
16. manufacture method as claimed in claim 13 also comprises a plurality of contact holes of formation, being provided with at least two between wherein per two these contact holes should the band shape polysilicon.
CN200810081976A 2008-03-21 2008-03-21 Semiconductor component and manufacturing method thereof Pending CN101540322A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200810081976A CN101540322A (en) 2008-03-21 2008-03-21 Semiconductor component and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200810081976A CN101540322A (en) 2008-03-21 2008-03-21 Semiconductor component and manufacturing method thereof

Publications (1)

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CN101540322A true CN101540322A (en) 2009-09-23

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Application Number Title Priority Date Filing Date
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106033750A (en) * 2014-11-26 2016-10-19 台达电子工业股份有限公司 Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106033750A (en) * 2014-11-26 2016-10-19 台达电子工业股份有限公司 Semiconductor device
CN106033750B (en) * 2014-11-26 2018-10-16 台达电子工业股份有限公司 Semiconductor device

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Open date: 20090923