CN101533840B - Capacitance device, resistance device and attitude measurement system using the device - Google Patents

Abstract

The invention provides a capacitive device, a resistive device and an attitude measurement system using the device. The capacitive and resistive devices are based on integrated circuit technology. The capacitive device includes: an integrated circuit with one or more capacitive devices. One or more first conductors on the surface are connected to the first plates of one or more capacitive devices in one-to-one correspondence, and the sealed cavity formed between the surface of the integrated circuit and the package of the integrated circuit covers the one or more first electrodes. A conductor, one or more second conductors, and a third conductor incompatible with each other and an insulator are located in the sealed cavity. The resistance device includes: an integrated circuit; one or more sixth conductors and one or more seventh conductors exposed on the surface of the integrated circuit, and a sealed cavity formed between the surface of the integrated circuit and the package of the integrated circuit covers the One or more sixth conductors and one or more seventh conductors, a mutually incompatible eighth conductor and an insulator are located in the sealed cavity.

Description

Capacitance device, resistance device and attitude measurement system using the device

technical field

The invention relates to the field of sensors, in particular to a capacitance device, a resistance device based on integrated circuit technology and a measuring system using the device.

Background technique

In many fields of industrial production and daily life, it is necessary to detect changes in the attitude of objects. One measurement principle is to use gravity to make the capacitance value of the capacitor or the resistance value of the resistor in the measuring instrument change with the change of the attitude of the measuring instrument, so as to achieve the purpose of measurement.

The resistance value of a resistor is related to the length, cross-sectional area and conductivity of the resistance material. When the length, cross-sectional area and conductivity of the resistance material change under the action of external force, the resistance value also changes accordingly.

Under the action of gravity, there are two main methods to realize the change of capacitance value of the capacitor with the attitude change of the measuring instrument. One is that the plates constituting the capacitor are fixed, and there are two kinds of dielectrics that are incompatible with each other and have different dielectric constants between the plates. When the attitude of the measuring instrument changes, the distribution of the two dielectrics between the capacitor plates also changes, resulting in a change in capacitance. The other is that one pole plate of the capacitor is in a fixed position, and the other pole plate changes with the attitude of the measuring instrument, and its position relative to the fixed pole plate also changes accordingly, so that the capacitance value changes. The common principle of these two types of implementation methods is that the change of the attitude of the measuring instrument causes the change of the effective plate area of the capacitor, which is reflected as the change of the capacitance value. According to the principle of a capacitor using gravity, many measuring instruments for measuring the attitude change of objects have appeared. For example, Chinese invention patents 86100001, 86202257 and 88104645 provide sensors or measuring instruments for measuring the attitude of objects.

However, the volume and power consumption of the traditional capacitive or resistive sensing devices are relatively large, and it is difficult to measure the attitude changes of small-sized objects, and it is also difficult to meet the needs of various electronic products in the direction of small size and low power consumption. development needs. In recent years, due to the development of microelectronics technology and micromachining technology, sensing devices are developing in the direction of miniaturization.

Contents of the invention

In view of this, the present invention overcomes the defects and deficiencies in the traditional attitude sensing device, and provides a capacitance device and a resistance device based on integrated circuit technology and an attitude measurement system using the device.

According to a first aspect of the present invention, there is provided a capacitive device based on integrated circuit technology, comprising: an integrated circuit integrating one or more capacitive devices; one or more first conductors integrated on the integrated circuit and Exposed on the surface of the integrated circuit, connected to the first plates of the one or more capacitive devices in one-to-one correspondence; one or more second conductors, integrated on the integrated circuit and exposed on the integrated circuit The surface of the circuit; a sealed cavity formed between the surface of the integrated circuit and the package of the integrated circuit, covering the one or more first electrical conductors and the one or more second electrical conductors; the third conductive The body is located in the sealed cavity; the insulator is located in the sealed cavity and is incompatible with the third conductor.

Further, the first plate of the capacitive device is divided into a plurality of first plate parts, and the first conductor is correspondingly divided into a plurality of first conductor parts, and the first conductor part and the corresponding The first plate portion is connected.

Further, the first plate of the one or more capacitors is directly exposed on the surface of the integrated circuit instead of the one or more first conductors, and the sealed cavity covers the one or more capacitors The first plate of the piece and the one or more second electrical conductors.

Further, the first plate of the capacitive device is divided into a plurality of first plate parts.

Further, the capacitive device further includes: one or more fourth conductors, integrated on the integrated circuit, connected to the second plates of the one or more capacitive devices in one-to-one correspondence; one or more The fifth conductor is integrated on the integrated circuit and is connected to the one or more second conductors in a one-to-one correspondence.

According to the second aspect of the present invention, there is provided a resistance device based on integrated circuit technology, including: an integrated circuit; one or more sixth conductors integrated on the integrated circuit and exposed on the surface of the integrated circuit one or more seventh conductors integrated on the integrated circuit and exposed on the surface of the integrated circuit; a sealed cavity formed between the surface of the integrated circuit and the package of the integrated circuit, covering the One or more sixth electrical conductors and the one or more seventh electrical conductors; the eighth electrical conductor is located in the sealed cavity; the insulator is located in the sealed cavity and is mutually incompatible with the eighth electrical conductor compatible.

Further, the resistance device further includes: one or more ninth conductors, integrated on the integrated circuit, connected to the one or more sixth conductors in one-to-one correspondence; one or more tenth conductors bodies, integrated on the integrated circuit, and connected to the one or more seventh conductors in a one-to-one correspondence.

According to a third aspect of the present invention, an attitude measurement system is provided, comprising:

The capacitive device according to the first aspect/the resistive device according to the second aspect;

a capacitance/resistance detection module, connected to the capacitance/resistance device, for detecting and outputting the capacitance/resistance value of the capacitance/resistance device;

The capacitance/resistance value processing and output module is connected with the capacitance/resistance value detection module, and is used for processing the capacitance/resistance value and outputting attitude parameters.

According to a fourth aspect of the present invention, a multi-dimensional attitude measurement system is provided, comprising:

A plurality of attitude measurement systems as described in the third aspect are used for attitude measurement and output a plurality of attitude parameters;

The multi-dimensional signal processing system is connected with the plurality of attitude measurement systems, and is used for performing multi-dimensional signal processing on the plurality of attitude parameters to realize multi-dimensional attitude measurement.

The capacitance/resistance device provided by the present invention has different capacitance/resistance values according to its attitude, and the attitude measurement system can obtain attitude information, such as the angle, angular velocity and angular acceleration of the object, according to the measurement and processing of the capacitance/resistance value and other information. The capacitive device, the resistive device, the attitude measurement system and the multi-dimensional attitude measurement system provided by the invention are realized by integrated circuit technology, can be monolithically integrated, and have the characteristics of low power consumption and miniaturization.

Description of drawings

The specific embodiment of the present invention is described in further detail below in conjunction with accompanying drawing, in the accompanying drawing:

1 is a cross-sectional view of a horizontally placed capacitive device according to an embodiment of the present invention;

2 is a cross-sectional view of a horizontally placed capacitor device according to another embodiment of the present invention;

3 is a cross-sectional view of a horizontally placed capacitive device according to yet another embodiment of the present invention;

Fig. 4 is a sectional view of a horizontally placed capacitor device according to yet another embodiment of the present invention

Fig. 5 is a vertically placed side sectional view of the capacitive device according to an embodiment of the present invention of Fig. 1;

Fig. 6 is a vertically placed front sectional view of a capacitive device having 8 capacitive devices according to an embodiment of the present invention;

7 is a cross-sectional view of a horizontally placed resistance device according to an embodiment of the present invention;

Fig. 8 is a vertically placed side sectional view of the resistance device of an embodiment of the present invention shown in Fig. 7;

Fig. 9 is a vertically placed front sectional view of a resistance device with 8 equivalent resistances according to an embodiment of the present invention;

Fig. 10 is a structural block diagram of an attitude measurement system according to an embodiment of the present invention;

Fig. 11 is a schematic diagram of a three-dimensional attitude measurement system according to an embodiment of the present invention.

Detailed ways

In a specific embodiment, a CMOS (Complementary Metal Oxide Semiconductor, Complementary Metal Oxide Semiconductor) integrated circuit technology is taken as an example to describe a capacitance device, a resistance device, and an attitude measurement system based on the capacitance/resistance device.

FIG. 1 is a cross-sectional view of a horizontally placed capacitor device according to an embodiment of the present invention. As shown in FIG. 1 , the capacitive device includes: an integrated circuit integrating a capacitive device and a package outside the integrated circuit, and the integrated circuit refers to a bare chip manufactured by an integrated circuit process. In one embodiment of the present invention, the capacitive device is a Metal-Insulator-Metal (Metal-Insulator-Metal) capacitor, that is, a MIM capacitor. 101 represents the insulating medium _{SiO 2} (silicon dioxide) in the CMOS integrated circuit, 102 represents the second pole plate of the MIM capacitor, 103 represents the first pole plate of the MIM capacitor, and the first pole plate 103 of the MIM capacitor passes through the via hole 113 is connected to the first conductor 104 in the integrated circuit, and the first conductor 104 is exposed on the surface of the integrated circuit. 105 represents the second conductor in the integrated circuit, and the second conductor 105 is not connected to the two plates 102 and 103 of the MIM capacitor. 106 represents a passivation layer on the surface of the integrated circuit, and 107 represents an insulating package outside the integrated circuit. The passivation layer 106 and the package 107 together form a sealed cavity on the surface of the integrated circuit, and the sealed cavity covers the first conductor 104 and the second conductor 105. 108 represents the third conductor in the sealed cavity, and 109 represents the sealed cavity The insulator in , the conductor 108 and the insulator 109 are incompatible with each other. 110 represents a fourth conductor in the integrated circuit, and the fourth conductor 110 is connected to the second plate 102 of the MIM capacitor through a via 112 . 111 represents a fifth conductor in the integrated circuit, and the fifth conductor 111 is connected to the second conductor 105 through a via hole 114 . When the capacitive device is integrated in the same chip with other modules or circuits such as the capacitance value detection module, or even the whole attitude measurement system, the fourth conductor 110 and the fifth conductor 111 are used to connect with the module or circuit, and are capacitors. The connection wire that connects the device to the module or circuit. In one embodiment of the present invention, the first conductor 104 in the integrated circuit of the capacitor device is realized by the first conductive layer of the integrated circuit of the capacitor device, for example, realized by the top metal layer of the CMOS integrated circuit technology; the first conductor 104 of the MIM capacitor Pole plate 103 is realized by the second conductive layer of the integrated circuit of capacitance device, for example realizes by the second top layer metal layer of CMOS integrated circuit technology, and this time top layer metal layer is only used for the metal layer of the first polar plate of MIM electric capacity; MIM The second plate 102 of the capacitor is implemented by the third conductive layer of the integrated circuit of the capacitor device, for example by the top metal layer of the CMOS integrated circuit process.

FIG. 2 is a cross-sectional view of a horizontally placed capacitor device according to another embodiment of the present invention. As shown in Figure 2, the first plate of the MIM capacitor in the integrated circuit of the capacitor device is divided into two first plate parts 103 and 103', and the first conductor in the integrated circuit of the capacitor device is also divided into The two first conductor parts 104 and 104', the first plate parts 103 and 103' of the capacitor are respectively connected to the first conductor parts 104 and 104' through via holes 113 and 113'. A sealed cavity formed between the surface of the integrated circuit and the insulating package 107 covers the first conductor portions 104 and 104 ′ and the second conductor 105 . The rest of the capacitive device shown in FIG. 2 is the same as the capacitive device shown in FIG. 1 . In one embodiment of the present invention, the first conductor parts 104 and 104' in the integrated circuit of the capacitor device are realized by the first conductive layer of the integrated circuit of the capacitor device, for example, realized by the top metal layer of the CMOS integrated circuit technology; MIM The first plate parts 103 and 103' of the capacitor are implemented by the second conductive layer of the integrated circuit of the capacitor device, for example, realized by the sub-top metal layer of the CMOS integrated circuit technology, and the sub-top metal layer is only used for the first layer of the MIM capacitor. The metal layer of a pole plate; the second pole plate 102 of the MIM capacitor is implemented by the third conductive layer of the integrated circuit of the capacitor device, for example, realized by the top metal layer of the CMOS integrated circuit technology.

FIG. 3 is a cross-sectional view of a horizontally placed capacitor device according to another embodiment of the present invention. As shown in Figure 3, the first pole plate 103 of MIM capacitor is directly exposed on the surface of the integrated circuit, and the sealed cavity formed between the surface of the integrated circuit and the insulating package 107 covers the first pole plate 103 and the second pole plate 103 of the MIM capacitor. Conductor 105. The rest of the capacitive device shown in FIG. 3 is the same as the capacitive device shown in FIG. 1 . In one embodiment of the present invention, the first plate 103 of the MIM capacitor is realized by the first conductive layer of the integrated circuit of the capacitor device, and the second plate 102 of the MIM capacitor is realized by the second conductive layer of the integrated circuit in the capacitor device.

FIG. 4 is a cross-sectional view of a horizontally placed capacitor device according to yet another embodiment of the present invention. As shown in Figure 4, the first plate of the MIM capacitor in the integrated circuit of the capacitor device is divided into two first plate parts 103 and 103', and the first plate parts 103 and 103' are directly exposed on the surface of the integrated circuit , the sealed cavity formed between the surface of the integrated circuit and the insulating package 107 covers the first plate parts 103 and 103 ′ and the second conductor 105 of the MIM capacitor. The rest of the capacitive arrangement shown in FIG. 4 is the same as that shown in FIG. 1 . In one embodiment of the present invention, the first plate parts 103 and 103' of the MIM capacitor are realized by the first conductive layer of the integrated circuit of the capacitor device, and the second plate 102 of the MIM capacitor is realized by the first conductive layer of the integrated circuit of the capacitor device. Two conductive layers are realized.

FIG. 5 is a side sectional view of the capacitor device shown in FIG. 1 placed vertically according to an embodiment of the present invention. As shown in Figure 5, when the third electrical conductor 108 is in contact with the first electrical conductor 104 and the second electrical conductor 105 at the same time, the third electrical conductor 108 acts as a wire connection, at this time the first plate 103 of the MIM capacitor The first conductor 104 , the third conductor 108 , the second conductor 105 and the fifth conductor 111 are connected; the second plate 102 of the MIM capacitor is connected to the fourth conductor 110 . The capacitance between the fourth conductor 110 and the fifth conductor 111 is the capacitance of the MIM capacitor. When the third conductor 108 is not in contact with the first conductor 104 and the second conductor 105 at the same time, there is an open circuit between the first plate 103 and the fifth conductor 111 of the MIM capacitor, so the fourth conductor 110 and the fifth conductor The conductors 111 are open, and the capacitance value is zero. Since the sealed cavity includes the third conductor 108 and the insulator 109 which are incompatible with each other, when the posture of the capacitive device changes, the third conductor 108 is located at the upper or lower part of the sealed cavity under the action of gravity. The contact relationship between the third conductor 108 and the first conductor 104 and the second conductor 105 changes as the posture of the capacitive device changes, and the capacitance value between the fourth conductor 110 and the fifth conductor 111 also changes accordingly .

FIG. 6 is a vertical front sectional view of a capacitive device with 8 capacitive devices according to an embodiment of the present invention. As shown in Figure 6, 8 independent capacitors are integrated in the same integrated circuit, and the first plates of the 8 MIM capacitors are respectively connected to the 8 first conductors, corresponding to the 8 first conductors. The eight second conductors, the second plates of the eight MIM capacitors are respectively connected to the eight fourth conductors, and the eight second conductors are respectively connected to the eight fifth conductors. 8 independent capacitive devices and corresponding first, second, fourth and fifth electrical conductors are denoted by 11-18. A sealed cavity is formed between the surface of the integrated circuit of the capacitor device and the package of the integrated circuit, the sealed cavity covers 8 first conductors and 8 second conductors, and the third conductor and insulator are located in the sealed cavity . Only the first conductor 104, the second conductor 105, the passivation layer 106 on the surface of the integrated circuit and the third conductor 108 connected to the first plate 103 of the MIM capacitor in the integrated circuit of the capacitor device are shown in the figure. As the position of the capacitive device changes, the contact relationship between the third conductive body 108 and the eight first conductive bodies 104 and the eight second conductive bodies 105 changes, and the eight capacitance values output by the capacitive device also change accordingly. When the third conductor 108 is in contact with the first conductor 104 and the second conductor 105 at the same time, the fourth conductor and the fifth conductor are connected, and there is a capacitance value between the fourth conductor and the fifth conductor , when the third conductor 108 is not in contact with the first conductor 104 and the second conductor 105 at the same time, there is an open circuit between the fourth conductor and the fifth conductor, and the capacitance value is 0. According to the different postures of the capacitive device, some capacitors in the capacitive device are turned on, and some capacitors are not turned on. Therefore, according to different postures of the capacitive device, the eight capacitance values output by the capacitive device vary with different postures of the capacitive device.

In one embodiment of the present invention, the third conductor 108 is a conductive liquid, and the insulator 109 is an insulating gas, such as an inert gas. Under the action of gravity, the conductive liquid 108 is always located in the lower part of the sealed cavity, and the insulating gas 109 is always located in the sealed cavity. upper part of the body. In another embodiment of the present invention, the third conductor 108 is a conductive liquid, the insulator 109 is an insulating liquid, and the insulating liquid 109 and the conductive liquid 108 have different specific gravity. In yet another embodiment of the present invention, the third conductor 108 is a powdered conductive solid, and the insulator 109 is an insulating gas.

Fig. 7 is a cross-sectional view of a horizontally placed resistor device in an embodiment of the present invention. As shown in FIG. 7 , the resistance device includes: an integrated circuit and a package outside the integrated circuit, and the integrated circuit refers to a bare chip manufactured by an integrated circuit process. 201 represents the insulating medium _{SiO 2} in the CMOS integrated circuit. 202 represents the sixth conductor in the integrated circuit of the resistance device, 203 represents the seventh conductor in the integrated circuit of the resistance device, 204 represents the passivation layer on the surface of the integrated circuit, 205 represents the insulating package outside the integrated circuit, and the surface of the integrated circuit The passivation layer 204 and the package 205 together form a sealed cavity on the surface of the integrated circuit, 206 represents an eighth conductor in the sealed cavity, and 207 represents an insulator in the sealed cavity. 210 and 211 represent vias in the integrated circuit. 208 is the ninth conductor in the integrated circuit of the resistance device, and the sixth conductor 202 and the ninth conductor 208 in the integrated circuit of the resistance device are connected through the via hole 210 . 209 is the tenth conductor in the integrated circuit of the resistance device, and the seventh conductor 203 and the tenth conductor 209 in the integrated circuit of the resistance device are connected through the via hole 211 . When the resistance device and the resistance value detection module, or even the entire attitude measurement system and other modules or circuits are integrated in the same integrated circuit, the ninth conductor 208 and the tenth conductor 209 are used to connect with the module or circuit, which is The connecting wires connecting the resistive device to the module or circuit. When the eighth conductor 206 is in contact with the sixth conductor 202 and the seventh conductor 203 at the same time, 212 is the equivalent resistance of the eighth conductor 206 connected between the sixth conductor 202 and the seventh conductor 203 .

FIG. 8 is a side sectional view of the resistor device shown in FIG. 7 placed vertically according to an embodiment of the present invention. As shown in Figure 8, when the sixth electrical conductor 202 and the seventh electrical conductor 203 in the integrated circuit of the resistor device are in contact with the eighth electrical conductor 206 at the same time, the equivalent resistance 212 of the eighth electrical conductor 206 is used as the resistance, The sixth conductor 202 and the seventh conductor 203 are resistors of the lead-out terminals. When the sixth conductor 202 and the seventh conductor 203 in the integrated circuit of the resistance device are not in contact with the eighth conductor 206 at the same time, the sixth conductor 202 and the seventh conductor 203 are equivalent to an open circuit, and the resistance value is gigantic. Since the sealed cavity includes the eighth conductor 206 and the insulator 207, when the posture of the resistance device changes, the eighth conductor 206 is located at the upper or lower part of the sealed cavity under the action of gravity. The contact relationship between the eighth electrical conductor 206 and the sixth electrical conductor 202 and the seventh electrical conductor 203 in the integrated circuit of the resistance device changes as the attitude of the resistance device changes, between the sixth electrical conductor 202 and the seventh electrical conductor 203 The resistance value of the equivalent resistor 212 changes accordingly. Since the ninth conductor 208 is connected to the sixth conductor 202 through the via hole 210, and the tenth conductor 209 is connected to the seventh conductor 203 through the via hole 211, the distance between the ninth conductor 208 and the tenth conductor 209 The resistance value also changes accordingly.

Fig. 9 is a front sectional view of a vertically placed resistor device with 8 equivalent resistors according to an embodiment of the present invention. As shown in Figure 9, the same integrated circuit includes 8 sixth conductors and 8 seventh conductors, the 8 sixth conductors are respectively connected to the 8 ninth conductors, and the 8 seventh conductors are connected to the 8th conductors respectively. Eight tenth conductor connections. The eight sixth conductors, seventh conductors, ninth conductors and tenth conductors are denoted by 21-28. A sealed cavity is formed between the surface of the integrated circuit of the resistance device and the package of the integrated circuit, the sealed cavity covers 8 sixth conductors and 8 seventh conductors, and the eighth conductor and the insulator are located in the sealed cavity . Only the sixth conductor 202, the seventh conductor 203, the passivation layer 204 and the eighth conductor 206 in the integrated circuit of the resistance device are shown in the figure. When the sixth conductor 202 and the seventh conductor 203 in the integrated circuit of the resistance device are in contact with the eighth conductor 206 at the same time, the equivalent resistance of the eighth conductor 206 is used as resistance, the sixth conductor 202 and the eighth conductor 206 are formed. The seven conductors 203 are the resistors of the lead-out terminals. When the sixth conductor 202 and the seventh conductor 203 in the integrated circuit of the resistance device are not in contact with the eighth conductor 206 at the same time, the sixth conductor 202 and the seventh conductor 203 are equivalent to an open circuit, and the resistance value is gigantic. As the position of the resistance device changes, the contact relationship between the eighth conductor 206 and the eight sixth conductors 202 and eight seventh conductors 203 changes, so that according to the different postures of the resistance device, the eight resistors output by the resistor device The values vary with different poses of the resistive device.

In one embodiment of the present invention, the eighth conductor 206 is a conductive liquid, and the insulator 207 is an insulating gas, such as an inert gas. Under the action of gravity, the conductive liquid 206 is always located in the lower part of the sealed cavity, and the insulating gas 207 is always located in the sealed cavity. upper part of the body. In another embodiment of the present invention, the eighth conductor 206 is a conductive liquid, the insulator 207 is an insulating liquid, and the insulating liquid 207 and the conductive liquid 206 have different specific gravity. In yet another embodiment of the present invention, the eighth conductor 206 is a powdered conductive solid, and the insulator 207 is an insulating gas.

Fig. 10 is a structural block diagram of an attitude measurement system according to an embodiment of the present invention. As shown in Figure 10, this posture measurement system comprises the above-mentioned capacitance/resistance device, capacitance/resistance value detection module and capacitance/resistance value processing and output module, capacitance/resistance value detection module and capacitance/resistance device and capacitance/resistance value The resistance value handles the connection with the output module.

One or more capacitance/resistance values in the capacitance/resistance device change with the attitude change of the attitude measurement system, so that the one or more capacitance/resistance values output by the capacitance/resistance device change with the attitude change of the attitude measurement system.

The capacitance/resistance detection module is used to detect one or more capacitance/resistance values output by the capacitance/resistance device. The capacitance value in the capacitive device may be measured using a capacitance-frequency (CF) detection method, a capacitance-voltage (CV) detection method, or other capacitance value detection methods.

The capacitance/resistance value processing and output module obtains the capacitance/resistance value data from the capacitance/resistance value detection module, and gives the parameters of the attitude measurement system after processing. The capacitance/resistance value processing and output module includes a capacitance/resistance value sampling module, a data calculation module, an output module and a control module. The capacitance/resistance value data obtained from the capacitance/resistance value detection module is input to the capacitance/resistance value sampling module, and the analog capacitance/resistance value is converted into digital data after being sampled. The data calculation module is connected with the capacitance/resistance value sampling module, and calculates the attitude parameters of the attitude measurement system according to the digital data output by the capacitance/resistance value sampling module. For example, the data calculation module calculates the The rotation angle of the attitude measurement system; the data calculation module calculates the angular velocity of the attitude measurement system according to the rotation angle within a certain time interval; the data calculation module calculates the angular acceleration of the attitude measurement system according to the angular velocity within a certain time interval. The output module is connected with the data calculation module, and is used to output the attitude parameters calculated by the data calculation module. For example, the attitude parameters are values representing attitude changes such as angle, angular velocity and/or angular acceleration. The control module is connected with the capacitance/resistance value sampling module, the data calculation module and the output module, and is used to control the capacitance/resistance value sampling module, the data calculation module and the output module. The control module is the whole capacitance/resistance value processing and output module. core control part.

In one embodiment of the present invention, one or more fourth conductors and fifth conductors in the capacitance device are connected to the capacitance value detection module inside the integrated circuit, so that the capacitance device and the capacitance value detection module can be integrated in the same In the integrated circuit, further, the capacitance device, the capacitance value detection module and the capacitance value processing and output module can be integrated into the same integrated circuit.

In one embodiment of the present invention, one or more of the ninth conductor and the tenth conductor in the resistance device are connected to the resistance value detection module inside the integrated circuit, so that the resistance device and the resistance value detection module can be integrated in the same In the integrated circuit, further, the resistance device, the resistance value detection module and the resistance value processing and output module can be integrated into the same integrated circuit.

Fig. 11 is a schematic diagram of a three-dimensional attitude measurement system according to an embodiment of the present invention. As shown in FIG. 11 , a combination of three attitude measurement systems shown in FIG. 10 is used to complete three-dimensional attitude measurement. The three-dimensional attitude measurement system includes three attitude measurement systems shown in Figure 10 and one three-dimensional signal processing system. The planes where the top conductive layers of the integrated circuits of the capacitance/resistance devices of every two attitude measurement systems in the three attitude measurement systems are located are perpendicular to each other. The three attitude measurement systems perpendicular to each other can realize three-dimensional attitude measurement after the attitude parameters output by them are processed by the three-dimensional signal processing system. In the attitude measurement system, the attitude of the capacitive device determines the connection relationship between the third conductor in the sealed cavity and the first conductor and the second conductor in the integrated circuit of the capacitive device, and then determines the integrated circuit of the capacitive device. The capacitance value between the fourth conductor and the fifth conductor in the attitude measurement system can obtain the attitude parameter of the attitude measurement system according to one or more capacitance values obtained from the capacitance device in the attitude measurement system. In the posture measurement system, the posture of the resistance device determines the connection relationship between the eighth conductor in the sealed cavity and the sixth conductor and the seventh conductor in the integrated circuit of the resistance device, and then determines the connection relationship between the integrated circuit of the resistance device. The resistance value between the ninth conductor and the tenth conductor, the attitude parameter of the attitude measurement system can be obtained according to one or more resistance values obtained from the resistance device in the attitude measurement system. When the three attitude measurement systems are combined, the attitude parameters obtained from each attitude measurement system are input into the three-dimensional signal processing system for processing, and the three-dimensional attitude measurement can be realized.

The technology that adopts in the embodiment of the present invention is CMOS integrated circuit technology, also can adopt other integrated circuit technology; Capacitor device is MIM capacitor in the embodiment, also can adopt other class capacitance that integrated circuit technology provides; Adopt 8 in the embodiment The capacitive device with 8 capacitive devices and the resistive device with 8 equivalent resistances can also adopt the capacitive device with different numbers of capacitive devices and the resistive device with different numbers of equivalent resistances, and also can adopt the capacitance of different shapes in addition.

It will be apparent that many changes may be made to the invention described herein without departing from the true spirit and scope of the invention. Therefore, all changes obvious to those skilled in the art shall be included within the scope covered by the claims.

Claims (17)

1. a capacitive means based on integrated circuit technology, is characterized in that, comprising:

The integrated circuit of integrated one or more capacitor elements;

One or more first electric conductors are integrated on the described integrated circuit and are exposed at the surface of described integrated circuit outward, connect one to one with first pole plate of described one or more capacitor elements;

One or more second electric conductors are integrated on the described integrated circuit and are exposed at the surface of described integrated circuit outward;

Seal chamber is formed between the encapsulation of the surface of described integrated circuit and integrated circuit, covers described one or more first electric conductor and described one or more second electric conductor;

The 3rd electric conductor is positioned at described seal chamber, and the contact relation of described the 3rd electric conductor and described one or more first electric conductor and described one or more second electric conductors is along with the attitude of described capacitive means changes and changes;

Insulator is positioned at described seal chamber, with described the 3rd electric conductor objectionable intermingling.

2. capacitive means according to claim 1, it is characterized in that, first pole plate of described capacitor element is divided into a plurality of first pole plate parts, and described first electric conductor is divided into a plurality of first electric conductor parts accordingly, and described first electric conductor part partly connects with corresponding described first pole plate.

3. capacitive means according to claim 1, it is characterized in that, first pole plate of described one or more capacitor elements substitutes the directly outer surface that is exposed at described integrated circuit of described one or more first electric conductors, and described seal chamber covers first pole plate and described one or more second electric conductor of described one or more capacitor elements.

4. capacitive means according to claim 3 is characterized in that, first pole plate of described capacitor element is divided into a plurality of first pole plate parts.

5. capacitive means according to claim 1 is characterized in that, described the 3rd electric conductor is a conducting liquid, and described insulator is an insulating gas; Perhaps described the 3rd electric conductor is a conducting liquid, and described insulator is the iknsulating liquid with described conducting liquid different specific weight; Perhaps described the 3rd electric conductor is Powdered conductive solids, and described insulator is an insulating gas.

6. according to claim 1,2,3 or 4 described capacitive means, it is characterized in that, also comprise:

One or more the 4th electric conductors are integrated on the described integrated circuit, connect one to one with second pole plate of described one or more capacitor elements;

One or more the 5th electric conductors are integrated on the described integrated circuit, connect one to one with described one or more second electric conductors.

7. capacitive means according to claim 1 and 2, it is characterized in that, described first electric conductor is realized by first conductive layer of integrated circuit, first pole plate of described capacitor element is realized that by second conductive layer of integrated circuit second pole plate of described capacitor element is realized by the 3rd conductive layer of integrated circuit.

8. according to claim 3 or 4 described capacitive means, it is characterized in that first pole plate of described capacitor element is realized that by first conductive layer of integrated circuit second pole plate of described capacitor element is realized by second conductive layer of integrated circuit.

9. a resistance device based on integrated circuit technology, is characterized in that, comprising:

Integrated circuit;

One or more the 6th electric conductors are integrated on the described integrated circuit and are exposed at the surface of described integrated circuit outward;

One or more the 7th electric conductors are integrated on the described integrated circuit and are exposed at the surface of described integrated circuit outward;

Seal chamber is formed between the encapsulation of the surface of described integrated circuit and integrated circuit, covers described one or more the 6th electric conductor and one or more the 7th electric conductor;

The 8th electric conductor, be positioned at described seal chamber, described one or more the 6th electric conductors in the integrated circuit of described the 8th electric conductor and described resistance device and the contact relation of described one or more the 7th electric conductors change along with the variation of described resistance device attitude;

Insulator is positioned at described seal chamber, with described the 8th electric conductor objectionable intermingling.

10. resistance device according to claim 9 is characterized in that, described the 8th electric conductor is a conducting liquid, and described insulator is an insulating gas; Perhaps described the 8th electric conductor is a conducting liquid, and described insulator is the iknsulating liquid with described conducting liquid different specific weight; Perhaps described the 8th electric conductor is Powdered conductive solids, and described insulator is an insulating gas.

11. resistance device according to claim 9 is characterized in that, also comprises:

One or more the 9th electric conductors are integrated on the described integrated circuit, connect one to one with described one or more the 6th electric conductors;

One or more the tenth electric conductors are integrated on the described integrated circuit, connect one to one with described one or more the 7th electric conductors.

12. an attitude measurement system is characterized in that, comprising:

According to claim 1,2,3,4 or 6 described capacitive means/claims 9 or 11 described resistance devices;

Capacitance/resistance value detection module is connected with described capacitance/resistance device, is used to detect and export the capacitance/resistance value of described capacitance/resistance device;

The capacitance/resistance value is handled and output module, is connected with described capacitance/resistance value detection module, is used to handle described capacitance/resistance value and exports attitude parameter.

13. attitude measurement system according to claim 12 is characterized in that, described capacitance/resistance value is handled with output module and is comprised:

Capacitance/resistance value sampling module is used for described capacitance/resistance value sampling, and sampled value is converted to numerical data;

Data computation module is connected with described capacitance/resistance value sampling module, is used for calculating attitude parameter according to described numerical data;

Output module is connected with described data computation module, is used to export described attitude parameter;

Control module is connected with output module with described capacitance/resistance value sampling module, data computation module, is used to control described capacitance/resistance value sampling module, data computation module and output module.

14. attitude measurement system according to claim 12 is characterized in that, described capacitance/resistance device and capacitance/resistance value detection module are integrated in the same integrated circuit.

15. attitude measurement system according to claim 12 is characterized in that, described capacitance/resistance device, capacitance/resistance value detection module and capacitance/resistance value are handled with output module and are integrated in the same integrated circuit.

16. a multidimensional attitude measurement system is characterized in that, comprising:

A plurality of attitude measurement systems according to claim 12 are used to carry out attitude measurement, export a plurality of attitude parameters;

The multidimensional signal treatment system is connected with described a plurality of attitude measurement systems, is used for that described a plurality of attitude parameters are carried out multidimensional signal and handles, and realizes the multidimensional attitude measurement.

17. multidimensional attitude measurement system according to claim 16 is characterized in that, comprises three described attitude measurement systems, the top layer conductive layer of the integrated circuit of the capacitance/resistance device of per two described attitude measurement systems is vertical mutually.

Images