CN101527537B - Method for adjusting pulse width by capturing three-phase current information and system for modulating pulse width - Google Patents

Method for adjusting pulse width by capturing three-phase current information and system for modulating pulse width Download PDF

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CN101527537B
CN101527537B CN2008100831372A CN200810083137A CN101527537B CN 101527537 B CN101527537 B CN 101527537B CN 2008100831372 A CN2008100831372 A CN 2008100831372A CN 200810083137 A CN200810083137 A CN 200810083137A CN 101527537 B CN101527537 B CN 101527537B
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vector
voltage space
voltage
current
pulse
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CN101527537A (en
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谢东锦
郑光耀
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Prolific Technology Inc
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Prolific Technology Inc
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Abstract

The invention relates to a method for adjusting the pulse width by capturing three-phase current information and a system for modulating the pulse width. The method comprises the following steps: when an alternating current motor generates three-phase current, modulating the three-phase current to generate a primary voltage space vector, and inserting three detection vectors of which the summation is zero after the primary voltage space vector; besides, performing current sampling in the period of inserting the three detection vectors to generate a sampling result, and adjusting the pulse width generated by a pulse width modulator according to the sampling result.

Description

The method of adjusting pulse width by capturing three-phase current information and variable duration impulse system thereof
Technical field
The present invention relates to the method for a kind of information by the acquisition three-phase current, particularly relate to the method for a kind of information by single direct current chain current sensor acquisition three-phase current with the width of adjusting pulse with the width of adjusting pulse.
Background technology
In recent years, flourish along with the motor frequency conversion technology, alternating current machine is increasingly important on the purposes of industry and commerce, from toolroom machine, motor vehicle, all needs to adopt the Drive Control Technique of alternating current machine to the frequency conversion cold air of family expenses.And in the drive system of alternating current machine, the operating principle of the direct current alternating-current converter of core (DC/AC inverter) is that (Pulse Width Modulation, technology PWM) is the basis with pulse-width modulation.For example further develop sinusoidal wave wide modulation (the Sinusoidal Pulse Width Modulation that by PWM, SPWM), utilize the voltage and a triangular carrier of three-phase string ripple to compare, and according to the different wide modulation of ripple of its difference generation, because simplicity of design, can reduce noise and chain ripple, and generally be applied in the design of general alternating current machine.And in recent years, another is developed space vector pulse-width modulation (the Space Vector Pulse Width Modulation that by PWM, SVPWM) technology, utilize and follow the tracks of the voltage that circular rotating field is controlled PWM, with the voltage space addition of vectors, to obtain the track of magnetic linkage, also because can reduce the harmonic loss of the harmonic components and the motor of output current, reduced the pulsation of torque, and had advantages such as noise is low, voltage utilization is high, easy digitlization, the trend of catching up from behind has been arranged.SVPWM not only can obtain higher output voltage capability than the SPWM of same frequency, and less switching times, can also obtain the relation of direct current chain electric current and phase current according to the space vector voltage of being sent, therefore be used in gradually in the design of electrical motor of higher-order.
Three phase alternating current motor is when carrying out loop circuit control, if desire promotes the frequency range of control loop, it is quite important that the control of electric current inner looping just becomes.In the core technology of the drive controlling of alternating current machine, how control the output voltage of converter by the signal of modulation pulsewidth, and then the electric current of control alternating current machine is to produce moment of torsion (torque), can control simultaneously the moment of torsion output of alternating current machine effectively, obtain preferable motor rotation efficient, root problem promptly is a three-phase current how to control three phase alternating current motor.Therefore in the driver of general three phase alternating current motor, can use at least two phase current transducers to obtain the feedback signal of electric current, so that carry out the design of current control loop; Yet because the consideration of cost, volume, weight and drive circuit circuit board size, this phase current transducer of at least two (Hall current sensor for example, Hall current sensor), can increase the cost of whole drive system, simultaneously because the biphase current in the sensing three-phase current, the third phase electric current is when estimation, may cause error because of the difference and the drift of external circuit components characteristic, and this error may be reflected on the characteristic of moment of torsion of motor output, causes the moment of torsion ripple.Therefore in the part prior art, all propose to omit these a plurality of phase current transducers, directly use the method for single direct current chain current sensor (DC-link current sensor), in the hope of head it off.Because single direct current chain current sensor is low than the cost of Hall current sensor, volume is little and in light weight, and can obtain required three-phase current via single direct current chain electric current (DC-link current).
The technology that obtains required three-phase current by single direct current chain electric current often only limits to the switching mode of aforesaid SVPWM.But the method for SVPWM can face when the voltage space vector length too short and fall within can not measure (immeasurable region) zone the time, can't measure the problem of electric current effectively, therefore the U.S. Pat 6 of technology formerly, 735, the signal of the PWM that the mobile original voltage space vector of instruction utilization is produced among 537 B2, the length of the feasible voltage space vector that is produced all meets the time that the shortest measuring obtains phase current, the shift technique of this PWM can't change the synthetic voltage space vector that original expectation produces simultaneously, because can cancel each other via the displacement space vector that displacement produced.But the shortcoming of this practice is the mode complexity that technology realizes, the time point of current sampling (sampling) also must be adjusted according to the condition of PWM displacement, and therefore the phase current that is measured might not be an average current, and may have influence on the performance of Current Control.
The method of utilizing SVPWM is also arranged,, reduce or improve the method that can not measure the zone by a null vector (zero voltage vector).For example the 12nd of the power electronics periodical (IEEE transactions on power electronics) of in November, 1997 U.S.'s Institute of Electrical and Electronics Engineers IEEE, No. 6; " FPGA realization of space-vector PWM control IC for three-phase PWM inverters " in the literary composition; author Ying-Yu Tzou and Hau-Jean Hsu are taught in the switching cycle of SVPWM, voltage space vector (the voltage space vector) size of using a null vector to adjust to be produced.And further in U.S. Pat 7,102, among 327 B2, define the mode of selecting for use of this null vector according to preceding method, be that size with two principal voltage space vectors is a foundation, this method can be dwindled the problem that can not measure the zone, and the space vector that further proposition produces when desire drops in the time of can not measuring the interval, it is synthetic to use them instead two space vectors, use and avoid to measure the interval, capture the information of three-phase current, but shortcoming is the technical implementation way complexity, each cycle of the time point of current sampling all will calculate once.
The method of utilizing SVPWM is equally also arranged, but add the technology that signal inserts, to reduce or to improve the method that can not measure the zone.For example in U.S. Pat 7,075, be taught among 267 B1 and insert a bit of method that detects vector in the switching cycle of a PWM, detect the direct current chain electric current that vector is measured by this, decide interior desire of this cycle to control the electric current of which phase, and, fall within the problem that can not measure the zone to avoid the voltage space vector in conjunction with a sluggish current controller, reach the control of three-phase string ripple electric current.But this method is applicable to the system that the PWM switching frequency is high, and sluggish current controller is realized with simulated mode and the digital circuit of SVPWM is more incompatible.Also have by the mode of inserting space vector to measure three-phase current, fall within the problem that can not measure the zone to avoid the voltage space vector.For example in U.S. Pat 7,015, the method for being instructed among 664 B2, but this method can influence the size of the synthetic voltage space vector of original desire, also can influence the sampling frequency of current circuit simultaneously.The way that also has other, for example the 21st of the power electronics periodical (IEEE transactions on power electronics) of in September, 2006 U.S.'s Institute of Electrical and Electronics Engineers IEEE, No. 5; " Phase current reconstruction for AC motor drives using a dc link single current sensor and measurement voltage vectors " in the literary composition; author Hongrae Kim and Thomas M.Jahns instruction are in the switching cycle of a PWM; insert three groups in the signal back of original SVPWM and detect vector; and three groups of this insertion detect vectors and are combined into 0; and the advantage of this method is to obtain by direct current chain electric current in the process of the relevant information of phase current; can not be subjected to measuring the influence in zone fully, though but this method reduces the switching frequency of PWM, but can increase the switch number of times of power transistor, also can influence the size of the voltage space vector that is synthesized simultaneously.
In addition, employed technology in the past document, the capital changes the flow direction of the direct current chain electric current that is measured, be the output that the voltage of cross-pressure on direct current chain current sensor has positive voltage and negative voltage, therefore in order to handle the signal of this generating positive and negative voltage, must use operational amplifier, thus with positive-negative power, just must provide extra one group of positive-negative power to handle the feedback signal of direct current chain electric current in the system, improve the complexity of whole system; Please refer to Fig. 1, Fig. 1 is the circuit diagram of traditional SVPWM system 200.Tradition SVPWM system 200 has comprised an input power supply 3, one direct current alternating-current converter 4, one control chip 8, one three phase alternating current motor 5, one direct current chain current sensing resistor 6,90, two pressurizers of one duplicate supply operational amplifier 100,101, and an analog-digital converter 7 (A/D converter).Direct current alternating-current converter 4 has also comprised 6 power transistor S1, S2, S3, S4, S5 and S6.Wherein import power supply 3 and be coupled to direct current alternating-current converter 4 and direct current chain current sensing resistor 6, be used to provide direct current alternating-current converter 4 power supplys.Pressurizer 101 is coupled to control chip 8, analog-digital converter 7, be (for example+5V) to be used to provide control chip 8, analog-digital converter 7 power supplys, and pressurizer 100 is coupled to duplicate supply operational amplifier 90, be responsible for providing duplicate supply operational amplifier 90 duplicate supplys (for example+/-15V).Duplicate supply operational amplifier 90 couples direct current chain current sensing resistor 6, is the cross-pressure that amplifies on the direct current chain current sensing resistor 6, exports to analog-digital converter 7 again.Direct current chain current sensing resistor 6 is coupled to direct current alternating-current converter 4, and the electric current that is flow through on it promptly is the direct current chain electric current after being changed by three-phase current.Three phase alternating current motor 5 is coupled to direct current alternating-current converter 4, provides three-phase current to flow into or outflow direct current alternating-current converter 4.Control chip 8 is coupled to analog-digital converter 7 and pressurizer 101, is mainly used to the s operation control rule, and handles feedback signal of electric current or the like.Pass by in addition that document inquires into by the information of acquisition three-phase current method with the width of adjusting pulse, great majority are based on the technology of SVPWM, and in some application of system cheaply, the application of SPWM is very extensive, but can't use this to pass through the technology that direct current chain electric current obtains the phase current relevant information.
Please refer to Fig. 3, Fig. 3 is the difference according to 6 power transistor S1, S2 in the direct current alternating-current converter 4, S3, S4, S5, S6 conducting state, 8 groups of voltage space unit vectors that produced, i.e. two null vector V0 (000) and V7 (111), and the size of the three-phase current (Ia, Ib, Ic) of a, b on 6 voltage space unit vector V1 (100), V2 (110), V3 (010), V4 (011), V5 (001), V6 (101) and the direct current chain current sensing resistor 6, c three-phase and the corresponding lists of direction.As shown in fig. 1, with arm switch (S1, S3, S5) conducting on the 1 expression power transistor, following arm switch (S2, S4, S6) ends; End the situation of following arm switch (S2, S4, S6) conducting with arm switch (S1, S3, S5) on the 0 expression power transistor.Therefore, for instance, in Fig. 3, S1, S4, the conducting of S6 power transistor in voltage space unit vector V1 (100) the expression direct current alternating-current converter 4, S2, S3, S5 power transistor end.The definition sense of current that flows into three phase alternating current motor 5 is for just again, and then according to this voltage space unit vector V1 (100), the phase current of measuring on direct current chain current sensing resistor 6 is Ia.The Ia direction of current flow, as shown in Figure 4.Fig. 4 promptly describes power transistor S1, S4, S6 conducting, S2, S3, S5 by the time, the schematic diagram of the flow direction of direct current chain electric current and phase current.
6 voltage space unit vector V1~V6 are independent mutually, are used for treating as the basis vector of resultant voltage space vector, and null vector V0 and V7 then are used for adjusting the responsibility ratio.Please refer to Fig. 5, Fig. 5 is the schematic diagram of low modulation exponential region in the voltage space vectogram that 6 principal voltage mikeys vector V1, V2, V3, V4, V5, V6 are constituted.In Fig. 5, formed zone promptly is called first quartile in the middle of voltage space unit vector V1 (100) and the V2 (110), in like manner, formed zone promptly is called second quadrant in the middle of voltage space unit vector V2 (110) and the V3 (010), and the rest may be inferred for all the other quadrants.Any one voltage space vector all can be added null vector and be synthesized according to certain modulation ratio by two voltage space unit vectors among V1~V6.The length of each voltage space vector is the ON time of power transistor in the representative graph 1 among Fig. 5.For example V1 (100) promptly represents the conducting at S1, and S2 ends, and S3 ends, the S4 conducting, and S5 ends, and keeps the time of one-period T under the situation of S6 conducting.
If the vector of a SVPWM system falls between voltage space unit vector V1 and the V2, then according to the theory of SVPWM, the optimized switching sequence of this vector is V0, V1, V2, V7, V2, V1, V0, therefore all can produce the direct current chain electric current that can be used to obtain the phase current relevant information in each cycle in theory.But in fact, when the voltage space vector falls within low modulation index (low modulation index) district (shown in Fig. 5 bend zone), or when the voltage space vector falls within active vector region edge (shown in Fig. 7 bend zone), because the vector of the voltage space in this two district itself is too little, that is to say, the time of power transistor conducting is too short, when the electric current that flows through power transistor does not all also arrive a stable state, power transistor has just ended again, therefore can cause the sampling failure of PWM.Fig. 7 is the schematic diagram of active vector region fringe region in the voltage space vectogram that 6 principal voltage mikeys vector V1, V2, V3, V4, V5, V6 are constituted.This two zone also is collectively referred to as and can not measures the zone.Please refer to Fig. 6.Fig. 6 promptly is the time diagram that description one falls within the one-period of the voltage space vector that can not measure regional low modulation exponential region (being shown in Fig. 5 bend zone).Among Fig. 6, a-signal is to represent power transistor S1 conducting at 1 o'clock, and S2 ends, and a-signal is to represent that power transistor S1 ended, the S2 conducting at 0 o'clock; The B signal is to represent power transistor S3 conducting at 1 o'clock, and S4 ends, and the B signal is to represent that power transistor S3 ended, the S4 conducting at 0 o'clock; The C signal is to represent power transistor S5 conducting at 1 o'clock, and S6 ends, and the C signal is to represent that power transistor S5 ended, the S6 conducting at 0 o'clock.By finding out among the figure, this vector falls between voltage space unit vector V1 and the V2, meets vectorial optimized switching sequence V0 (000), V1 (100), V2 (110), V7 (111), V2 (110), V1 (100), the V0 (000) of the theoretical gained of SVPWM.And because this vector is positioned at the low modulation exponential region, length of vector itself is very short, so long time is arranged in the one-period is to fill up its length with null vector (111).This vector falls between voltage space unit vector V1 and the V2, that is to say that this vector can come synthetic by V1 (100) and V2 (110) two vectors, the vector of T1/2 is V1 (100) among the figure, the vector of T2/2 is V2 (110), by finding out among the figure, the time of two vectors is all lacked (that is vector length is very short) very much, can't satisfy the requirement that PWM is not less than Tm+Td sample time, therefore can cause PWM sampling failure.Wherein sample time Tm length and power transistor from being conducting to the time of stable state, the output voltage slope of operational amplifier (OP-amp slew rate, the signal that the size of operational amplifier output voltage slope is inversely proportional to this operational amplifier becomes high-tension transit time by low-voltage), and the sample time of analog-digital converter is relevant; Td is then relevant with the conducting and the deadline of two transistor up and down.
Similarly, Fig. 8 describes one to be positioned at Fig. 7 bend zone, just can not measure the time diagram of one-period of voltage space vector at the active vector region edge in zone.In Fig. 8, identical among the situation of the power transistor conducting of A, B, C representative and Fig. 6, repeat no more in this.And this vector also falls between voltage space unit vector V1 and the V2, can be synthesized by V1 and V2, also meets vectorial optimized switching sequence V0, V1, V2, V7, V2, V1, the V0 of the theoretical gained of SVPWM.Yet because this vector is positioned at initiatively vector region edge, therefore this vector is by long V1 vector (100) (T1/2 representative among the figure, and T1/2>=Tm+Td), reach very short V2 vector (110) (T2/2 representative among the figure, and T2/2<Tm+Td) synthesize, can only get single phase current (institute is provided by the V1 vector) when therefore PWM takes a sample, the V2 vector can cause the PWM sampling to be failed because vector length is too short.
Summary of the invention
The invention provides the method for a kind of information by the acquisition three-phase current with the width of adjusting pulse, it comprises the following step: produce a three-phase current by an alternating current machine; This three-phase current produces a primary voltage space vector through pulse-width modulator modulation back; Detect the voltage composition of this primary voltage space vector, to produce a testing result; Providing three sum totals according to this testing result is zero detection vector; Insert this three sum total in regular turn and be zero detection vector after this primary voltage space vector; In this three detection vectorial insertion time, carry out current sampling respectively, to produce a sampling result; Reach the width of adjusting the pulse of this pulse-width modulator generation according to this sampling result.Wherein each length that detects vector is not less than a power transistor and never is conducting to the time of stablize conducting, and the signal of an operational amplifier becomes high-tension transit time by low-voltage, and the sample time of an analog-digital converter with; And the voltage composition that wherein detects this primary voltage space vector for detect whether have in this primary voltage space vector two-phase voltage on the occasion of or negative value.
The invention provides the variable duration impulse system of a kind of information by the acquisition three-phase current, comprise a three phase alternating current motor, a pulse-width modulator with the width of adjusting pulse, one checkout gear, one detects vectorial generator, a control chip, and an analog-digital converter.This three phase alternating current motor is in order to produce a three-phase current.This pulse-width modulator is coupled to this three phase alternating current motor, in order to modulate this three-phase current, to produce a primary voltage space vector.This checkout gear is in order to detect the voltage composition of this primary voltage space vector.This detects vectorial generator, and providing three sum totals in order to the result according to this detection is zero detection vector.This control chip is coupled to this pulse-width modulator, is that zero detection vector is after this primary voltage space vector in order to insert this three sum total in regular turn.And this analog-digital converter, be coupled to this control chip, in order in the time that this three detections vector inserts, to carry out current sampling respectively, to produce a sampling result.Wherein this control chip can be adjusted the width of the pulse of this pulse-width modulator generation according to this sampling result.Wherein the length of each detection vector is not less than a power transistor and never is conducting to the time of stablizing conducting, the signal of one operational amplifier become by low-voltage high-tension transit time and this analog-digital converter sample time and, and the voltage composition that wherein detects this primary voltage space vector for detect whether have in this primary voltage space vector two-phase voltage on the occasion of or negative value.
It is a kind of by the method for the information that captures three-phase current with the width of adjustment pulse that the present invention also provides, and it comprises the following step: produce a three-phase current by an alternating current machine; This three-phase current produces one first voltage space sequence vector through space vector pulse-width modulator modulation back, and this first voltage space sequence vector comprises a plurality of first voltage space vectors; Detect each first voltage space vector of this first voltage space sequence vector, to produce one first testing result; Detect these a plurality of first voltage space vectors and the voltage composition, to produce one second testing result; According to this first testing result, different null vector in this first voltage space sequence vector is substituted by identical null vector, to produce one second voltage space sequence vector, this second voltage space sequence vector comprises a plurality of second voltage space vectors; Rearrange the order of a plurality of second voltage space vectors of this second voltage space sequence vector, to produce a tertiary voltage space vector sequence; Providing three sum totals according to this second testing result is zero detection vector; Insert this three sum total in regular turn and be zero detection vector after this tertiary voltage space vector sequence; In this three detection vectorial insertion time, carry out current sampling respectively, to produce a sampling result; And the width of adjusting the pulse of this pulse-width modulator generation according to this sampling result.Wherein each length that detects vector is to be not less than a power transistor never to be conducting to the time of stablizing conducting, the signal of one operational amplifier becomes high-tension transit time by low-voltage, and the sample time of an analog-digital converter and, and wherein detect these a plurality of first voltage space vectors and the voltage composition for detect these a plurality of first voltage space vectors and the voltage composition in whether have two-phase voltage on the occasion of or negative value.
It is a kind of by the space vector variable duration impulse system of the information that captures three-phase current with the width of adjustment pulse that the present invention provides in addition, comprise a three phase alternating current motor, one space vector pulse-width modulator, one checkout gear, one substitution device, one rearranges device, and one detects vectorial generator, one control chip, and an analog-digital converter.This three phase alternating current motor is in order to produce a three-phase current.This space vector pulse-width modulator is coupled to this three phase alternating current motor, and in order to modulate this three-phase current, to produce one first voltage space sequence vector, this first voltage space sequence vector comprises a plurality of first voltage space vectors.This checkout gear is in order to detecting each first voltage space vector of this first voltage space sequence vector, producing one first testing result, and detect these a plurality of first voltage space vectors and the voltage composition, to produce one second testing result.This substitution device is in order to the result according to this first detection, different null vector in this first voltage space sequence vector is substituted by identical null vector, to produce one second voltage space sequence vector, this second voltage space sequence vector comprises a plurality of second voltage space vectors.This rearranges device in order to rearrange the order of a plurality of second voltage space vectors in this second voltage space sequence vector, to produce a tertiary voltage space vector sequence.This detects vectorial generator is zero detection vector in order to provide three sum totals according to this second result who detects.This control chip is coupled to this pulse-width modulator, is that zero detection vector is after this tertiary voltage space vector sequence in order to insert this three sum total in regular turn.This analog-digital converter is coupled to this control chip, in order in the time that this three detections vector inserts, to carry out current sampling respectively, to produce a sampling result, wherein this control chip can be adjusted the width of the pulse of this pulse-width modulator generation according to this sampling result.Wherein each length that detects vector is to be not less than a power transistor never to be conducting to the time of stablizing conducting, the signal of one operational amplifier becomes high-tension transit time by low-voltage, and the sample time of this analog-digital converter and, and wherein detect these a plurality of first voltage space vectors and the voltage composition for detect these a plurality of first voltage space vectors and the voltage composition in whether have two-phase voltage on the occasion of or negative value.
Description of drawings
Fig. 1 is the circuit diagram of traditional SVPWM system.
Fig. 2 is the circuit diagram of whole SVPWM system.
Fig. 3 is the size of three-phase current and the corresponding lists of direction on the conducting state difference according to power transistor 8 groups the voltage space unit vector that is produced and the direct current chain current sensing resistor of flowing through.
Fig. 4 promptly describes power transistor S1, S4, S6 conducting, S2, S3, S5 by the time, the schematic diagram of the flow direction of direct current chain electric current and phase current.
Fig. 5 is the schematic diagram that can not measure the low modulation exponential region in the zone that is described in the voltage space vectogram that 6 principal voltage mikey vectors are constituted.
Fig. 6 describes a time diagram of one-period that is positioned at the voltage space vector of the low modulation exponential region that can not measure the zone.
Fig. 7 one can not measure in the zone the initiatively schematic diagram of vector region fringe region in the voltage space vectogram that 6 principal voltage mikey vectors are constituted.
Fig. 8 is the time diagram that description one is positioned at the one-period of the voltage space vector that can not measure regional active vector region edge.
Fig. 9 is one according to method provided by the present invention, adds three schematic diagrames that detect vector on a primary voltage space vector.
Figure 10 is one according to method provided by the present invention, adds three schematic diagrames that detect vector on a primary voltage space vector.
Figure 11 is one in the voltage space vectogram that 6 principal voltage mikey vectors are constituted, and inserts the different schematic diagrames that detect the zone of vector.
Figure 12 is the time diagram according to the power transistor conducting state of the detection vector gained that is inserted among Fig. 9.
Figure 13 is the time diagram according to the power transistor conducting state of the detection vector gained that is inserted among Figure 10.
Figure 14 is according to the mutual method of replacement of two null vectors, with the further time diagram of simplifying of the power transistor conducting state among Figure 12.
Figure 15 is according to the mutual method of replacement of two null vectors, with the further time diagram of simplifying of the power transistor conducting state among Figure 13.
Figure 16 is another simplification time diagram of Figure 12.
Figure 17 is another simplification time diagram of Figure 13.
Figure 18 is the flow chart that a measurement according to the present invention is arranged in the method for the vector that can not measure the zone.
Figure 19 is the method that measurement according to the present invention is arranged in the vector that can not measure the zone, adds the correction flow chart of considering electric current discontinuous problem of meeting between the switch area again.
The flow chart that the primary voltage magnitude of spatial vector that Figure 20 is caused for compensation method of the present invention diminishes.
Figure 21 is the section definition figure of three-phase voltage.
Figure 22 is a voltage space vectogram that is constituted in 6 principal voltage mikey vectors, and circle and dash area are represented restriction and the coverage of method of the present invention to voltage space vector amplitude among the figure.
Figure 23 is under the modulating frequency of different SVPWM (but the power transistor ON time is fixed), and the output voltage slope of operational amplifier inserts the schematic diagram of the influence that detects the new frequency behind vector to this.
Figure 24 is under the modulating frequency of different SVPWM, and the time (Tp2) of different detection vectors is to the schematic diagram of the influence that amplitude caused of this primary voltage space vector.
Figure 25 is under the output voltage slope of different operational amplifiers, the sampling frequency of different analog-digital converters, the schematic diagram of the influence that time that insert to detect vector is caused.
Figure 26 is zone 2 among Figure 11, the sampled signal lab diagram of the analog-digital converter when insertion detection vector direction is (100), (010), (001).
Figure 27 then is zone 1 among Figure 11, the lab diagram of the sampled signal of the analog-digital converter when insertion detection vector direction is (011), (101), (110).
Figure 28 is the lab diagram of the sampled signal of A phase current of the present invention, S1 power transistor, the ohmically voltage signal of direct current chain and analog-digital converter.
Figure 29 is the phase current of the acquisition of gained of the present invention and the comparative experiments figure of the actual phase current that measures.
The reference numeral explanation
2,200 SVPWM systems, 3 power supplys
4 direct current alternating-current converters, 5 three phase alternating current motors
6 direct current chain current sensing resistors, 7 analog-digital converters
8 control chips, 9 single supply operational amplifiers
Vs1, Vs2, Vs voltage space vector 90 duplicate supply operational amplifiers
10,100,101 pressurizer S1, S2, S3, S4, power transistor
S5,S6
41,42 three-phase voltage intervals, 500 saturation regions
11,13,15,20,22,24,26,28,30,32,34,36,60,
Step
62,64,66,68,70,72,74,76,78,80,82,84,86,88,90
Embodiment
The shortcoming of the technology that the document of the present invention is directed to over proposed, propose a kind of by the method for the information that captures three-phase current with the width of adjustment pulse, the information electric according to motor, by inserting specific detection vector (detecting vector), make cross-pressure be all positive voltage at the voltage of direct current chain current sensing resistor, and the operational amplifier that passes through single supply amplifies it and filtering, again by the technology of PWM synchronized sampling, the voltage signal of obtaining is delivered to analog-digital converter, promptly obtain the information of phase current.The present invention can not be subjected to measuring interval restriction, and the simple and current sampling point of implementation is fixed, and can obtain average current, and not only is applicable to and also is applicable to the SVPWM system in the system of SPWM.
Please refer to Fig. 2, Fig. 2 is the circuit diagram of whole SVPWM system 2.SVPWM system 2 has comprised an input power supply 3, one direct current alternating-current converters 4, one control chips 8, one three phase alternating current motor, 5, one direct current chain current sensing resistors, 6, one single supply operational amplifiers 9, one pressurizer 10, and an analog-digital converter 7 (A/D converter).Wherein import power supply 3 and be coupled to direct current alternating-current converter 4 and direct current chain current sensing resistor 6, be used to provide direct current alternating-current converter 4 power supplys.Pressurizer 10 is coupled to control chip 8, analog-digital converter 7 and single supply operational amplifier 9, (for example+5V) provides control chip 8, analog-digital converter 7 and single supply operational amplifier 9 power supplys simultaneously.Single supply operational amplifier 9 couples direct current chain current sensing resistor 6, amplifies the cross-pressure on the direct current chain current sensing resistor 6, exports to analog-digital converter 7 again.Direct current chain current sensing resistor 6 is coupled to direct current alternating-current converter 4, and the electric current that is flow through on it promptly is the direct current chain electric current after being changed by three-phase current.Three phase alternating current motor 5 is coupled to direct current alternating-current converter 4, provides three-phase current to flow into or outflow direct current alternating-current converter 4.Control chip 8 is coupled to analog-digital converter 7 and pressurizer 10, be mainly used to software that writes or firmware by wherein, detect the voltage composition of this primary voltage space vector, and to provide three sum totals according to the result of this detection be zero detection vector, insert three sum totals more in regular turn and be zero detection vector after this primary voltage space vector, union control rule, and handle the feedback signal of electric current, and according to the information of this acquisition three-phase current width with the pulse of adjusting this pulse-width modulator generation.Direct current alternating-current converter 4 is used for as pulse-width modulator, 6 power transistor S1, S2, S3, S4, S5 and S6 have also been comprised, in the application of SVPWM, difference according to these 6 power transistor conducting states, can obtain 8 groups of voltage space vectors, i.e. two null vectors and 6 voltage space vectors are used for judging the size and the direction of the phase current on the direct current chain current sensing resistor 6.It is digital signal that analog-digital converter 7 is used for changing the direct current chain current signal that is measured on the direct current chain current sensing resistor 6, delivers to control chip 8 again, cooperates suitable Electric Machine Control rule, produces the PWM signal and feeds back to direct current alternating-current converter 4.
In order to avoid in measuring the sampling failure that the district produces, the present invention proposes zone according to original voltage space vector place, insert three groups and detect vector, direction is (100), (010), (001) or (011), (101), (110), and three groups of detection vectors that inserted are combined into 0 the practice, to increase the length of primary voltage space vector, make it meet the sampling condition that is not less than Tm+Td.Two phase voltages in the primary voltage space vector are timing, inserting and detecting vector direction is (100), (010), (001), wherein direction is that (100) vectorial detected electric current is a phase current in the three-phase current, direction is that (010) vectorial detected electric current is the b phase current in the three-phase current, and direction is that (001) vectorial detected electric current is the c phase current in the three-phase current.When two phase voltages in the primary voltage space vector when negative, inserting and detecting vector direction is (011), (101), (110), wherein direction is that (011) vectorial detected electric current is a phase current in the three-phase current, direction is that (101) vectorial detected electric current is the b phase current in the three-phase current, and direction is that (110) vectorial detected electric current is the c phase current in the three-phase current.Please refer to Figure 11.Figure 11 is one in the voltage space vectogram that 6 principal voltage mikeys vector V1, V2, V3, V4, V5, V6 are constituted, and inserts the different schematic diagrames that detect the zone of vector.Among Figure 11 each quadrant among Fig. 5 further is divided into 2 zones: zone 1 and zone 2.Being to use in the zone 1 and detecting vector direction is that insert (011), (101), (110), and then using in the zone 2 and detecting vector direction is (100), (010), (001) insertion.Please refer to Fig. 9, Fig. 9 is one according to method provided by the present invention, goes up in a primary voltage space vector Vs1 to add three schematic diagrames that detect vector.By finding out among the figure that this primary voltage space vector Vs1 is arranged in the zone 1 of Fig. 5 the 6th quadrant, be (011), (101), (110) so insert the detection vector direction.Please refer to Figure 10, Figure 10 also is one according to method provided by the present invention, goes up in a primary voltage space vector Vs2 to add three schematic diagrames that detect vector.By finding out among the figure that this primary voltage space vector Vs2 is arranged in the zone 2 of Fig. 5 second quadrant, be (100), (010), (001) so insert the detection vector direction.
Figure 12 is the time diagram of Fig. 9.In Figure 12, the time of first half Tp1 is represented the modulating time of primary voltage space vector Vs1, and it is the required altogether time (that is the vector length in the voltage space vectogram) of (011), (101), (110) that three detection vector direction are inserted in latter half of Tp2 representative.In Figure 12, identical among the situation of the power transistor conducting of A, B, C representative and Fig. 6, repeat no more in this.Triangular wave above the first half Tp1 of Figure 12 is one according to the carrier wave comparison value that SVPWM produced, and represents that when this carrier wave comparison value is higher than Ta A is 1, represents when being lower than Ta that A is 0.Represent that B is 1 when should this carrier wave comparison value being higher than Tb, represent when being lower than Tb that B is 0; Represent that when this carrier wave comparison value is higher than Tc C is 1, represent when being lower than Tc that C is 0.By finding out among Fig. 9 that this primary voltage space vector Vs1 falls within the 6th quadrant among 5 figure, can pass through V1 (100) and V6 (101) two principal voltage mikeys vector comes synthetic, theory according to SVPWM, the optimized switching sequence of this vector is V0, V1, V6, V7, V6, V1, V0, with identical shown in Figure 12.And three of inserting in Tp2 time thereafter detect vector direction and are not less than condition Tm+Td sample time for time of (011), (101), (110), and the success of just can taking a sample is by finding out this result among the figure.
The sample time (A/D sample) of also listing analog-digital converter among Figure 12 for your guidance, know the time (as discussed previously) that includes A/D sample among the Tm by figure, and by also finding out three length that detect vector among the figure all greater than the time of A/D sample, the old friend takes a sample correctly.Because inserting three detection vectors, the present invention can be a regular length, that is a suitable length that is not less than Tm+Td, then sample time can with fixing, need not change sampling point according to putting the switching time of PWM, therefore more easily obtain average current, the three-phase current that is obtained is also more accurate.
In like manner Figure 13 is the time diagram of Figure 10.In Figure 13, the time of first half Tp1 is represented the modulating time of primary voltage space vector Vs2, and it is (100), (010), (001) required time that three detection vector direction are inserted in latter half of Tp2 representative.In Figure 13, identical among the situation of the power transistor conducting of A, B, C representative and Fig. 6, repeat no more in this.Triangular wave above the first half Tp1 of Figure 13 is one according to the carrier wave comparison value that SVPWM produced, and is also identical with Figure 12, so also repeat no more.By finding out among Figure 10 that this primary voltage space vector Vs2 falls within second quadrant among 5 figure, can pass through V2 (110) and V3 (010) two principal voltage mikey vector comes synthetic, theory according to SVPWM, the optimized switching sequence of this vector is V0, V3, V2, V7, V2, V3, V0, with identical shown in Figure 13.And three of inserting in Tp2 time thereafter detect vector direction and also are not less than condition Tm+Td sample time for time of (100), (010), (001).Can find out also that by Figure 13 three are detected vector all greater than the time of A/D sample the sample time (A/D sample) of also listing analog-digital converter among Figure 13 for your guidance, and the old friend takes a sample correctly.
Figure 14 is the simplification time diagram of Figure 12.In Figure 14, null vector (111) is replaced with another null vector (000), then the state of B is 0 in the time at Tp1 entirely, therefore the rating unit of this carrier wave comparison value and Tb can omit and (please refer to the triangular wave of top of the first half Tp1 of Figure 14, that is the carrier wave comparison value, omitted rating unit with Tb).Voltage space vector order after the replacement is (000), (100), (101), (000), (101), (100), (000), again the time of middle null vector (000) was incorporated in the time of two ends null vector (000), promptly get the vectorial order of the voltage space of simplifying as shown in figure 14, (000), (100), (101), (100), (000).In like manner, Figure 15 is the simplification time diagram of Figure 13.In Figure 15, null vector (111) is replaced with another null vector (000), then the state of C is 0 in the time at Tp1 entirely, therefore the rating unit of this carrier wave comparison value and Tc can omit and (please refer to the triangular wave of top of the first half Tp1 of Figure 15, that is the carrier wave comparison value, omitted rating unit with Tc).Voltage space vector order after the replacement is (000), (010), (110), (000), (110), (010), (000), again the time of middle null vector (000) was incorporated in the time of two ends null vector (000), promptly get the vectorial order of the voltage space of simplifying as shown in figure 15, (000), (010), (110), (010), (000).
Figure 16 is another simplification time diagram of Figure 12.In Figure 16, null vector (000) is replaced with another null vector (111), then the state of A is 1 in the time at Tp1 entirely, therefore the rating unit of this carrier wave comparison value and Ta can omit and (please refer to the triangular wave of top of the first half Tp1 of Figure 16, that is the carrier wave comparison value, omitted rating unit with Ta).Voltage space vector order after the replacement is (111), (100), (101), (111), (101), (100), (111), but need consider how the power switched transistor could make power transistor that minimum switching times is arranged this moment.According to present embodiment, the time of two ends null vector (111) is incorporated in the time of middle null vector (111), get final product the voltage space vector order of the minimum simplification of power transistor switching times, as shown in figure 16, (100), (101), (111), (101), (100).In like manner, Figure 17 also is another simplification time diagram of Figure 13.In Figure 17, null vector (000) is replaced with another null vector (111), then the state of B is 1 in the time at Tp1 entirely, therefore the rating unit of this carrier wave comparison value and Tb can omit and (please refer to the triangular wave of top of the first half Tp1 of Figure 17, that is the carrier wave comparison value, omitted rating unit with Tb).Voltage space vector order after the replacement is (111), (010), (110), (111), (110), (010), (111), need consider similarly how the power switched transistor could make power transistor that minimum switching times is arranged.According to present embodiment, incorporate the time of two ends null vector (111) into middle null vector in (111) time, get final product the voltage space vector order of the minimum simplification of power transistor switching times, as shown in figure 17, (010), (110), (111), (110), (010).
The practice of the simplification voltage space vector order of this kind in the SVPWM technology, be to finish by the software and the firmware that are write in the control chip, can reduce the switch number of times of pairing power transistor, therefore because the energy loss that switch caused of power transistor, also can reduce thereupon, for the modulation efficiency of SVPWM, suitable help is arranged.Yet, because method provided by the present invention is that three groups of detections of inserting are vectorial after the modulating time of primary voltage space vector, but not be mixed into the primary voltage space vector modulation in, so the present invention can't influence the modulation of primary voltage space vector.That is to say that no matter the modulation of primary voltage space vector is SPWM or SVPWM, method of the present invention all is suitable for, is not to be only limited in the modulation of application SVPWM in the aforementioned embodiment.Also please note simultaneously: though the problem of the sampling failure that method desire proposed by the invention solution can not measure in the district to be produced, but method of the present invention is not limit and can only be applied to fall within the voltage space vector that can not measure the district in the voltage space vectogram, the voltage space vector of optional position in the voltage space vectogram all belongs to the scope of application of method of the present invention.
Figure 18 is arranged in the flow chart that the method for the vector that can not measure the zone is painted for measurement according to the present invention.It comprises the following step:
Step 20: the current control loop (this current control loop can be control chip 8 or some control rules) that enters three phase alternating current motor.
Step 22: judge among three-phase voltage Va, Vb, the Vc of three-phase current Ia, Ib that the institute desire measures, Ic whether two phase voltages are arranged greater than 0.If, then advance to step 26, if not, then advance to step 24.
Step 24: inserting and detecting vector direction is (110), (101), (011), and advances to step 28.
Step 26: inserting and detecting vector direction is (001), (010), (100), and advances to step 30.
Step 28: measure two less than 0 electric current I 1 and the value of I2, and advance to step 32.
Step 30: measure two greater than 0 electric current I 1 and the value of I2, and advance to step 34.
Step 32: calculate I3=I1+I2, and advance to step 36.
Step 34: calculate I3=-I1-I2, and advance to step 36.
Step 36: check the corresponding relation of electric current I 1, I2, I3 and three-phase current Ia, Ib, Ic, and I1, I2, I3 are shone upon back three-phase current Ia, Ib, Ic.Then return step 20 again, pass the information of the three-phase current of gained back current control loop to carry out the adjustment of pulse duration.
According to method provided by the present invention, at first in the current control loop of three phase alternating current motor, judge among the pairing three-phase voltage Va of three-phase current Ia, Ib, Ic that the institute desire measures, Vb, the Vc whether two phase voltages are arranged greater than 0, vectorial to determine which three groups of this insertion detect.If two phase voltages are arranged greater than 0, then inserting and detecting vector direction is (001), (010), (100), and if not, then inserting and detecting vector direction is (110), (101), (011).Then measure biphase current in the three-phase current,, then measure two less than 0 electric current I 1 and I2 if the detection vector direction of inserting be (110), (101), (011) by direct current chain current sensing resistor, and calculating third phase electric current I 3=I1+I2; If the detection vector direction of inserting be (001), (010), (100), then measure two greater than 0 electric current I 1 and I2, and calculating third phase electric current I 3=-I1-I2.Reexamine the corresponding relation of I1, I2, I3 and three-phase current Ia, Ib, Ic at last, and correspondence mappings is gone back one by one.After three-phase current has all shone upon, then send back to control chip 8,, finish the control of whole loop circuit as feedback signal.
If but consider electric current discontinuous problem of meeting between the switch area, because motor is an inductive load, the switching of electric current can fall behind the switching of voltage, therefore can cause in a certain short time, certain phase voltage has switched to negative voltage from positive voltage, this phase current still keeps the positive current state, does not switch to negative current as yet.Detect vector if switch to another group this moment, can cause testing result and expection of the present invention not to conform to, must wait until this phase current also switch finish after, it is vectorial to insert one group of new detection.Therefore the present invention further is modified to Figure 19 with Figure 18.Figure 19 is the method that measurement according to the present invention is arranged in the vector that can not measure the zone, adds the correction flow chart of considering electric current discontinuous problem of meeting between the switch area again.It comprises the following step:
Step 60: the current control loop (this current control loop can be control chip 8 or some control rules) that enters three phase alternating current motor.
Step 62: be converted to negative voltage by judging in the program among three-phase voltage Va, Vb, the Vc whether there be from positive voltage arbitrary phase voltage, or be the situation of positive voltage,, then set and be masked as 1 if having by negative voltage transition.
Step 64: judge among three-phase voltage Va, Vb, the Vc of three-phase current Ia, Ib that the institute desire measures, Ic whether two phase voltages are arranged greater than 0.If, then advance to step 66, if not, then advance to step 68.
Step 66: whether judgement symbol is 1, if, then advance to step 70, if not, then advance to step 78.
Step 68: whether judgement symbol is 1, if, then advance to step 72, if not, then advance to step 80.
Step 70: the value that judges whether a phase current is 0, if, then advance to step 74, if not, then advance to step 80.
Step 72: the value that judges whether a phase current is 0, if, then advance to step 76, if not, then advance to step 78.
Step 74: set and be masked as 0, and advance to step 78.
Step 76: set and be masked as 0, and advance to step 80.
Step 78: inserting and detecting vector direction is (001), (010), (100), and advances to step 82.
Step 80: inserting and detecting vector direction is (110), (101), (011), and advances to step 84.
Step 82: measure two greater than 0 electric current I 1 and the value of I2, and advance to step 86.
Step 84: measure two less than 0 electric current I 1 and the value of I2, and advance to step 88.
Step 86: calculate I3=-I1-I2, and advance to step 90.
Step 88: calculate I3=I1+I2, and advance to step 90.
Step 90: check the corresponding relation of electric current I 1, I2, I3 and three-phase current Ia, Ib, Ic, and I1, I2, I3 are shone upon back three-phase current Ia, Ib, Ic.Then return step 60 again, pass the information of the three-phase current of gained back current control loop to carry out the adjustment of pulse duration.
According to method provided by the present invention, judging at first in the three-phase voltage whether there to be from positive voltage arbitrary phase voltage is converted to negative voltage, or be the situation of positive voltage by negative voltage transition, if have, then setting sign (buffer) is 1, and this buffer promptly is to be used for determining whether judging the foundation that certain phase current equals 0.With the example of Vc among Figure 21, Figure 21 is the section definition figure of three-phase voltage Va, Vb, Vc, and when entering the zone 42 the time through zone 41, Vc becomes negative voltage by positive voltage, and therefore just having entered regional 42 o'clock buffers is set as 1.But because motor is an inductive load, electric current can fall behind a little phase place of voltage, though therefore Vc becomes negative voltage by positive voltage, electric current I c does not but transfer negative current to by positive current yet, therefore need to judge whether the Ic electric current is 0, if Ic is 0, then buffer is set at 0, just can change and insert new detection vector, otherwise will continue to use old detection vector.Then enter in the current control loop of three phase alternating current motor, judge among the pairing three-phase voltage Va of three-phase current Ia, Ib, Ic that the institute desire measures, Vb, the Vc whether two phase voltages are arranged greater than 0, vectorial to determine which three groups of this insertion detect.If two phase voltages are arranged greater than 0, then whether judgement symbol is 1 again, if be masked as 1, then represent to have in the three-phase voltage phase voltage characteristic of its sign that changes, therefore judge whether further that again this phase current equals 0? if, represent that then this phase current also is about to change the characteristic of its sign, can insert and detect vector, therefore sign is reseted back 0, and insertion detection vector direction is (001), (010), (100).If sign is not 1 at this moment, then expression does not have the characteristic that any phase voltage changes its sign, and therefore can directly insert and detect vector direction is (001), (010), (100).If do not have two phase voltages in the three-phase voltage greater than 0, then whether judgement symbol is 1 again, if be masked as 1, then represent to have in the three-phase voltage phase voltage characteristic of its sign that changes, therefore judge whether further that again this phase current equals 0? if, represent that then this phase current also is about to change the characteristic of its sign, can insert and detect vector, therefore sign is reseted back 0, and insertion detection vector direction is (110), (101), (011).But if sign is not 1 at this moment, then expression does not have the characteristic that any phase voltage changes its sign, and therefore can directly insert and detect vector direction is (110), (101), (011).Next promptly measure biphase current in the three-phase current,, then measure two less than 0 electric current I 1 and I2 if the detection vector direction of inserting be (110), (101), (011) by direct current chain current sensing resistor, and calculating third phase electric current I 3=I1+I2; If the detection vector direction of inserting be (001), (010), (100), then measure two greater than 0 electric current I 1 and I2, and calculating third phase electric current I 3=-I1-I2.Reexamine the corresponding relation of I1, I2, I3 and three-phase current Ia, Ib, Ic at last, and correspondence mappings is gone back one by one.After three-phase current has all shone upon, then send back to control chip 8,, finish the control of whole loop circuit as feedback signal.
The present invention utilizes and inserts three groups of detection vectors, make the length that is positioned at the primary voltage space vector that can not measure the zone increase, become scalable vector, measure wherein biphase current again, and by three phase winding balances, calculate the third phase electric current, wherein because by inserting different detection vectors, the electric current on the direct current chain current sensing resistor is crossed in adjustable rectification, when this electric current it is reverse when negative, make its permanent on the occasion of, therefore do not need duplicate supply OP-amp, only need a single supply OP-amp to get final product, simultaneously for this duplicate supply OP-amp is provided work, on circuit the extra one group of duplicate supply that increases, also can with omission.
But owing to added the detection vector, circuit has been caused two influences: 1. the time of circuit switching is by the time T p1 of primary voltage space vector, elongated is when adding (Tp1+Tp2) of the time T p2 that inserts three groups of detection vectors, this can have influence on the frequency of the current circuit of native system, and then has influence on its frequency range.2. the amplitude of primary voltage space vector can dwindle Tp1/ (Tp1+Tp2) doubly, to effectively handle this problem, voltage commands must be amplified (Tp1+Tp2)/Tp1 doubly, but this method can cause again as the saturation region among Figure 22 500 and produce, Figure 22 is a space vector figure who is constituted in 6 principal voltage space vectors, circle represents that partly the method according to this invention causes the scope of the space voltage vector of current distortion among the figure, and saturation region 500 (dash area) expression method of the present invention is to voltage space vector effect on amplitude scope.Because when using SVPWM, for fear of the electric current distortion distortion, voltage all must be confined to the circle the inside of Figure 22, and is too many in order to avoid saturation region 500 influence the circle of Figure 22 effectively, must dwindle the vectorial time of detecting as much as possible; But the length of this detection vector must be not less than Tm+Td again, takes a sample successfully guaranteeing.Therefore detect to and can not unconfinedly increase, and must seek a suitable value; Because choosing of this suitable value is relevant with Tm+Td, therefore also as described above, be subjected to the influence of the sample time of the output voltage slope of the conducting of power transistor and deadline, operational amplifier and analog-digital converter equally.Please refer to Figure 20, the flow chart that the primary voltage magnitude of spatial vector that Figure 20 is caused for compensation method of the present invention diminishes.Among Figure 20 the primary voltage magnitude of spatial vector is defined a upper limit Vs max, if exceed this upper limit Vs max, then to be limited to the master on this.Step among Figure 20 comprises:
Step 11: new period T is made as T=Tp1+Tp2.
Step 13: the amplitude of new voltage space vector Vs is amplified (Tp1+Tp2)/Tp1 doubly.
Step 15: if new voltage space vector Vs is greater than voltage space vector amplitude upper limit Vsmax, then with Vs=Vs max.
Next introduce power transistor from conducting and time of ending, the output voltage slope of operational amplifier (OP-amp slew rate), and the sample time of analog-digital converter is to inserting the influence that the time T p2 that detects vector causes.Please refer to the 23rd, 24, reach 25 figure.Figure 23 is under the modulating frequency of different SVPWM (but the power transistor ON time is fixed), and the output voltage slope of different operational amplifiers is to the schematic diagram of the influence that new frequency curve caused behind this insertion detection vector.Among Figure 23, the power transistor ON time is 60ns, the modulating frequency of the SVPWM of the primary voltage space vector that the representative of different curve is different, and the longitudinal axis represents to insert the new frequency that detects behind the vector, and transverse axis is represented the output voltage slope of operational amplifier.By can finding out among the figure,, less to inserting the influence that detects the new frequency behind the vector when the output voltage slope of operational amplifier during greater than 31.25 (V/us).Just the output voltage slope of operational amplifier is big more, more little to the new frequency influence behind the insertion detection vector, because the output voltage slope of operational amplifier is big more, the time T p2 of the detection vector that is inserted just can reduce, so relatively the time of Tp2 just diminishes in whole shared ratio of new cycle, therefore influences less.Figure 24 is under the modulating frequency of different SVPWM, and the time (Tp2) of different detection vectors is to the schematic diagram of the influence that amplitude caused of this primary voltage space vector.Among Figure 24, the modulating frequency of the SVPWM of the primary voltage space vector that different curve representatives is different, the ratio of the amplitude of the new voltage space vector after the longitudinal axis is represented the amplitude of primary voltage space vector Vs and inserted detection limit, transverse axis represents to insert the time T p2 that detects vector.By can finding out among the figure, when the time T p2 of the detection vector that inserts long more, just big more to the influence of quotient of amplitudes.And Figure 25 is under the output voltage slope of different operational amplifiers, and the sampling frequency of different analog-digital converters is to inserting the schematic diagram of the influence that time T p2 caused that detects vector.Among Figure 25, the output voltage slope of the operational amplifier that different curve representatives is different, the longitudinal axis is represented to insert the time T p2 that detects vector, and transverse axis is represented the sampling frequency of analog-digital converter.By can finding out among the figure,, less to the influence of inserting the time T p2 that detects vector when the sampling frequency of analog-digital converter during greater than 600KHz.Just the sampling frequency of analog-digital converter is big more, and is more little to inserting the time T p2 influence that detects vector.In addition by among the figure also as can be seen, when the output voltage slope of operational amplifier is 0.25 (V/us),, all can't influence the time T p2 of the detection vector that is inserted no matter the sampling frequency of analog-digital converter is much.In other words, when the sampling frequency of digital quantizer is 100KHz, the output voltage slope of operational amplifier all can't influence the time T p2 of the detection vector that is inserted during greater than 1.25 (V/us); And desire shortens the time T p2 that inserts the detection vector, and just must satisfy: 1. the ON time of power transistor is short more; 2. the output voltage slope of operational amplifier is big more; The sample time of analog-digital converter fast more grade condition, therefore select suitable assembly, be necessary with the usefulness of avoiding influencing whole system.
The above is the derivation of theory of the present invention, and the feasibility of this method is also by following relevant experimental verification.Please refer to Figure 26.Figure 26 is zone 2 among Figure 11, the sampled signal lab diagram of the analog-digital converter when inserting three groups of detection vector direction for (100), (010), (001).Ch1 is the signal of S1 power transistor among Figure 26, and Ch2 is the signal of S3 power transistor, and Ch3 is the signal of S5 power transistor, and Ch4 is the sampled signal of analog-digital converter.By finding out among Figure 26 that analog-digital converter all has correctly takes a sample when each detects the vector insertion.Figure 27 then is zone 1 among Figure 11, the lab diagram of the sampled signal of the analog-digital converter when inserting three groups of detection vector direction for (011), (101), (110).Ch1 is the signal of S1 power transistor among Figure 27, and Ch2 is the signal of S3 power transistor, and Ch3 is the signal of S5 power transistor, and Ch4 is the sampled signal of analog-digital converter.By also finding out among Figure 27 that analog-digital converter all has correctly takes a sample when each detects the vector insertion.
After determining that sampling is errorless, requirement is surveyed direct current chain electric current to obtain the phase current relevant information.Please refer to Figure 28, Figure 28 is the lab diagram of the sampled signal of A phase current of the present invention, S1 power transistor, the ohmically voltage signal of direct current chain and analog-digital converter.Ch1 is the A phase current among Figure 28, and Ch2 is the signal of S1 power transistor, and Ch3 is a direct current chain voltage signal, and Ch4 is the sampled signal of analog-digital converter.By finding out among Figure 28, the A phase current is 344mA, and institute measures to such an extent that direct current chain voltage is 680mV, and by verifying by following formula (1) whether the A phase current is steady-state current (average current), to judge whether sampling result is accurate, can learn the correctness of method of the present invention.
344 (mA) * 6 (enlargement ratio of the operational amplifier of this experiment) * 0.33 (Ω, the direct current chain resistance value of this experiment)=681.12mV------formula (1)
Calculating gained result is by 681.12mV and measured to such an extent that direct current chain voltage is that 680mV is very approaching, and old friend's the method is feasible.Then please refer to Figure 29, Figure 29 is the phase current of gained of the present invention and the comparative experiments figure that actual amount predicts phase current.Among Figure 29, Ch1 is the A phase current that is obtained, and Ch2 is the B phase current that is obtained, and Ch3 is that electric current colludes the A phase current that table measures, and Ch4 is that electric current colludes the B phase current that table measures.By can find out among the figure by electric current collude the table measurement to, no matter be A phase current or B phase current, all respectively with the A phase current that is obtained or B phase current much at one, so the correctness of provable this method.
The method that obtains the three-phase current relevant information by single direct current chain electricity provided by the present invention, do not need to consider to switch which power transistor, decide and measure which phase current, can simplify also in the conventional practice that to use at least two phase current transducers be single direct current chain current sensor, and be not limited to use the switching mode of SVPWM, also can use the switching mode of SPWM, also do not need to judge formula by the calculating of complexity, or complicated program circuit, or utilize the mode of the switching signal etc. of mobile PWM, avoid measuring the problem in zone.And the present invention utilizes the utilization of positive negative vector, the electric current that will flow through direct current chain current sensing resistor transfers single forward to, also saved the operational amplifier that a duplicate supply must be provided in the conventional practice on hardware, and extra one group of forward and reverse power supply, reduce the cost of circuit, also simplified the circuit of design simultaneously.And sampling time point of the present invention is fixed, and need not change sampling point according to putting the switching time of PWM, more easily obtains average current, and the result of the phase current that is obtained is more correct.The present invention has also adopted the method that replaces mutually between two null vectors (000) and (111) with the voltage space vector order of simplifying SVPWM, and this result also makes the power transistor switch number of times reduce, and has reduced the energy loss that is caused when transistor switches.Though the present invention detects vector because insert three groups, can make that the amplitude scale of voltage space vector is dwindled originally, also can be by the mode of software, go to dwindle or overcome this problem.The present invention not only can be applicable to above the three phase electric machine, also can be applicable to the three-phase installation that other uses PWM to drive.
The above only is preferred embodiment of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.

Claims (8)

1. one kind by the information of the acquisition three-phase current method with the width of adjusting pulse, and it comprises:
One alternating current machine produces a three-phase current;
This three-phase current produces a primary voltage space vector through pulse-width modulator modulation back;
Detect the voltage composition of this primary voltage space vector, to produce a testing result;
Providing three sum totals according to this testing result is zero detection vector;
Insert this three sum total in regular turn and be zero detection vector after this primary voltage space vector;
In this three detection vectorial insertion time, carry out current sampling respectively, to produce a sampling result; And
Adjust the width of the pulse that this pulse-width modulator produces according to this sampling result,
Wherein each length that detects vector is not less than a power transistor and never is conducting to the time of stablize conducting, and the signal of an operational amplifier becomes high-tension transit time by low-voltage, and the sample time of an analog-digital converter with; And
The voltage composition that wherein detects this primary voltage space vector for detect whether have in this primary voltage space vector two-phase voltage on the occasion of or negative value.
2. the method for claim 1, wherein inserting three sum totals in regular turn and be zero detection vector is that zero detection vector is after this primary voltage space vector for insert three sum totals in regular turn by this pulse-width modulator in this primary voltage space vector after.
3. one kind by the information of the acquisition three-phase current variable duration impulse system with the width of adjusting pulse, comprises:
One three phase alternating current motor is in order to produce a three-phase current;
One pulse-width modulator is coupled to this three phase alternating current motor, in order to modulate this three-phase current, to produce a primary voltage space vector;
One checkout gear is in order to detect the voltage composition of this primary voltage space vector;
One detects vectorial generator, and providing three sum totals in order to the result according to this detection is zero detection vector;
One control chip is coupled to this pulse-width modulator, is that zero detection vector is after this primary voltage space vector in order to insert this three sum total in regular turn; And
One analog-digital converter is coupled to this control chip, in order to carry out current sampling respectively in the time that this three detections vector inserts, to produce a sampling result;
Wherein this control chip can be adjusted the width of the pulse of this pulse-width modulator generation according to this sampling result,
Wherein each length that detects vector is not less than a power transistor and never is conducting to the time of stablizing conducting, the signal of an operational amplifier become by low-voltage high-tension transit time and this analog-digital converter sample time and, and
The voltage composition that wherein detects this primary voltage space vector for detect whether have in this primary voltage space vector two-phase voltage on the occasion of or negative value.
4. variable duration impulse system as claimed in claim 3, wherein inserting three sum totals in regular turn and be zero detection vector is that zero detection vector is after this primary voltage space vector for insert three sum totals in regular turn by this pulse-width modulator in this primary voltage space vector after.
5. one kind by the information of the acquisition three-phase current method with the width of adjusting pulse, and it comprises:
One alternating current machine produces a three-phase current;
This three-phase current produces one first voltage space sequence vector through space vector pulse-width modulator modulation back, and this first voltage space sequence vector comprises a plurality of first voltage space vectors;
Detect each first voltage space vector of this first voltage space sequence vector, to produce one first testing result;
Detect these a plurality of first voltage space vectors and the voltage composition, to produce one second testing result;
According to this first testing result, different null vector in this first voltage space sequence vector is substituted by identical null vector, to produce one second voltage space sequence vector, this second voltage space sequence vector comprises a plurality of second voltage space vectors;
Rearrange the order of a plurality of second voltage space vectors of this second voltage space sequence vector, to produce a tertiary voltage space vector sequence;
Providing three sum totals according to this second testing result is zero detection vector;
Insert this three sum total in regular turn and be zero detection vector after this tertiary voltage space vector sequence;
In this three detection vectorial insertion time, carry out current sampling respectively, to produce a sampling result; And
Adjust the width of the pulse that this pulse-width modulator produces according to this sampling result,
Wherein each length that detects vector is to be not less than a power transistor never to be conducting to the time of stablize conducting, and the signal of an operational amplifier becomes high-tension transit time by low-voltage, and the sample time of an analog-digital converter with, and
Wherein detect these a plurality of first voltage space vectors and the voltage composition for detect these a plurality of first voltage space vectors and the voltage composition in whether have two-phase voltage on the occasion of or negative value.
6. method as claimed in claim 5, wherein inserting three sum totals in regular turn and be zero detection vector is that zero detection vector is after this tertiary voltage space vector sequence for insert three sum totals in regular turn by this pulse-width modulator in this tertiary voltage space vector sequence after.
7. one kind by the information of the acquisition three-phase current space vector variable duration impulse system with the width of adjusting pulse, comprises:
One three phase alternating current motor is in order to produce a three-phase current;
One space vector pulse-width modulator is coupled to this three phase alternating current motor, and in order to modulate this three-phase current, to produce one first voltage space sequence vector, this first voltage space sequence vector comprises a plurality of first voltage space vectors;
One checkout gear, in order to detecting each first voltage space vector of this first voltage space sequence vector, producing one first testing result, and detect these a plurality of first voltage space vectors and the voltage composition, to produce one second testing result;
One substitution device, in order to result according to this first detection, different null vector in this first voltage space sequence vector is substituted by identical null vector, and to produce one second voltage space sequence vector, this second voltage space sequence vector comprises a plurality of second voltage space vectors;
One rearranges device, in order to rearrange the order of a plurality of second voltage space vectors in this second voltage space sequence vector, to produce a tertiary voltage space vector sequence;
One detects vectorial generator, is zero detection vector in order to provide three sum totals according to this second result who detects;
One control chip is coupled to this pulse-width modulator, is that zero detection vector is after this tertiary voltage space vector sequence in order to insert this three sum total in regular turn; And
One analog-digital converter is coupled to this control chip, in order to carry out current sampling respectively in the time that this three detections vector inserts, to produce a sampling result;
Wherein this control chip can be adjusted the width of the pulse of this pulse-width modulator generation according to this sampling result,
Wherein each length that detects vector is to be not less than a power transistor never to be conducting to the time of stablize conducting, and the signal of an operational amplifier becomes high-tension transit time by low-voltage, and the sample time of this analog-digital converter with, and
Wherein detect these a plurality of first voltage space vectors and the voltage composition for detect these a plurality of first voltage space vectors and the voltage composition in whether have two-phase voltage on the occasion of or negative value.
8. space vector variable duration impulse system as claimed in claim 7, wherein inserting three sum totals in regular turn and be zero detection vector is that zero detection vector is after this tertiary voltage space vector sequence for insert three sum totals in regular turn by this pulse-width modulator in this tertiary voltage space vector sequence after.
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US7015664B2 (en) * 2002-09-03 2006-03-21 Trw Limited Motor drive control
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CN1330087C (en) * 2004-05-10 2007-08-01 摩托罗拉公司 Damping control in a three-phase motor with a single current sensor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6590794B1 (en) * 1999-10-15 2003-07-08 Siemens Aktiengesellschaft Apparatus and method for measuring current
US6653812B1 (en) * 2002-01-31 2003-11-25 Analog Devices, Inc. Space vector modulation methods and structures for electric-motor control
US7102327B2 (en) * 2002-03-28 2006-09-05 International Rectifier Corporation Motor current reconstruction via DC bus current measurement
US7015664B2 (en) * 2002-09-03 2006-03-21 Trw Limited Motor drive control
CN1330087C (en) * 2004-05-10 2007-08-01 摩托罗拉公司 Damping control in a three-phase motor with a single current sensor

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