CN101527126B - Image regulating system and regulating method - Google Patents
Image regulating system and regulating method Download PDFInfo
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- CN101527126B CN101527126B CN2008100834690A CN200810083469A CN101527126B CN 101527126 B CN101527126 B CN 101527126B CN 2008100834690 A CN2008100834690 A CN 2008100834690A CN 200810083469 A CN200810083469 A CN 200810083469A CN 101527126 B CN101527126 B CN 101527126B
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Abstract
The invention relates to an image regulating system and a regulating method. The system comprises a display module, a time schedule controller and a time schedule converter. The time schedule controller is connected with the display module, outputs an image data to the display module and outputs a time schedule control command, wherein the time schedule control command comprises a vertical sync signal, a horizontal sync signal and a pixel enabling signal. Meanwhile, the time schedule converter is connected between the time schedule controller and the display module, receives the time schedule control command and regulates the enabling period of the pixel enabling signal in the time schedule control command to output an adaptive time schedule control command to the display module for controlling the display module to display an output image corresponding to the image data on the central position of the display module.
Description
Technical field
The present invention relates to a kind of image regulating system and method for adjustment, relate in particular to a kind of adjustment, be presented at the image regulating system and the method for the middle position of panel with the control picture data by control timing.
Background technology
Fig. 1 is known LCD configuration diagram.LCD consist predominantly of be used for display frame display panel 200 and control display panel 200 time schedule controller 100.Cooperate Fig. 2, be the timing waveform synoptic diagram of time schedule controller.Time schedule controller 100 is according to the data Data_In of outside, and produces an image data LDD and a sequential control command S1 (sequential control order S1 comprises a vertical synchronizing signal VSYNC, a horizontal-drive signal HSYNC, a data actuating signal OE and a clock CLK).Vertical synchronizing signal VSYN sent by time schedule controller 100 and horizontal-drive signal HSYNC moves with row driver 204 in order to control line driver 206 respectively, simultaneously, cooperate data actuating signal OE so that image data LDD is sent into display panel 200 again, and make display panel 200 show an output picture 202.
Summary of the invention
In view of this, the invention provides a kind of image regulating system and method for adjustment, it is according to the size of display panel, the activation cycle length of the data actuating signal that the adjustment time schedule controller is exported, and data activation period, an one prime virtual data and a back grade virtual data are set in each the horizontal line data of image data or the front and back of each perpendicular line data, in order to adjust the middle position that image frame is presented at display panel.
The image regulating system of first embodiment of the invention includes a display module, time schedule controller and a sequential converter.Wherein, time schedule controller is connected in display module, exports an image data to display module, and exports a sequential control command, and wherein the sequential control order includes a vertical synchronizing signal, a horizontal-drive signal and a pixel enable signal.The sequential converter is connected between time schedule controller and the display module, receives the sequential control order, and adjusts the activation cycle of this pixel enable signal in the sequential control order, to export an adaptive sequential control order to display module.Time schedule controller is according to the size of display panel, data activation period, a horizontal virtual data of one prime and a back horizontal virtual data of level are set in the front and back of each horizontal line data of image data, in order to control the display module image data displaying in position placed in the middle.
In addition, in the image regulating system of second embodiment of the invention, time schedule controller is according to the size of display panel, data activation period, one prime vertical virtual data and back grade vertical virtual data are set in the front and back of each perpendicular line data of image data, in order to control the display module image data displaying in position placed in the middle.
In addition, picture adjusting method provided by the invention, step shows an image data for a vertical synchronizing signal and a horizontal-drive signal are provided earlier to control a display module.Then,, before horizontal line data of image data, the horizontal virtual data of a prime is set, and the horizontal virtual data of a back level is set after the horizontal line data according to the size of display module.At last, between each pulse of horizontal-drive signal, provide a pixel enable signal, in order to activation horizontal line data, the horizontal virtual data of prime and the horizontal virtual data of back level, to adjust the middle position that image data is presented at display module.
In addition, the picture adjusting method that second embodiment of the invention provided, its step shows an image data for a vertical synchronizing signal and a horizontal-drive signal are provided earlier to control a display module.Then,, prime vertical virtual data are set before perpendicular line data of image data, and back grade vertical virtual data are set after the perpendicular line data according to the size of display module.At last, between each pulse of vertical synchronizing signal, provide a pixel enable signal, in order to activation perpendicular line data, prime vertical virtual data and back level vertical virtual data, to adjust the middle position that image data is presented at display module.
In sum, the present invention is by the activation cycle length of the data actuating signal adjusting time schedule controller and export, and prime virtual data and back level virtual data are set in each the horizontal line data of image data or the front and back of each perpendicular line data, to adjust the display panel position placed in the middle that image frame is presented at different size.Therefore, when the present invention can provide the time schedule controller of same type to use on the display panel of different specification size, still can allow the output picture be presented on the display panel position placed in the middle, and then reach the shortcoming of improving known output picture skew.
Above general introduction and ensuing detailed description are all exemplary in nature, are in order to further specify protection scope of the present invention.And relevant other objects and advantages of the present invention will be set forth in follow-up explanation and accompanying drawing.
Description of drawings
Fig. 1 is known LCD configuration diagram;
Fig. 2 is the timing waveform synoptic diagram of time schedule controller;
Fig. 3 is known another LCD configuration diagram;
Fig. 4 is the image regulating system synoptic diagram of first embodiment of the invention;
Fig. 5 is the waveform synoptic diagram of the adaptive sequential control order of first embodiment of the invention;
Fig. 6 is the picture adjusting method schematic flow sheet of first embodiment of the invention;
Fig. 7 is the image regulating system synoptic diagram of second embodiment of the invention;
Fig. 8 is the waveform synoptic diagram of the adaptive sequential control order of second embodiment of the invention;
Fig. 9 is the picture adjusting method schematic flow sheet of second embodiment of the invention.
Wherein, description of reference numerals is as follows:
100 time schedule controllers
200,300 display panels
202 output pictures
204 row drivers
206 line drivers
The Data_In data
The LDD image data
S1 sequential control order
The VSYNC vertical synchronizing signal
The HSYNC horizontal-drive signal
The OE data actuating signal
The CLK clock
10 time schedule controllers
40,60 display modules
400,600 display panels
402,602 output pictures
403,603 image frames
404 row drivers
406 line drivers
50 sequential converters
S1 sequential control order
S2, S2 ' adaptive sequential control order
The S3 notification signal
LDD, LDD ' image data
The VSYNC vertical synchronizing signal
The HSYNC horizontal-drive signal
The OE data actuating signal
The CLK clock
The horizontal virtual data of pre-data prime
The horizontal virtual data of level behind the back-data
Line 0 ' perpendicular line data
Pre-data ' prime vertical virtual data
Back-data ' back level vertical virtual data
Embodiment
Please refer to Fig. 4, be the image regulating system synoptic diagram of first embodiment of the invention.Image regulating system includes a display module 40, time schedule controller 10, a sequential converter 50.Display module 40 comprises a display panel 400, a line driver 406 and a row driver 404, wherein line driver 406 is connected in display panel 400, drive in order to the data presentation that display panel 400 line directions are provided, row driver 404 is connected in display panel 400, drives in order to the data presentation that display panel 400 column directions are provided.
With reference to figure 4, time schedule controller 10 is connected in display module 40 again, exports an image data LDD to display module 40, and exports a sequential control command S1.In addition, sequential converter 50 is connected between time schedule controller 10 and the display module 40, sequential converter 50 receives sequential control order S1, and adjust the activation cycle of pixel enable signal OE among the sequential control order S1, to export an adaptive sequential control order S2 to display module 40, wherein adaptive sequential control order S2 comprises a vertical synchronizing signal VSYNC, a horizontal-drive signal HSYNC, a pixel enable signal OE, a clock CLK.With reference to figure 5, be the waveform synoptic diagram of the adaptive sequential control order S2 of first embodiment of the invention.
Cooperate Fig. 5, with reference to figure 4, this time schedule controller 10 is according to the size of this display module 40, before the horizontal line data Line 0 of image data LDD, the horizontal virtual data pre_data of one prime is set, and behind horizontal line data Line 0, the horizontal virtual data back_data of a back level is set.And the pixel enable signal OE among the adaptive sequential control order S2 occurs between each pulse of horizontal-drive signal HSYNC, in order to activation horizontal line data Line 0, the horizontal virtual data pre-data of prime and the horizontal virtual data back-data of back level.
Cooperate Fig. 5 again, with reference to figure 4, sequential converter 50 moves with the line driver in the control display module 40 406 by the vertical synchronizing signal VSYNC among the adaptive sequential control order S2, and the horizontal-drive signal HSYNC that passes through among the adaptive sequential control order S2 moves with the row driver in the control display module 40 404, and then image data LDD sent into display module 40, and show that output picture 402 is on the display panel 400 of display module 40.Simultaneously, sequential converter 50 is by the pixel enable signal OE among the adaptive sequential control order S2, so that image data LDD is sent into display module 40, and shows that output picture 402 is in display panel 400 position placed in the middle.
In the first embodiment of the present invention, be to use the time schedule controller 10 collocation sequential converters 50 of the image data LDD that is output as 800 * 600 pixels, send into 856 * 600 size display panels 300 with image data LDD with 800 * 600 pixels.Wherein, 856 * 600 size display panels 300 have wide horizontal length, and the image data LDD of itself and 800 * 600 pixels has differed 56 pixel level distances.Therefore, time schedule controller 10 can be according to these 56 pixel level distances, before each horizontal line data Line 0 of image data LDD, the horizontal virtual data pre-data of prime of 28 pixel level distances is set, and behind horizontal line data Line 0, the horizontal virtual data back-data of back level of 28 pixel level distances is set also.
Simultaneously, time schedule controller 10 outputs one notification signal S3 give sequential converter 50, in order to the activation time of notice sequential converter 50 adjustment pixel enable signal OE, to finish the activation of horizontal line data Line 0, the horizontal virtual data pre-data of prime and the horizontal virtual data back-data of back level.So, the pairing output picture 402 of the image data LDD of 800 * 600 pixels will be presented at the middle position of 856 * 600 size display panels 300, and, also will show horizontal virtual data of prime and the pairing image frame 403 of the back horizontal virtual data of level in the horizontal both sides of output picture 402 (left and right each 28 pixel level distance).
Therefore, when the present invention can provide the time schedule controller 10 of same type to use on the display panel 400 of different specification size, still can allow output picture 402 be presented on display panel 400 position placed in the middle, and then reach the shortcoming of improving known frame out 402 skews.
Please refer to Fig. 7, be the image regulating system synoptic diagram of second embodiment of the invention.Element in second embodiment of the invention is identical with first embodiment, indicates with same-sign.Second embodiment is identical with the effect of reaching with the circuit operation principle of first embodiment, it is that image data LDD is delivered to line driver 406 in the display module 60 that its main difference is in: the time schedule controller 10 among second embodiment, and display module 60 has one 600 * 856 size display panels 600.
With reference to figure 8, be the waveform synoptic diagram of the adaptive sequential control order S2 ' of second embodiment of the invention.Cooperate Fig. 7, this time schedule controller 10 is according to the size of this display module 60, perpendicular line data Line 0 ' in image data LDD is preceding, one prime vertical virtual data pre_data ' is set, and behind perpendicular line data Line 0 ', a back grade vertical virtual data b ack_data ' is set.And the pixel enable signal OE among the adaptive sequential control order S2 ' occurs between each pulse of vertical synchronizing signal VSYNC, in order to activation perpendicular line data Line 0 ', prime vertical virtual data pre-data ' and back level vertical virtual data b ack-data '.
Cooperate Fig. 8 again, with reference to figure 7, sequential converter 50 moves with the line driver in the control display module 60 406 by the vertical synchronizing signal VSYNC among the adaptive sequential control order S2 ', and the horizontal-drive signal HSYNC that passes through among the adaptive sequential control order S2 ' moves with the row driver in the control display module 60 404, and then image data LDD sent into display module 60, and show that output picture 602 is on the display panel 600 of display module 60.Simultaneously, sequential converter 50 is by the pixel enable signal OE among the adaptive sequential control order S2 ', so that image data LDD is sent into display module 60, and shows that output picture 602 is in display panel 600 position placed in the middle.
In the second embodiment of the present invention, use the time schedule controller 10 collocation sequential converters 50 of the image data LDD ' that is output as 600 * 800 pixels, send into 600 * 856 size display panels 600 with image data LDD ' with 600 * 800 pixels.Wherein, 600 * 856 size display panels 600 have wide vertical length, and the image data LDD ' of itself and 600 * 800 pixels has differed 56 pixel vertical ranges.Therefore, time schedule controller 10 can be according to these 56 pixel vertical ranges, each perpendicular line data Line 0 ' in image data LDD ' is preceding, the prime vertical virtual data pre-data ' of 28 pixel vertical ranges is set, and behind perpendicular line data Line 0 ', the back level vertical virtual data b ack-data ' of 28 pixel vertical ranges is set also.
Simultaneously, time schedule controller 10 outputs one notification signal S3 give sequential converter 50, in order to the activation time of notice sequential converter 50 adjustment pixel enable signal OE, to finish the activation of perpendicular line data Line 0 ', prime vertical virtual data pre-data ' and back level vertical virtual data b ack-data '.So, the pairing output picture 602 of the image data LDD ' of 600 * 800 pixels will be presented at the middle position of 600 * 856 size display panels 600, and, also will show prime vertical virtual data and the pairing image frame 603 of back level vertical virtual data in the vertical both sides of output picture 602 (left and right each 28 pixel vertical range).
Therefore, when the present invention can provide the time schedule controller 10 of same type to use on the display panel 600 of different specification size, still can allow output picture 602 be presented on display panel 600 position placed in the middle, and then reach the shortcoming of improving known picture 602 skews.
Please refer to Fig. 6, be the picture adjusting method schematic flow sheet of first embodiment of the invention.Cooperate Fig. 4 and Fig. 5, the picture adjusting method of first embodiment of the invention is used in the aforementioned image regulating system, its step includes, at first, provide vertical synchronizing signal VSYNC and horizontal-drive signal HSYNC to control line driver 406 and row driver 404 respectively, to drive the pairing output picture 402 of display panel 400 image data displaying LDD, as S100.Then,, the horizontal virtual data pre_data of a prime is set before the horizontal line data Line 0 of image data LDD, and the horizontal virtual data back_data of a back level is set behind horizontal line data Line 0, as S102 according to the size of display panel 400.
At last, between each pulse of horizontal-drive signal HSYNC, provide a pixel enable signal OE with activation horizontal line data Line 0, the horizontal virtual data pre_data of prime and the horizontal virtual data back_data of back level, as S104, in display panel 400 position placed in the middle, wherein the size of the activation cycle of pixel enable signal OE and display panel 400 is in direct ratio in order to control display panel 400 image data displaying LDD pairing output picture 402.In step S104, horizontal virtual data pre_data of prime and the back pairing output picture 403 of the horizontal virtual data back_data of level also will be presented at the horizontal both sides of output picture 402.
Please refer to Fig. 9, be the picture adjusting method schematic flow sheet of second embodiment of the invention.Cooperate Fig. 7 and Fig. 8, the picture adjusting method of second embodiment of the invention is used in the aforementioned image regulating system, its step includes, at first, provide vertical synchronizing signal VSYNC and horizontal-drive signal HSYNC to control line driver 406 and row driver 404 respectively, to drive the pairing output picture 602 of display panel 600 image data displaying LDD ', as S200.Then, size according to display panel 600, one prime vertical virtual data pre_data ' is set before the perpendicular line data Line 0 ' of image data LDD ', and a back grade vertical virtual data b ack_data ' is set behind perpendicular line data Line 0 ', as S202.
At last, between each pulse of vertical synchronizing signal VSYNC, provide a pixel enable signal OE (S104) with activation perpendicular line data Line 0 ', prime vertical virtual data pre_data ' and back level vertical virtual data b ack_data ', in display panel 600 position placed in the middle, wherein the size of the activation cycle of pixel enable signal OE and display panel 600 is in direct ratio in order to control display panel 600 image data displaying LDD ' pairing output picture 602.In step S204, prime vertical virtual data pre_data ' and the back pairing output picture 603 of level vertical virtual data b ack_data ' also will be presented at the vertical both sides of output picture 602.
In sum, the present invention is by the activation cycle length of the data actuating signal adjusting time schedule controller and export, and prime virtual data and back level virtual data are set in each the horizontal line data of image data or the front and back of each perpendicular line data, to adjust the display panel position placed in the middle that image frame is presented at different size.Therefore, when the present invention can provide the time schedule controller of same type to use on the display panel of different specification size, still can allow the output picture be presented on the display panel position placed in the middle, and then reach the shortcoming of improving known output picture skew.
So the above; only for the preferred specific embodiment of the present invention, but feature of the present invention is not limited thereto, and anyly is familiar with the technician of this technology in the field of the invention; variation of being done or modification all can be encompassed in the scope of following claim of the present invention institute desire protection.
Claims (10)
1. an image regulating system is characterized in that, comprising:
One display module;
Time schedule controller, be connected in this display module, this time schedule controller is exported an image data to this display module, and exports a sequential control command, and wherein this sequential control order includes a vertical synchronizing signal, a horizontal-drive signal and a pixel enable signal; Wherein this time schedule controller before horizontal line data of this image data, is provided with the horizontal virtual data of a prime according to the size of this display module, and after these horizontal line data, the horizontal virtual data of a back level is set; And
One sequential converter, be connected between this time schedule controller and this display module, this sequential converter receives this sequential control order, and adjust the activation cycle of this pixel enable signal in this sequential control order, to export an adaptive sequential control order, show that in order to control this display module the pairing output picture of this image data is in this display module position placed in the middle to this display module.
2. image regulating system as claimed in claim 1, it is characterized in that, this pixel enable signal in this adaptive sequential control order occurs between each pulse of this horizontal-drive signal, in order to these horizontal line data of activation, the horizontal virtual data of this prime and the horizontal virtual data of this back level.
3. an image regulating system is characterized in that, comprising:
One display module;
Time schedule controller, be connected in this display module, this time schedule controller is exported an image data to this display module, and exports a sequential control command, and wherein this sequential control order includes a vertical synchronizing signal, a horizontal-drive signal and a pixel enable signal; This time schedule controller before perpendicular line data of this image data, is provided with prime vertical virtual data according to the size of this display module, and after these perpendicular line data, back grade vertical virtual data is set; And
One sequential converter, be connected between this time schedule controller and this display module, this sequential converter receives this sequential control order, and adjust the activation cycle of this pixel enable signal in this sequential control order, to export an adaptive sequential control order, show that in order to control this display module the pairing output picture of this image data is in this display module position placed in the middle to this display module.
4. image regulating system as claimed in claim 3, it is characterized in that, this pixel enable signal in this adaptive sequential control order occurs between each pulse of this vertical synchronizing signal, in order to these perpendicular line data of activation, these prime vertical virtual data and this back level vertical virtual data.
5. a picture adjusting method is characterized in that, comprising:
One vertical synchronizing signal and a horizontal-drive signal are provided, show an image data in order to control a display module;
According to the size of this display module, before horizontal line data of this image data, the horizontal virtual data of a prime is set, and the horizontal virtual data of a back level is set after these horizontal line data; And
Provide a pixel enable signal between each pulse of this horizontal-drive signal, with these horizontal line data of activation, the horizontal virtual data of this prime and the horizontal virtual data of this back level, this pixel enable signal shows that in order to control this display module the pairing output picture of this image data is in this display module position placed in the middle according to the size of this display module.
6. picture adjusting method as claimed in claim 5 is characterized in that, in the step that provides this pixel enable signal between each pulse of this horizontal-drive signal, the activation cycle of this pixel enable signal and the size of this display module are in direct ratio.
7. picture adjusting method as claimed in claim 5, it is characterized in that, in the step that provides this pixel enable signal between each pulse of this horizontal-drive signal, horizontal virtual data of this prime and the pairing output picture of this back horizontal virtual data of level are the horizontal both sides that are presented at the pairing output picture of this image data.
8. a picture adjusting method is characterized in that, comprising:
One vertical synchronizing signal and a horizontal-drive signal are provided, show an image data in order to control a display module;
According to the size of this display module, before perpendicular line data of this image data, prime vertical virtual data are set, and back grade vertical virtual data are set after these perpendicular line data; And
Provide a pixel enable signal between each pulse of this vertical synchronizing signal, with these perpendicular line data of activation, these prime vertical virtual data and this back level vertical virtual data, this pixel enable signal shows that in order to control this display module the pairing output picture of this image data is in this display module position placed in the middle according to the size of this display module.
9. picture adjusting method as claimed in claim 8 is characterized in that, in the step that provides this pixel enable signal between each pulse of this vertical synchronizing signal, the activation cycle of this pixel enable signal and the size of this display module are in direct ratio.
10. picture adjusting method as claimed in claim 8, it is characterized in that, in the step that provides this pixel enable signal between each pulse of this vertical synchronizing signal, these prime vertical virtual data and this be the pairing output picture of level vertical virtual data afterwards, is presented at the vertical both sides of the pairing output picture of this image data.
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| CN2008100834690A CN101527126B (en) | 2008-03-07 | 2008-03-07 | Image regulating system and regulating method |
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| TWI520568B (en) * | 2010-05-25 | 2016-02-01 | 晨星半導體股份有限公司 | A control device and method for 3d display |
| CN102789778B (en) * | 2011-05-18 | 2015-08-19 | 瑞昱半导体股份有限公司 | Image processor and image treatment method |
| CN109754738A (en) * | 2017-11-02 | 2019-05-14 | 瑞鼎科技股份有限公司 | Display panel fine position method |
| CN110456907A (en) * | 2019-07-24 | 2019-11-15 | 广东虚拟现实科技有限公司 | Control method, device, terminal device and the storage medium of virtual screen |
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| US20040196242A1 (en) * | 2003-03-06 | 2004-10-07 | Lg.Philips Lcd Co., Ltd. | Active matrix-type display device and method of driving the same |
| CN1707595A (en) * | 2004-06-04 | 2005-12-14 | 联咏科技股份有限公司 | Source electrode driver, source electrode array, driving circuit and display with the same array |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040196242A1 (en) * | 2003-03-06 | 2004-10-07 | Lg.Philips Lcd Co., Ltd. | Active matrix-type display device and method of driving the same |
| CN1707595A (en) * | 2004-06-04 | 2005-12-14 | 联咏科技股份有限公司 | Source electrode driver, source electrode array, driving circuit and display with the same array |
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