CN101526748B - Memory device, method and aligning control system for photoetching aligning data detection - Google Patents
Memory device, method and aligning control system for photoetching aligning data detection Download PDFInfo
- Publication number
- CN101526748B CN101526748B CN2009100452084A CN200910045208A CN101526748B CN 101526748 B CN101526748 B CN 101526748B CN 2009100452084 A CN2009100452084 A CN 2009100452084A CN 200910045208 A CN200910045208 A CN 200910045208A CN 101526748 B CN101526748 B CN 101526748B
- Authority
- CN
- China
- Prior art keywords
- data
- read
- buffer queue
- annular buffer
- card
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The invention discloses a memory device, a method and an aligning control system for the photoetching aligning data detection. The device comprises a modulus sampling module, an annular buffer alignment, a data output register, a state register, a write pointer, a read pointer and a read-write pointer distance register. The memory device, the method and the aligning control system can avoid reading invalid light-intensity data, judge the overflowing state of data and prevent error aligning result from being used for overlay.
Description
Technical field
The present invention relates to the optical devices technologies field, particularly about a kind of memory storage, the method for lithography alignment data detection and track control system that comprises this memory storage of being used for.
Background technology
Alignment precision is one of litho machine key index.In order to realize higher alignment precision, litho machine needs special alignment system.Fig. 1 is the structural representation of the alignment system of litho machine.This alignment system can be realized coaxial alignment and off-axis alignment.Coaxial alignment provides light source by illumination subsystems 1, light IL is projected on the mask 2 that invests mask platform 3 along optical axis AX, expose on the benchmark version 8 that is fixed on the wafer station 7 through projection optics 4, and light intensity signal is sent to registration signal processing subsystem 11 through benchmark version 8 built-in photodetectors; Simultaneously, primary importance measurement subsystem 12 is sent to registration signal processing subsystem 11 by first catoptron 13 that is fixed on the mask platform 3 with positional information, and the position that registration signal processing subsystem 11 is set up between mask and the wafer station by specific algorithm concerns.Off-axis alignment provides light source by off-axis alignment optical subsystem 5, is projected on the alignment mark WM or benchmark version 8 of wafer 6, be back to off-axis alignment optical subsystem 5 via certain light path, and light intensity signal is sent in the signal processing subsystem 11 the most at last; Simultaneously, second place measurement subsystem 10 is sent to registration signal processing subsystem 11 by second catoptron 9 that is fixed on the wafer station 7 with positional information, and the position that registration signal processing subsystem 11 is set up between wafer station and the wafer by specific algorithm concerns.By coaxial alignment and off-axis alignment, finally set up the position relation of mask and wafer, realize both alignings.
Wherein, the light intensity data acquisition module of registration signal processing subsystem 11 separates with signal processing module.Obviously, need certain approach with the data transmission of signal acquisition module to signal processing module.Chinese patent CN20061024784.7 has announced a kind of light-intensity data bus (IDB) control system, this IDB bus control system is made up of three parts, be respectively: the light intensity bus controller, the data processing module of band light-intensity data bus interface, the data acquisition module of band light-intensity data bus interface.The idiographic flow of this IDB bus control system work is: data processing module sends data transmission request and wait to bus controller; After bus controller is waited for the data ready of data acquisition module, the address of the data output register of data acquisition module is broadcast on the bus; Data processing module obtains light intensity data according to the address of bus broadcast from data output register, and after data were obtained and finished, the notice bus controller was cancelled this application.
In above-mentioned patent, because the sampled data of data acquisition module can't spread out of immediately, therefore, need be in a slice buffer memory with the deposit data of gathering.Because the limited storage space and the read-write sequence of described buffer memory are uncertain, might occur two kinds and not expect the phenomenon that takes place: one, data are overflowed (data of not read away are capped); Two, read the zone that a slice is not stored valid data, at this moment, data processing module application light intensity data with obtaining the light intensity data of an or numerical fault inconsistent with the position data sequential, causes the alignment result mistake thus.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of memory storage that is used for the lithography alignment data detection, built-in annular buffer queue is read and write under the asynchronous situation at data acquisition module and data processing module, can avoid invalid light intensity data to read; Simultaneously, provide a kind of judgment mechanism, and then avoid wrong alignment result to be used to alignment the data overflow status.
Technical scheme of the present invention is as follows: a kind of memory storage that is used for the lithography alignment data detection comprises at least: a modulus sampling module is used to gather light intensity data; An annular buffer queue is used for the buffer memory light intensity data; A data output register is used for writing down the light intensity data of annular buffer queue; A write pointer is used for the data of modulus sampling module collection are write annular buffer queue; A status register is used for writing down the overflow status that the modulus sampling module writes light intensity data by write pointer the data of annular buffer queue; A read pointer is used for data read with annular buffer queue to data output register; A read-write pointer distance register is used for the poor of record read-write number of times; Wherein, the modulus sampling module writes annular buffer queue by write pointer with light intensity data; Read pointer reads in data output register with the light intensity data of annular buffer queue; Read-write pointer distance register writes down read-write number of times poor of annular buffer queue, and according to difference status register is carried out set.
Further, described memory storage also comprises the light-intensity data bus interface, is used for data output register and mode register data input light-intensity data bus.
Another purpose of invention is to provide a kind of storage means that is used for the lithography alignment data detection, by the operation to annular buffer queue, can avoid invalid light intensity data to read; Simultaneously,, can judge, effectively avoid the application of the alignment result of mistake the data overflow status by operation to read-write pointer distance register and status register.
Technical scheme of the present invention is as follows: a kind of storage means that is used for the lithography alignment data detection may further comprise the steps:
A), the initialization of modulus sampling module, read pointer and write pointer all point to annular buffer queue first address, the zero clearing of read-write pointer distance register, data output register and status register reset;
B), at write pointer before annular buffer queue write data, check read-write pointer distance register, if counting more than or equal to the unit numerical value of annular buffer queue, then decision data is overflowed, status register set;
C), write pointer writes data to annular buffer queue, shifts to next address, if this address exceeds the address space range of annular buffer queue, then write pointer points to annular buffer queue first address again, read-write pointer distance register adds 1;
D), at read pointer before the annular buffer queue reading of data, check read-write pointer distance register, if counting is zero, reading of data not then, up to read-write pointer distance register greater than zero;
E), read pointer is from annular buffer queue reading of data, shifts to next address, if this address exceeds the address space range of annular buffer queue, then write pointer points to annular buffer queue first address again, read-write pointer distance register subtracts 1.
A purpose again of invention is to provide a kind of track control system that is used for the memory storage of lithography alignment data detection of the present invention that comprises, is used for the diagnosis of litho machine Alignment Process to light intensity data.
Technical scheme of the present invention is as follows: a kind of track control system, comprise the communication bus control card at least, and be used for the initialization of communication bus control, all the other integrated circuit boards and parameter setting, task scheduling; Data processing card is used for assembling position data and light intensity data, and described two kinds of data are fitted processing; Data collecting card, be used for light intensity data sampling, analog to digital conversion, store and read, described data collecting card comprises the memory storage that is used for the lithography alignment data detection at least; Bus controller is used for the data transmission of the real-time synchronized sampling of control data capture card, light-intensity data bus, the work of log-on data transaction card; Communication bus is used for the initialization and the task scheduling of described communication bus control card, data processing card, data collecting card and bus controller; Light-intensity data bus is used for light intensity data transferring to described data processing card according to the system synchronization transmission requirement; Described communication bus control card, data processing card, data collecting card and bus controller interconnect by communication bus; Described data processing card, bus controller, data collecting card interconnect by light-intensity data bus.
Further, described communication bus control card, data processing card, data collecting card and bus controller are integrated on the same backboard of a cabinet.
Further, the bus standard of described communication bus is a VME64/CPCI industry control bus protocol.
Further, the core steering logic of described bus controller is FPGA/CPLD.
Further, described data processing card is one of them of digital signal processor, FPGA, Flash ROM, DPRAM, SRAM.
Further, described data collecting card comprises electrooptical device, modulus conversion chip, filtering circuit and FPGA at least.
Whether memory storage and the method that is used for the lithography alignment data detection of the present invention introduced a kind of state judgment mechanism, can detect to exist data to overflow situation, can avoid reading of wrong alignment result.Simultaneously, described memory storage is used the annular buffer queue of a kind of first in first out (FIFO), under the asynchronous situation of data processing module and data acquisition module read-write, can avoid reading of invalid light intensity data.And then avoid wrong alignment result to be used to alignment.
Description of drawings
Fig. 1 is the structural representation of the alignment system of litho machine.
Fig. 2 is the structured flowchart that is used for the memory storage of lithography alignment data detection of the present invention.
Fig. 3 is the structured flowchart of specific embodiments of the invention.
Embodiment
As shown in Figure 2, the square frame part that is used for the memory storage of lithography alignment data detection for figure of the present invention comprises: A/D (modulus) sampling module, the data that are used to gather the off-axis alignment optical subsystem at least; A write pointer is used for the data of A/D sampling module collection are write annular buffer queue; A read pointer is used for data read with annular buffer queue to data output register, and when the IDB bus was sent the light intensity data application, the data with data output register inputed to data processing module (not shown) again; An annular buffer queue is used for the buffer memory light intensity data; A read-write pointer distance register is used for the poor of record read-write number of times, thereby judges annular buffer queue writable status, avoids occurring that data are overflowed or invalid data is misread; A data output register is used for writing down the light intensity data of annular buffer queue; A status register, be used for writing down the overflow status that the modulus sampling module writes light intensity data by write pointer the data of annular buffer queue, when the IDB bus is sent the status data application, mode register data is inputed to data processing module (not shown), data processing module judges whether the situation that data are overflowed according to mode register data, thereby the light intensity data of judging reading of data output register whether is as alignment result.Wherein, the A/D sampling module writes annular buffer queue by write pointer with light intensity data; Read pointer reads in data output register with the light intensity data of annular buffer queue; Read-write pointer distance register writes down read-write number of times poor of annular buffer queue, and according to difference status register is carried out set.Certainly, the memory storage that is used for the lithography alignment data detection of the present invention also can comprise the IDB bus interface, is used for data output register and mode register data input light-intensity data bus.
IDB (light-intensity data bus) bus interface can be integrated in the device of the present invention, also can not be integrated in the described device, and the present invention does not limit this.
The workflow of the memory storage that is used for the lithography alignment data detection of the present invention is as follows:
Step 1, the initialization of A/D sampling module, read pointer and write pointer all point to the formation first address, the zero clearing of read-write pointer distance register, data output register and status register reset;
Step 2, at write pointer before annular buffer queue write data, check read-write pointer distance register, if counting more than or equal to the unit numerical value of annular buffer queue, then decision data is overflowed, status register set;
Step 3, write pointer write data to annular buffer queue, shift to next address, if this address exceeds the address space range of annular buffer queue, then write pointer points to annular buffer queue first address again, and read-write pointer distance register adds 1;
Step 4, at read pointer before the annular buffer queue reading of data, check read-write pointer distance register, if counting is zero, reading of data not then, up to read-write pointer distance register greater than zero;
Step 5, read pointer are shifted to next address from annular buffer queue reading of data, if this address exceeds the address space range of annular buffer queue, then read pointer points to annular buffer queue first address again, and read-write pointer distance register subtracts 1.
For understanding the present invention better, to realize that the track control system of in the litho machine Alignment Process light intensity data being diagnosed is a specific embodiment, the present invention is described in detail.As shown in Figure 3, comprise two class bus types in the track control system, one class is that real-time requires lower communication bus, be mainly used in the initialization of the integrated circuit board of working in the system and task scheduling etc. are gone up layer operation, this communication bus can adopt general bus standard, for example industry control bus protocol commonly used such as VME64/CPCI; Another kind of is that real-time requires harsh light-intensity data bus, is mainly used in a large amount of light intensity datas according to the system synchronization transmission requirement, transfers to the data processing card in the system on schedule, and then fits algorithm process with position data.Described system comprises four classes control integrated circuit board: the communication bus control card is used for initialization and parameter setting, the task scheduling etc. of communication bus control, all the other integrated circuit boards; Data processing card is used for assembling position data and light intensity data, and above-mentioned two kinds of data are fitted processing; Data collecting card, be used for light intensity data sampling, analog to digital conversion, store and read etc.; Bus controller is used for the data transmission of the real-time synchronized sampling of control data capture card, light-intensity data bus, the work of log-on data transaction card etc.The memory storage that is used for the lithography alignment data detection of the present invention then is integrated in the data collecting card of described system.
In this specific embodiment, above-mentioned integrated circuit board all is integrated on the same backboard of a cabinet.Four class integrated circuit boards all interconnect by communication bus; And data processing card, bus controller, data collecting card are by the light-intensity data bus interconnection, with real-time Transmission and the processing of finishing light intensity data.The core steering logic of bus controller can adopt FPGA/CPLD to realize; Data processing card can adopt one of them realization of digital signal processor (DSP), FPGA, Flash ROM, DPRAM, SRAM etc.; Data collecting card can adopt electrooptical device, modulus conversion chip, filtering circuit and FPGA to realize simultaneously.
The concrete job step of this specific embodiment is as follows:
The first step, communication bus control card carry out initialization and parameter setting to system;
Second step, when data processing card proposes the instruction application, bus controller utilizes two bus cycles to read the data type register and the instruction type register of this data processing card, determines data type and instruction type that it is required;
The 3rd the step, when instruction type be when obtaining the status data of data collecting card, of the present invention in the bus controller diagnostic data data collecting card is used for the address of the included status register of the memory storage of lithography alignment data detection, and on light-intensity data bus broadcasting its address, read required status data, deposit the DPRAM (two-port RAM) of data processing card successively in;
The 4th step, finish the once command application after, data collecting card, bus controller and data processing card portion reset, to carry out next time the preparation of instruction application;
The 5th step, data processing card judge the status data of the data collecting card that obtains, confirms the correctness of the light intensity data that obtained;
The 6th step, if data processing card judges that the light intensity data obtained is wrong, then refuse this light intensity data, also be alignment result.
That more than introduces only is based on preferred embodiment of the present invention, can not limit scope of the present invention with this.Any device of the present invention is done replacement, the combination, discrete of parts well know in the art, and the invention process step is done well know in the art being equal to change or replace and all do not exceed exposure of the present invention and protection domain.
Claims (9)
1. a memory storage that is used for the lithography alignment data detection is characterized in that, comprises at least:
A modulus sampling module is used to gather light intensity data;
An annular buffer queue is used for the buffer memory light intensity data;
A data output register is used for writing down the light intensity data of annular buffer queue;
A write pointer is used for the data of modulus sampling module collection are write annular buffer queue;
A status register is used for writing down the overflow status that the modulus sampling module writes light intensity data by write pointer the data of annular buffer queue;
A read pointer is used for data read with annular buffer queue to data output register;
A read-write pointer distance register is used for the poor of record read-write number of times;
Wherein, the modulus sampling module writes annular buffer queue by write pointer with light intensity data;
Read pointer reads in data output register with the light intensity data of annular buffer queue;
Read-write pointer distance register writes down read-write number of times poor of annular buffer queue, and according to difference status register is carried out set.
2. the memory storage that is used for the lithography alignment data detection as claimed in claim 1 is characterized in that described memory storage also comprises the light-intensity data bus interface, is used for data output register and mode register data input light-intensity data bus.
3. a storage means that is used for the lithography alignment data detection is characterized in that, may further comprise the steps:
Annular buffer queue first address is all pointed in the initialization of modulus sampling module, read pointer and write pointer, the zero clearing of read-write pointer distance register, and data output register and status register reset;
Before annular buffer queue write data, check read-write pointer distance register at write pointer, if count the unit numerical value more than or equal to annular buffer queue, then decision data is overflowed, status register set;
Write pointer writes data to annular buffer queue, shifts to next address, if this address exceeds the address space range of annular buffer queue, then write pointer points to annular buffer queue first address again, and read-write pointer distance register adds 1;
Before the annular buffer queue reading of data, check read-write pointer distance register at read pointer, if counting is zero, reading of data not then, up to read-write pointer distance register greater than zero;
Read pointer is shifted to next address from annular buffer queue reading of data, if this address exceeds the address space range of annular buffer queue, then read pointer points to annular buffer queue first address again, and read-write pointer distance register subtracts 1.
4. one kind comprises the track control system that is used for the memory storage of lithography alignment data detection as claimed in claim 1 or 2, it is characterized in that, comprises at least:
The communication bus control card is used for the initialization of communication bus control, all the other integrated circuit boards and parameter setting, task scheduling;
Data processing card is used for assembling position data and light intensity data, and described two kinds of data are fitted processing;
Data collecting card, be used for light intensity data sampling, analog to digital conversion, store and read, described data collecting card comprises the memory storage that is used for the lithography alignment data detection at least;
Bus controller is used for the data transmission of the real-time synchronized sampling of control data capture card, light-intensity data bus, the work of log-on data transaction card;
Communication bus is used for the initialization and the task scheduling of described communication bus control card, data processing card, data collecting card and bus controller;
Light-intensity data bus is used for light intensity data transferring to described data processing card according to the system synchronization transmission requirement;
Described communication bus control card, data processing card, data collecting card and bus controller interconnect by communication bus;
Described data processing card, bus controller, data collecting card interconnect by light-intensity data bus.
5. track control system as claimed in claim 4 is characterized in that, described communication bus control card, data processing card, data collecting card and bus controller are integrated on the same backboard of a cabinet.
6. track control system as claimed in claim 4 is characterized in that, the bus standard of described communication bus is a VME64/CPCI industry control bus protocol.
7. track control system as claimed in claim 4 is characterized in that, the core steering logic of described bus controller is FPGA/CPLD.
8. track control system as claimed in claim 4 is characterized in that, described data processing card is one of them of digital signal processor, FPGA, Flash ROM, DPRAM, SRAM.
9. track control system as claimed in claim 4 is characterized in that described data collecting card comprises electrooptical device, modulus conversion chip, filtering circuit and FPGA at least.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100452084A CN101526748B (en) | 2009-01-13 | 2009-01-13 | Memory device, method and aligning control system for photoetching aligning data detection |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100452084A CN101526748B (en) | 2009-01-13 | 2009-01-13 | Memory device, method and aligning control system for photoetching aligning data detection |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101526748A CN101526748A (en) | 2009-09-09 |
| CN101526748B true CN101526748B (en) | 2010-12-08 |
Family
ID=41094662
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009100452084A Active CN101526748B (en) | 2009-01-13 | 2009-01-13 | Memory device, method and aligning control system for photoetching aligning data detection |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101526748B (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101800867B (en) * | 2010-01-19 | 2011-09-28 | 深圳市同洲电子股份有限公司 | Method, device and digital-television receiving terminal for realizing ring buffer |
| CN102354327B (en) * | 2011-05-31 | 2014-12-10 | 合肥芯硕半导体有限公司 | Data processing method for scanning maskless photoetching machine |
| CN102591815B (en) * | 2011-12-27 | 2015-07-29 | Tcl集团股份有限公司 | A kind of method of loop data buffer read-write batch data and device |
| CN102629081A (en) * | 2012-04-13 | 2012-08-08 | 中国科学院光电技术研究所 | FPGA-based control system for workpiece stage of DMD digital maskless photoetching machine |
| CN104181901B (en) * | 2014-09-04 | 2016-07-06 | 哈尔滨工业大学 | Multilevel control system is managed concentratedly based on VxWorks host computer |
| CN107193768B (en) * | 2016-03-15 | 2021-06-29 | 厦门旌存半导体技术有限公司 | Method and device for inquiring queue state |
| CN107368374B (en) * | 2017-07-26 | 2019-08-06 | 广州路派电子科技有限公司 | Implementation method is buffered based on the annular data under synchronization mechanism for embedded system |
| CN110120922B (en) * | 2019-05-14 | 2022-09-20 | 中核控制系统工程有限公司 | FPGA-based data interaction network management system and method |
| CN112235204B (en) * | 2020-10-13 | 2023-04-07 | 中移（杭州）信息技术有限公司 | Data reporting method, system, electronic equipment and storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5272980A (en) * | 1990-08-31 | 1993-12-28 | Dai Nippon Printing Co. Ltd. | Alignment method for transfer and alignment device |
| CN1808277A (en) * | 2006-03-28 | 2006-07-26 | 上海微电子装备有限公司 | Control method for coaxial alignment signal acquisition and processing, and key subsystem thereof |
| CN1818796A (en) * | 2006-03-16 | 2006-08-16 | 上海微电子装备有限公司 | Light-intensity data bus system and bus controller |
-
2009
- 2009-01-13 CN CN2009100452084A patent/CN101526748B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5272980A (en) * | 1990-08-31 | 1993-12-28 | Dai Nippon Printing Co. Ltd. | Alignment method for transfer and alignment device |
| CN1818796A (en) * | 2006-03-16 | 2006-08-16 | 上海微电子装备有限公司 | Light-intensity data bus system and bus controller |
| CN1808277A (en) * | 2006-03-28 | 2006-07-26 | 上海微电子装备有限公司 | Control method for coaxial alignment signal acquisition and processing, and key subsystem thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101526748A (en) | 2009-09-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101526748B (en) | Memory device, method and aligning control system for photoetching aligning data detection | |
| CN102279830B (en) | Multifunctional data acquisition module based on compact peripheral component interconnect (CPCI) bus | |
| CN105224454B (en) | A kind of adjustment method, polycaryon processor and commissioning device | |
| CN102035673B (en) | Fiber channel-based general automatic test system | |
| CN101625657B (en) | Monitoring apparatus for data processing and generalizing monitoring data | |
| CN101788945B (en) | Diagnostic test system and method for electronic system with multiple circuit boards or multiple modules | |
| US9639447B2 (en) | Trace data export to remote memory using remotely generated reads | |
| JP4408126B2 (en) | Monitoring device, semiconductor integrated circuit, and monitoring method | |
| US20100332927A1 (en) | Generic debug external connection (gdxc) for high integration integrated circuits | |
| CN103235202B (en) | A kind of multichannel analog signals acquisition system with automatic compensation function | |
| US6658519B1 (en) | Bus bridge with embedded input/output (I/O) and transaction tracing capabilities | |
| CN100388215C (en) | Debug supporting unit using multi-asynchronous timepiece on chip hardware | |
| CN111124789B (en) | Chip simulation debugging system and debugging method | |
| KR100954568B1 (en) | Diagnostic data capture within an integrated circuit | |
| CN101458304A (en) | Embedded boundary scanning technique verification platform | |
| US6484273B1 (en) | Integrated EJTAG external bus interface | |
| CN101694579B (en) | Soe intelligent module | |
| CN1818796B (en) | Light-intensity data bus system and bus controller | |
| CN111579974A (en) | Tested module, embedded system and test method for realizing boundary scan test | |
| CN109712696B (en) | Data processing method, device, equipment and storage medium | |
| CN111692982A (en) | ZYNQ processing system and method for near-field photoetching machine gap detection | |
| CN1818797B (en) | Light-intensity data bus system and method | |
| CN103235203B (en) | There is the acquisition method of the multichannel analog signals acquisition system of automatic compensation function | |
| CN101980179B (en) | Method for reading and writing on-line serial data of on-chip system | |
| CN1553337A (en) | Detecting method for PCI system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: No. 1525 Zhangjiang Road, Zhangjiang, Shanghai, Shanghai Patentee after: Shanghai microelectronics equipment (Group) Limited by Share Ltd Address before: No. 1525 Zhangjiang Road, Zhangjiang, Shanghai, Shanghai Patentee before: Shanghai Micro Electronics Equipment Co., Ltd. |