CN101504949B - Resistor converting memory and manufacturing method thereof - Google Patents
Resistor converting memory and manufacturing method thereof Download PDFInfo
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- CN101504949B CN101504949B CN 200810202824 CN200810202824A CN101504949B CN 101504949 B CN101504949 B CN 101504949B CN 200810202824 CN200810202824 CN 200810202824 CN 200810202824 A CN200810202824 A CN 200810202824A CN 101504949 B CN101504949 B CN 101504949B
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Abstract
The invention discloses a resistance conversion storage device and a method for manufacturing the same. The resistance conversion storage device comprises a substrate, a logic circuit, a word line, a bit line, a plurality of discrete storage units and an isolation unit. The method comprises the following steps that: through diffusion effect, part of atoms of storage materials in the storage unit are diffused to a semiconductor word line of a first conduction type, and the comprehensive effect on the semiconductor word line formed on a contact interface is doping of a second conduction type; and a diode is formed between an area of the second conduction type formed through atom diffusion doping of the storage materials and the semiconductor word line of the first conduction type, and the diode serves as a gating unit to gate the upside storage units. The storage materials adopted by the resistance conversion storage device have various functions in the device, not only serve as medium materials for high and low resistance conversion, but also serve as impurity materials, and can perform doping on a semiconductor contacting with the storage materials through the diffusion effect, thus a diode is formed by a simple and convenient method and serves as a gated storage device unit of a logic unit.
Description
Technical field
The invention belongs to technical field of semiconductors, relate to a kind of memory, relate in particular to a kind of electric resistance transition memory; In addition, the invention still further relates to the manufacture method of above-mentioned electric resistance transition memory.
Background technology
Nonvolatile semiconductor memory has occupied consequence in information technology, electric resistance transition memory has more advantage as a kind of newer memory than present flash memory, for example, traditional flash memory technology is faced with stern challenge later at the 32nm technology node, electric resistance transition memory is not influenced by this then, it has potential competitive advantage in size aspect dwindling, and will play an important role in the high-density storage in future.
Lifting along with nonvolatile semiconductor memory density, diode is because its less size replaces the technology that MOSFET becomes main flow gradually, in present technology, often adopt ion to inject or high temperature epitaxy method acquisition diode, but these method costs are higher, in future highdensity electric resistance transition memory, the manufacturing cost of diode will determine the cost of various electric resistance transition memories to a great extent, thus in market competition for consequence.
By our research, find that phase-change material as a kind of based semiconductor material, can be diffused in the semiconductor, form semi-conductive doping, thereby can realize diode effect.On the other hand, according to the patent application (application number: 200810201407.5 of the applicant (Shanghai Inst. of Microsystem and Information Technology, Chinese Academy of Sci) in application on October 20th, 2008, denomination of invention: " stibium containing material is as the application of resistance conversion storage material ", the inventor: people such as Zhang Ting), stibium containing material has the ability of resistance conversion and the potential application in electric resistance transition memory; And the antimony material can spread the silicon of p type as a kind of n type foreign atom commonly used in the semi-conductor industry, thereby realizes the doping of n type.
Summary of the invention
Technical problem to be solved by this invention is: a kind of electric resistance transition memory is provided, and simple in structure by the common diode that forms between the zone that diffuses to form and the semiconductor word line, can effectively reduce manufacturing cost.
The present invention also provides the manufacture method of above-mentioned electric resistance transition memory.
For solving the problems of the technologies described above, the present invention adopts following technical scheme:
A kind of electric resistance transition memory comprises:
Substrate;
Logical circuit;
Word line, it is the semiconductor word line with first conduction type;
Bit line is positioned at the word line top;
Some discrete memory cell are positioned at the word line top; By diffusion effect, the part of atoms of storage medium in the described memory cell is diffused in the semiconductor word line of described first conduction type, the comprehensive effect that forms semiconductor word line at contact interface is the doping of second conduction type; Form diode structure between second conductivity type regions that the storage medium atom diffusion mix to form and the first conductive type semiconductor word line, this diode structure carries out gating as gating unit to the memory cell of top;
Isolated location in order to isolate each word line and each diode structure and memory cell, makes electric isolation between it.
As a preferred embodiment of the present invention, described memory cell is as independently a part of, between word line and bit line.At this moment, described diode structure be discrete, promptly word line top is a plurality of independently diodes; Perhaps, described diode structure is an integral body.
As another kind of preferred version of the present invention, described memory cell is as the part of described bit line; At this moment, described diode structure is discrete, and promptly a word line top is a plurality of independently diodes.
As a preferred embodiment of the present invention, described memory cell also comprises one deck conductive layer at least, and described memory cell is between conductive layer and word line.
As a preferred embodiment of the present invention, under action of electric signals, the resistance of described memory cell can be realized controlled transformation between high resistance and low resistance.
As a preferred embodiment of the present invention, the diffusing, doping of storage medium atom pair first conductive type semiconductor that described diffusion causes is the diffusion of one or more atoms.
As a preferred embodiment of the present invention, the resistivity of described isolated location material is than the resistivity height of storage medium and semiconductor word line.
As a preferred embodiment of the present invention, described word line is the semiconductor line of p type conduction; The part of atoms of storage medium spreads the semiconductor line of this p type conduction, and after DIFFUSION TREATMENT, the p N-type semiconductor N of close near interface becomes n type doped region, and has formed a plurality of discrete diode structures between the semiconductor line of p type conduction.
As a preferred embodiment of the present invention, described memory cell self has the function of phase transformation, and perhaps storage medium is through having the ability of electric resistance changing after the suitable doping.
As a preferred embodiment of the present invention, the material of described memory cell is one or more in stibium containing material, the sulfur series compound phase-change material.Preferably, the material of described memory cell is a stibium containing material, and the content of antimony atoms is greater than 50%.
As a preferred embodiment of the present invention, the resistivity of described isolated location material is than the resistivity height of antimony material.
As a preferred embodiment of the present invention, described diode structure is discrete, and promptly a word line top is a plurality of independently diodes; Perhaps, described diode structure is an integral body.
---a kind of execution mode of the inventive method is: a kind of manufacture method of electric resistance transition memory, it comprises the steps:
One substrate is set;
In described substrate, make the semiconductor word line of first conduction type;
Above the word line of first conduction type, make the storage medium line;
Diffusing, doping by atom forms the zone of second conduction type, second conductivity type regions of formation and first conduction type word line formation diode structure at the first conduction type word line near the near interface of storage medium;
Make bit line, when forming bit line, the storage medium and second type semiconductor after the storage medium atom diffusion of part beyond covering under the bit line are removed, etching depth is up to the first kind semiconductor layer top that is not diffused into, thereby produces a plurality of discrete diodes above the single first conduction type word line;
Form memory cell;
Fill isolated material and planarization.
---the another kind of scheme of the inventive method is: a kind of manufacture method of electric resistance transition memory, it comprises the steps:
One substrate is set;
Make logical circuit;
In substrate, produce the shallow slot array;
In groove, deposition catalysis induced material adopts chemico-mechanical polishing or etching to return carving technology and removes excess stock, keeps the catalysis induced material of bottom;
The vapour deposition first conduction type silicon materials through high-temperature process, owing to the induction of catalysis induced material, have formed the polysilicon word line of first conduction type above the catalysis induced material;
Return carving technology by chemico-mechanical polishing or etching, the first unnecessary conduction type polysilicon that deposition obtains is removed;
The deposition storage material layer, in above-mentioned shallow slot, promptly the storage medium lines are made in the polysilicon top,, the coincidence identical with the polysilicon word line figure of storage medium figure;
Pass through DIFFUSION TREATMENT, be in the polysilicon word line of part of atoms in the storage medium first conduction type that is diffused into lower floor, forming comprehensive effect is the doping of second conduction type, near interface at the close storage medium of silicon word line forms second conductivity type regions, and the polysilicon word line of this zone and first conduction type forms diode structure;
Make bit line, when forming bit line, remove with the storage medium of part outside covering below the bit line and through the polysilicon of storage medium atom diffusion, etching depth is up to the first kind polysilicon layer that is not spread, thereby produces a plurality of discrete diodes above the single first conduction type polysilicon word line;
Form memory cell;
Fill isolated material, planarization is opened each discrete diode-isolated.
As a preferred embodiment of the present invention, described catalysis induced material is in order to help to form polysilicon when making silicon thin film.
---the another kind of scheme of the inventive method is: a kind of manufacture method of electric resistance transition memory, it comprises the steps:
Make logical circuit;
Produce line array in substrate, wire member can be used as hard mask material;
Adopt side wall technology to form the sacrificial layer material side wall;
The deposition hard mask material adopts the chemico-mechanical polishing planarization;
The etching sacrificial layer side wall utilizes hard mask to obtain narrow groove;
Remove unnecessary hard mask, in above-mentioned narrow groove, deposition catalysis induced material adopts chemico-mechanical polishing or etching to return carving technology and removes excess stock, keeps the catalysis induced material of bottom;
The vapour deposition first conduction type silicon materials through high-temperature process, owing to the induction of catalysis induced material, have formed the polysilicon word line of first conduction type above the catalysis induced material;
Return carving technology by chemico-mechanical polishing or etching, the polysilicon of the first unnecessary conduction type that deposition is obtained is removed;
The deposition storage material layer is made the storage medium lines;
Pass through DIFFUSION TREATMENT, part of atoms in the storage medium is diffused in the polysilicon word line of first conduction type, formation is the doping of second conduction type to the polysilicon word line comprehensive effect, become second conductivity type regions, this zone and first conduction type polysilicon word line formation diode structure at the polysilicon word line of first conduction type near the near interface of storage medium;
Make bit line, when forming bit line, remove with the storage medium of part beyond covering under the bit line and through the polysilicon of storage medium atom diffusion, etching depth is up to the polysilicon layer that is not spread, above single word line, form a plurality of discrete diode devices thus, in order to drive and the gating memory cell;
Form memory cell;
Fill isolated material, each discrete diode-isolated is opened.
As a preferred embodiment of the present invention, under specific etching condition, the etch rate of sacrifice layer is higher than with hard mask etching speed under the condition.Described catalysis induced material is in order to help to form polysilicon when making silicon thin film.
Beneficial effect of the present invention is: the various storage mediums that utilize that the present invention proposes carry out diffusing, doping for semiconductor word line, by having formed diode jointly between the zone that diffuses to form and the semiconductor word line, the method structure is simpler, and manufacturing cost has competitiveness.In the method, storage medium also has the ability to the word line doping vario-property except the effect of storage, in certain embodiments, also have the function of conductive bit.
In addition, the storage medium that electric resistance transition memory of the present invention adopted has multiple function in device, both as the media material of high resistance and low resistance conversion, also be impurity material simultaneously, can mix to the semiconductor that is in contact with it by diffusion effect, thereby form diode as logical block gated memory unit with easy method.Range of choice to storage medium in said structure and the technology is wider, as long as can realize the resistance transfer characteristic in device, can realize that the doping of second conduction type gets final product by the semiconductor of diffusion couple first conduction type in addition.
Description of drawings
The structural representation of Figure 1A to Fig. 1 C electric resistance transition memory.
The structural representation of the another kind of electric resistance transition memory of Fig. 2 A to Fig. 2 D.
Fig. 3 A to Fig. 3 H is a kind of manufacture process schematic diagram of resistor conversion memory cell, and the storage medium of employing is Sb
3.6Te.
Fig. 4 A to Fig. 4 J is the manufacture process schematic diagram of another kind of resistor conversion memory cell.
Fig. 5 A to Fig. 5 K is the manufacture process schematic diagram of another kind of resistor conversion memory cell.
Fig. 6 A to Fig. 6 L makes the process schematic diagram of resistor conversion memory cell for adopting " side wall technology " (perhaps claiming " spacer " technology).
Embodiment
Describe the preferred embodiments of the present invention in detail below in conjunction with accompanying drawing.
Embodiment one
The present invention has disclosed a kind of electric resistance transition memory, comprises substrate, logical circuit, word line, bit line, reaches isolated location.Described word line is the semiconductor word line with first conduction type.Bit line is positioned at the word line top, and bit line comprises some discrete memory cell; By diffusion effect, the part of atoms of storage medium in the described memory cell is diffused in the semiconductor word line of described first conduction type, the comprehensive effect that forms semiconductor word line at contact interface is the doping of second conduction type; Through the some discrete diodes of formation between second conductivity type regions that the storage medium atom diffusion mix to form and the first conductive type semiconductor word line, this diode carries out gating as gating unit to the memory cell of top.Isolated location makes electric isolation between it in order to isolate each word line and each diode and memory cell.
Described memory cell self has the function of phase transformation, and perhaps storage medium is through having the ability of electric resistance changing after the suitable doping.The material of described memory cell is one or more in stibium containing material, the sulfur series compound phase-change material.The material of described memory cell is a stibium containing material, and the content of antimony atoms is greater than 50%.Under action of electric signals, the resistance of described storage medium can be realized controlled transformation between high resistance and low resistance.In addition, the diffusing, doping of storage medium atom pair first conductive type semiconductor that causes of diffusion is the diffusion of one or more atoms.
The purpose that isolated location is set is the purpose of isolating each discrete diode of same word line top in order to make electric isolation between each word line, the bit line, also to play simultaneously.The resistivity of described isolated location material is than the resistivity height of storage medium and semiconductor word line.
Described memory cell can also comprise one deck conductive layer at least, and described memory cell is between conductive layer and word line.
In the present embodiment, the structure of electric resistance transition memory sees also Figure 1A to Fig. 1 C.Among Figure 1A, on silicon substrate 1 (being substrate), the word line array 2 that the p type is arranged, what intersect with the word line array is bit line array 3,5 (bit line comprises two-layer, i.e. the Sb metal level 3 of the conduction W layer 5 at top and bottom), Sb metal 3 intersects the contact position with word line array 2, by DIFFUSION TREATMENT, the Sb atom diffusion has arrived in the silicon word line of p type, has formed the intersecting area 4 that the n type mixes, n type zone 4 forms diode structure with p type-word line 2, as the gating unit of electric resistance transition memory.And the transition effects of resistance will take place at the Sb metal 3 and the interface of bit line conductive layer 5, thereby store data.The sign of diode shown in Figure 1A and resistance is that this image is not in necessary being and the device for the structure in the presentation graphs better.Figure 1B is depicted as Figure 1A along the axial sectional view of y, and Fig. 1 C is depicted as the sectional view that Figure 1A obtains along the x axle.
The various storage mediums that utilize that the present invention proposes carry out diffusing, doping for semiconductor word line, and by having formed diode jointly between the zone that diffuses to form and the semiconductor word line, the method structure is simpler, and manufacturing cost has competitiveness.In the method, storage medium also has the ability to the word line doping vario-property except the effect of storage, in certain embodiments, also have the function of conductive bit.Range of choice to storage medium in said structure and the technology is wider, as long as can realize the resistance transfer characteristic in device, can realize that the doping of second conduction type gets final product by the semiconductor of diffusion couple first conduction type in addition.
Embodiment two
In the present embodiment, described memory cell is as independently a part of, between word line and bit line.Please participate in Fig. 2 A-Fig. 2 D, Fig. 2 A is depicted as the three-dimensional structure schematic diagram of another electric resistance transition memory, the silicon word line 2 that the p type is arranged on silicon substrate 1, silicon word line top is coated with GeSbTe line 6, through after the DIFFUSION TREATMENT, in the interface formation diffusion region 8 of GeSbTe line 6 with the silicon word line, the diffusion region is Ge, three kinds of atom doping effects jointly of Sb and Te, the doping resultant effect of formation is the n type, has formed diode structure with p type-word line 2; Metal bit line 7 intersects with the GeSbTe line.Figure 1B is depicted as Figure 1A along the axial perspective view of y, and Fig. 1 C is depicted as the projection of Figure 1A along the axial wherein a kind of structure of x.
And in another kind of structure, along the axial projection of x shown in Fig. 2 D.Fig. 2 D is that with the different of Fig. 2 C the former diode of same p type silicon word line 2 tops is discrete, and promptly a word line top is a plurality of independently diodes.
When described memory cell during as a part independently, diode structure can be discrete, promptly be a plurality of independently diodes above word line; Diode structure also can be an integral body.
By above two embodiment as seen, described memory cell can be used as a part that is independent of bit line, also as the part of described bit line.
Embodiment three
Present embodiment has disclosed a kind of manufacture method of electric resistance transition memory, and a silicon substrate at first is set; On described silicon substrate, make the semiconductor word line of first conduction type; Above the word line of first conduction type, make the storage medium line; Diffusing, doping by atom forms the zone of second conduction type, second conductivity type regions of formation and first conduction type word line formation diode structure at the first conduction type word line near the near interface of storage medium; Make bit line, when forming bit line, the storage medium and second type semiconductor after the storage medium atom diffusion of part beyond covering under the bit line are removed, etching depth is up to the first kind semiconductor layer top that is not diffused into, thereby produces a plurality of discrete diodes above the single first conduction type word line; Form memory cell; Fill isolated material and planarization.
See also Fig. 3 A to Fig. 3 H, present embodiment is specific as follows:
(1) silicon substrate 1 is set;
(2) at first injecting the bit line 11 that forms the p type by photoetching and ion on silicon substrate 10, shown in sectional view Fig. 3 A, is shown in Fig. 3 B along the vertical view shown in the A-A direction among Fig. 3 A;
(3) by photoetching process, be etched to the bit line top above the p type bit line that the back forms and stop injecting through ion, shown in Fig. 3 C, dotted line is depicted as the word line 11 that is embedded under the silicon with the vertical view after the photoresist removal, among the figure along the profile of B-B direction shown in Fig. 3 D.
(4) deposition Sb
3.6Te layer 13 obtains the structure shown in Fig. 3 E, adopts chemical mechanical polishing method that redundance is polished, and obtain the structure as Fig. 3 F, and the vertical view of this moment is shown in Fig. 3 G.
(5) through certain condition DIFFUSION TREATMENT down, make Sb and Te atom diffusion in the silicon word line of p type, and Sb and Te are that the n type mixes to the doping of silicon, so, after diffusion, at close Sb
3.6Te at the interface, through the diffusion after silicon materials be the n type, the zone of the p type of the zone of this n type and below has formed diode structure, can be used in gating and driving to memory cell.
(6) through after the diffusion, the silicon area 14 that the n type Sb that obtains and Te mix, among Fig. 3 G along the section of C-C direction shown in Fig. 3 H.
(7) so just obtain diode array, just can obtain storage array by the preparation of memory cell and the manufacturing of electrode again.
Embodiment four
Present embodiment has disclosed the manufacture method of another kind of electric resistance transition memory, and a substrate at first is set; Then make logical circuit; In substrate, produce the shallow slot array; In groove, deposition catalysis induced material adopts chemico-mechanical polishing or etching to return carving technology and removes excess stock, keeps the catalysis induced material of bottom; The vapour deposition first conduction type silicon materials through high-temperature process, owing to the induction of catalysis induced material, have formed the polysilicon word line of first conduction type above the catalysis induced material; Return carving technology by chemico-mechanical polishing or etching, the first unnecessary conduction type polysilicon that deposition obtains is removed; The deposition storage material layer, in above-mentioned shallow slot, promptly the storage medium lines are made in the polysilicon top,, the coincidence identical with the polysilicon word line figure of storage medium figure; Pass through DIFFUSION TREATMENT, be in the polysilicon word line of part of atoms in the storage medium first conduction type that is diffused into lower floor, forming comprehensive effect is the doping of second conduction type, near interface at the close storage medium of silicon word line forms second conductivity type regions, and the polysilicon word line of this zone and first conduction type forms diode structure; Make bit line, when forming bit line, remove with the storage medium of part outside covering below the bit line and through the polysilicon of storage medium atom diffusion, etching depth is up to the first kind polysilicon layer that is not spread, thereby produces a plurality of discrete diodes above the single first conduction type polysilicon word line; Form memory cell; Fill isolated material, planarization is opened each discrete diode-isolated.Described catalysis induced material is in order to help to form polysilicon when making silicon thin film.
See also Fig. 4 A to Fig. 4 J, present embodiment is specific as follows:
On the silicon substrate of n type, inject earlier and form p type doped layer 15, form lines by photoetching by ion, shown in Fig. 4 B, among the figure along the projection of D-D direction shown in Fig. 4 C.Deposition by cryogenic oxidation silicon 16 and chemico-mechanical polishing planarization obtain the structure shown in Fig. 4 D, and vertical view is shown in Fig. 4 E.Behind the deposition Sb material 12, among Fig. 4 E along the projection of E-E direction shown in Fig. 4 F, make by lithography and the vertical Sb line 17 of p type silicon word line, sectional view is shown in Fig. 4 G, vertical view is shown in Fig. 4 H.Fill low temperature oxide 18 again, electric isolation Sb line 17, through obtaining the cross section shown in Fig. 4 I after the chemico-mechanical polishing, the process diffusion technology obtains the structure shown in Fig. 4 J again, and zone 19 is through Sb doped n type zone.So just obtained diode array, the preparation by memory cell just can obtain resistance converting storage array again.
Embodiment five
Present embodiment has disclosed the manufacture method of another kind of electric resistance transition memory, at first makes logical circuit; Then produce line array in substrate, wire member can be used as hard mask material; Adopt side wall technology to form the sacrificial layer material side wall; The deposition hard mask material adopts the chemico-mechanical polishing planarization; The etching sacrificial layer side wall utilizes hard mask to obtain narrow groove; Remove unnecessary hard mask, in above-mentioned narrow groove, deposition catalysis induced material adopts chemico-mechanical polishing or etching to return carving technology and removes excess stock, keeps the catalysis induced material of bottom; The vapour deposition first conduction type silicon materials through high-temperature process, owing to the induction of catalysis induced material, have formed the polysilicon word line of first conduction type above the catalysis induced material; Return carving technology by chemico-mechanical polishing or etching, the polysilicon of the first unnecessary conduction type that deposition is obtained is removed; The deposition storage material layer is made the storage medium lines; Pass through DIFFUSION TREATMENT, part of atoms in the storage medium is diffused in the polysilicon word line of first conduction type, formation is the doping of second conduction type to the polysilicon word line comprehensive effect, become second conductivity type regions, this zone and first conduction type polysilicon word line formation diode at the polysilicon word line of first conduction type near the near interface of storage medium; Make bit line, when forming bit line, remove with the storage medium of part beyond covering under the bit line and through the polysilicon of storage medium atom diffusion, etching depth is up to the polysilicon layer that is not spread, above single word line, form a plurality of discrete diode devices thus, in order to drive and the gating memory cell; Form memory cell; Fill isolated material, each discrete diode-isolated is opened.Under specific etching condition, the etch rate of sacrifice layer is higher than with hard mask etching speed under the condition.Described catalysis induced material is in order to help to form polysilicon when making silicon thin film.
See also Fig. 5 A to Fig. 5 K, present embodiment is specific as follows:
Figure 5 shows that the method for making the electric resistance transition memory array.At first etch shallow slot 22 on silicon substrate 21, sectional view and vertical view are respectively shown in Fig. 5 A and 5B.As inducing layer, the method for this step has two kinds at the bottom deposit metal Ni of groove thin layer, and first kind, adopt vapour deposition process uniform deposition Ni thin layer 23 on the basis of Fig. 5 A, obtain structure by returning carving technology as Fig. 5 C, vertical view is shown in 5D; Second kind, deposition Ni film adopts chemico-mechanical polishing to obtain said structure subsequently, but can more residual Ni at the sidewall of groove.Vapour deposition p type silicon 24 through after the high-temperature process, above the shallow slot in Fig. 5 F, because the induction of Ni has formed polysilicon 25, is the p type.After chemico-mechanical polishing and returning carving technology, obtained structure as Fig. 5 G.And then fill antimony metal 26, after the polishing planarization shown in Fig. 5 H.Plated metal obtains tungsten material bit line 27 through after the photoetching subsequently, and its sectional view is shown in Fig. 5 I.Pass through method of diffusion, antimony atoms in the antimony layer 26 is diffused in the p type polysilicon 25, formed the silicon area 28 that Sb mixes, form in the process of bit line 27 in etching, etching process is stopped to the top of polysilicon 25, the diode of polysilicon word line top is separated, and the sectional view of this moment and vertical view are respectively shown in Fig. 5 J and 5K.So, at the interface of antimony layer 26,, just formed diode because the diffusion effect of Sb makes the silicon materials of near interface be mixed by the n type with p type polysilicon 25.And at the interface of tungsten and Sb, under action of electric signals, will the transition effects of resistance takes place, so, just produced the electric resistance transition memory array, certainly, complete array also should comprise the CMOS driving circuit section, do not particularly point out in this embodiment, do not need drive circuit but do not represent.And can only adopt chemico-mechanical polishing in the technical process that obtains Fig. 5 G, and so just silicon need not be carved for 25 times, in technology subsequently, adopt photoetching process above p type silicon word line 25, to make antimony and metal bit line.
Embodiment six
See also Fig. 6 A to Fig. 6 L, present embodiment is made the method than the storage array of small-feature-size for adopting " side wall technology " (or claiming " spacer " technology).
Fig. 6 A makes lines 33 for having made the substrate of drive circuit above substrate, and (these lines will as hard mask), the cross section that obtains is shown in Fig. 6 B.Adopt chemical vapour deposition (CVD) and return carving technology to form side wall 34, shown in Fig. 6 C in the side of lines 33.Deposit another kind of hard mask material 35, shown in Fig. 6 D, the structure that obtains after the process chemico-mechanical polishing is shown in Fig. 6 E.Adopt the reactive ion etching method, produce groove 36 below side wall 34, all the other are protected by the part that hard mask covers, and the structure of formation is shown in Fig. 6 F, and vertical view is shown in Fig. 6 G.After unnecessary hard mask removal, adopting as shown in Figure 5 similarly, method produces p type polysilicon 38 (Fig. 6 H) and deposition antimony material 39 (Fig. 6 I).Continue to make metal bit line 40, shown in Fig. 6 J.Through DIFFUSION TREATMENT, form diode at antimony material 39 and the polysilicon region 41 of the interface formation n type doping of p type polysilicon 38 and the polysilicon region that the p type mixes, shown in Fig. 6 K.The resistance transition effects will take place in the interface at metal bit line 40 and antimony material 39, thereby realize the storage of data.At this moment, vertical view is shown in Fig. 6 L.
Here description of the invention and application is illustrative, is not to want with scope restriction of the present invention in the above-described embodiments.Here the distortion of disclosed embodiment and change are possible, and the various parts of the replacement of embodiment and equivalence are known for those those of ordinary skill in the art.Those skilled in the art are noted that under the situation that does not break away from spirit of the present invention or substantive characteristics, and the present invention can be with other forms, structure, layout, ratio, and realize with other elements, material and parts.Under the situation that does not break away from the scope of the invention and spirit, can carry out other distortion and change here to disclosed embodiment.
Claims (18)
1. electric resistance transition memory is characterized in that it comprises:
Substrate;
Logical circuit;
Word line, it is the semiconductor word line with first conduction type;
Bit line is positioned at the word line top;
Some discrete memory cell are between word line and bit line; By diffusion effect, the part of atoms of storage medium in the described memory cell is diffused in the semiconductor word line of described first conduction type, the comprehensive effect that forms semiconductor word line at contact interface is the doping of second conduction type; Form diode structure between second conductivity type regions that the storage medium atom diffusion mix to form and the first conductive type semiconductor word line, this diode structure carries out gating as gating unit to the memory cell of top;
Isolated location in order to isolate each word line and each diode and memory cell, makes its electric isolation each other.
2. electric resistance transition memory according to claim 1 is characterized in that: described memory cell is as independently a part of, between word line and bit line;
Described diode structure be discrete, promptly word line top is a plurality of independently diodes; Perhaps, described diode structure is an integral body.
3. electric resistance transition memory according to claim 1 is characterized in that: described memory cell is as the part of described bit line; Described diode structure is discrete, and promptly a word line top is a plurality of independently diodes.
4. electric resistance transition memory according to claim 3 is characterized in that: described memory cell also comprises one deck conductive layer at least.
5. electric resistance transition memory according to claim 1 is characterized in that: under action of electric signals, the resistance of described memory cell can be realized controlled transformation between high resistance and low resistance.
6. electric resistance transition memory according to claim 1 is characterized in that: the diffusing, doping of storage medium atom pair first conductive type semiconductor that described diffusion causes is the diffusion of one or more atoms.
7. electric resistance transition memory according to claim 1 is characterized in that: the resistivity of described isolated location material is than the resistivity height of storage medium and semiconductor word line.
8. electric resistance transition memory according to claim 1 is characterized in that: described word line is the semiconductor line of p type conduction; The part of atoms of storage medium spreads the semiconductor line of this p type conduction, and after DIFFUSION TREATMENT, the p N-type semiconductor N of close near interface becomes n type doped region, and has formed a plurality of discrete diode structures between the semiconductor line of p type conduction.
9. electric resistance transition memory according to claim 1 is characterized in that: described memory cell self has the function of phase transformation, and perhaps storage medium is through having the ability of electric resistance changing after the suitable doping.
10. electric resistance transition memory according to claim 9 is characterized in that: the material of described memory cell is one or more in stibium containing material, the sulfur series compound phase-change material.
11. electric resistance transition memory according to claim 10 is characterized in that: the material of described memory cell is a stibium containing material, and the atom percentage content of antimony atoms is greater than 50%.
12. electric resistance transition memory according to claim 9 is characterized in that: the resistivity of described isolated location material is than the resistivity height of stibium containing material.
13. the manufacture method of an electric resistance transition memory is characterized in that it comprises the steps:
One substrate is set;
In described substrate, make the semiconductor word line of first conduction type;
Above the word line of first conduction type, make the storage medium line;
Diffusing, doping by atom forms the zone of second conduction type, second conductivity type regions of formation and first conduction type word line formation diode structure at the first conduction type word line near the near interface of storage medium;
Make bit line, when forming bit line, the storage medium and second conductive type semiconductor after the storage medium atom diffusion of part beyond covering under the bit line are removed, etching depth is up to the first conductive type semiconductor layer top that is not diffused into, thereby produces a plurality of discrete diodes above the single first conduction type word line;
Form memory cell;
Fill isolated material and planarization;
Described first conduction type is the P type, and second conduction type is the N type; Perhaps first conduction type is the N type, and second conduction type is the P type.
14. the manufacture method of an electric resistance transition memory is characterized in that it comprises the steps:
One substrate is set;
Make logical circuit;
In substrate, produce the shallow slot array;
In groove, deposition catalysis induced material adopts chemico-mechanical polishing or etching to return carving technology and removes excess stock, keeps the catalysis induced material of bottom;
The vapour deposition first conduction type silicon materials through high-temperature process, owing to the induction of catalysis induced material, have formed the polysilicon word line of first conduction type above the catalysis induced material;
Return carving technology by chemico-mechanical polishing or etching, the first unnecessary conduction type polysilicon that deposition obtains is removed;
The deposition storage material layer, in above-mentioned shallow slot, promptly the storage medium lines are made in the polysilicon top,, the coincidence identical with the polysilicon word line figure of storage medium figure;
Pass through DIFFUSION TREATMENT, part of atoms in the storage medium is diffused in the polysilicon word line of first conduction type of lower floor, forming comprehensive effect is the doping of second conduction type, near interface at the close storage medium of silicon word line forms second conductivity type regions, and the polysilicon word line of this zone and first conduction type forms diode structure;
Make bit line, when forming bit line, remove with the storage medium of part outside covering below the bit line and through the polysilicon of storage medium atom diffusion, etching depth is up to the first conduction type polysilicon layer that is not spread, thereby produces a plurality of discrete diodes above the single first conduction type polysilicon word line;
Form memory cell;
Fill isolated material, planarization is opened each discrete diode-isolated;
Described first conduction type is the P type, and second conduction type is the N type; Perhaps first conduction type is the N type, and second conduction type is the P type.
15. manufacture method according to claim 14 is characterized in that: described catalysis induced material is in order to help to form polysilicon when making silicon materials.
16. the manufacture method of an electric resistance transition memory is characterized in that it comprises the steps:
Make logical circuit;
In substrate, produce line array;
Adopt side wall technology to form the sacrificial layer material side wall;
Deposit hard mask, adopt the chemico-mechanical polishing planarization;
The etching sacrificial layer side wall utilizes hard mask to obtain narrow groove;
Remove unnecessary hard mask, in above-mentioned narrow groove, deposition catalysis induced material adopts chemico-mechanical polishing or etching to return carving technology and removes excess stock, keeps the catalysis induced material of bottom;
The vapour deposition first conduction type silicon materials through high-temperature process, owing to the induction of catalysis induced material, have formed the polysilicon word line of first conduction type above the catalysis induced material;
Return carving technology by chemico-mechanical polishing or etching, the polysilicon of the first unnecessary conduction type that deposition is obtained is removed;
The deposition storage material layer is made the storage medium lines;
Pass through DIFFUSION TREATMENT, part of atoms in the storage medium is diffused in the polysilicon word line of first conduction type, formation is the doping of second conduction type to the polysilicon word line comprehensive effect, become second conductivity type regions, this zone and first conduction type polysilicon word line formation diode at the polysilicon word line of first conduction type near the near interface of storage medium;
Make bit line, when forming bit line, remove with the storage medium of part beyond covering under the bit line and through the polysilicon of storage medium atom diffusion, etching depth is up to the polysilicon layer that is not spread, above single word line, form a plurality of discrete diode devices thus, in order to drive and the gating memory cell;
Form memory cell;
Fill isolated material, each discrete diode-isolated is opened.
17. manufacture method according to claim 16 is characterized in that: under specific etching condition, the etch rate of sacrifice layer is higher than with hard mask etching speed under the condition.
18. manufacture method as claimed in claim 16 is characterized in that: described catalysis induced material is in order to help to form polysilicon when making silicon materials.
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