CN101487114A - Low temperature polysilicon thin-film device and method of manufacturing the same - Google Patents
Low temperature polysilicon thin-film device and method of manufacturing the same Download PDFInfo
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- CN101487114A CN101487114A CNA2009100060779A CN200910006077A CN101487114A CN 101487114 A CN101487114 A CN 101487114A CN A2009100060779 A CNA2009100060779 A CN A2009100060779A CN 200910006077 A CN200910006077 A CN 200910006077A CN 101487114 A CN101487114 A CN 101487114A
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Abstract
The invention relates to a low temperature polysilicon thin film device and a manufacturing method and equipment thereof, and the manufacturing method comprises the following steps: a substrate is provided; bias pressure is added to the substrate and a polysilicon material is deposited on the substrate by a plasma chemical vapor deposition method, so the polysilicon material is crystallized into the polysilicon thin film through the induce of the bias pressure. A polysilicon thin film device of higher quality can be obtained at low temperature, the crystallization ratio is high and the thickness of nuclear pregnant layer is reduced, and the pollution of the vacuum is avoided.
Description
The application is according to dividing an application that patent application (application number: 200510116621.7, denomination of invention: a kind of low temp polysilicon film device and manufacture method thereof and equipment) proposes.
Technical field
The present invention relates to a kind of polysilicon membrane and forming method thereof, particularly relate to a kind of low-temperature polysilicon film and manufacture method thereof and equipment.
Background technology
In the manufacturing of numerous devices such as semi-conductor, film-grade solar cell and various liquid-crystal displays, all need to form at low temperatures a silicon film, promptly in the temperature below 600 ℃, utilize physical vapor deposition (Physical Vapor Deposition; PVD), ion growth form chemical vapor deposition (PlasmaEnhanced Chemical Vapor Deposition; PE-CVD) or chemical vapor deposition (ChemicalVapor Deposition; Mode gas deposition one silicon film such as CVD), but this silicon film does not have enough energy and forms polysilicon (poly-silicon when deposition; Poly-Si), and only can form non-crystalline silicon (amorphous silicon; A-Si).Because the silicon crystallization of polysilicon is arranged than non-crystalline silicon orderliness, so polysilicon has higher electronic mobility and low temperature susceptibility.
At present in order to obtain polysilicon membrane, general using solid-phase crystallization method (Solid PhaseCrystallization) or quasi-molecule laser annealing (Excimer Laser Annealing; ELA) mode causes amorphous silicon membrane to crystallize into polysilicon under the high temperature annealing environment, can obtain the structure of polysilicon.
Yet, when utilizing the solid-phase crystallization method, need higher Tc, therefore must be with silicon chip (Siwafer) or quartzy (Quartz; SiO
3) wait material as base material, and the cost of these materials is comparatively expensive, thereby be unfavorable for producing in enormous quantities.
Moreover when utilizing laser anneal method, though it can reduce Tc, the board equipment cost is high, and adopts its formation speed of laser scanning methods still to have to be strengthened.
Developed in recent years and to utilize ion growth form chemical vapor deposition method or hot-wire chemical vapour deposition method (Hot wire chemical vapor deposition; The direct deposit spathic silicon material of chemical vapor deposition method such as HW-CVD), but at the initial stage of deposited polycrystalline silicon thin film,, therefore must deposition arrive thousands of dusts because nucleation density is low excessively
Just can obtain the preferable polysilicon membrane of crystallization degree afterwards.
In addition, except the direct sedimentary method of this kind, developed and to utilize metal induced lateral crystallization method (metal-induced lateral crystallization; MILC) technology is to deposit thin polysilicon at a slow speed, with the Seed Layer (Seed layer) that is provided as follow-up non-crystalline silicon, wherein deposit more than the several times that the employed slug flow speed of this polysilicon is lower than normal sedimentation non-crystalline silicon gas flow rate, then at the non-crystalline silicon that deposits a suitable thickness, carry out furnace annealing with 600 ℃ temperature again, so that non-crystalline silicon is converted into polysilicon.Because it has had crystal seed layer, therefore can in the short period of time, non-crystalline silicon be converted into polysilicon.In fact, because it is long to form Seed Layer institute time-consuming with low speed, therefore on total formation time (finishing), do not save to some extent by being deposited into annealing.Therefore and be not suitable for producing in batches and use moreover this kind utilizes the growing method of metal-induced lateral crystallization technology need consider that the eutectic point of metal and silicon is too high, and has the problem that film suffers metallic pollution; In addition on the one hand, with the method for Seed Layer help film growth, still have base material temperature to cross the high problem that can't overcome and exist.
Summary of the invention
Technical problem underlying to be solved by this invention is to provide a kind of just directly manufacture method of formation of deposits polysilicon membrane and applied equipment thereof at low temperatures, thereby improves the deposit film quality, reduces the thickness of pregnant stratum nucleare.
For achieving the above object, the manufacture method of direct deposited polycrystalline silicon thin film includes the following step under the low temperature provided by the invention: a base material is provided, applying a bias voltage again and give base material and pass through PCVD (Plasma Chemical Vapor Deposition) deposit spathic silicon material on base material, is polysilicon membrane to make the polycrystalline silicon material crystallization by bringing out of bias voltage.In this, utilize applying of bias voltage and make the Siliciumatom on polycrystalline silicon material surface have enough propagation energies, improving the crystallization degree of polycrystalline silicon material, and then under low base material temperature, form polysilicon membrane.
Wherein, PCVD (Plasma Chemical Vapor Deposition) can be general ion growth form chemical vapor deposition method, also can be inductively coupled plasma chemical vapor deposition (Inductively-Coupled PlasmaChemical Vapor Deposition; ICP-CVD) method.
Moreover this inductively coupled plasma chemical vapor deposition method is carried out through the following steps; At first, base material is placed in the vacuum cavity, and feeding has the gas of polycrystalline silicon material in vacuum cavity, utilize ruhmkorff coil to produce the jigger coupling electric field in vacuum cavity again, so that the gas that feeds forms high density plasma because of the jigger coupling electric field, last this high density plasma diffuses to base material, and polycrystalline silicon material is deposited on the surface of base material.
The manufacture method of direct deposited polycrystalline silicon thin film under the another kind of low temperature disclosed by the invention, include the following step: provide a base material, deposition has the material of set lattice parameter on base material, to form the induced layer of tool preferred orientations, at last, utilize PCVD (Plasma Chemical Vapor Deposition) that polycrystalline silicon material is deposited on the induced layer again, to make the polycrystalline silicon material crystallization form polysilicon membrane by bringing out of induced layer.In this, induced layer can be used as the hotbed of the Siliciumatom bond arrangement of polycrystalline silicon material, so that polycrystalline silicon material can crystallization be a polysilicon membrane under low temperature.
Wherein, this set lattice parameter is similar to the lattice parameter of silicon, and the material that therefore has this set lattice parameter includes materials such as aluminium nitride.In addition, induced layer can utilize chemical vapor deposition (CVD) mode, physical vapor deposition (PVD) mode or ald (atomic layer deposition; ALD) mode forms, and polysilicon membrane can be realized on induced layer by utilizing the direct deposit spathic silicon material of general ion growth form chemical vapor deposition method or inductively coupled plasma chemical vapor deposition method.
Moreover this inductively coupled plasma chemical vapor deposition method is carried out through the following steps; At first, base material is placed in the vacuum cavity, and feeding has the gas of polycrystalline silicon material in vacuum cavity, utilize ruhmkorff coil to produce the jigger coupling electric field in vacuum cavity again, so that the gas that feeds forms high density plasma because of the jigger coupling electric field, last this high density plasma diffuses to base material, and polycrystalline silicon material is deposited on the surface of base material.
The present invention also discloses a kind of low temp polysilicon film device, includes base material, induced layer and polysilicon membrane; Induced layer is positioned on the base material, and polysilicon membrane then is positioned on the induced layer, and wherein this induced layer has set lattice parameter and preferred orientations.
Wherein, this set lattice parameter is similar to the lattice parameter of silicon, and the material that therefore has this set lattice parameter includes materials such as aluminium nitride.In addition, induced layer can utilize chemical vapor deposition mode, physical vapor deposition mode or ald mode to form, and polysilicon membrane can obtain on induced layer by utilizing the direct deposit spathic silicon material of general ion growth form chemical vapor deposition method or inductively coupled plasma chemical vapor deposition method.
In addition, between base material and induced layer, can have a grid.Then when semiconducter device is made, promptly can serve as gate insulator by induced layer, to reduce manufacturing cost and time.
The invention also discloses a kind of inductively coupled plasma CVD (Chemical Vapor Deposition) apparatus, on a base material, this inductively coupled plasma CVD (Chemical Vapor Deposition) apparatus includes vacuum cavity, ruhmkorff coil and dc bias source in order to the deposition low-temperature polysilicon film; Wherein, ruhmkorff coil and dc bias source are arranged at the vacuum cavity outside, and has supporting seat in the vacuum cavity, can be for bearing base material, and can feed more than one gas in this vacuum cavity, wherein in the gas that feeds, include polycrystalline silicon material, utilize ruhmkorff coil to produce the jigger coupling electric field again, ordering about the intravital aforementioned gas reaction of vacuum chamber is plasma, and plasma can diffuse to substrate surface generation absorption, reaction, effects such as migration, and polycrystalline silicon material is deposited on the base material, utilize the dc bias source that is electrically connected on the supporting seat simultaneously, apply bias voltage for base material, impelling this polycrystalline silicon material crystallization is polysilicon membrane.
The present invention can obtain the polysilicon film device of higher quality in low temperature down, and percent crystallization in massecuite is high and reduce pregnant stratum nucleare thickness, has avoided the pollution of vacuum breaker.
Description of drawings
Fig. 1 is the schema according to the manufacture method of direct deposited polycrystalline silicon thin film under the low temperature of the first embodiment of the present invention;
Fig. 2 is the synoptic diagram according to the low temp polysilicon film device of the first embodiment of the present invention;
Fig. 3 is the synoptic diagram according to the jigger coupling formula plasma chemical vapor deposition equipment of the first embodiment of the present invention;
Fig. 4 is the schema of the manufacture method of direct deposited polycrystalline silicon thin film under according to a second embodiment of the present invention the low temperature;
Fig. 5 is the synoptic diagram of low temp polysilicon film device according to a second embodiment of the present invention;
Fig. 6 is the Raman spectrum of low-temperature polysilicon film according to an embodiment of the invention; And
Fig. 7 is the synoptic diagram of low-temperature polysilicon film transistor according to an embodiment of the invention.
Wherein, Reference numeral:
10 polysilicon film devices, 11 base materials
12 polysilicon membranes, 13 induced layers
14 grids, 15 blocking layers
16 doped layers, 17 source/drains
20 jigger coupling formula plasma chemical vapor deposition equipment
30 vacuum cavities, 31 supporting seats
40 ruhmkorff coils, 50 dc bias sources
60 low-temperature polysilicon film transistors
Embodiment
For making purpose of the present invention, structure, feature and function thereof there are further understanding, now cooperate embodiment to be described in detail as follows.
Main concept of the present invention at first is described, is the thought of utilizing high density plasma and induced crystallization, improves the deposit film quality and reduces pregnant stratum nucleare (Incubation layer) thickness.
See also shown in Figure 1, the schema of the manufacture method of direct deposited polycrystalline silicon thin film under the low temperature that the first embodiment of the present invention provided, comprise the following steps: at first, one base material (step 100) is provided, then, apply bias voltage to base material and with PCVD (Plasma Chemical Vapor Deposition) deposit spathic silicon material (step 110) on base material.Wherein, can open the bias voltage that imposes on base material earlier, carry out the deposition of polycrystalline silicon material again, or begin to carry out the deposition of polycrystalline silicon material earlier, open the bias voltage that imposes on base material more at once, the deposition that perhaps applies bias voltage and polycrystalline silicon material is carried out simultaneously.Thus, can utilize high density plasma to cooperate substrate bias, and the Siliciumatom that the polycrystalline silicon material surface is provided can have enough energy dispersal, and with the comparatively regular atomic arrangement of generation, thereby the polycrystalline silicon material crystallization becomes polysilicon membrane at low temperatures.And, can make the polysilicon film device 10 that is constituted by base material 11 and polysilicon membrane 12 by present embodiment, as shown in Figure 2.
In the present embodiment, realize the deposition of polycrystalline silicon material, also can use inductively coupled plasma chemical vapor deposition (ICP-CVD) equipment, deposit this polysilicon membrane except utilizing general ion growth form CVD (Chemical Vapor Deposition) apparatus; See also shown in Figure 3ly, this inductively coupled plasma CVD (Chemical Vapor Deposition) apparatus 20 is made up of vacuum cavity 30, ruhmkorff coil 40 and dc bias source 50; Can feed more than one gas in the vacuum cavity 30, and have supporting seat 31, and to put for base material 11, dc bias source 50 is electrically connected on the base material 11, and ruhmkorff coil 40 all is arranged at vacuum cavity 30 outsides with dc bias source 50, respectively in order to drive plasma generation and bias voltage is provided.
When feeding gas in vacuum cavity 30, utilize ruhmkorff coil 40 to produce the electric field of jigger coupling, can make the gas reaction in the vacuum cavity 30 is high density plasma, when plasma diffusion to base material 11 surfaces can produce absorption, reaction, effects such as migration, and on base material 11, be deposited as polycrystalline silicon material, and cooperate dc bias source 50 to apply bias voltage for base material 11, the heat energy that ion bombardment base material 11 is produced reaches the Siliciumatom on polycrystalline silicon material surface smoothly, allow the silicon on surface that enough propagation energies are arranged, and therefore the crystallization degree of raising polycrystalline silicon material can obtain polysilicon membrane 12 under low base material temperature.
In addition, before the deposition of carrying out polycrystalline silicon material, can be earlier with the lattice parameter material close with silicon, as aluminium nitride (AlN), the induced layer that deposition one deck has preferred orientations, the hotbed that utilizes this induced layer to arrange as polysilicon crystal seed Siliciumatom bond again deposits the higher polysilicon membrane of quality.After deposition process finished fully, the off-gas pump of residual gas through being connected with vacuum cavity discharged.
See also shown in Figure 4, the schema of the manufacture method of direct deposited polycrystalline silicon thin film under the low temperature of second embodiment provided by the present invention.In this, at first provide a base material (step 200); Then, the material of the set lattice parameter of deposition tool is on base material, and to form the induced layer (step 210) of tool preferred orientations, wherein this induced layer can utilize chemical vapor deposition, physical vapor deposition or ald (atomic layerdeposition; ALD) etc. mode forms; At last, with PCVD (Plasma Chemical Vapor Deposition) deposit spathic silicon material (step 220) on induced layer.In this, (for example: materials such as aluminium nitride) can possess the lattice parameter that is similar to silicon in order to the material that is deposited as induced layer.Thus, can utilize induced layer to reduce because of do not match problems such as stress that (lattice mismatch) caused and lattice be at random of lattice, and use the atomic arrangement that the Siliciumatom that brings out polycrystalline silicon material is formed with systematicness, and then can form the higher polysilicon membrane of quality at minimum thickness.Moreover, can utilize general ion growth form chemical vapor deposition method or inductively coupled plasma chemical vapor deposition method to realize the deposition of polycrystalline silicon material in this.
Utilization by above-mentioned method can make a polysilicon film device under low temperature; As shown in Figure 5, this polysilicon film device 10 is made of with polysilicon membrane 12 base material 11, induced layer 13, and wherein induced layer 13 is positioned on the base material 11, and 12 of polysilicon membranes are positioned on the induced layer 13.Induced layer has preferred orientations and lattice parameter is similar to silicon, and therefore, the material of this induced layer can be materials such as aluminium nitride.
The present invention verifies with experiment for the polysilicon membrane of present embodiment, as shown in Figure 6, for adopting aluminium nitride is Raman (Raman) spectrum of induced layer assistant depositing polysilicon membrane, can find the spectrum peak of tangible polysilicon in figure, expression really can obtain polysilicon membrane according to an embodiment of the invention.
At this, carry out the deposition of polycrystalline silicon material by the mode of high density plasma collocation substrate bias, for Siliciumatom provides enough energy, make Siliciumatom that atomic arrangement preferably be arranged, and then deposit the higher polysilicon membrane of quality.
In addition, utilize the method according to this invention except can obtaining the preferable polysilicon membrane of structural arrangement, also have thermal conductive property and dielectric insulation preferably in order to the material that forms induced layer, therefore can be applied to the base material heat radiation of indicating meter, and be applied to gate insulator in thin film transistor (TFT) device, to reduce manufacturing cost and time.As shown in Figure 7, earlier grid 14 is made on the base material 11, forms an induced layer 13 again in the top of substrate, and cover this grid 14.On induced layer 13, form a polysilicon membrane 12 then, on polysilicon membrane 12, form a blocking layer 15 then, 15 both sides form in order to the doped layer 16 as channel in the blocking layer again, and form source/drain 17 on doped layer 16, thereby form a low-temperature polysilicon film transistor 60.
For instance, after making the gate metal figure on glass or the crystal silicon substrate, glass or the crystal silicon substrate of making grid can be placed in the inductively coupled plasma CVD (Chemical Vapor Deposition) apparatus, to carry out the deposition of induced layer material such as aluminium nitride (AlN); Can be at about 150 ℃ low temperature, the about 30mtorr of chamber pressure, and the condition deposit of the about 800W of inductively coupled plasma (ICP) power 10 minutes, with the aluminium nitride of deposition tool preferred orientations as gate insulator, simultaneously with this hotbed as the polysilicon deposition that continues; Therefore, in same deposition chamber, can form continuously and bring out growth insulation layer, polysilicon active layers and polysilicon doping layer, and then form device architecture.The mode of growing up continuously by this kind can improve membrane quality, and is not subjected to the pollution of vacuum breaker, thereby can obtain the polysilicon membrane of high percent crystallization in massecuite and high preferred orientations.
Though the present invention with aforesaid embodiment openly as above, is not in order to limit the present invention.Without departing from the spirit and scope of the present invention, change of being made and modification all belong to scope of patent protection of the present invention.See also appending claims about the protection domain that the present invention defined.
Claims (13)
1, the manufacture method of direct deposited polycrystalline silicon thin film under a kind of low temperature is characterized in that, comprises the following steps:
One base material is provided;
The material that deposition has a set lattice parameter is on this base material, and to form an induced layer of tool preferred orientations, the material of this induced layer is an aluminium nitride; And
Deposit a polycrystalline silicon material on this induced layer with a plasma body chemical vapor deposition method, form this polysilicon membrane to make this polycrystalline silicon material crystallization by bringing out of this induced layer.
2, the manufacture method of direct deposited polycrystalline silicon thin film under the low temperature as claimed in claim 1, it is characterized in that, has a material of a set lattice parameter on this base material in this deposition, in the step with the induced layer that forms the tool preferred orientations, the depositional mode of this induced layer is chemical vapor deposition mode, physical vapor deposition mode or ald mode.
3, the manufacture method of direct deposited polycrystalline silicon thin film under the low temperature as claimed in claim 1, it is characterized in that, has a material of a set lattice parameter on this base material in this deposition, in the step with the induced layer that forms the tool preferred orientations, the set lattice parameter of this of this material is similar to a lattice parameter of silicon.
4, the manufacture method of direct deposited polycrystalline silicon thin film under the low temperature as claimed in claim 1, it is characterized in that, has a material of a set lattice parameter on this base material in this deposition, before the step with the induced layer that forms the tool preferred orientations, also comprise the following steps: to form a grid on this base material.
5, the manufacture method of direct deposited polycrystalline silicon thin film under the low temperature as claimed in claim 1, it is characterized in that, deposit a polycrystalline silicon material at this on this induced layer with a plasma body chemical vapor deposition method, so that this polycrystalline silicon material crystallization is formed in the step of this polysilicon membrane, this plasma body chemical vapor deposition method is an ion growth form chemical vapor deposition method.
6, the manufacture method of direct deposited polycrystalline silicon thin film under the low temperature as claimed in claim 1, it is characterized in that, deposit a polycrystalline silicon material at this on this induced layer with a plasma body chemical vapor deposition method, so that this polycrystalline silicon material crystallization is formed in the step of this polysilicon membrane, this plasma body chemical vapor deposition method is an inductively coupled plasma chemical vapor deposition method.
7, the manufacture method of direct deposited polycrystalline silicon thin film under the low temperature as claimed in claim 6 is characterized in that the carrying out of this inductively coupled plasma chemical vapor deposition method comprises the following steps:
This base material is placed in the vacuum cavity;
Feeding has a gas of this polycrystalline silicon material in this vacuum cavity;
Utilize a ruhmkorff coil to produce a jigger coupling electric field in this vacuum cavity, so that this gas forms a high density plasma because of this jigger coupling electric field; And
Make this high density plasma diffuse to this base material, so that this polycrystalline silicon material is deposited on this base material.
8, the manufacture method of direct deposited polycrystalline silicon thin film under the low temperature as claimed in claim 1, it is characterized in that, should deposit a polycrystalline silicon material on this induced layer with a plasma body chemical vapor deposition method, making this polycrystalline silicon material crystallization form the step of this polysilicon membrane by bringing out of this induced layer, for being biased in this base material and being this polysilicon membrane to impel this polycrystalline silicon material crystallization by applying one.
9, a kind of low temp polysilicon film device is characterized in that, comprising:
One base material;
One induced layer is positioned on this base material, and wherein this induced layer has a set lattice parameter and a preferred orientations, and the material of this induced layer is an aluminium nitride; And
One polysilicon membrane is positioned on this induced layer.
10, low temp polysilicon film device as claimed in claim 9 is characterized in that, this set lattice parameter is similar to the lattice parameter of silicon.
11, low temp polysilicon film device as claimed in claim 9 is characterized in that, the generation type of this polysilicon membrane is ion growth form chemical vapor deposition method or inductively coupled plasma chemical vapor deposition method.
12, low temp polysilicon film device as claimed in claim 9 is characterized in that, also comprises: a grid, and between this base material and this induced layer.
13, low temp polysilicon film device as claimed in claim 9 is characterized in that, also comprises:
One blocking layer is positioned on this polysilicon membrane;
At least one doped layer is positioned on the edge on this blocking layer; And
At least one source electrode and drain electrode are positioned on this doped layer.
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| CN2009100060779A CN101487114B (en) | 2005-10-26 | 2005-10-26 | Low temperature polysilicon thin-film device and method of manufacturing the same |
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| CN2009100060779A CN101487114B (en) | 2005-10-26 | 2005-10-26 | Low temperature polysilicon thin-film device and method of manufacturing the same |
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| CN 200510116621 Division CN100537838C (en) | 2005-10-26 | 2005-10-26 | A kind of low temp polysilicon film device and manufacture method thereof and equipment |
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| CN101487114A true CN101487114A (en) | 2009-07-22 |
| CN101487114B CN101487114B (en) | 2010-10-20 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018076139A1 (en) * | 2016-10-24 | 2018-05-03 | 丁欣 | Method for producing polycrystalline silicon and method for producing monocrystalline silicon |
| CN109423690A (en) * | 2017-08-21 | 2019-03-05 | 流慧株式会社 | Method for manufacturing crystalline film |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1265427C (en) * | 2003-01-15 | 2006-07-19 | 友达光电股份有限公司 | Manufacturing method of low-temp polycrystal silicon film transistor |
| CN1285107C (en) * | 2003-06-12 | 2006-11-15 | 统宝光电股份有限公司 | Method for manufacturing low-temperature polysilicon thin-film transistor |
| CN1567550A (en) * | 2003-07-04 | 2005-01-19 | 统宝光电股份有限公司 | Method for manufacturing low-temperature polysilicon thin-film transistor |
-
2005
- 2005-10-26 CN CN2009100060779A patent/CN101487114B/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018076139A1 (en) * | 2016-10-24 | 2018-05-03 | 丁欣 | Method for producing polycrystalline silicon and method for producing monocrystalline silicon |
| CN109423690A (en) * | 2017-08-21 | 2019-03-05 | 流慧株式会社 | Method for manufacturing crystalline film |
| CN109423690B (en) * | 2017-08-21 | 2022-09-16 | 株式会社Flosfia | Method for manufacturing crystalline film |
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