CN101479620A - Receiver assembly and method for multi-gigabit wireless systems - Google Patents
Receiver assembly and method for multi-gigabit wireless systems Download PDFInfo
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- CN101479620A CN101479620A CNA2006800552157A CN200680055215A CN101479620A CN 101479620 A CN101479620 A CN 101479620A CN A2006800552157 A CNA2006800552157 A CN A2006800552157A CN 200680055215 A CN200680055215 A CN 200680055215A CN 101479620 A CN101479620 A CN 101479620A
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- 238000000034 method Methods 0.000 title claims abstract description 10
- 238000006243 chemical reaction Methods 0.000 claims description 7
- 230000001360 synchronised effect Effects 0.000 claims description 2
- 230000005906 menstruation Effects 0.000 claims 1
- 230000001915 proofreading effect Effects 0.000 claims 1
- 230000001105 regulatory effect Effects 0.000 claims 1
- 238000004891 communication Methods 0.000 description 8
- 238000011084 recovery Methods 0.000 description 6
- 238000001228 spectrum Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000012937 correction Methods 0.000 description 2
- 238000012217 deletion Methods 0.000 description 1
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- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
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- 230000000930 thermomechanical effect Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q21/00—Antenna arrays or systems
- H01Q21/06—Arrays of individually energised antenna units similarly polarised and spaced apart
- H01Q21/061—Two dimensional planar arrays
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
- H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
- H04B7/06—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
- H04B7/0602—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station using antenna switching
- H04B7/0608—Antenna selection according to transmission parameters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
- H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
- H04B7/08—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
- H04B7/0837—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using pre-detection combining
- H04B7/0842—Weighted combining
- H04B7/0848—Joint weighting
- H04B7/0857—Joint weighting using maximum ratio combining techniques, e.g. signal-to- interference ratio [SIR], received signal strenght indication [RSS]
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- Radio Transmission System (AREA)
- Mobile Radio Communication Systems (AREA)
Abstract
The present invention describes a receiver assembly for receiving an analog signal and converting the analog signal to a digital signal. The receiver assembly is, preferably, capable of receiving a signal operating at approximately 60 GHz. The receiver assembly includes a filter, a down converter, a demodulator, a latch, a FIFO, and a logic circuit. A method of converting the 60 GHz analog signal to a digital signal is also described.
Description
Technical field
The present invention relates to communication network, especially relate to the architecture of high speed, high-frequency wireless system.
Background technology
In view of the world more and more depends on electronic equipment and portable set, also improve constantly for the expectation of faster equipment more easily.Therefore, the producer of this equipment tries hard to produce faster, easier use and more cost effective equipment to satisfy consumer's needs.
In fact, especially because the appearance of numerous new multimedia application, the requirement of superelevation data rate wireless communication has also been improved.Because some limitations of these high data rate aspects, therefore the needs for the data link of hypervelocity personal area network (PAN) and point-to-point or point-to-multipoint become most important.
Common wireless lan (wlan), for example 802.11a, 802.11b and 802.11g standard all have its limitation, only can reach the data transfer rate of 54Mb/s under the situation of the best.Other high-speed radiocommunication, for example ultra broadband (UWB) and many inputs/(MIMO) systems that export can extend to data rate nearly 100Mb/s more.
Being the wave spectrum (spectrum) that reaches kilomegabit per second (Gb/s), is that spectrum efficiency or available bandwidth all must improve.Therefore, be accompanied by thisly, also promoted with the technology of millimeter wave (MMW) frequency work and the immediate development of system to requirement more fast.
Fortunately be that a lot of governments have used the instrument that need not to permit, science and medical science (ISM) wave band of some GHz (kilo-mega cycles per second) bandwidth in the 60GHz wave spectrum.For example, Americanologist is crossed federal communications commission (FCC) and has been distributed 59-64GHz for need not permission application in the U.S..Similarly, Japan has distributed 59-66GHz to be used for high-speed data communication.Similarly, Europe has been distributed 59-62,62-63 and 65-66GHz to be used for mobile broadband to communicate by letter with WLAN.The availability of the frequency in this wave spectrum provides chance for the hypervelocity short-distance wireless communication.
At present, change signal from analog but not economical to numeral with such high-frequency high-speed.In addition, transmitting with this frequency and speed to have sighting distance, so the obstacle in the radio communication can slow down even stop communications.
Therefore, need be a kind of with ultrahigh frequency (about 60GHz), hypervelocity (closely 10Gb/s) assembly so that be digital signal with analog signal conversion at low cost.In addition, need a kind of equipment that is used for operation when obstacle occurring or seriously shielding.This equipment is exactly fundamental purpose of the present invention.
Summary of the invention
The invention provides a kind of receiver module.This receiver module comprises: have the N-array antenna assembly of a plurality of antennas, wherein these a plurality of antennas are suitable for about 60GHz bandwidth operation; A plurality of amplifiers are used for communicating so that amplify the signal that is received by each antenna with each antenna of a plurality of antennas of described N-array antenna assembly; Down converter is used for the amplifier signal of being launched by each amplifier of a plurality of amplifiers is carried out frequency inverted; Detuner is used for restore data and recovered clock signal; Latch is used to recalibrate clock signal, and wherein latch is based on the bit rate of clock signal; Advanced-as to go out circuit earlier, be used for tissue and recover this clock signal; And logical circuit, be used for the error of related known array with correction signal.
Logical circuit can be launched digital signal, and wherein, it is digital signal with this analog signal conversion also that described receiver module receives simulating signal.A plurality of wave filters can be low noise amplifiers.Advanced-as to go out circuit earlier and comprise serializer/de-serializers (SERDES) architecture.Receiver module also comprises clockwork.
Each antenna in a plurality of antennas provides the gain of about 10dBi, the wide position angle and the wide elevation angle of 3dB wave beam in about 30 to 35 degree scopes of 3dB wave beam of about 60 degree, and it can produce beyond thought result under preferred frequency of operation condition.
Each antenna in a plurality of antennas comprises different directions.
Described N-array antenna assembly can provide the sector coverage rate (sectored coverage) of about 60 degree on azimuthal plane.Described N-array antenna assembly can provide the sector coverage rate of about 180 degree on elevation plane.
The invention also discloses a kind of method.A kind of is the method for digital signal with analog signal conversion, and wherein, described simulating signal has the bandwidth of about 60GHz, and this method comprises: utilize a plurality of antennas to be received in about 60GHz simulating signal of work down; To be fed to wave filter from the received simulating signal of a plurality of antennas; Filter this simulating signal to produce purified signal (cleaned signal); Change the frequency of purified signal by the frequency downconversion purified signal; Restituted signal; Signal is carried out synchronously; And make signal association to known array.
Signal comprised synchronously by the mode of utilizing another this signal of signal delay postpone this signal.
In conjunction with the accompanying drawings, according to following detailed description, these and other purpose of the present invention, feature and advantage will become more clear.
Description of drawings
According to a preferred embodiment of the invention, Fig. 1 illustrates the block diagram of receiver module.
Embodiment
For the ease of understanding principle of the present invention and feature, carry out following explanation with reference to the enforcement in the one exemplary embodiment.Particularly, present invention is described in the wireless receiving thermomechanical components with ultra-high frequency and the operation of superelevation data communication rates.
Material described, that be used to form each element of the present invention only is exemplary and nonrestrictive.The numerous suitable material that can realize or similar functions identical with material described herein is also contained within the category of the present invention.The other materials of not describing includes but not limited to the material for example developed after improvement of the present invention herein.
The present invention is a receiver module 100.This receiver module 100 comprises N-array antenna assembly 110, down converter 120, detuner 130, latch 140, advanced/as to go out circuit (First in, First out, FIFO) 150 and logical circuit 160 earlier.This receiver module 100 is from aerial acquisition simulating signal.When presenting this simulating signal via receiver module 100, this simulating signal just is converted into digital signal.High frequency, high data rate ground realize that this conversion from analog to digital is not a simple task.
The present invention according to antenna diversity, select diversity (Selection diversity, SD) and high specific merge that (maximum ration combining, MRC) combination of these three overall principles (over-archingconcepts) realizes.The present invention is to move under 54-66GHz, the about 10Gb/s at about 60GHz preferably.
N-array antenna assembly 110 comprises the individual fan beam series array antenna 112 of N (number).That is to say that N-array antenna assembly 110 comprises a plurality of antennas 112.As shown in Figure 1,5 array antennas 112 are arranged; The those skilled in the art can recognize and can use many antennas 112.Each antenna 112 can be designed to provide the elevation angle (being the E-face) of the wide about 3dB of the position angle (being the H-face) of the wide about 3dB of wave beams of the gain of about 10dBi, about 60 degree and about 30 to 35 wave beams of spending, and its combination can realize beyond thought result.Preferably, selected N the fan beam antennas 112 that is used for receiver module 100 differs from one another, and wherein, for example antenna 112 has other different characteristics between different gains, radiation mode, shape, size and the antenna 112.
Because direction pointed, 112 pairs of multipath effects of each antenna are not too responsive.In addition, because the different beam direction of antenna 112, each antenna 112 preferred line-of-sight signal that receive perhaps alternatively receives reflected signal (for example, from wireless repeater).The antenna 112 of N-array antenna assembly 110 and the configuration of a plurality of antenna 112 can realize multiple angles, wherein, allow receiver module 100 to receive some different signals or identical signal with varying strength.
Each antenna 112 is connected to an amplifier 114.Preferably, amplifier 114 is low noise amplifier (LNA).When the signal 115 from each antenna 112 is transmitted via antenna 112, utilize the antenna 112 of selecting the diversity principle to select to show or can provide highest signal to noise ratio (SNR).That is to say, select the diversity form that best signal is calculated.When eliminating more weak signal, provide 112 pairs of these signals of antenna of optimum signal to protect.
In a preferred embodiment, detuner 130 comprises clock-recovery technology 132 and data-recovery technology 134.Clock-recovery 132 and data-recovery 134 is applied to carrying out the emission of signal 125 from down converter 120.Clock-recovery 132 and data-recovery 134 can produce bit stream, described bit stream and latch function synchronised.
Next, these bit streams or signal 135 are fed to latch 140.Latch 140 is registration signal 135 again, and this depends on bit rate.Delay in the signal patch is aimed in latch 140 again.Latch 140 can picked up signal 135 and in the default time Seize ACK message 135 so that it is aimed at another signal 137 from detuner 130, described signal 137 can be received and be fed from different antennas via receiver assembly, only lags behind signal 135 slightly.This is aimed at again and also depends on bit rate.
These bit streams, general name signal 145 is fed to FIFO (advanced-as to go out earlier) 150.FIFO150 can adopt SERDES (serializer/de-serializers) architecture.The SERDES conversion is from/to the signal 145 of serial data stream and parallel data stream.
The signal 165 that logical circuit 160 sends is digital signals.When signal flow was crossed receiver module, the simulating signal 105 that one or more antenna received just was converted into digital signal.
Although the present invention is disclosed with preferred form, but, for the technician in described field, do not break away under the spirit and scope of the present invention and equivalents thereof and numerous improvement, interpolation and deletion that the present invention is made are apparent, as following claim is set forth.
Claims (11)
1. a receiver module comprises:
N-array antenna assembly with a plurality of antennas, wherein said a plurality of antennas are suitable for carrying out work under the bandwidth of about 60GHz;
A plurality of amplifiers, an antenna in an amplifier in described a plurality of amplifiers and a plurality of antennas of described N-array antenna assembly communicates, thereby amplifies the signal by each antenna received;
Down converter is used for the amplifier signal that each amplifier of a plurality of amplifiers is launched is carried out frequency inverted;
Detuner is suitable for restore data and recovered clock signal from down converter;
Latch is used to recalibrate the clock signal from detuner, and wherein latch is based on the bit rate from the clock signal of detuner;
Advanced/as to go out circuit earlier, be used to organize and recover clock signal from latch; And
Logical circuit, be suitable for proofreading and correct from advanced/go out the error in the signal of circuit earlier.
2. according to the receiver module of claim 1, wherein, logical circuit is launched digital signal, and wherein receiver module reception simulating signal is a digital signal with this analog signal conversion also.
3. according to the receiver module of claim 1, wherein, described a plurality of amplifiers are low noise amplifiers.
4. according to the receiver module of claim 1, wherein, advanced/as to go out circuit earlier and comprise serializer/de-serializers (SERDES) architecture.
5. according to the receiver module of claim 1, further comprise clockwork, be used to produce the clock signal that is sent to receiver module.
6. according to the receiver module of claim 1, wherein, each antenna in described a plurality of antennas provides the gain of about 10dBi, the wide position angle of 3dB wave beam of about 60 degree, and the wide elevation angle of 3dB wave beam in about 30 to 35 degree scopes.
7. according to the receiver module of claim 1, wherein, each antenna in described a plurality of antennas comprises different directions.
8. according to the receiver module of claim 1, wherein, described N-array antenna assembly provides the sector coverage rate of about 60 degree on azimuth plane.
9. receiver module according to Claim 8, wherein, described N-array antenna assembly provides the sector coverage rates of about 180 degree on the face of the elevation angle.
10. one kind is the method for digital signal with analog signal conversion, and wherein, described simulating signal has the bandwidth of about 60GHz, and this method comprises:
Utilize a plurality of antennas to be received in about 60GHz simulating signal of work down;
To be fed to amplifier from the received simulating signal of a plurality of antennas;
Amplify this simulating signal to produce pure signal;
By the mode of this purified signal of frequency downconversion, change the frequency of this purified signal;
Separate the signal of menstruation regulating frequency downconversion;
Synchronous demodulated signal; And
Make signal association to known array.
11. according to the method for claim 10, wherein, the step of synchronizing signal comprises by being extended down to the signal with secondary signal and postpones this signal.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2006/017014 WO2007130032A1 (en) | 2006-05-04 | 2006-05-04 | Receiver assembly and method for multi-gigabit wireless systems |
Publications (1)
Publication Number | Publication Date |
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CN101479620A true CN101479620A (en) | 2009-07-08 |
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CNA2006800552157A Pending CN101479620A (en) | 2006-05-04 | 2006-05-04 | Receiver assembly and method for multi-gigabit wireless systems |
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EP (1) | EP2021816A1 (en) |
JP (1) | JP2009535974A (en) |
CN (1) | CN101479620A (en) |
WO (1) | WO2007130032A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103354978A (en) * | 2011-02-17 | 2013-10-16 | 索尼公司 | Signal processor and signal processing method |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101820733B1 (en) | 2011-08-24 | 2018-01-22 | 삼성전자주식회사 | Apparatus and method for selecting beam in wireless communication system |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2980053B2 (en) * | 1997-03-28 | 1999-11-22 | 日本電気株式会社 | Interference wave canceller |
US6351508B1 (en) * | 1999-11-17 | 2002-02-26 | Transwitch Corporation | Phase/frequency detector for dejitter applications |
US6901123B2 (en) * | 2001-04-02 | 2005-05-31 | Harris Corporation | Multi-panel phased array antenna, employing combined baseband decision driven carrier demodulation |
JP2004015089A (en) * | 2002-06-03 | 2004-01-15 | Toa Corp | Antenna diversity type digital radio receiver |
-
2006
- 2006-05-04 WO PCT/US2006/017014 patent/WO2007130032A1/en active Application Filing
- 2006-05-04 EP EP06758998A patent/EP2021816A1/en not_active Withdrawn
- 2006-05-04 CN CNA2006800552157A patent/CN101479620A/en active Pending
- 2006-05-04 JP JP2009509510A patent/JP2009535974A/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103354978A (en) * | 2011-02-17 | 2013-10-16 | 索尼公司 | Signal processor and signal processing method |
Also Published As
Publication number | Publication date |
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WO2007130032A1 (en) | 2007-11-15 |
JP2009535974A (en) | 2009-10-01 |
EP2021816A1 (en) | 2009-02-11 |
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Open date: 20090708 |