CN101478257A - Electric power inverter capable of parallel connection, inverter system and synchronization control method of the system - Google Patents
Electric power inverter capable of parallel connection, inverter system and synchronization control method of the system Download PDFInfo
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- CN101478257A CN101478257A CNA2009100054655A CN200910005465A CN101478257A CN 101478257 A CN101478257 A CN 101478257A CN A2009100054655 A CNA2009100054655 A CN A2009100054655A CN 200910005465 A CN200910005465 A CN 200910005465A CN 101478257 A CN101478257 A CN 101478257A
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Abstract
The invention discloses parallelizable power inverters, an inverter system and a synchronization control method of the system. Each parallelizable power inverter is an independent and integral inverter, a plurality of the inverters can be used in parallel in the inverter system, and the inverters can also be used independently. The maximum output power of a single inverter is 2500W, and the output power can also be other power values according to necessity. Ten inverters can be used in parallel at most at present, so that the output gross power can be increased greatly after parallel connection, which cannot be achieved at all by the prior similar inverters. In the system, not only do different DC power supplies supply power different inverters, but also the same DC power supply can supply power to all the inverters, thereby being very flexible. A synchronizing pulse signal structure is simple and very efficient, so that the demands can be satisfied by taking an 8-bit single chip (MCU) as a control chip of each inverter only without an expensive DSP processing chip, and the development cost and manufacturing cost of products are lowered greatly.
Description
Technical field
The present invention relates to a kind of power inverter, but especially relate to the synchronisation control means of a kind of parallel connection power supply inverter and inverter system and system.
Background technology
Current society, fossil energies such as oil, coal are more and more nervous and finally can be exhausted fully, and therefore utilizing the reproducible energy such as solar energy, wind energy is the inevitable developing direction of energy field from now on.In the power-supply system of net type, it is exactly to be the Conversion of energy of the DC power supply that stores AC power that an important link is arranged in solar energy, wind energy etc., uses with the electrical equipment of supply and demand AC power.Some electricity consumption situation needs the power of bigger AC power, therefore also just needs powerful power inverter.Production from net type high power contravariant device is a difficult problem of inverter manufacturer always, and up to the present, the maximum power of domestic single high frequency correction sinewave inverter is generally all in 5000W.Because the high power contravariant device is to the requirement of device and all very high to the requirement of heat radiation, the difficulty of designing and developing and producing is very big.And the quality of the high power contravariant device that each manufacturer produced at present neither be stablized very much.Because the unit price of high power contravariant device is higher, therefore when inverter damaged, the loss that causes was also bigger.But the shunt chopper that modular is also arranged in the market, and make up with machine cabinet type.But module generally can't be used separately, and combination is not very free.
Summary of the invention
Technical problem to be solved by this invention provides a kind ofly both can in parallel be used, but the synchronisation control means of the parallel connection power supply inverter that can use separately again and inverter system and system.
The present invention solves the problems of the technologies described above the technical scheme that is adopted: but a kind of parallel connection power supply inverter; it comprises single-chip microcomputer; protective circuit; dc high voltage generation circuit; warning circuit; power-balance circuit and synchronizing signal transmitter/receiver circuit; described protective circuit is connected with described single-chip microcomputer; described protective circuit is connected with described dc high voltage generation circuit; dc high voltage generation circuit is provided with direct-flow input end; described warning circuit is connected with described single-chip microcomputer; described synchronizing signal transmitter/receiver circuit is connected with described single-chip microcomputer; described single-chip microcomputer is connected with dc high voltage generation circuit; it comprises can in parallelly revise sinusoidal wave output circuit; described can the connection with described single-chip microcomputer by correction sinusoidal wave output circuit in parallel; described protective circuit can be connected by correction sinusoidal wave output circuit in parallel with described; described power-balance circuit be arranged on described dc high voltage generation circuit with described can correction sinusoidal wave output circuit in parallel between; described synchronizing signal transmitter/receiver circuit is provided with synchronous port, can in parallelly revise sinusoidal wave output circuit and be provided with interchange live wire output and exchange the zero line output.
It also includes temperature sensing circuit, input voltage detection circuit, high-voltage detecting circuit, principal and subordinate's testing circuit, live wire/zero line testing circuit, short-circuit detecting circuit and overload detection circuit, described temperature sensing circuit is connected with described single-chip microcomputer respectively with input voltage detection circuit, described single-chip microcomputer can be connected by correction sinusoidal wave output circuit in parallel with described by live wire/zero line testing circuit, short-circuit detecting circuit, overload detection circuit respectively, and described single-chip microcomputer produces circuit by described high-voltage detecting circuit and direct voltage and is connected.
The described sinusoidal wave output circuit of can in parallelly revising comprises that constituting first by first diode, first electric capacity and the first smooth lotus root device floats the ground operating circuit, second diode, second electric capacity and the second smooth lotus root device constitute the second floating ground operating circuit, the described first floating ground operating circuit provides cut-in voltage for the 25 field effect transistor and the 26 field effect transistor, and the described second floating ground operating circuit provides cut-in voltage for the 29 field effect transistor and the 30 field effect transistor;
First revises the sinewave output control signal output ends is connected with the base stage of the 18 triode by the 60 resistance, the collector electrode of the 18 triode is connected with the grid of the 27 field effect transistor by the 74 resistance, the collector electrode of the 18 diode is connected with the grid of the 28 field effect transistor by the 75 resistance, and first revises the break-make that the sinewave output control signal is controlled the 27 field effect transistor and the 28 field effect transistor; The drain electrode of the 27 field effect transistor is connected with described interchange live wire output with the drain electrode of the 28 field effect transistor;
Second revises the sinewave output control signal output ends is connected with the base stage of the 20 triode by the 63 resistance, the collector electrode of the 20 triode is connected with the grid of the 31 field effect transistor by the 78 resistance, the collector electrode of the 20 triode is connected with the grid of the 32 field effect transistor by the 79 resistance, and second revises the break-make that the sinewave output control signal is controlled the 31 field effect transistor and the 32 field effect transistor; The drain electrode of the 31 field effect transistor is connected with described interchange zero line output with the drain electrode of the 32 field effect transistor;
The 3rd revises the sinewave output control signal output ends is connected with the base stage of the 17 triode by the 59 resistance, the collector electrode of the 17 triode is connected with the negative input of the first smooth lotus root device, the 3rd revises the break-make that the sinewave output control signal is controlled the 25 field effect transistor and the 26 field effect transistor, and the source electrode of the 25 field effect transistor is connected with described interchange live wire output with the source electrode of the 26 field effect transistor;
The 4th revises the sinewave output control signal output ends is connected with the base stage of the 19 triode by the 62 resistance, and the collector electrode of the 19 triode is connected with the negative input of the second smooth lotus root device; The 4th revises the break-make that the sinewave output control signal is controlled the 29 field effect transistor and the 30 field effect transistor; The source electrode of the 29 field effect transistor is connected with described interchange zero line output with the source electrode of the 30 field effect transistor.
A kind of inverter system; but has the identical parallel connection power supply inverter of at least two structures; but described one of them parallel connection power supply inverter is the main frame inverter; but described all the other parallel connection power supply inverters are the slave inverter; but described parallel connection power supply inverter comprises single-chip microcomputer; protective circuit; dc high voltage generation circuit; warning circuit; power-balance circuit and synchronizing signal transmitter/receiver circuit; described protective circuit is connected with described single-chip microcomputer; described protective circuit is connected with described dc high voltage generation circuit; dc high voltage generation circuit is provided with direct-flow input end; described warning circuit is connected with described single-chip microcomputer; described synchronizing signal transmitter/receiver circuit is connected with described single-chip microcomputer; described single-chip microcomputer is connected with dc high voltage generation circuit; can in parallelly revise sinusoidal wave output circuit is connected with described single-chip microcomputer; described protective circuit can be connected by correction sinusoidal wave output circuit in parallel with described; described power-balance circuit be arranged on described dc high voltage generation circuit with described can correction sinusoidal wave output circuit in parallel between; described synchronizing signal transmitter/receiver circuit is provided with synchronous port; can in parallelly revise sinusoidal wave output circuit is provided with interchange live wire output and exchanges the zero line output; all synchronous ports all are connected to the one wire system synchronous bus; all interchange live wire outputs all are linked together, and described interchange zero line output all is linked together.
It comprises a DC power supply, but described DC power supply is connected with the direct-flow input end of all parallel connection power supply inverter simultaneously.
But each parallel connection power supply inverter is provided with DC power supply.
The single-chip microcomputer of described main frame inverter produces synchronizing signal and sends by the single line synchronous bus, and the single-chip microcomputer of slave inverter receives described synchronizing signal by the single line synchronous bus, and all inverters in the synchronizing signal assurance system can synchronous working.
Described synchronizing signal comprises the pulse of forward Synchronization Control, forward power switches set conducting control impuls, the pulse of forward power switches set closing control, the pulse of negative sense Synchronization Control, negative sense power switch group conducting control impuls and the pulse of negative sense power switch group closing control, described forward power switches set conducting control impuls is controlled the 27 field effect transistor, the 28 field effect transistor, the conducting of the 29 field effect transistor and the 30 field effect transistor, the 27 field effect transistor is controlled in the pulse of described forward power switches set closing control, the 28 field effect transistor, closing of the 29 field effect transistor and the 30 field effect transistor, negative sense power switch group conducting control impuls is controlled the 25 field effect transistor, the 26 field effect transistor, the conducting of the 31 field effect transistor and the 32 field effect transistor, the 25 field effect transistor is controlled in the pulse of negative sense power switch group closing control, the 26 field effect transistor, closing of the 31 field effect transistor and the 32 field effect transistor.
Compared with prior art, but advantage of the present invention is in parallel use of a plurality of shunt choppers can be formed inverter system, but single shunt chopper also can use separately.The Maximum Power Output of single inverter is 2500W, also can be other big or small power, and it is fixed to come as required.The use in parallel of 10 inverters can be arranged at most at present, so can improve the output gross power greatly after the parallel connection, this is that present inverter of the same type is beyond one's reach at all.
Synchronizing signal interrupts detecting, many main frames are provided with functions such as error detection, the detection of fiery zero line connection error owing to have in inverter that can be in parallel, therefore system be linked and packed and the process of debugging in, assurance equipment can not damage because of artificial mistake.
But in the inverter system of forming by a plurality of shunt choppers, an inverter main frame can only and must be arranged.Inverter main frame and inverter slave structurally are identical, the synchronous port of each inverter in the system (Syn) all hangs on the single line synchronous bus, and the interchange live wire output of each inverter links to each other with the live wire of bus, and the interchange zero line output of each inverter links to each other with the zero line of bus.The negative terminal of each inverter direct-flow input end needs to link together by lead, and anode can separate, and also can link together, so both can have been offered different inverters in the system by different DC power supply; Also can use very flexible by same DC power supply to all inverter power supplies.
In an inverter system, when work except that the inverter main frame must be opened, other inverter slave can be determined the quantity that need open according to the operating position of load, therefore uses very conveniently, and can reduce the non-loaded power consumption of system to greatest extent.
Synchronization pulse is simple in structure efficient, therefore need only not need 8 single-chip microcomputers (MCU) just can meet the demands as the control chip of inverter with expensive DSP process chip, greatly reduces Products Development and production cost.
Description of drawings
But Fig. 1 is the structure chart of parallel connection power supply inverter of the present invention;
Fig. 2 is the structure chart of inverter system of the present invention;
Fig. 3 be of the present invention can the structure chart of revising sinusoidal wave output circuit in parallel;
But Fig. 4 be two parallel connection power supply inverters of the present invention can the equivalent structure figure that revises sinusoidal wave output circuit in parallel;
Fig. 5 is the synchronizing signal sequential chart of single line synchronous bus of the present invention.
Embodiment
Embodiment describes in further detail the present invention below in conjunction with accompanying drawing.
But a kind of parallel connection power supply inverter; it comprises that model is the single-chip microcomputer 1 of SN2722; protective circuit 3; dc high voltage generation circuit 5; warning circuit 11; power-balance circuit 14 and synchronizing signal transmitter/receiver circuit 13; protective circuit 3 is connected with single-chip microcomputer 1; protective circuit 3 is connected with dc high voltage generation circuit 5; dc high voltage generation circuit 5 is provided with direct-flow input end; warning circuit 11 is connected with single-chip microcomputer 1; synchronizing signal transmitter/receiver circuit 13 is connected with single-chip microcomputer 1; single-chip microcomputer 1 is connected with dc high voltage generation circuit 5; it comprises can in parallelly revise sinusoidal wave output circuit 2; can in parallelly revise sinusoidal wave output circuit 2 is connected with single-chip microcomputer 1; protective circuit 3 with can in parallel revise sinusoidal wave output circuit 2 and be connected; power-balance circuit 14 be arranged on dc high voltage generation circuit 5 with can correction sinusoidal wave output circuit 2 in parallel between; synchronizing signal transmitter/receiver circuit 13 is provided with synchronous port Syn, can in parallelly revise sinusoidal wave output circuit 2 and be provided with interchange live wire output terminals A C-L and exchange zero line output terminals A C-N.
It also includes temperature sensing circuit 9, input voltage detection circuit 7, high-voltage detecting circuit 4, principal and subordinate's testing circuit 12, live wire/zero line testing circuit 6, short-circuit detecting circuit 8 and overload detection circuit 10, temperature sensing circuit 9 is connected with single-chip microcomputer 1 respectively with input voltage detection circuit 7, single-chip microcomputer 1 is respectively by live wire/zero line testing circuit 6, short-circuit detecting circuit 8, overload detection circuit 10 and can in parallelly revise sinusoidal wave output circuit 2 and is connected, and single-chip microcomputer 1 is connected by high-voltage detecting circuit 4 and direct voltage generation circuit 5.
It is set that live wire/zero line testing circuit 6, principal and subordinate's testing circuit 12 aim at inverter parallel operation pattern.It is set that synchronizing signal generation receiving circuit, power-balance circuit aim at inverter parallel operation pattern.But each circuit module of parallel connection power supply inverter is coordinated control by single-chip microcomputer and is carried out work.
Can in parallelly revise sinusoidal wave output circuit 2 and comprise that constituting first by the first diode D1, the first electric capacity E1 and the first smooth lotus root device U1 floats the ground operating circuit, the second diode D2, the second electric capacity E1 and the second smooth lotus root device U2 constitute the second floating ground operating circuit, the first floating ground operating circuit provides cut-in voltage for the 25 field effect transistor Q25 and the 26 field effect transistor Q26, and the second floating ground operating circuit provides cut-in voltage for the 29 field effect transistor Q29 and the 30 field effect transistor Q30;
First revises sinewave output control signal output ends W1 is connected with the base stage of the 18 triode Q18 by the 60 resistance R 60, the collector electrode of the 18 triode Q18 is connected with the grid of the 27 field effect transistor Q27 by the 74 resistance R 74, the collector electrode of the 18 diode Q18 is connected with the grid of the 28 field effect transistor Q28 by the 75 resistance R 75, and first revises the break-make that the sinewave output control signal is controlled the 27 field effect transistor Q27 and the 28 field effect transistor Q28; The drain electrode of the 27 field effect transistor Q27 is connected with interchange live wire output terminals A C-L with the drain electrode of the 28 field effect transistor Q28;
Second revises sinewave output control signal output ends W2 is connected with the base stage of the 20 triode Q20 by the 63 resistance R 63, the collector electrode of the 20 triode Q20 is connected with the grid of the 31 field effect transistor Q31 by the 78 resistance R 78, the collector electrode of the 20 triode Q20 is connected with the grid of the 32 field effect transistor Q32 by the 79 resistance R 79, and second revises the break-make that the sinewave output control signal is controlled the 31 field effect transistor Q31 and the 32 field effect transistor Q32; The drain electrode of the 31 field effect transistor Q31 is connected with interchange zero line output terminals A C-N with the drain electrode of the 32 field effect transistor Q32;
The 3rd revises sinewave output control signal output ends W3 is connected with the base stage of the 17 triode Q17 by the 59 resistance R 59, the collector electrode of the 17 triode Q17 is connected with the negative input of the first smooth lotus root device U1, the 3rd revises the break-make that the sinewave output control signal is controlled the 25 field effect transistor Q25 and the 26 field effect transistor Q26, and the source electrode of the 25 field effect transistor Q25 is connected with interchange live wire output terminals A C-L with the source electrode of the 26 field effect transistor Q26;
The 4th revises sinewave output control signal output ends W4 is connected with the base stage of the 19 triode Q19 by the 62 resistance R 62, and the collector electrode of the 19 triode Q19 is connected with the negative input of the second smooth lotus root device U2; The 4th revises the break-make that the sinewave output control signal is controlled the 29 field effect transistor Q29 and the 30 field effect transistor Q30; The source electrode of the 29 field effect transistor Q29 is connected with interchange zero line output terminals A C-N with the source electrode of the 30 field effect transistor Q30.
But each circuit of shunt chopper is described in conjunction with Fig. 1: single-chip microcomputer 1 (MCU), but be the control core of parallel connection power supply inverter, collect detected various information, and produce various control signals; The 2nd, revise sinusoidal wave inverter output circuit, direct current is changed into alternating current, its structural requirement can be in parallel; The 3rd, protective circuit, time protection power inverter and load are not damaged by improper use at inverter; The 4th, high-voltage detecting circuit MCU adjusts the pulse duration of output AC electricity automatically according to the size of high direct voltage, guarantees to make the effective value of alternating current of output constant in certain scope; 5 is the high direct voltage booster circuit, and the Dc low voltage power supply of input by high frequency conversion, is converted to high direct voltage.6 is fiery zero line testing circuit, and whether the output fire zero line that detects each inverter in the inverter system connects consistent; 7 is input voltage detection circuit, the scope whether voltage of detection input DC power is being stipulated; 8 is short-circuit detecting circuit, whether detects output by short circuit; 9 is temperature sensing circuit, detects the working temperature of inverter; 10 is overload detection circuit, and whether the power output that detects inverter over proof value; 11 is warning circuit, represents different failure conditions with different sound; 12 is inverter master slave mode testing circuit, and detecting inverter is with host mode work or with slave mode work; The 13rd, synchronizing signal sends and receiving circuit, when inverter is worked with host mode, sends synchronizing signal.When working, receive synchronizing signal with slave mode; The 14th, the power-balance circuit is so that the power output equilibrium of the inverter of working in parallel system.
A kind of inverter system shown in Fig. 2; but have 10 parallel connection power supply inverters that structure is identical; but one of them parallel connection power supply inverter is the main frame inverter; but remaining parallel connection power supply inverter is the slave inverter; but the parallel connection power supply inverter comprises single-chip microcomputer 1; protective circuit 3; dc high voltage generation circuit 5; warning circuit 11; power-balance circuit 14 and synchronizing signal transmitter/receiver circuit 13; protective circuit 3 is connected with single-chip microcomputer 1; protective circuit 3 is connected with dc high voltage generation circuit 5; dc high voltage generation circuit 5 is provided with direct-flow input end; warning circuit 11 is connected with single-chip microcomputer 1; synchronizing signal transmitter/receiver circuit 13 is connected with single-chip microcomputer 1; single-chip microcomputer 1 is connected with dc high voltage generation circuit 5; can in parallelly revise sinusoidal wave output circuit 2 is connected with single-chip microcomputer 1; protective circuit 3 with can in parallel revise sinusoidal wave output circuit 2 and be connected; power-balance circuit 14 be arranged on dc high voltage generation circuit 5 with can correction sinusoidal wave output circuit 2 in parallel between; synchronizing signal transmitter/receiver circuit 13 is provided with synchronous port Syn; can in parallelly revise sinusoidal wave output circuit 2 is provided with interchange live wire output terminals A C-L and exchanges zero line output terminals A C-N; all synchronous port Syn are connected to the one wire system synchronous bus; all interchange live wire output terminals A C-L are connected with the live wire L of bus, and all interchange zero line output terminals A C-N are connected with the zero line N of bus.
It comprises a DC power supply, but DC power supply is given 10 parallel connection power supply inverter power supplies simultaneously.Also can be but that each parallel connection power supply inverter is provided with DC power supply.DC power supply is a battery pack.
Inverter system has perfect defencive function, mainly contains following several:
1. synchronizing signal is interrupted or error protection.When the synchronizing signal of certain inverter slave reception was interrupted or be wrong, this inverter cut off output immediately from chance, and reports to the police, and except allowing other inverter bear the power output, can not influence the operate as normal of other inverters in the system more.Slave detects synchronizing signal over time again, after synchronizing signal is normal, restarts output.
2. many Host Protections.When having in the system when being configured to the inverter main frame more than 1 power inverter, when then powering in system, the inverter main frame of a back startup can be reported to the police, and cuts off its output.
3. fiery zero line connection error protection.The slave of each inverter detects fiery zero line and is connected with the warning of mistaking in parallel system, and cuts off its output.
4. the too high or too low protection of input voltage.Each inverter in system detects the voltage of its direct-flow input end separately, reports to the police when input voltage is too high or too low, and cuts off its output.Concerning the inverter slave,, can not influence the operate as normal of other inverters in the system except allowing other inverter bear the power output more.And when the inverter Host Protection, can cut off the output of synchronizing signal, thereby allow all the inverter slaves in the system cut off its output because of obtaining synchronizing signal.
5. overload protection.Each inverter in system detects the power of its output separately, reports to the police after the value of power output above regulation, and cuts off its output.Concerning the inverter slave,, can not influence the operate as normal of other inverters in the system except allowing other inverter bear the power output more.And when the inverter Host Protection, can cut off the output of synchronizing signal, thereby allow all the inverter slaves in the system cut off its output because of obtaining synchronizing signal.
6. temperature protection.Each inverter in system detects its temperature inside separately, reports to the police after the value of internal temperature above regulation, and cuts off its output.Concerning the inverter slave,, can not influence the operate as normal of other inverters in the system except allowing other inverter bear the power output more.And when the inverter Host Protection, can cut off the output of synchronizing signal, thereby allow all the inverter slaves in the system cut off its output because of obtaining synchronizing signal.
7. short-circuit protection.Each inverter in system detects its output separately, reports to the police after detecting output short-circuit, and cuts off its output.
Above-mentioned owing to have perfect defencive function, improved the functional reliability and the useful life of system greatly.
In conjunction with Fig. 3, Fig. 4 and Fig. 5, the synchronisation control means of system, the single-chip microcomputer of main frame inverter produces synchronizing signal and sends by the single line synchronous bus, and the single-chip microcomputer of slave inverter receives synchronizing signal by the single line synchronous bus, and all inverters in the synchronizing signal assurance system can synchronous working.Synchronizing signal comprises forward Synchronization Control pulse t1, forward power switches set conducting control impuls t3, forward power switches set closing control pulse t5, negative sense Synchronization Control pulse t6, negative sense power switch group conducting control impuls t7 and negative sense power switch group closing control pulse t8, forward power switches set conducting control impuls t3 controls the 27 field effect transistor Q27, the 28 field effect transistor Q28, the conducting of the 29 field effect transistor Q29 and the 30 field effect transistor Q30, forward power switches set closing control pulse t5 controls the 27 field effect transistor Q27, the 28 field effect transistor Q28, the 29 field effect transistor Q29 and the 30 field effect transistor Q30 close, negative sense power switch group conducting control impuls t7 controls the 25 field effect transistor Q25, the 26 field effect transistor Q26, the conducting of the 31 field effect transistor Q31 and the 32 field effect transistor Q32, negative sense power switch group closing control pulse t8 controls the 25 field effect transistor Q25, the 26 field effect transistor Q26, the 31 field effect transistor Q31 and the 32 field effect transistor Q32 close.
Fig. 4 is that the parallel system with 2 inverters is the correction sinewave output of the example equivalent electric circuit that is connected in parallel.The empty frame in the left side is a main frame inverter output among the figure, and the empty frame in the right is a slave inverter output.Principal and subordinate's machine inverter structurally is duplicate, also can be used as the slave use because any one inverter in the system both can be used as main frame, has only a slave just passable as long as guarantee in a system.From scheming as seen, as if the inverter energy synchronous working that will make in the system, the logical and disconnected of the corresponding power switch group in principal and subordinate's machine must be complete synchronous.Among the figure, the 27 field effect transistor Q27 and the 28 field effect transistor Q28 that control by control signal W1 in the W1 switch representative graph 3; The 31 field effect transistor Q31 and the 32 field effect transistor Q32 that control by control signal W2 in the W2 switch representative graph 3; The 25 field effect transistor Q25 and the 26 field effect transistor Q26 that control by control signal W3 in the W3 switch representative graph 3; The 29 field effect transistor Q29 and the 30 field effect transistor Q30 that control by control signal W4 in the W4 switch representative graph 3.
Fig. 5 is the synchronizing signal sequential chart of single line synchronous bus, and synchronizing signal is produced by the inverter main frame, is received by the inverter slave.By synchronizing signal, all inverters in the assurance system can synchronous working.Synchronizing signal comprises 6 kinds of different information pulses, is respectively forward Synchronization Control pulse t1, the logical control impuls t3 of forward power switches set, forward power switches set pass control impuls t5, negative sense Synchronization Control pulse t6, the logical control impuls t7 of negative sense power packages, negative sense power switch group pass control impuls t8.Because information pulse is simple in structure efficient, therefore need only not need 8 single-chip microcomputers (MCU) just can meet the demands with expensive DSP process chip as the control chip of inverter, greatly reduce Products Development and production cost.
Claims (8)
1. but parallel connection power supply inverter; it comprises single-chip microcomputer; protective circuit; dc high voltage generation circuit; warning circuit; power-balance circuit and synchronizing signal transmitter/receiver circuit; described protective circuit is connected with described single-chip microcomputer; described protective circuit is connected with described dc high voltage generation circuit; dc high voltage generation circuit is provided with direct-flow input end; described warning circuit is connected with described single-chip microcomputer; described synchronizing signal transmitter/receiver circuit is connected with described single-chip microcomputer; described single-chip microcomputer is connected with dc high voltage generation circuit; it is characterized in that it comprises can in parallel revise sinusoidal wave output circuit; described can the connection with described single-chip microcomputer by correction sinusoidal wave output circuit in parallel; described protective circuit can be connected by correction sinusoidal wave output circuit in parallel with described; described power-balance circuit be arranged on described dc high voltage generation circuit with described can correction sinusoidal wave output circuit in parallel between; described synchronizing signal transmitter/receiver circuit is provided with synchronous port, can in parallelly revise sinusoidal wave output circuit and be provided with interchange live wire output and exchange the zero line output.
2. but a kind of parallel connection power supply inverter according to claim 1, it is characterized in that it also includes temperature sensing circuit, input voltage detection circuit, high-voltage detecting circuit, principal and subordinate's testing circuit, live wire/zero line testing circuit, short-circuit detecting circuit and overload detection circuit, described temperature sensing circuit is connected with described single-chip microcomputer respectively with input voltage detection circuit, described single-chip microcomputer is respectively by live wire/zero line testing circuit, short-circuit detecting circuit, overload detection circuit can be connected by correction sinusoidal wave output circuit in parallel with described, and described single-chip microcomputer produces circuit by described high-voltage detecting circuit and direct voltage and is connected.
3. but a kind of parallel connection power supply inverter according to claim 1, it is characterized in that the described sinusoidal wave output circuit of can in parallelly revising comprises that constituting first by first diode, first electric capacity and the first smooth lotus root device floats the ground operating circuit, second diode, second electric capacity and the second smooth lotus root device constitute the second floating ground operating circuit, the described first floating ground operating circuit provides cut-in voltage for the 25 field effect transistor and the 26 field effect transistor, and the described second floating ground operating circuit provides cut-in voltage for the 29 field effect transistor and the 30 field effect transistor;
First revises the sinewave output control signal output ends is connected with the base stage of the 18 triode by the 60 resistance, the collector electrode of the 18 triode is connected with the grid of the 27 field effect transistor by the 74 resistance, the collector electrode of the 18 diode is connected with the grid of the 28 field effect transistor by the 75 resistance, and first revises the break-make that the sinewave output control signal is controlled the 27 field effect transistor and the 28 field effect transistor; The drain electrode of the 27 field effect transistor is connected with described interchange live wire output with the drain electrode of the 28 field effect transistor;
Second revises the sinewave output control signal output ends is connected with the base stage of the 20 triode by the 63 resistance, the collector electrode of the 20 triode is connected with the grid of the 31 field effect transistor by the 78 resistance, the collector electrode of the 20 triode is connected with the grid of the 32 field effect transistor by the 79 resistance, and second revises the break-make that the sinewave output control signal is controlled the 31 field effect transistor and the 32 field effect transistor; The drain electrode of the 31 field effect transistor is connected with described interchange zero line output with the drain electrode of the 32 field effect transistor;
The 3rd revises the sinewave output control signal output ends is connected with the base stage of the 17 triode by the 59 resistance, the collector electrode of the 17 triode is connected with the negative input of the first smooth lotus root device, the 3rd revises the break-make that the sinewave output control signal is controlled the 25 field effect transistor and the 26 field effect transistor, and the source electrode of the 25 field effect transistor is connected with described interchange live wire output with the source electrode of the 26 field effect transistor;
The 4th revises the sinewave output control signal output ends is connected with the base stage of the 19 triode by the 62 resistance, and the collector electrode of the 19 triode is connected with the negative input of the second smooth lotus root device; The 4th revises the break-make that the sinewave output control signal is controlled the 29 field effect transistor and the 30 field effect transistor; The source electrode of the 29 field effect transistor is connected with described interchange zero line output with the source electrode of the 30 field effect transistor.
4. inverter system; but it is characterized in that having the identical parallel connection power supply inverter of at least two structures; but described one of them parallel connection power supply inverter is the main frame inverter; but described remaining parallel connection power supply inverter is the slave inverter; but described parallel connection power supply inverter comprises single-chip microcomputer; protective circuit; dc high voltage generation circuit; warning circuit; power-balance circuit and synchronizing signal transmitter/receiver circuit; described protective circuit is connected with described single-chip microcomputer; described protective circuit is connected with described dc high voltage generation circuit; dc high voltage generation circuit is provided with direct-flow input end; described warning circuit is connected with described single-chip microcomputer; described synchronizing signal transmitter/receiver circuit is connected with described single-chip microcomputer; described single-chip microcomputer is connected with dc high voltage generation circuit; can in parallelly revise sinusoidal wave output circuit is connected with described single-chip microcomputer; described protective circuit can be connected by correction sinusoidal wave output circuit in parallel with described; described power-balance circuit be arranged on described dc high voltage generation circuit with described can correction sinusoidal wave output circuit in parallel between; described synchronizing signal transmitter/receiver circuit is provided with synchronous port; can in parallelly revise sinusoidal wave output circuit is provided with interchange live wire output and exchanges the zero line output; all synchronous ports all are connected to the one wire system synchronous bus; all interchange live wire outputs all are linked together, and described interchange zero line output all is linked together.
5. a kind of inverter system according to claim 4 is characterized in that it comprises a DC power supply, but described DC power supply is connected with the direct-flow input end of all parallel connection power supply inverter simultaneously.
6. a kind of inverter system according to claim 4, but its feature is provided with DC power supply at each parallel connection power supply inverter.
7. the synchronisation control means of the described system of claim 4, the single-chip microcomputer that it is characterized in that described main frame inverter produces synchronizing signal by the transmission of single line synchronous bus, the single-chip microcomputer of slave inverter receives described synchronizing signal by the single line synchronous bus, and all inverters in the synchronizing signal assurance system can synchronous working.
8. the synchronisation control means of system according to claim 7, it is characterized in that described synchronizing signal comprises the pulse of forward Synchronization Control, forward power switches set conducting control impuls, the pulse of forward power switches set closing control, the pulse of negative sense Synchronization Control, negative sense power switch group conducting control impuls and the pulse of negative sense power switch group closing control, described forward power switches set conducting control impuls is controlled the 27 field effect transistor, the 28 field effect transistor, the conducting of the 29 field effect transistor and the 30 field effect transistor, the 27 field effect transistor is controlled in the pulse of described forward power switches set closing control, the 28 field effect transistor, closing of the 29 field effect transistor and the 30 field effect transistor, negative sense power switch group conducting control impuls is controlled the 25 field effect transistor, the 26 field effect transistor, the conducting of the 31 field effect transistor and the 32 field effect transistor, the 25 field effect transistor is controlled in the pulse of negative sense power switch group closing control, the 26 field effect transistor, closing of the 31 field effect transistor and the 32 field effect transistor.
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| CN2009100054655A CN101478257B (en) | 2008-12-04 | 2009-01-17 | Electric power inverter capable of parallel connection, inverter system and synchronization control method of the system |
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| CN2009100054655A CN101478257B (en) | 2008-12-04 | 2009-01-17 | Electric power inverter capable of parallel connection, inverter system and synchronization control method of the system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104578872A (en) * | 2015-01-13 | 2015-04-29 | 中国计量学院 | Wind energy, solar energy and hydrogen energy hybrid power generation parallel inverting control device |
| CN104811065A (en) * | 2015-01-28 | 2015-07-29 | 南通昱品通信科技有限公司 | High frequency synchronization device for parallel inverter and method thereof |
| CN105116815A (en) * | 2015-09-29 | 2015-12-02 | 上海十贝电子科技有限公司 | Cascaded trigger |
| CN108377667A (en) * | 2015-10-30 | 2018-08-07 | 法拉第未来公司 | Method and system for interconnecting IGBT module in parallel |
| CN114336991A (en) * | 2022-01-07 | 2022-04-12 | 重庆前卫无线电能传输研究院有限公司 | Multi-inverter parallel wireless energy transmission system synchronous control method and system |
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| CN102710160A (en) * | 2012-05-09 | 2012-10-03 | 江门佳宝利电子有限公司 | High frequency intelligent inversion device based on high frequency power source switch technology |
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| JP3968572B2 (en) * | 2002-06-07 | 2007-08-29 | サンケン電気株式会社 | Power converter with multiple inverters connected in parallel |
| JP2004297970A (en) * | 2003-03-28 | 2004-10-21 | Yuasa Corp | Parallel operation controller for inverter |
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| CN104578872A (en) * | 2015-01-13 | 2015-04-29 | 中国计量学院 | Wind energy, solar energy and hydrogen energy hybrid power generation parallel inverting control device |
| CN104811065A (en) * | 2015-01-28 | 2015-07-29 | 南通昱品通信科技有限公司 | High frequency synchronization device for parallel inverter and method thereof |
| CN105116815A (en) * | 2015-09-29 | 2015-12-02 | 上海十贝电子科技有限公司 | Cascaded trigger |
| CN108377667A (en) * | 2015-10-30 | 2018-08-07 | 法拉第未来公司 | Method and system for interconnecting IGBT module in parallel |
| CN114336991A (en) * | 2022-01-07 | 2022-04-12 | 重庆前卫无线电能传输研究院有限公司 | Multi-inverter parallel wireless energy transmission system synchronous control method and system |
| CN114336991B (en) * | 2022-01-07 | 2023-06-30 | 重庆前卫无线电能传输研究院有限公司 | Synchronous control method and system for multi-inverter parallel wireless energy transmission system |
| WO2024082252A1 (en) * | 2022-10-21 | 2024-04-25 | 中车株洲电力机车研究所有限公司 | Pulse synchronization control method for converter, and converter and readable storage medium |
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