CN101459691B - Method and system for realizing boundary clock in IEEE1588 protocol - Google Patents
Method and system for realizing boundary clock in IEEE1588 protocol Download PDFInfo
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- CN101459691B CN101459691B CN2008102415348A CN200810241534A CN101459691B CN 101459691 B CN101459691 B CN 101459691B CN 2008102415348 A CN2008102415348 A CN 2008102415348A CN 200810241534 A CN200810241534 A CN 200810241534A CN 101459691 B CN101459691 B CN 101459691B
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Abstract
The invention is applied in a synchronous network and provides a method for realizing a boundary clock in an IEEE1588 protocol and a system thereof. The system comprises a data receiving module which is used to receive a data message sent by an upper grade synchronous network, a received data processing module which is used to analyze time information in the data message received by the data receiving module and to recover the synchronous clock of the upper grade synchronous network, a sent data processing module which is used to pack the synchronous clock into a data packet according to a format of a PTP protocol, and a data sending module which is used to send the data packet which is packed by the sent data processing module to a next grade synchronous network, wherein the data receiving module, the received data processing module, the sent data processing module and the data sending module are used to process the message in turn. The system concretely realizes that the synchronous clock which is synchronous with the upper grade synchronous network and the boundary clock which enables the next grade synchronous network to be synchronous with the synchronous clock are obtained.
Description
Technical field
The invention belongs to Network Synchronization clock field, relate in particular to the method and system of boundary clock in a kind of IEEE1588 of realization agreement.
Background technology
Ethernet since its opening good, be widely used and lower-price characteristic the existing trend that further is applied to industry spot.And one of key obstacle that is widely used in industry spot be some industry spot to clock synchronization require high.The IEEE1588 agreement is a kind of comparatively accurate clock synchronization solution in the Ethernet, and its basic function is that other clocks in the distributed network are kept synchronously with precision clock.Defined a kind of Precision Time Protocol (Precision Time Protocol in the IEEE1588 agreement; Hereinafter to be referred as PTP), it is synchronous to be used for adopting clock in transducer, actuator and the other-end equipment of distributed bus system of multicasting technologies to carry out the submicrosecond level to standard ethernet or other.
Ordinary clock is a kind of PTP entity.In network, ordinary clock can be used as master clock (master clock) or from clock (slave clock).When as master clock, its PTP port is in major state (master), and its PTP port is in from state (slave) as from clock the time.In order to guarantee the precision of PTP agreement time synchronized, master clock and between clock the time-delay during pass-along message want equity.But in the network of reality, when switch or router were arranged when master clock with between clock, the time-delay of PTP protocol message will change a lot.Therefore, for the better precision that guarantees PTP agreement time synchronized, just be necessary hop-by-hop support PTP agreement, that is to say the two ends of each physical connection body that will make whole clock chain circuit, an end is the master clock of PTP agreement, and the other end is from clock.Boundary clock can be used for realizing above-mentioned hop-by-hop support PTP agreement, to realize the time synchronized of whole network accurately as the clock transfer standard.
Summary of the invention
The objective of the invention is to overcome the weak point of prior art, the method and system of boundary clock in a kind of IEEE1588 of realization agreement are provided, make whole clock chain circuit hop-by-hop support the PTP agreement.
The present invention is achieved in that the system of boundary clock in a kind of IEEE1588 of realization agreement, and said system comprises the sequence processing data message:
Data reception module is used to receive upper level synchronizing network data sent message;
Receive data processing module, be used for parsing the temporal information of the data message that said data reception module receives, and recover the synchronised clock of upper level synchronizing network;
Send data processing module, be encapsulated into said synchronised clock in the packet according to the PTP protocol format;
Data transmission blocks is used to send packet to the next stage synchronizing network of said transmission data processing module encapsulation.
Another object of the present invention is to provide the method for boundary clock in a kind of IEEE1588 of realization agreement, said method comprises the following steps:
Step 1 is resolved the data message from the upper level synchronizing network, obtains synchronised clock;
Step 2 is encapsulated into said synchronised clock in the packet of issuing the next stage synchronizing network according to the PTP protocol format.
Beneficial effect of the present invention is, through the data reception module that is used to receive upper level synchronizing network data sent message that connects in order; Be used for parsing the temporal information of the data message that said data reception module receives, and recover the reception data processing module of the synchronised clock of upper level synchronizing network; Be encapsulated into the transmission data processing module in the packet to said synchronised clock according to the PTP protocol format; Be used to send the data transmission blocks of packet to the next stage synchronizing network of said transmission data processing module encapsulation.Thereby specifically realized the boundary clock in the IEEE1588 agreement.
Description of drawings
Fig. 1 is the embodiment of the invention realizes boundary clock in synchronizing network a networking mode sketch map;
Fig. 2 is the embodiment of the invention realizes boundary clock in Data Receiving and process of transmitting a structured flowchart;
Fig. 3 is the system configuration sketch map that the embodiment of the invention realizes boundary clock;
Fig. 4 is the method flow diagram of the realization boundary clock of the embodiment of the invention.
Embodiment
In order to make the object of the invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
In embodiments of the present invention, physical connection body receiving terminal receives the packet of sending here in the upper level Synchronization Network, parses temporal information then, and the upper level synchronizing network obtains synchronised clock synchronously; With reference to above-mentioned synchronised clock, send the packet that contains temporal information at data sending terminal, supply next stage network and this physical connection body synchronous.Thereby on the physical connection body, realize boundary clock.
Fig. 1 is the embodiment of the invention realizes boundary clock in synchronizing network a networking mode sketch map, and a kind of network configuration of synchronizing network of application boundary clock has been shown among the figure.First order master clock is synchronized with global positioning system, dipper system or other high accuracy clock sources; Boundary clock at different levels then play the effect of bridge and tie, time of master clock is synchronized to from clock step by step, thereby realizes the whole network time synchronized.As boundary clock, have two ports at least, a port is used for the master clock of synchronous upper level; A port is used for supplying next stage from clock synchronization; Boundary clock is not limited to two ports again simultaneously, and it can comprise a plurality of data sends and receiving port, connects a plurality of synchronizing networks simultaneously.Like this, come hop-by-hop to support the IEEE1588 agreement, can the time of the master clock of the first order accurately be synchronized to each from clock, use for terminal equipment through boundary clock.
Fig. 2 is the embodiment of the invention realizes boundary clock in Data Receiving and process of transmitting structured flowchart, and the system configuration of the realization boundary clock that the embodiment of the invention provides has been shown among the figure.This system configuration can be integrated in the physical connection body in the synchronous network such as router, switch.For the ease of describing, only show the part relevant here with the present invention.
The system that realizes boundary clock comprises: the data reception module 201 that is used for receiving upper level synchronizing network data sent message that connects successively, be used to parse the temporal information of the data message that said data reception module 201 receives; And the data transmission blocks 204 that recovers the reception data processing module 202 of the synchronised clock of upper level synchronizing network, is encapsulated into said synchronised clock transmission data processing module 203 in the packet according to the PTP protocol format and is used to send packet to the next stage synchronizing network of said transmission data processing module 203 encapsulation.The above-mentioned module that connects has successively formed data channel; The physical connection body can carry out clock synchronization with the upper level synchronizing network through this data channel; Obtain synchronised clock, communicate according to synchronised clock and next stage synchronizing network then, make next stage synchronizing network and this synchronised clock synchronous.
The system that realizes boundary clock also comprises: interconnective be used for the synchronised clock of upper level synchronizing network be distributed to intrasystem transmission data processing module clock distribution module 210, be used to identify the Data Receiving of being responsible for Data Receiving and handle the groove position of the groove position of veneer and the data sending processing veneer that responsible data are sent and calculate the groove position identification module 230 of the value that needs compensating tank position time delay and be used for the delay compensation module 220 of value compensating with reference to synchronised clock according to module time-delay and groove position time delay.Above-mentioned interconnected module has formed the internal system time channel, and the synchronised clock of internal system is optimized.
Fig. 2 also shows the system that realizes boundary clock carries out clock synchronization when work flow process.In the Ethernet data bag that the synchronizing network of upper level sends, contain temporal information, after data reception module 201 is received this packet, on give and receive data processing module 202.Receive data processing module 202 resolution data bags, and carry out time synchronized, obtain synchronised clock with the upper level synchronizing network.Then, send data processing module 203 and data transmission blocks 204 with reference to the synchronous next stage synchronizing network of this synchronised clock.
In the circuit of reality, each module is a position in System Backplane all.Groove position identification module 230 at first identifies and receives data processing module 202 and send the groove position of veneer correspondence in System Backplane, data processing module 203 place.In embodiments of the present invention, the concrete mode of identification slot position is with the example that is identified as of Fig. 3 simply illustrated the position of the corresponding veneer of each module in the System Backplane of side circuit.System Backplane 330 connects difference different groove position with 5 groove position beacon signal lines with different level in each groove position; After receiving the reception data processing single board 320 at data processing module place and sending the transmission data processing single board 310 insertion system backboards 330 at data processing module place; Groove position identification module 230 will read the level value of these 5 signals; Thereby know the groove position of sending data processing single board 310 places, in like manner, also can know the groove position that receives data processing single board 320.So again according to the reference data of actual measurement; Calculate the time delay that produces on the reference clock physical pathway: suppose that reception data processing module 202 is a to the time-delay of System Backplane 330; Time-delay on the System Backplane 330 between per two groove positions is b; Receiving groove position, data processing single board 320 place is M; Sending groove position, data processing single board 310 place is N, and System Backplane 330 is c to the time-delay of sending data processing module 203, and delay compensation module 220 can calculate this section time-delay and be: a+|M-N|*b+c.Time-delay compensates delay compensation module 220 to this section more then; The mechanism that delay compensation module 220 realizes is: the reference synchronizing clock signals that will compensate delay time; The cycle that amount of delay equals synchronizing clock signals with the value that will compensate poor; Be equivalent to like this shift to an earlier date phase place, realized remedying, thereby made the synchronised clock that sends data processing module 203 more accurate what physical link was delayed time with reference to synchronised clock.
At last; Delay compensation module 220 sends to the synchronised clock reference signal after compensating and sends data processing module 203; Send data processing module 203 according to the PTP agreement, send data to ethernet network, synchronously the next stage synchronizing network through data transmission blocks 204.
Need to prove: send data processing single board 310 among Fig. 3; 311; 312 is living on hardware with receiving data processing single board 320, and both can flexible configuration become to receive data processing single board or send data processing single board, thereby in system, cooperate the function of accomplishing boundary clock.A bit require emphasis in addition; Can a plurality of reception data processing single boards of flexible configuration in the system, be used for synchronous upper level network, also can dispose a plurality of transmission data processing single boards; Supply the next stage Network Synchronization; But at synchronization, can only have a reception data processing single board clock recovered effective, other send data processing single boards and all work with reference to this clock.
Fig. 4 shows the method flow of the realization boundary clock that the embodiment of the invention provides.In the physical connection body of real network; Integrated functional module includes and is used to resolve the data message from the upper level synchronizing network, obtain synchronised clock the reception data processing module, be used for said synchronised clock according to the PTP protocol format be encapsulated into the packet of issuing the next stage synchronizing network the transmission data processing module, synchronised clock is distributed to the delay compensation module that the clock distribution module that sends data processing module and compensation internal transmission are delayed time synchronised clock.
In step S401, resolve data message from the upper level synchronizing network, obtain synchronised clock; Concrete mode as stated.
In step S402, the distribution synchronised clock reaches the time delay that transmission causes to synchronised clock compensation internal circuit to sending data processing module;
Clock distribution module distribution synchronised clock sends data processing modules to interior all of physical connection body, can make the clock in the whole physical connection body all be synchronized with the upper level synchronizing network.The compensation inner time delay; Cause the time-delay of synchronised clock to compensate to the circuit in the physical connection body; Just give the synchronised clock of the time delay value compensation between the next stage synchronizing network, can make synchronised clock more accurate like this according to the data message and the transmission packet that receive from the upper level synchronizing network.Detailed process as stated.
In step S403, be encapsulated into said synchronised clock in the packet of issuing the next stage synchronizing network according to the PTP protocol format.
The packet of issuing the next stage synchronizing network can have a plurality of, and synchronised clock is distributed and is encapsulated in the packet.Detailed process as stated.
The above is merely preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of within spirit of the present invention and principle, being done, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (6)
1. a system that realizes boundary clock in the IEEE1588 agreement is characterized in that, said system comprises the sequence processing data message:
Data reception module is used to receive upper level synchronizing network data sent message;
Receive data processing module, be used for parsing the temporal information of the data message that said data reception module receives, and recover the synchronised clock of upper level synchronizing network;
Send data processing module, be encapsulated into said synchronised clock in the packet according to the PTP protocol format;
Data transmission blocks is used to send packet to the next stage synchronizing network of said transmission data processing module encapsulation;
Said system also comprises:
Groove position identification module is used to discern the Data Receiving of being responsible for Data Receiving and handles the groove position of veneer and the groove position of the data sending processing veneer that responsible data are sent, and calculates two time delay values between the groove position;
The delay compensation module; Transmit data to the time delay value of System Backplane according to said time delay value, reception data processing module; And System Backplane transmits data to the summation of the time delay value of the compensation of sending data processing module; Synchronised clock is compensated, offer the transmission data processing module to the synchronised clock after the compensation then.
2. system according to claim 1 is characterized in that said transmission data processing module and data transmission blocks have more than one.
3. system as claimed in claim 2 is characterized in that said system also comprises the clock distribution module, is used for the synchronised clock that said reception data processing module recovers is distributed to intrasystem transmission data processing module.
4. system according to claim 1 is characterized in that, also comprises other data reception module that is used to receive upper level synchronizing network data sent message.
5. a method that realizes boundary clock in the IEEE1588 agreement is characterized in that, said method comprises the following steps:
Step 1 is resolved the data message from the upper level synchronizing network, obtains synchronised clock;
Step 2 is encapsulated into said synchronised clock in the packet of issuing the next stage synchronizing network according to the PTP protocol format;
In said step 1, obtain after the synchronised clock, compensate said synchronised clock for the time delay value between the next stage synchronizing network according to the data message and the transmission packet that receive from the upper level synchronizing network;
Said time delay value specifically comprises:
Reception is handled the time delay value of veneer to System Backplane from the reception of the data message of upper level synchronizing network;
Receive groove position and the transmission of processing veneer in System Backplane according to identification and handle the groove position of veneer in System Backplane, the time delay value between two groove positions that calculate;
And System Backplane is to the time delay value that sends data processing module.
6. method as claimed in claim 5 is characterized in that, in said step 2, the said data of issuing the next stage synchronizing network are surrounded by a plurality of, and said synchronised clock is distributed and is encapsulated in the said packet.
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Families Citing this family (15)
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| CN101882990B (en) * | 2010-06-24 | 2014-08-13 | 中兴通讯股份有限公司 | Method for selecting master clock based on PTP (Picture Transfer Protocol) and link quality, slave clock and system |
| CN101895384A (en) * | 2010-07-07 | 2010-11-24 | 中兴通讯股份有限公司 | Method and device for implementing boundary clock |
| CN101938318B (en) * | 2010-09-15 | 2013-02-27 | 中兴通讯股份有限公司 | Synchronous method, system and convergent ring device among devices in convergent network |
| CN102468898B (en) * | 2010-11-19 | 2016-03-30 | 中兴通讯股份有限公司 | The method, apparatus and system of time synchronized are realized in time division multiplex network |
| CN102546144A (en) * | 2010-12-30 | 2012-07-04 | 上海贝尔股份有限公司 | Method and device for synchronizing information |
| CN102611546B (en) * | 2011-01-25 | 2016-09-28 | 中兴通讯股份有限公司 | A kind of clock synchronization compliant with precision time protocol clean culture multicast hybrid clock system and clock synchronizing method |
| CN102916758B (en) * | 2012-10-10 | 2016-01-06 | 北京东土科技股份有限公司 | Ethernet time synchronism apparatus and the network equipment |
| CN103546273B (en) * | 2013-10-31 | 2017-01-18 | 烽火通信科技股份有限公司 | Frequency synchronism device and method based on PTP frames |
| CN104754724B (en) * | 2013-12-30 | 2018-12-04 | 上海诺基亚贝尔股份有限公司 | It is a kind of to realize clock synchronous method, apparatus and equipment in wireless access network |
| CN104022861A (en) * | 2014-06-24 | 2014-09-03 | 浙江大学 | Master clock competition method and master clock competition system |
| CN104618208A (en) * | 2015-01-26 | 2015-05-13 | 国电南瑞科技股份有限公司 | Elastic data interaction comprehensive bus system |
| CN105119775A (en) * | 2015-08-28 | 2015-12-02 | 国电南瑞科技股份有限公司 | Method for improving accuracy of Ethernet message transmission delay measurement |
| CN108170044A (en) * | 2016-12-07 | 2018-06-15 | 上海协同科技股份有限公司 | The device of time synchronization and its time synchronization implementation method between achievable module |
| CN110267200A (en) * | 2019-06-27 | 2019-09-20 | 合肥更鼓电子科技有限公司 | A kind of base station positioning method based on precise synchronization network |
| CN111600671A (en) * | 2020-04-10 | 2020-08-28 | 兖矿集团有限公司 | Time synchronization method and system |
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