CN101449311A - Method and system for light emitting device displays - Google Patents

Method and system for light emitting device displays Download PDF

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Publication number
CN101449311A
CN101449311A CN 200780013047 CN200780013047A CN101449311A CN 101449311 A CN101449311 A CN 101449311A CN 200780013047 CN200780013047 CN 200780013047 CN 200780013047 A CN200780013047 A CN 200780013047A CN 101449311 A CN101449311 A CN 101449311A
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China
Prior art keywords
pixel
transistor
display system
line
data
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CN 200780013047
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Chinese (zh)
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CN101449311B (en
Inventor
G·雷扎·查吉
阿罗基亚·内森
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伊格尼斯创新有限公司
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Priority to CA002536398A priority Critical patent/CA2536398A1/en
Priority to CA2,536,398 priority
Priority to CA2,547,671 priority
Priority to CA002547671A priority patent/CA2547671A1/en
Priority to CA002569156A priority patent/CA2569156A1/en
Priority to CA2,569,156 priority
Application filed by 伊格尼斯创新有限公司 filed Critical 伊格尼斯创新有限公司
Priority to PCT/CA2007/000192 priority patent/WO2007090287A1/en
Publication of CN101449311A publication Critical patent/CN101449311A/en
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Publication of CN101449311B publication Critical patent/CN101449311B/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0819Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/04Maintaining the quality of display appearance
    • G09G2320/043Preventing or counteracting the effects of ageing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0693Calibration of display systems

Abstract

The present invention provides a method and system for light emitting device displays. The system includes one or more pixels, each having a light emitting device, a drive transistor for driving the light emitting device, and a switch transistor for selecting the pixel; and a circuit for monitoring and extracting the change of the pixel to calibrate programming data for the pixel. Programming data is calibrated using the monitoring result.

Description

用于发光装置显示器的方法和系统 A method for a light emitting device and a display system

技术领域 FIELD

本发明涉及显示技术,更具体而言涉及关于发光装置显示器的方法和系统。 The present invention relates to display technologies, methods and systems relating to the lighting device and more specifically relates to a display.

背景技术 Background technique

电致发光显示器已经被广泛地用于诸如蜂窝电话等各种设备。 Electroluminescent displays have been widely used in various devices such as cellular phones and the like. 特别是, especially,

利用非晶硅(a-Si)、多晶硅、有机或其他驱动背板的有源矩阵有机发光二极管(AMOLED)显示器,由于诸如切实可行的灵活显示、制造成本较低、分别率高和宽视角等优点,而变得更有吸引力。 Amorphous silicon (a-Si), polycrystalline silicon, organic, or other driving backplane of an active matrix organic light emitting diode (AMOLED) display, since such flexible displays feasible, low manufacturing cost, wide viewing angle and high res advantage, become more attractive.

AMOLED显示器包括多行多列的像素的的阵列,每个像素具有有机发光二极管(OLED)和布置在行和列阵列中的背板电子装置。 The AMOLED display includes an array of multiple rows of pixels of a plurality of columns, each pixel having an organic light emitting diode (OLED) and backplane electronics array of rows and columns are arranged. 因为OLED是电流驱动器件,所以AMOLED的像素电路应能提供精确且恒定的驱动电流。 Because the OLED is a current driven device, the pixel circuit of the AMOLED should provide accurate and constant drive current.

需要提供一种能够高精度地提供恒定亮度的方法和系统。 Desirable to provide a method and system capable of providing constant brightness with high accuracy.

发明内容 SUMMARY

本发明的目的是提供能够避免或消除现有系统的至少一个缺点的方法和系统。 Object of the present invention is to provide a method and system capable of at least one of the disadvantages of existing systems to avoid or eliminate.

根据本发明的一个方面,提供一种包括一个或多个像素的显示系统。 According to one aspect of the present invention, there is provided a display system comprising one or a plurality of pixels. 每个像素包括发光装置、用于驱动该发光装置的驱动晶体管以及用于选择该像素的开关晶体管。 Each pixel includes a light emitting means for driving the light emitting device and a transistor for selecting the pixel switching transistors. 该显示系统包括用于监视和提取(extract)像素变化以校准该像素的编程数据的电路。 The display system includes means for monitoring changes in the pixel extraction (Extract) programmed to calibrate the circuit of the pixel data.

根据本发明的另一方面,提供一种驱动显示系统的方法。 According to another aspect of the present invention, there is provided a method of driving a display system. 该显示系统包括一个或多个像素。 The display system includes one or more pixels. 该方法包括以下步骤:在提取周期(extraction cycle), 向像素提供操作信号、监视该像素中的节点、基于监视结果提取(extract) 像素的老化;以及在编程周期,基于对像素老化的提取来对编程数据进行校准并向该像素提供编程数据。 The method comprises the steps of: extraction cycle (extraction cycle), to provide the operation of the pixel signal, monitor the pixel node extraction aging (Extract) pixel based on the monitoring result; as well as the programming cycle, based on the pixel aging extraction to calibration program data and provide the pixel data programming.

5附图说明 BRIEF DESCRIPTION OF 5

通过以下参考附图所作出的描述,本发明的这些和其他特征将变得更加 By the following description made with reference to the accompanying drawings These and other features of the present invention will become more

明显,附图中: Obviously, the drawings:

图1示出了适当地应用了根据本发明实施例的像素操作技术的具有2个晶体管(2T)的像素电路的像素阵列的示例; FIG 1 shows an example of appropriate application of the pixel circuit of the pixel array having two transistor (2T) pixel manipulation techniques according to embodiments of the present invention;

图2示出了适当地应用了与图1相关的像素操作技术的具有2T像素电路的像素阵列的另一示例; FIG. 2 shows another example of appropriate application of an array of pixels having a 2T pixel circuit associated with the pixel of FIG. 1 manipulation techniques;

图3A示出了在提取操作(extraction operation)中应用于图1和2的像素电路的信号波形的示例; 3A shows an example of a signal waveform and applied to the pixel circuit 2 of FIG. 1 in the extraction operation (extraction operation); and

图3B示出了在正常操作中应用于图1和2的像素电路的信号波形的示 FIG 3B shows a signal waveform applied to the pixel and circuit 2 of Figure 1 is shown in normal operation

例; example;

图4示出了在图3A的提取周期中驱动晶体管的阈值电压的偏离对VDD FIG 4 shows a deviation of a threshold voltage in the extraction cycle in FIG. 3A VDD to the driving transistor

的电压的影响; The impact of voltage;

图5示出了具有图1或2的像素阵列的显示系统的示例; FIG 5 illustrates an example of a display system having the pixel array of FIG. 1 or 2; and

图6示出了用于驱动图5的像素阵列的正常和提取周期的示例; FIG 6 illustrates an example of a normal cycle, and extracting the pixel array of FIG. 5 is driven;

图7示出了适当地应用了根据本发明另一实施例的像素操作技术的3晶 FIG. 7 shows the proper application of crystalline 3-pixel operation technique according to another embodiment of the present invention,

体管(3T)像素电路的示例; Example transistor (3T) pixel circuit;

图8示出了适当地应用了与图7相关的像素操作技术的3T像素电路的 FIG 8 shows the proper application of 3T pixel circuit associated with the operation of FIG. 7 pixels art

另一示例; Another example;

图9A示出了在提取操作中应用于图7和8的像素电路的信号波形的示 9A shows a circuit diagram applied to the pixel of FIGS. 7 and 8 in the extraction operation of the signal waveform

例; example;

图9B示出了在正常操作中应用于图7和8的像素电路的信号波形的示 9B shows a diagram applied to the pixel circuit of FIG. 7 and 8 in the normal operation of the signal waveform

例; example;

图IO示出了具有图7或8的像素电路的显示系统的示例; 图IIA示出了用于驱动图10的像素阵列的正常和提取周期的示例; 图IIB示出了用于驱动图IO的像素阵列的正常和提取周期的另一示例; 图12示出了具有图7或8的像素电路的显示系统的另一示例; 图13示出了用于驱动图12的像素阵列的正常和提取周期的示例; 图14示出了适当地应用了根据本发明的又一实施例的像素操作技术的4晶体管(4T)像素电路的示例; FIG IO shows an example of a display system having the pixel circuit of FIG. 7 or 8; Figure IIA shows an example of a normal cycle of extracting and driving the pixel array of FIG. 10; FIG IIB shows a driving IO FIG. another example of a normal cycle and extraction of a pixel array; FIG. 12 shows another example of a display system having the pixel circuit of FIG. 7 or 8; Figure 13 shows a pixel array driver 12 of the normal and FIG. example of extracting cycle; FIG. 14 shows an example of appropriate application of the fourth transistor (4T) pixel circuit of the pixel technique according to yet another embodiment of the present invention;

图15示出了适当地应用了与图14相关的像素操作技术的4T像素电路的另一示例; FIG 15 shows another example of appropriate application of the 4T pixel circuit associated with the pixel 14 of FIG manipulation techniques;

图16A示出了在提取操作中应用于图14和15的像素电路的信号波形的示例; 16A shows an example of a signal waveform of the pixel circuit 14 and 15 in the extraction operation applied to the map;

图16B示出了在正常操作中应用于图14和15的像素电路的信号波形的示例; FIG 16B illustrates an example of a signal waveform of the pixel circuit 14 and 15 in normal operation is applied to map;

图17示出了具有图14或15的像素电路的显示系统的示例; FIG 17 illustrates an example of a display system having the pixel circuit of FIG. 14 or 15; and

图18示出了用于驱动图17的像素阵列的正常和提取周期的示例; FIG 18 illustrates an example of a normal cycle of extracting and driving the pixel array of FIG. 17;

图19示出了具有图14或15的像素电路的显示系统的另一示例; FIG 19 shows another example of a display system having the pixel circuit of FIG. 14 or 15; and

图20示出了用于驱动图19的像素阵列的正常和提取周期的示例; FIG 20 illustrates an example of a pixel array 19 of FIG driving and extracting a normal cycle;

图21示出了适当地应用了根据本发明的又一实施例的像素操作技术的 FIG 21 illustrates the pixel operations appropriately applied according to still another embodiment technique of the present invention.

3T像素电路的示例; Exemplary 3T pixel circuit;

图22示出了适当地应用了与图21相关的像素操作技术的3T像素电路 FIG. 22 shows the proper application of 3T pixel circuit associated with the pixel 21 of FIG manipulation techniques

的另一示例; Another example;

图23A示出了在提取操作中应用于图21和22的像素电路的信号波形的示例; 23A shows an example of a signal waveform applied to the pixel circuit of FIG. 21 and 22 in the extraction operation;

图23B示出了在正常操作中应用于图21和22的像素电路的信号波形的示例; FIG 23B illustrates an example of a signal waveform applied to the pixel circuit of FIG. 21 and 22 in normal operation;

图24示出了具有图21或22的像素电路的显示系统的示例; 图25A示出了用于驱动图24的像素阵列的正常和提取周期的示例; 图25B示出了用于驱动图24的像素阵列的正常和提取周期的另一示例; 图26示出了适当地应用了根据本发明又一实施例的像素操作技术的3T 像素电^^的示例; FIG 24 illustrates an example of a display system having the pixel circuit of FIG. 21 or 22; Figure 25A illustrates an example of a normal cycle of extracting and driving the pixel array of FIG. 24; FIG. 25B shows a drive 24 of FIG. another example of the normal cycle and extraction of a pixel array; FIG. 26 shows an example of appropriately applied according ^^ 3T pixel pixel electrode technique according to yet another embodiment of the present invention;

图27示出了适当地应用了与图26相关的像素操作技术的3T像素电路的另一示例; FIG 27 shows another example of appropriate application of 3T pixel circuit associated with the pixel 26 of FIG manipulation techniques;

图28A示出了在^:取操作中应用于图26和27的像素电路的信号波形的示例; FIG 28A shows ^: a signal waveform example of the pixel circuit 26 and 27 is applied in FIG fetch operation;

图28B示出了在正常操作中应用于图26和27的像素电路的信号波形的示例; FIG 28B illustrates an example of a signal waveform of the pixel circuit 26 and 27 in normal operation is applied to map;

图29示出了具有图26或27的像素电路的显示系统的示例; 图30示出用于驱动图29的像素阵列的正常和提取周期的示例; 图31A示出了在第j行和第i列具有读出能力的像素电路; 29 shows an example of a display system having the pixel circuit of FIG. 26 or 27; Figure 30 illustrates an example of a normal cycle of extracting and driving the pixel array of FIG. 29; FIG. 31A shows the j-th row and i-th column has a pixel readout circuit capacity;

7图31B示出了在第j行和第i列具有读出能力的另一像素电路; 图32示出了适当地应用了根据本发明的又一实施例的驱动技术的像素电路的示例; 7 FIG. 31B shows the j-th row and i-th column of the pixel circuits further have the ability to read out; FIG 32 shows an example of a pixel circuit driving technique in accordance with still another embodiment of the present invention is suitably applied;

图33示出了应用于图32的像素布置的信号波形的示例; 图34示出了适当地应用了与图32相关的驱动技术的像素电路的另一示 34 shows another view of the application of an appropriately associated with the pixel circuit 32 of FIG driving art; FIG. 33 shows an example of a signal waveform applied to a pixel arrangement of FIG. 32

例; example;

图35示出了应用于图34的像素布置的信号波形的示例; 图36示出了根据本发明的又一实施例的像素阵列的示例; 图37示出了使用图36的像素阵列的RGBW结构;以及图38示出了用于图37的像素电路的版图。 FIG 35 shows an example of a signal waveform applied to a pixel arrangement of FIG. 34; FIG. 36 shows an example of a pixel array according to yet another embodiment of the present invention; FIG. 37 shows a pixel array 36 of FIG RGBW structure; and FIG. 38 shows a layout of the pixel circuit 37 of FIG.

具体实施方式 Detailed ways

利用具有发光装置(例如,有机发光二极管(OLED))和多个晶体管的像素电路来描述本发明的实施例。 Using a light-emitting device (e.g., an organic light emitting diode (the OLED)) and a plurality of transistors of the pixel circuits described embodiments of the present invention. 以下实施例中的像素电路或显示系统中的晶体管可以是n型晶体管、p型晶体管或其组合。 The following example of a pixel circuit in the display system or transistor may be n-type transistors, p-type transistors or combinations thereof. 以下实施例中的像素电路或显示系统中的晶体管可以使用非晶硅、纳米/孩i晶硅、多晶硅、有机半导体技术(例如,有机TFT )、 NMOS/PMOS技术或CMOS技术(例如MOSFET ) 制造。 The following embodiments or examples of a pixel circuit in the display system may be a transistor using amorphous silicon, nano / child i crystalline silicon, polycrystalline silicon, organic semiconductors technologies (e.g. organic TFT), NMOS / PMOS technology or CMOS technology (e.g. MOSFET) manufactured . 具有像素电路的显示器可以是单色、多色或全色显示器,且可以包括一个或多于一个的电致发光(EL)元件(例如有机EL)。 A display having a pixel circuit may be a single color, multicolor or full color display, and may include one or more than one electroluminescence (EL) element (e.g., organic EL). 显示器可以是有源矩阵发光显示器(例如,AMOLED)。 The display may be an active matrix light emitting display (e.g., AMOLED). 显示器可以用在TV、 DVD、个人数字助理(PDA)、计算机显示器、蜂窝电话或其他应用中。 Display can be used in TV, DVD, personal digital assistant (PDA), computer displays, cell phones or other applications. 显示器可以是平板的。 The display may be a flat plate.

在下面的描述中,"像素电路"和"像素"可互换地使用。 In the following description, "pixel circuit" and "pixel" are used interchangeably. 在下面的描述中,术语"信号,,和"线"可互换地使用。在下面的描述中,术语"线,, 和"节点"可互换地使用。 In the following description, the term "signal ,, and" line "are used interchangeably in the following description, the term" line ,, and "node" are used interchangeably. 描述中,术语"选择线,,和"地址线"可互换地使用。在下面的描述中,"连接(或被连接)"和"耦合(或被耦合)"可互换地使用,且可以用于表示两个或更多的元件彼此直接或间接地物理地或电学接触。描述中,第i行和第j列的像素(电路)可以被称为位置(i, j)处的像素(电路)。 Description, the term "selection lines,, and" address lines "are used interchangeably in the following description," connect (or connected) "and" couple (or coupled) "are used interchangeably, and It may be used to indicate that two or more elements are in direct or indirect physical or electrical contact. description, the i-th row and the pixel (circuit) j-th column may be referred to as a pixel at the position (i, j) (circuit).

图1示出了适当地应用了根据本发明实施例的像素操作技术的具有2个晶体管(2T)像素电路的像素阵列的示例。 FIG 1 shows an example of appropriate application of the pixel array having two transistor (2T) technique pixel pixel circuit according to an embodiment of the present invention. 图1的像素阵列10包括以"n"行和"m"列布置的多个像素电路12。 The pixel array 10 of FIG. 1 comprises a plurality of pixel circuits 12 "n" rows and "m" columns arranged. 在图1中,示出了第i行的像素电路12。 In FIG 1, illustrates a pixel circuit 12 of the i-th row.

每个像素电路12包括OLED 14、存储电容器16、开关晶体管18和驱动晶体管20。 Each pixel circuit 12 includes OLED 14, a storage capacitor 16, the switching transistor 18 and driving transistor 20. 驱动晶体管20的漏极端子连接到相应行的电源线(例如VDD(i)),且驱动晶体管20的源极端子连接到OLED 14。 The drain terminal of the driving transistor 20 is connected to the power line in the row (e.g., VDD (i)), and the driving source terminal of the transistor 20 is connected to the OLED 14. 开关晶体管18的一个端子连接到相应列的数据线(例如VDATA(1),…,或VDATA(m)),且开关晶体管18的另一端子连接到驱动晶体管20的栅极端子。 A terminal of the switch transistor 18 is connected to the corresponding column data lines (e.g. VDATA (1), ..., or VDATA (m)), and the other terminal of the switching transistor 18 is connected to the gate terminal of the driving transistor 20. 开关晶体管18 的栅极端子连接到用于相应行的选择线(例如SEL(i))。 The gate terminal of the switching transistor 18 is connected to a respective row select line (e.g., SEL (i)). 存储电容器16的一个端子连接到驱动晶体管20的栅极端子,且存储电容器16的另一端子连接到OLED 14和驱动晶体管20的源极端子。 One terminal of the storage capacitor 16 is connected to the gate terminal of the driving transistor 20, and the other terminal of the storage capacitor 16 is connected to the source terminal of the OLED 14 and the driving transistor 20. OLED 14连接在电源(例如,地) 和驱动晶体管20的源极端子之间。 OLED 14 is connected between the power supply (e.g., ground) and the source terminal of the driving transistor 20. 如下所述,通过监视电源线VDD(i)的电压来提取像素电路12的老化。 As described below, the pixel extracting circuit 12 by the voltage monitoring aging of the power supply line VDD (i) a.

图2示出了适当地应用了与图1相关的像素操作技术的具有2T像素电路的像素阵列的另一示例。 FIG. 2 shows another example of appropriate application of an array of pixels having a 2T pixel circuit associated with the pixel of FIG. 1 manipulation techniques. 图2的像素阵列30类似于图1的像素阵列10。 Array of pixels of pixel array 30 of FIG. 2 is similar to FIG 10. 像素电路阵列30包括布置成"n"行和"m"列的多个像素电路32。 Pixel circuit array 30 includes a plurality of pixel circuits 32 arranged in "n" rows and "m" columns. 在图2 中,示出了第i行的像素电路32。 In Figure 2, shows a pixel circuit 32 of the i-th row.

每个像素电路32包括OLED 34、存储电容器36、开关晶体管38和驱动晶体管40。 Each pixel circuit 32 includes OLED 34, a storage capacitor 36, the switching transistor 38 and driving transistor 40. OLED 34对应于图1的OLED14。 OLED14 OLED 34 corresponding to FIG. 存储电容器36对应于图1 的存储电容器16。 The storage capacitor 36 corresponds to the storage capacitor 16 of FIG. 1. 开关晶体管38对应于图1的开关晶体管18。 Switching the switching transistor 38 corresponds to transistor 18 of FIG. 驱动晶体管40对应于图1的驱动晶体管20。 Driving the drive transistor 40 corresponds to transistor 20 of FIG. 1.

驱动晶体管40的源极端子连接到用于相应行的电源线(例如VSS(i)), 且驱动晶体管40的漏极端子连接到OLED 34。 The source terminal of the driving transistor 40 is connected to the power supply line for a respective row (e.g., VSS (i)), and the driving drain terminal of transistor 40 is connected to the OLED 34. 开关晶体管38的一个端子连接到用于相应列的数据线(例如,VDATA(1),…,或VDATA(m)),且开关晶体管38的另一端子连接到驱动晶体管40的栅极端子。 A terminal of the switch transistor 38 is connected to a corresponding column data lines (e.g., VDATA (1), ..., or VDATA (m)), and the other terminal of the switch transistor 38 is connected to the gate terminal of the driving transistor 40. 存储电容器34的一个端子连接到驱动晶体管40的栅极端子,且存储电容器34的另一端子连接到相应的电源线(例如,VSS(i))。 One terminal of the storage capacitor 34 is connected to the gate terminal of the driving transistor 40, and the other terminal of the storage capacitor 34 is connected to a respective power supply line (e.g., VSS (i)). OLED34连接到电源和驱动晶体管40的漏极端子之间。 OLED34 40 between the drain terminal connected to the power supply and the driving transistor. 如下所述,通过监视电源线VSS(i)的电压来提取像素电路的老化。 As described below, to the aging of the pixel circuit monitors the voltage extracted by the power supply line VSS (i) a.

图3A示出了在提取操作中应用于图1和2的像素电路的信号波形的示例。 3A shows an example of a signal waveform and applied to the pixel circuit 2 of FIG 1 in the extraction operation. 图3B示出了在正常操作中应用于图1和2的像素电路的信号波形的示例。 FIG 3B shows an example of a signal waveform and applied to the pixel circuit 2 of FIG. 1 in normal operation. 在图3A中,VDD(i)是对应于图1的VDD(i)的电源线/信号,而VSS(i)是对应于图2的VSS(i)的电源线/信号。 In Figure 3A, VDD (i) corresponding to VDD (i) in FIG. 1 power line / signal, VSS (i) corresponding to VSS (i) in FIG. 2 power / signal. "Ic"是施加到正被校准的位置(i, j) 处的像素的VDD(i)的恒定电流。 "Ic" VDD pixel is (i) a constant current is applied to the location being calibrated (i, j) at. 由于电流Ic在VDD(i)线上产生的电压是(VCD + △ VCD ),其中VCD是电i?各的DC偏置点,而△ VCD是OLED电压和驱动晶体管(图1的20或图2的40)的阈值电压中的;^文大的偏移。 Since the current Ic in the voltage VDD (i) line is produced (VCD + △ VCD), which is electrically VCD I? DC bias point of each, and △ VCD is an OLED and a driving voltage of transistor 20 (FIG. 1 or FIG. ^ text large offset; 40 2) of the threshold voltage.

参考图1、 2和3A,通过监视电源线(图1的VDD(i)或图2的VSS(i)) 来提取位置(i,j)处的像素的老化。 Referring to FIG 1, and 2. 3A, by monitoring the power supply line (VDD FIG. 1 (i) or the VSS (i) in FIG. 2) extracts the pixel at the position of aging (i, j). 图3A中的对于位置(i,j)处的像素的操作包括第一和第二提取周期50和52。 Figure 3A for the pixel at position (i, j) of the operating cycle comprises a first and a second extraction 50 and 52. 在第一提取周期50中,位置(i,j) 处的像素中的驱动晶体管(图1的20或图2的40)的4册极端子被充电到校准电压VCG。 In the first extraction cycle 50, the driving transistor of the pixel at the position (i, j) (20 of FIG. 1 or 40 of FIG. 2) of the terminal 4 is charged to the calibration voltage VCG. 该校准电压VCG包括基于原先的老化数据计算的老化预测和偏置电压。 The calibration voltage VCG bias voltage and including aging prediction calculations based on the original data aging. 而且,在第一提取周期中,第i行的另一像素电路被编程为零。 Further, in the first extraction cycle, the i-th row of pixel circuits further being programmed to zero.

在第二提取周期52中,SEL(i)变为零,且使得位置(i,j)处的像素中的驱动晶体管(图1的20或图2的40 )的^f册极电压受到诸如电荷注入(charge injection)和时钟馈通(clock feed-through)之类的动态效应的影响。 In the second extraction cycle 52, SEL (i) becomes zero, and such voltage ^ f album position (i, j) (40 20 of FIG. 1 or FIG. 2) in the pixel by the driving transistor such as effect of charge injection (charge injection), and dynamic effects of the clock feedthrough (clock feed-through) or the like. 在该周期中,驱动晶体管(图1的20或图2的40)用作放大器,因为用通过第i 行的电源线(图1的VDD(i)或图2的VSS(i))的恒定电流将它偏置。 In this period, the driving transistor (201 of FIG. 2 or FIG. 40) as an amplifier, because the i-th row by using the power supply line (VDD FIG. 1 (i) or VSS in FIG. 2 (i)) of the constant the bias current it. 因此, 位置(i,j)处的像素中的驱动晶体管(图l的20或图2的40)的阈值电压(VT)的偏移的效应被放大,且电源线(图1的VDD(i)或图2的VSS(i)) 的电压相应地改变。 Accordingly, the driving transistor in a pixel position (i, J) at (20 or FIG. L, 402) is the threshold voltage (VT) of the effects of the offset is amplified, and the power supply line (VDD FIG. 1 (i VSS) or Fig. 2 (i)) of the voltage changes accordingly. 因此,该方法能够提取极小量的VT偏移,从而使校准能够非常精确。 Thus, the method can extract an extremely small amount VT offset so that the calibration can be very precise. VDD(i)或VSS(i)的变化被监视。 Change VDD (i) or VSS (i) is monitored. 然后,用VDD(i)或VSS(i) 的变化来对编程数据进行校准。 Then, the program data is calibrated by the change VDD (i) or VSS (i) a.

参考图1、 2和图3B,位置(i,j)处的像素的正常操作包括编程周期62 和驱动周期64。 1, 2 and 3B, the normal operation of the pixel at the position (i, j) comprises a programming cycle and a driving cycle 62 64. 在编程周期62中,通过使用监视结果(例如,VDD或VSS 的(一种或多种)变化),位置(i,j)处的像素中的驱动晶体管(图1的20 或图2的40)的栅极端子充电到校准的编程电压Vcp。 In programming cycle 62 by using the monitoring result (eg, VDD or VSS of (one or more) variations), the pixel at the position (i, j) of the driving transistor 4020 (FIG. 1 or FIG. 2 ) is charged to the gate terminal of the calibration programming voltage Vcp. 该电压Vcp通过像素的灰度和老化(例如,涉及灰度的电压和在校准周期中提取的老化之和)定义。 The voltage Vcp of the pixel grayscale and aging (e.g., gray-scale voltage and involving extraction in a calibration period and the aging) is defined. 接下来,在驱动周期64中,选择线SEL(i)为低(low),且位置(i, j) 处的像素中的驱动晶体管(图1的20或图2的40)为位置(i,j)处的像素中的OLED (图1的14或图2的34 )提供电流。 Next, in the driving period 64, the SEL select lines (i) a low (Low), and the location (i, j) (40 20 of FIG. 1 or FIG. 2) in the pixel drive transistor for the location (i pixel j) at the OLED (34 in FIG. 1 or 14 of FIG. 2) to provide a current.

图4示出了在图3A的提取周期中驱动晶体管的阈值电压中的偏移(VT 偏移)对电源线VDD的电压的影响。 FIG 4 illustrates a threshold voltage extraction cycle of FIG. 3A driving transistor in shift (VT shift) on the voltage supply line VDD. 对于本领域技术人员而言,很明显, 驱动晶体管可以提供合理增益,从而使小VT偏移的提取成为可能。 To those skilled in the art, it is clear that the driving transistor may provide reasonable gain, so that it becomes possible to extract a small offset VT.

10图5示出了具有图1或2的像素阵列的显示系统的示例。 10 FIG. 5 shows an example of a display system having the pixel array of FIG. 1 or 2 of. 图5的显示系统1000包括具有多个像素1004的像素阵列1002。 The display system 1000 of FIG. 5 includes a pixel array having a plurality of pixels 1004 1002. 在图5中,示出了4个像素1004。 In Figure 5, it shows four pixels 1004. 不过,像素1004的数量可以根据系统设计变化,而不局限于4个。 However, the number of pixels 1004 may vary depending on the system design, without being limited to four. 像素1004可以是图1的像素电路12或图2的像素电路32。 Pixel 1004 may be pixel circuits 12 or 32 of FIG 2 FIG. 像素阵列1002 是有源矩阵发光显示器,且可以形成AMOLED显示器。 1002 pixel array is an active matrix light emitting display, and may form an AMOLED display.

SEL(k) (k=i,i+l )是用于选择第k行的选择线,且对应于图1和图2的SEL(i)。 SEL (k) (k = i, i + l) for selecting k-th row selection line, and corresponds to and SEL (i) of FIG. 1 FIG. V(k)是电源线,且对应于图1的VDD(j)和图2的VSS(j)。 V (k) is a power supply line, and corresponds to a VDD (j) of FIG. 1 and VSS (j) of FIG. VDATA(l) (l=j,j+l )是数据线,且对应于图1和图2的VDATA(l),…,VDATA(m)其中之一。 VDATA (l) (l = j, j + l) is a data line, and corresponds to VDATA (l) in FIG. 1 and FIG. 2, ..., (m) one VDATA. SEL(k)和V(k)在像素阵列1002的公共行像素中共享使用。 SEL (k) and V (k) shared in common row of the pixel array 1002 of pixels. VDATA(l) 在像素阵列1002的公共列像素中共享使用。 VDATA (l) shared common column pixels in pixel array 1002.

栅极驱动器1006驱动SEL(k)和V(k)。 The gate driver 1006 drives SEL (k) and V (k). 栅极驱动器1006包括用于为SEL(k)提供地址信号的地址驱动器。 The gate driver 1006 includes a SEL (k) provides an address signal to the address driver. 栅极驱动器1006包括用于驱动V(k)和监视V(k)的电压的监视器1010。 The gate driver 1006 includes a monitor 1010 for driving a voltage V (k) monitoring and V (k) of the. V(k)被适当地激励,以用于图3A和图3B 的操作。 V (k) is appropriately energized for operation of FIGS. 3A and 3B. 数据驱动器1008产生编程数据,并驱动VATA(l)。 The data driver 1008 generates programming data, and drives VATA (l). 提取器块1014 基于VDD(i)上产生的电压计算像素的老化。 Extracting block 1014 calculates the pixel aging voltage generated on VDD (i) based. 使用监视结果(例如,数据线V(X)的变化)校准VDATA①。 Using the monitoring results (e.g., data lines V (X) variation) calibration VDATA①. 监视结果可被提供给控制器1012。 Monitoring result may be provided to the controller 1012. 栅极驱动器1006、控制器1012、提取器1014或其组合可以包括用于存储监视结果的存储器。 A gate driver 1006, the controller 1012, extracts, or combinations 1014 may include a memory for storing the result of the monitoring. 如上所述,控制器1012控制驱动器1006和1008以及提取器1014, 以驱动像素1004。 As described above, the controller 1012 controls the driver 1006 and 1008 and an extractor 1014, 1004 to drive the pixels. 图3A和3B的电压Vco、Vcp是通过使用列驱动器产生的。 3A and the voltage Vco 3B, Vcp is generated by using the column driver.

图6示出了用于驱动图5的像素阵列1002的正常和提取周期的示例。 FIG 6 illustrates an example of a pixel array of FIG. 5 normal driving period 1002 and extraction. 在图6中,ROWi (i=l,2,...)其中每一个代表第i行,"P"代表编程周期, 且对应于图3B的60; "D"代表驱动周期,且对应于图3B的62; "E1"代表第一提取周期,且对应于图3A的50;且"E2"代表第二提取周期,且对应于图3A的52。 In FIG. 6, ROWi (i = l, 2, ...) each of which represents the i-th row, "P" on behalf of the programming cycle, and corresponds to 60 of FIG. 3B; "D" represents the drive period, and corresponds to the 3B, FIG. 62; "E1" represents the first extraction period, and corresponds to 50 in FIG. 3A; and "E2" represents the second extraction period, and corresponds to 52 in FIG. 3A. 提取可在消隐时间(blanking time)中在每个帧的结尾处发生。 Extraction can occur in the blanking period (blanking time) at the end of each frame. 在该时间中,可以提取若干像素的老化。 In this time, the aging of a number of pixels may be extracted. 而且,可在所有像素都是OFF的若干帧之间可以插入额外的帧。 Further, additional frames may be inserted between several frames of all the pixels are OFF. 在该帧中,可以不影响图像质量地提取若干像素的老化。 In the frame, a plurality of pixel aging can be extracted without compromising image quality.

图7示出了适当应用了根据本发明另一实施例的像素操作技术的3晶体管(3T)像素电路的示例。 Figure 7 shows an example of a suitable application of the third transistor (3T) pixel circuit of the pixel technique according to another embodiment of the present invention. 图7的像素电路70包括OLED72、存储电容器74、开关晶体管76以及驱动晶体管78。 The pixel circuit 70 of FIG 7 comprises OLED72, a storage capacitor 74, a switching transistor 76 and driving transistor 78. 像素电路70形成AMOLED显示器。 The pixel circuit 70 is formed AMOLED display.

驱动晶体管78的漏极端子连接到电源线VDD,且驱动晶体管78的源极端子连接到OLED 72。 The drain terminal of the driving transistor 78 is connected to the power line VDD, and the source terminal of the driving transistor 78 is connected to the OLED 72. 开关晶体管76的一个端子连接到数据线VDATA, 且开关晶体管76的另一端子连接到驱动晶体管78的栅极端子。 A terminal of the switch transistor 76 is connected to a data line VDATA, and the other terminal of the switch transistor 76 is connected to the gate terminal of the driving transistor 78. 开关晶体管76的栅极端子连接到第一选择线SEL1。 The gate terminal of the switch transistor 76 is connected to the first select line SEL1. 存储电容器74的一个端子连接到驱动晶体管78的栅极端子,且存储电容器74的另一端子连接到OLED 72和驱动晶体管78的源极端子。 One terminal of the storage capacitor 74 is connected to the gate terminal of the driving transistor 78, and the other terminal of the storage capacitor 74 is connected to the source terminal of the OLED 72 and the driving transistor 78.

为像素电路70提供传感晶体管(sensing transistor) 80 。 A pixel circuit provided for the sense transistor (sensing transistor) 80 70. 晶体管80可以被包括在像素电路70中。 Transistor 80 may be included in the pixel circuit 70. 晶体管80的一个端子连接到输出线VOUT,且晶体管80的另一端子连接到驱动晶体管78的源极端子和OLED 72。 A terminal of the transistor 80 is connected to the output line VOUT, and the transistor 80 is connected to the other terminal of the driving transistor 78 and the source terminal of OLED 72. 晶体管80的栅极端子连接到第二选择线SEL2。 The gate terminal of the transistor 80 is connected to the second select line SEL2.

像素电路70的老化是通过监视输出线VOUT的电压来提取的。 Aging of the pixel circuit 70 by monitoring the output voltage VOUT to line extraction. 在一个示例中,VOUT可以独立于VDATA。 In one example, VOUT may be independent VDATA. 在另一示例中,VOUT可以是用于物理邻接列(行)的数据线VDATA。 In another example, VOUT may be used to physically adjacent columns (rows) of the data line VDATA. SEL1用于编程,而SEL1和SEL2用于提取像素老化。 SEL1 for programming, while SEL1 and SEL2 for extracting pixel aging.

图8示出了适当地应用了与图7相关的像素操作技术的3T像素电路的另一示例。 FIG 8 shows another example of appropriate application of 3T pixel circuit associated with the pixel of FIG. 7 manipulation techniques. 图8的像素电路90包括OLED92、存储电容器94、开关晶体管96以及驱动晶体管98。 90 pixel circuit of Figure 8 comprises OLED92, a storage capacitor 94, a switching transistor 96 and driving transistor 98. OLED 92对应于图7的OLED 72。 OLED 92 in FIG. 7 corresponds to the OLED 72. 存储电容器94 对应于图7的存储电容器74。 The storage capacitor 94 of FIG. 7 corresponds to the storage capacitor 74. 晶体管96和98对应于图7的晶体管76和78。 Transistors 96 and 98 in FIG. 7 corresponding to the transistors 76 and 78. 像素电路卯形成AMOLED显示器。 D AMOLED display pixel circuit is formed.

驱动晶体管98的源极端子连接到电源线VSS,且驱动晶体管98的漏极端子连接到OLED 92。 The driving transistor 98 is connected to the source terminal of the power supply line VSS, and the drain terminal of the driving transistor 98 is connected to the OLED 92. 开关晶体管96连接在数据线VDATA和驱动晶体管98的栅极端子之间。 The switching transistor 96 is connected between the gate terminal of the driving transistor and a data line VDATA 98. 开关晶体管96的栅极端子连接到第一选择线SEL1。 The gate terminal of the switching transistor 96 is connected to the first select line SEL1. 存储电容器94的一个端子连接到驱动晶体管98的栅极端子,且存储电容器94 的另一端子连接到VSS。 A storage capacitor terminal 94 is connected to the gate terminal of the driving transistor 98, and the other terminal of the storage capacitor 94 is connected to VSS.

为像素电路90提供传感晶体管100。 A pixel circuit provided for the sense transistor 10090. 晶体管100可以被包括在像素电路90中。 The transistor 100 may be included in the pixel circuit 90. 晶体管100的一个端子连接到输出线VOUT,且晶体管100的另一端子连接到驱动晶体管98的漏极端子和OLED 92。 A terminal of the transistor 100 is connected to the output line VOUT, and the other terminal of the transistor 100 is connected to the drain terminal of the driving transistor 92 and OLED 98. 晶体管100的栅极端子连接到第二选择线SEL2。 The gate terminal of the transistor 100 is connected to the second select line SEL2.

通过监视输出线VOUT的电压提取像素电路90的老化。 Aging by the pixel extraction circuit 90 monitors the voltage of the output line VOUT. 在一个示例中, VOUT可以独立于VDATA。 In one example, VOUT may be independent VDATA. 在另一示例中,VOUT可以是用于物理邻接列(行)的数据线VDATA。 In another example, VOUT may be used to physically adjacent columns (rows) of the data line VDATA. SEL1用于编程,而SEL1和SEL2用于提取像素老化。 SEL1 for programming, while SEL1 and SEL2 for extracting pixel aging. 图9A示出了在提取操作中应用于图7和8的像素电路的信号波形的示例。 9A shows an example of a signal waveform of the pixel circuit 7 and 8 in the extraction operation applied to the FIG. 图9B示出了在正常操作中应用于图7和8的像素电路的信号波形的示例。 FIG 9B illustrates an example of a signal waveform of the pixel circuit 7 and 8 in normal operation is applied to FIG.

参考7, 8和图9A,对于位置(i,j)处的像素的提取操作包括第一和第二提取周期110和112。 References 7, 8 and 9A, the position of the pixel at (i, j) extraction operation comprises first and second extraction cycles 110 and 112. 在第一提取周期110中,驱动晶体管(图7的78或图8的98 )的栅极端子被充电到校准电压Vcg。 In the first extraction cycle 110, the driving transistor (FIG. 78 or 988 in FIG. 7) the gate terminal is charged to a calibration voltage Vcg. 该校准电压VCG包括基于原先的老化数据计算的老化预测。 The calibration voltage VCG aging comprises aging the original prediction based on the calculated data. 在第二提取周期112中,第一选择线SEL1 变为零,使得驱动晶体管(图7的78或图8的98)的栅极电压被包括电荷注入和时钟馈通(clock feed-through)的动态效应所影响。 In the second extraction cycle 112, the first select line SEL1 becomes zero, so that the drive transistor (78 of FIG. 8 or FIG. 7 98) comprises a gate voltage is a charge injection and clock feedthrough (clock feed-through) of the influence of dynamic effects. 在第二提取周期112中,驱动晶体管(图7的78或图8的98)用作放大器,因为用通过VOUT 的恒定电流(Ic )将它偏置。 In the second extraction cycle 112, the driving transistor (98 of FIG. 78 or FIG. 7) is used as an amplifier, because by using VOUT constant current (Ic) to offset it. 由于施加到VOUT上的电流Ic而在VOUT上出现的电压为(VCD+AVCD)。 Since the current Ic is applied to the voltage on VOUT occurs in VOUT is (VCD + AVCD). 因此,像素的老化被放大,且VOUT的电压相应地变化。 Thus, the pixel aging is amplified, and the voltage VOUT varies accordingly. 因此,该方法能够提取极小量的阈值电压(VT)偏移,从而能实现高度精确的校准。 Thus, the method can extract an extremely small amount of the threshold voltage (VT) shift, thereby achieving highly accurate calibration. VOUT中的变化被监视。 Change in VOUT is monitored. 然后,VOUT中的(一个或多个)变化用于编程数据的校准。 Then, (s) a change in VOUT programming data for calibration.

而且,通过在提取周期中向OLED施加电流/电压,可以提取OLED的电压/电流,且系统确定OLED的老化因素,且用它来更精确地校准照明数据。 Further, by applying a current / voltage to the OLED during the extraction period may be extracted OLED voltage / current, and the factors determining the aging of an OLED systems, and use it to more accurately calibrate illumination data.

参考图7、 8和9B,用于位置(i,j)处的像素的正常操作包括编程周期120和驱动周期122。 7, 8 and 9B, the normal operation of the pixel at a position (i, j) comprises a programming cycle and a driving cycle 120 122. 在编程周期120中,通过使用监视结果(例如,VOUT 的变化),驱动晶体管(图7的78或图8的98 )的栅极端子被充电到校准的编程电压Vcp。 In the programming cycle 120, by using the monitoring results (e.g., VOUT changes), the driving transistor (FIG. 78 or 988 in FIG. 7) the gate terminal is charged to a calibrated programming voltage Vcp. 接下来,在驱动周期122中,选择线SEL1为低,且驱动晶体管(图7的78或图8的98 )为OLED (图7的72或图8的92 )提供电流。 Next, in the driving cycle 122, the select line SEL1 is low, and the drive transistor (78 or 98 of FIG 7 FIG. 8) to (72 of FIG. 8 or 92 of FIG. 7) to provide the OLED current.

图IO示出了具有图7或8的像素电路的显示系统的示例。 FIG IO shows an example of a display system having the pixel circuit of FIG. 7 or 8 in. 图IO的显示系统1020包括^^素阵列1022,该像素阵列1022具有以行和列的形式排列的多个像素1004。 FIG IO ^^ display system 1020 includes pixel array 1022, the pixel array 1022 having a plurality of pixels 1004 are arranged in rows and columns. 在图10中,示出了4个像素1024。 In FIG 10, it illustrates four pixels 1024. 不过,像素1024的数量可以根据系统设计变化,而不局限于4个。 However, the number of pixels 1024 may vary depending on the system design, without being limited to four. 像素1024可以是图7的像素电路70或图8的像素电路90。 1024 pixel may be a pixel circuit of the pixel circuit 90 of FIG. 7 or FIG. 8 70. 像素阵列1022是有源矩阵发光显示器,且可以是AMOLED显示器。 1022 pixel array is an active matrix light emitting display, and may be an AMOLED display.

SELl(k) (k=i, i+l )是用于选#^第k行的第一选4奪线,且对应于图7和 SELl (k) (k = i, i + l) ^ # is used to gate the first gate line 4 wins k-th row, and correspond to FIGS. 7 and

13图8的SEL1。 SEL1 13 of FIG. SEL2(k) (k=i,i+l )是用于选择第k行的第二选择线,且对应于图7和图8的SEL2。 SEL2 (k) (k = i, i + l) for selecting a second k-th row selection line, SEL2 and corresponds to FIG. 7 and FIG. 8. VOUT(l) (l=j, j+1 )是用于第1列的输出线,且对应于图7和图8的VOUT。 VOUT (l) (l = j, j + 1) is an output line of the first column, and corresponds to a VOUT of FIGS. 7 and 8. VDATA(l)是用于第1列的数据线,且对应于图7和图8的VDATA。 VDATA (L) is a data line of the first column, and corresponds to VDATA of FIGS. 7 and 8.

栅极驱动器1026驱动SELl(k)和SEL2(k)。 The gate driver 1026 drives SELl (k) and SEL2 (k). 栅极驱动器1026包括用于为SELl(k)和SEL2(k)^是供地址信号的地址驱动器。 1026 includes a gate driver to SELl (k) and SEL2 (k) ^ is the address signal for the address driver. 数据驱动器1028产生编程数据,并驱动VATA(l)。 The data driver 1028 generates programming data, and drives VATA (l). 数据驱动器1028包括用于驱动和监视VOUT(I) 的电压的监视器1030。 The data driver 1028 includes a monitor 1030 for monitoring and driving voltage VOUT (I) a. 提取器块1034基于VOUT(i)上产生的电压计算像素的老化。 Extracting block 1034 based on a voltage generated in the VOUT (i) calculate the pixel aging. VDATA(1)和V0UT(1)被适当地激励,以用于图9A和9B的操作。 VDATA (1) and V0UT (1) is appropriately energized for operating FIGS. 9A and 9B. 使用监视结果(例如,VOUT(l)的变化)来校准VDATA(l)。 Using the monitoring results (e.g., VOUT (l) changes) calibrated VDATA (l). 监视结果可被提供给控制器1032。 Monitoring result may be provided to the controller 1032. 数据驱动器1028、控制器1032、提取器1034或其组合可包括用于存储监视结果的存储器。 A data driver 1028, the controller 1032, extracts, or combinations 1034 may include a memory for storing the result of the monitoring. 如上所述,控制器1032控制驱动器1026 和1028以及提取器1034,以驱动^象素1004。 As described above, the controller 1032 controls the driver 1026 and 1028 and an extractor 1034 to drive the pixels 1004 ^.

图IIA和11B示出了用于驱动图10的像素阵列的正常和提取周期的两个示例。 FIG IIA and 11B illustrate two examples of normal and extraction cycle for driving the pixel array 10 of FIG. 在图IIA和11B中,ROWi (i=l,2,...)其中每一个代表第i行, "P"代表编程周期,且对应于图9B的120; "D"代表驱动周期,且对应于图9B的122; "E1"代表第一提取周期且对应于图9A的110;且"E2"代表第二才是取周期,且对应于图9A的112。 In FIGS. 11B and IIA, ROWi (i = l, 2, ...) each of which represents the i-th row, "P" on behalf of the programming cycle, and corresponds to 120 of FIG. 9B; "D" represents the drive period, and FIG. 9B corresponds to 122; "E1" represents the first extraction cycle and corresponds to 110 of FIG. 9A; and "E2" represents the second period is taken, and corresponds to 112 of FIG. 9A. 在图IIA中,4是if又可在消隐时间中在每个帧的结尾处发生。 In the FIG IIA, if 4 is in turn occurs at the end of the blanking time of each frame. 在该时间中,可以提取若干像素的老化。 In this time, the aging of a number of pixels may be extracted. 而且, 可在所有像素都是OFF的若千帧之间插入额外的帧。 Further, additional frames may be inserted between one thousand if all the pixels are OFF. 在该帧中,可以不影响图像质量地提取若干像素的老化。 In the frame, a plurality of pixel aging can be extracted without compromising image quality. 图IIB示出了可以并行于编程周期完成提取的情况。 FIG IIB shows a case parallel to the extraction of the program cycle.

图12示出了具有图7或8的像素电路的显示系统的另一示例。 FIG 12 shows another example of a display system having the pixel circuit of FIG. 7 or 8 in. 图12的显示系统1040包括具有以行和列的形式排列的多个像素1044的像素阵列1042。 The display system 1040 of FIG. 12 includes a pixel array 1044 having a plurality of pixels 1042 are arranged in rows and columns. 显示系统1040类似于图10的显示系统1020。 Display system 1040 is similar to display system 1020 of FIG. 10. 在图12中,数据线VDATA(j+1 )用作监视像素的老化的输出线VOUT(j)。 In FIG. 12, a data line VDATA (j + 1) as a monitoring aging of the pixel output line VOUT (j).

栅极驱动器1046与图10的栅极驱动器1026相同或相类似。 The same as the gate driver and the gate driver 1046 of FIG. 10 1026, or similar. 栅极驱动器1046包括用于为SELl(k)和SEL2(k)提供地址信号的地址驱动器。 The gate driver 1046 includes a SELl (k) and SEL2 (k) provides an address signal to the address driver. 数据驱动器1048产生编程数据并驱动VDATA(l)。 The data driver 1048 generates programming data and drives VDATA (l). 数据驱动器1048包括用于监视VDATA(1)的电压的监视器1050。 The data driver 1048 includes a monitor 1050 for monitoring a voltage VDATA (1) is. VDATA(1)被适当地激励,以用于图9A和9B的操作。 VDATA (1) is appropriately energized for operating FIGS. 9A and 9B. 提取器块1054基于VDATA(1)上产生的电压计算像素的老化。 Extracting block 1054 calculates the pixel based on a voltage generated on aging (1) VDATA.

14使用监视结果(例如,VDATA(1)的变化)校准VDATA(l)。 14 using the monitoring results (e.g., change VDATA (1)) of the calibration VDATA (l). 监视结果可被提供给控制器1052。 Monitoring result may be provided to the controller 1052. 数据驱动器1048、控制器1052、提取器1054或其组合可包括用于存储监视结果的存储器。 A data driver 1048, the controller 1052, extracts, or combinations 1054 may include a memory for storing the result of the monitoring. 如上所述,控制器1052控制驱动器1046 和1048以及提取器1054,以驱动像素1004。 As described above, the controller 1052 controls the driver 1046 and 1048 and an extractor 1054, 1004 to drive the pixels.

图13示出用于驱动图12的像素阵列1042的正常和提取周期的示例。 FIG 13 illustrates an example of a pixel array 12 of FIG driving and extracting a normal cycle 1042. 在图13中,R0Wi(i=l,2,...)其中每一个代表第i行,"P"代表编程周期, 且对应于图9B的120; "D"代表驱动周期,且对应于图9B的122; "E1" 代表第一提取周期,且对应于图9A的110;且"E2"代表第二提取周期, 且对应于图9A的112。 In FIG 13, R0Wi (i = l, 2, ...) each of which represents the i-th row, "P" on behalf of the programming cycle, and corresponds to 120 of FIG. 9B; "D" represents the drive period, and corresponds to the FIG. 9B 122; "E1" represents the first extraction period, and corresponds to 110 of FIG. 9A; and "E2" represents the second extraction period, and corresponds to 112 of FIG. 9A. 提取可在消隐时间中在每个帧的结尾处发生。 Extraction can occur during the blanking time at the end of each frame. 在该时间中,可以提取若干像素的老化。 In this time, the aging of a number of pixels may be extracted. 而且,可在所有像素都是OFF的若干帧之间插入额外的帧。 Further, additional frames may be inserted between several frames of all the pixels are OFF. 在该帧中,可不影响图像质量地提取若干像素的老化。 In this frame, several pixels may not affect the image quality aging extracted.

图14示出了适当地应用了根据本发明的又一实施例的像素操作技术的4晶体管(4T)像素电路的示例。 FIG 14 shows an example of appropriate application of the fourth transistor (4T) pixel circuit of the pixel technique according to yet another embodiment of the present invention. 图14的像素电路130包括OLED 132、存储电容器134、开关晶体管136以及驱动晶体管138。 FIG 14 includes a pixel circuit 130 OLED 132, a storage capacitor 134, switching transistor 136 and a driver transistor 138. 像素电路130形成AMOLED显示器。 The pixel circuit 130 is formed AMOLED display.

驱动晶体管138的漏极端子连接到OLED 132,且驱动晶体管138的源极端子连接到电源线VSS (例如,地)。 The drain terminal of the driving transistor 138 is connected to the OLED 132, and the driving source terminal of the transistor 138 is connected to the power line VSS (e.g., ground). 开关晶体管136的一个端子连接到数据线VDATA,且开关晶体管136的另一端子连接到驱动晶体管138的栅极端子。 A terminal of the switch transistor 136 is connected to a data line VDATA, and the other terminal of the switch transistor 136 is connected to the gate terminal of the driving transistor 138. 开关晶体管96的栅极端子连接到选择线SLE[j]。 The gate terminal of the switching transistor 96 is connected to select line SLE [j]. 存储电容器134 的一个端子连接到驱动晶体管138的栅极端子,且存储电容器134的另一端子连接到VSS。 One terminal of the storage capacitor 134 is connected to the gate terminal of the driving transistor 138, and the other terminal of the storage capacitor 134 is connected to VSS.

为像素电路130提供传感网络(sensing network) 140。 A pixel circuit provided for the sensor network (sensing network) 140 130. 网络140可以被包括在像素电路130中。 Network 140 may be included in the pixel circuit 130. 电路140包括晶体管142和144。 Circuit 140 includes transistors 142 and 144. 晶体管142和144 串联连接在驱动晶体管138的漏极端子和输出线VOUT之间。 Transistors 142 and 144 connected in series between the drain terminal of the driving transistor 138 and the output line VOUT. 晶体管142 的栅极端子连接到选择线SEL[j+l]。 The gate terminal of the transistor 142 is connected to select line SEL [j + l]. 晶体管144的栅极端子连接到选择线SEL[jl]。 The gate terminal of the transistor 144 is connected to select line SEL [jl].

选择线SEL[k] (k=jl,j,j+l )可以是用于像素阵列的第k行的地址线, 选择线SEL口-1]或SEL[j + l]可以被SEL[j]代替,其中,当SEL[jl]和SEL[j+l] 信号为ON时,SEL[j]为ON。 Select line SEL [k] (k = jl, j, j + l) can be used to address line k-th row of the pixel array, port select line SEL -1] or SEL [j + l] may be SEL [J ] in place, wherein, when SEL [jl] and SEL [j + l] signal is ON, SEL [j] to ON.

通过监视输出线VOUT的电压提取像素电路130的老化。 Aging of the pixel circuit 130 is extracted by the voltage monitoring output line VOUT. 在一个示例中, VOUT可以独立于VDATA。 In one example, VOUT may be independent VDATA. 在另一示例中,VOUT可以是用于物理邻接列 In another example, VOUT may be a physically contiguous columns

15(行)的数据线VDATA。 15 (rows) of the data line VDATA.

图15示出了适当地应用了与图14相关的像素操作技术的4T像素电路的另一示例。 FIG 15 shows another example of appropriate application of the 4T pixel circuit associated with the pixel 14 of FIG manipulation techniques. 图15的像素电路150包括OLED 152、存储电容器154、开关晶体管156以及驱动晶体管158。 The pixel circuit 150 of FIG. 15 includes OLED 152, a storage capacitor 154, switching transistor 156 and a driver transistor 158. 像素电路150形成AMOLED显示器。 The pixel circuit 150 is formed AMOLED display. OLED 152对应于图14的OLED 132。 OLED 152 of FIG. 14 corresponds to the OLED 132. 存储电容器154对应于图14的存储电容器134。 A storage capacitor 154 corresponding to the storage capacitor 134 in FIG. 14. 晶体管156和158对应于图14的晶体管136和138。 Transistors 156 and 158 of FIG. 14 correspond to the transistors 136 and 138.

驱动晶体管158的源极端子连接到OLED 152,且驱动晶体管158的漏极端子连接到电源线VDD。 The driving transistor 158 is connected to the source terminal of the OLED 152, and the driving drain terminal of the transistor 158 is connected to the power line VDD. 开关晶体管156连接在数据线VDATA和驱动晶体管158的栅极端子之间。 The switching transistor 156 is connected between the gate terminal of the driving transistor and a data line VDATA 158. 存储电容器154的一个端子连接到驱动晶体管158 的栅极端子,且存储电容器154的另一端子连接到OLED 152和驱动晶体管158的源;敗端子。 A storage capacitor 154 is connected to the driving terminal of the gate terminal of the transistor 158, and the other terminal of the storage capacitor 154 is connected to the source of the drive transistor 158 and OLED 152; a lost terminal.

为像素电路150提供传感网络160。 A pixel circuit provided for the sensor network 160,150. 网络160可以被包括在像素电路150 中。 Network 160 may be included in the pixel circuit 150. 电路160包括晶体管162和164。 Circuit 160 includes transistors 162 and 164. 晶体管162和164串联连接在驱动晶体管158的源极端子和输出线VOUT之间。 Transistors 162 and 164 connected in series between the driving transistor 158 and the source terminal of the output line VOUT. 晶体管162的栅极端子连接到选择线SEL[jl]。 The gate terminal of the transistor 162 is connected to select line SEL [jl]. 晶体管164的栅极端子连接到选择线SEL[j+l]。 The gate terminal of the transistor 164 is connected to select line SEL [j + l]. 晶体管162 和164对应于图14的晶体管142和144。 Transistors 162 and 164 correspond to the transistor 142 in FIG. 14 and 144.

通过监视输出线VOUT的电压提取像素电路150的老化。 Aging by monitoring the output voltage VOUT line extraction pixel circuit 150. 在一个示例中, VOUT可以独立于VDATA。 In one example, VOUT may be independent VDATA. 在另一示例中,VOUT可以是用于物理邻接列(行)的数据线VDATA。 In another example, VOUT may be used to physically adjacent columns (rows) of the data line VDATA.

图16A示出了在提取操作中应用于图14和15的像素电路的信号波形的示例。 16A shows an example of a signal waveform applied to the pixel circuit 14 and 15 in the extraction operation of FIG. 图16B示出了在正常操作中应用于图14和15的像素电路的信号波形的示例。 FIG 16B shows an example of a signal waveform applied to the pixel circuit 14 and 15 in normal operation of the FIG.

参考14, 15和图16A,用于位置(i, j)处的像素的提取操作包括第一和第二提取周期170和172。 Reference 14, 15 and to Figure 16A, a position (i, j) at pixel extracting operation includes a first and second extraction cycles 170 and 172. 在第一提取周期170中,驱动晶体管的栅极端子(图14的138或图15的158 )被充电到校准电压VCG。 In the first extraction cycle 170, the gate terminal of the drive transistor (138 of FIG. 15 or 158 in FIG. 14) is charged to a calibration voltage VCG. 该校准电压VCG 包括基于原先的老化数据计算出的老化预测。 The calibration voltage VCG including aging prediction calculated based on the aging of the original data. 在第二提取周期172中,选择线SEL[i]变为零,因此驱动晶体管(图14的138或图15的158)的栅极电压被包括电荷注入和时钟馈通的动态效应所影响。 In the second extraction cycle 172, the select lines SEL [i] becomes zero, and therefore the gate voltage of the driving transistor (138 of FIG. 15 or 158 in FIG. 14) is influenced by dynamic effects include charge injection and clock feedthrough. 在第二提取周期172中, 驱动晶体管(图14的138或图15的158)用作放大器,因为用通过VOUT 的恒定电流将它偏置。 In the second extraction cycle 172, the driving transistor (138 of FIG. 15 or 158 in FIG. 14) as an amplifier, with a constant current because it is biased VOUT. 由于施加到VOUT上的电流Ic而在VOUT上出现的电压为(VCD+AVCD)。 Since the current Ic is applied to the voltage on VOUT occurs in VOUT is (VCD + AVCD). 因此,^^素的老化净皮;故大,且改变了VOUT的电压。 Thus, the net skin aging ^^ pigment; so large, and the voltage VOUT is changed. 因此,该方法能够提取极小量的阈值电压(VT)偏移,从而能实现高度精 Thus, the method can extract an extremely small amount of the threshold voltage (VT) shift, thereby achieving highly refined

确的校准。 Correct calibration. VOUT中的变化被监视。 Change in VOUT is monitored. 然后,VOUT中的(一个或多个)变化被用于对编程数据进行校准。 Then, (s) a change in VOUT is used to calibrate the data programming.

而且,通过在提取周期中向OLED施加电流/电压,系统可提取OLED 的电压/电流,且系统确定OLED的老化因素,用它来更精确地校准照明数据。 Further, by applying a current / voltage system to the OLED can be extracted in the extraction cycle the OLED voltage / current, and to determine the factors OLED aging system, to use it to more accurately calibrate illumination data.

参考图14、 15和16B,用于位置(i, j)处的像素的正常操作包括编程周期180和驱动周期182。 14, 16B and 15, the normal operation of the pixel at a position (i, j) comprises a programming cycle and a driving cycle 180 182. 在编程周期180中,通过使用监视结果(例如, VOUT的变化),驱动晶体管(图14的138或图15的158 )的栅极端子被充电到校准的编程电压VCP。 In the programming cycle 180, by using the monitoring results (e.g., change in VOUT), the gate terminal of the driving transistor (138 of FIG. 15 or 158 in FIG. 14) is charged to a calibrated programming voltage VCP. 在驱动周期182中,选择线SEL[i]为低,且驱动晶体管(图14的138或图15的158 )为OLED(图14的142或图15的152) 提供电流。 In the driving cycle 182, the select line SEL [i] is low, and the drive transistor (FIG. 15 158,138 or Fig. 14) supplies a current to OLED (142 in FIG. 15 or 152 in FIG. 14).

图17示出了具有图14或15的像素电路的显示系统的示例,其中VOUT 独立于VDATA。 FIG 17 shows an example of a display system having the pixel circuit of FIG. 14 or 15, wherein VOUT independent VDATA. 图17的显示系统1060类似于图10的显示系统1020。 FIG display system 1060 is similar to display system 17 of FIG. 10 1020. 显示系统1060包括具有以行和列的形式排列的多个像素1064的像素阵列。 The display system 1060 includes a pixel array having a plurality of pixels arranged in rows and 1064 columns. 在图17中,示出了4个像素1064。 In FIG 17, it illustrates four pixels 1064. 不过,像素1064的数量可以根据系统设计变化,而不局限于4个。 However, the number of pixels 1064 may vary depending on the system design, without being limited to four. 像素1064可以是图14的像素电路130或图15的像素电路150。 1064 pixel may be a pixel circuit of the pixel circuit 150 of FIG. 14 or 130 in FIG. 15. 图13的像素阵列是有源矩阵发光显示器,且可以是AMOLED 显示器。 The pixel array of FIG. 13 is an active matrix light emitting display, and may be an AMOLED display.

SELl(k) (k=il, i, i+l, i+2 )是用于选择第k行的选择线,且对应于图14和图15的SEL[il],SEL[j]和SEL[j+l]。 SELl (k) (k = il, i, i + l, i + 2) is a selection line for selecting a k-th row, and corresponds to SEL [IL] FIGS. 14 and 15, SEL [J], and SEL [j + l]. VOUT(l) (l=j, j+l)是用于第1列的输出线,且对应于图14和图15的VOUT。 VOUT (l) (l = j, j + l) is an output line of the first column, and corresponds to a VOUT of FIGS. 14 and 15. VDATA(1)是用于第1列的数据线,且对应于图14和图15的VDATA。 VDATA (. 1) is a data line for, and corresponds to VDATA of FIGS. 14 and 15.

栅极驱动器1066驱动SEL(k)。 The gate driver 1066 drives SEL (k). 栅极驱动器1066包括用于为SEL(k)提供地址信号的地址驱动器。 The gate driver 1066 includes a SEL (k) provides an address signal to the address driver. 数据驱动器1068产生编程数据,并驱动VATA(l)。 The data driver 1068 generates programming data, and drives VATA (l). 数据驱动器1068包括用于驱动和监视VOUT(l)的电压的监视器1070。 The data driver 1068 includes a monitor 1070 for monitoring and driving voltage VOUT (l) a. 提取器块1074基于VOUT(l)上产生的电压计算像素的老化。 Extracting block 1074 calculates the pixel aging voltage generated on VOUT (l) basis. VDATA(1)和VOUT(l) 被适当地激励,以用于图16A和16B的操作。 VDATA (1) and VOUT (l) is appropriately energized for operation in FIGS. 16A and 16B. VDATA(1)是用监视结果(例如,VOUT(l)的变化)来校准的。 VDATA (1) is a monitoring result (e.g., VOUT (l) changes) calibrated. 监视结果可被提供给控制器1072。 Monitoring result may be provided to the controller 1072. 数据驱动器1068、控制器1072、提取器1074或其组合可包括用于存储监视结果的存储器。 A data driver 1068, the controller 1072, or a combination thereof extractor 1074 may include a memory for storing the result of the monitoring. 如上所述,控制器1072控制驱动器1066和1068以及提取器1074,以驱动^象素1064。 As described above, the controller 1072 controls the driver 1066 and 1068 and an extractor 1074 to drive the pixels 1064 ^.

图18示出了用于驱动图17的像素阵列的正常和提取周期的示例。 FIG 18 illustrates an example of a normal cycle of extracting and driving the pixel array 17 of FIG. 在图18中,ROWi (i=l,2,…)其中每一个代表第i行,"P,,代表编程周期,且对应于图16B的180; "D"代表驱动周期,且对应于图16B的182; "E1" 代表第一和第二提取周期,且对应于图16A的170;且"E2"代表第二提取周期,且对应于图16A的172。提取可在消隐时间过程中在每个帧的结尾处发生。在该时间中,可以提取若干像素的老化。而且,可在所有像素都是OFF的若干帧之间插入额外的帧。在该帧中,可以不影响图像质量地提取若干像素的老化。 In FIG 18, ROWi (i = l, 2, ...) each of which represents the i-th row, "P ,, representatives of the programming cycle, and corresponds to 180 of Figure 16B;" D "represents the drive period, and corresponds to FIG. 16B, 182; "E1" represents the first and the second extraction period, and corresponds to 170 of FIG. 16A; and "E2" represents the second extraction period, corresponding to FIG. 16A and 172. the blanking time may be extracted in the process occurs at the end of each frame. in this time, the aging of a number of pixels may be extracted. Further, additional frames may be inserted between several frames of all the pixels are OFF. in this frame, it may not affect the image quality a number of pixels extracted aging.

图19示出了具有图14或15的像素电路的显示系统的另一示例,其中VDATA用作VOUT。 FIG 19 shows another example of a display system having the pixel circuit of FIG. 14 or 15, wherein VDATA as VOUT. 图19的显示系统1080类似于图12的显示系统1040。 FIG display system 1080 is similar to display system 19 of FIG. 12 1040. 显示系统1080包括以行和列的形式排列的多个像素1084的像素阵列。 The display system 1080 includes a pixel array arranged in a plurality of rows and columns of pixels 1084. 在图19中,示出了4个像素1084。 In FIG 19, it illustrates four pixels 1084. 不过,像素1084的数量可以根据系统设计变化,而不局限于4个。 However, the number of pixels 1084 may vary depending on the system design, without being limited to four. 像素1084可以是图14的像素电路130或图15的像素电路150。 1084 pixel may be a pixel circuit of the pixel circuit 150 of FIG. 14 or 130 in FIG. 15. 图19的像素阵列是有源矩阵发光显示器,且可以是AMOLED 显示器。 The pixel array of FIG. 19 is an active matrix light emitting display, and may be an AMOLED display.

在图19的显示系统中,VDATA用作第1列的数据线和用于监视像素老化的输出线。 In the display system of Figure 19, VDATA is used as a data line and an output line of the monitor pixel aging.

栅极驱动器1066驱动SEL(k)。 The gate driver 1066 drives SEL (k). 栅极驱动线1086包括用于为SEL(k)提供地址信号的地址驱动器。 It includes a gate line 1086 for providing address signals SEL (k) address driver. 数据驱动器1088产生编程数据,并驱动VDATA(1)。 The data driver 1088 generates programming data and drives VDATA (1). 数据驱动器1088包括用于驱动和监视VDATA(1)的电压的监视器1090。 The data driver 1088 includes a monitor 1090 for driving and monitoring VDATA (1) voltage. 提取器块1094基于VDATA(1)上产生的电压计算像素的老化。 Extracting block 1094 calculates the pixel based on a voltage generated on aging (1) VDATA. VDATA(l) 被适当地激励,以用于图16A和16B的操作。 VDATA (l) is appropriately energized for operation in FIGS. 16A and 16B. 使用监视结果(例如,VDATA(1) 的变化)校准VDATA(1)。 Using the monitoring results (e.g., change VDATA (1)) of the calibration VDATA (1). 监视结果可被提供给控制器1092。 Monitoring result may be provided to the controller 1092. 数据驱动器1088、 控制器1092、提取器1094或其组合可以包括用于存储监视结果的存储器。 A data driver 1088, the controller 1092, or a combination thereof extractor 1094 may include a memory for storing the result of the monitoring. 如上所述,控制器1092控制驱动器1086和1088以及提取器1094,以驱动像素1084。 As described above, the controller 1092 controls the driver 1086 and 1088 and an extractor 1094, 1084 to drive the pixels.

图20示出了用于驱动图19的像素阵列的正常和提取周期的示例。 FIG 20 illustrates an example of a normal cycle of extracting and driving the pixel array 19 of FIG. 在图20中,R0Wi(i=l,2,…)其中每一个代表第i行;"P"代表编程周期,且对应于图16B的180; "D,'代表驱动周期且对应于图6B的182; "E1"代表第一提取周期,且对应于图16A的170;且"E2"代表第二提取周期,且对应于图16A的172。提取可在消隐时间中在每个帧的结尾处发生。在该时间中,可以提取若干像素的老化。而且,可在所有像素都是OFF的若干帧之间插入额外的帧。在该帧中,可不影响图像质量地提取若干像素的老化。 In FIG 20, R0Wi (i = l, 2, ...) each of which represents the i-th row; "P" on behalf of the programming cycle, and corresponds to 180 of Figure 16B; "D, 'represents the drive period and corresponds to FIG. 6B of 182; "E1" represents the first extraction period, and corresponds to 170 of FIG. 16A; and "E2" represents the second extraction period, and corresponds to FIG. 16A may be extracted in each frame 172. in the blanking time It occurs at the end. in this time, a plurality of pixel aging can be extracted. Further, additional frames may be inserted between several frames of all the pixels are OFF. in this frame, without affecting the quality of the image extracted several pixels aging .

图21示出了适当地应用了根据本发明的又一实施例的像素操作方案的3T像素电路的示例。 FIG 21 shows an exemplary 3T pixel circuit operation of the pixel program according to still another embodiment of the present invention is suitably applied. 图21的像素电路190包括OLED 192、存储电容器194、 开关晶体管196以及驱动晶体管198。 FIG 21 is a pixel circuit 190 includes OLED 192, a storage capacitor 194, switching transistors 196 and 198 drive transistor. 像素电路190形成AMOLED显示器。 The pixel circuit 190 is formed AMOLED display.

驱动晶体管198的漏极端子连接到OLED 192,且驱动晶体管198的源极端子连接到电源线VSS (例如,地)。 The drain terminal of the driving transistor 198 is connected to the OLED 192, and the driving source terminal of the transistor 198 is connected to the power line VSS (e.g., ground). 开关晶体管196的一个端子连接到数据线VDATA,且开关晶体管196的另一端子连接到驱动晶体管198的栅极端子。 A terminal of the switch transistor 196 is connected to a data line VDATA, and the other terminal of the switch transistor 196 is connected to the gate terminal of the driving transistor 198. 开关晶体管196的栅极端子连接到选择线SEL。 The gate terminal of the switching transistor 196 is connected to select line SEL. 存储电容器194的一个端子连接到驱动晶体管198的栅极端子,且存储电容器194的另一端子连接到VSS。 One terminal of the storage capacitor 194 is connected to the gate terminal of the driving transistor 198, and the other terminal of the storage capacitor 194 is connected to VSS.

为像素电路190提供传感晶体管200。 The pixel circuit 190 provides the sense transistor 200. 晶体管200可以被包括在像素电路190中。 Transistor 200 may be included in the pixel circuit 190. 晶体管200连接在驱动晶体管198的漏极端子和输出线VOUT 之间。 Transistor 200 is connected between the drain terminal of the driving transistor 198 and the output line VOUT. 晶体管200的栅极端子连接到选择线SEL。 The gate terminal of the transistor 200 is connected to select line SEL.

通过监视输出线VOUT的电压来提取像素电路190的老化。 Aging of the pixel circuit 190 is extracted by monitoring the voltage of the output line VOUT. SEL被开关晶体管196和晶体管200共用。 SEL is common switch transistor 200 and the transistor 196.

图22示出了适当地应用了与图21相关的像素操作技术的3晶体管(3T) 像素电路的另一示例。 FIG 22 shows another example of appropriate application of the pixels 21 associated with the technique of FIG. 3 transistor (3T) pixel circuit. 图22的像素电路210包括OLED 212、存储电容器214、开关晶体管216以及驱动晶体管218。 FIG 22 includes a pixel circuit 210 OLED 212, a storage capacitor 214, switching transistor 216 and a driver transistor 218. OLED212对应于图21的OLED 192。 OLED212 corresponding OLED 192 in FIG. 21. 存储电容器214对应于图21的存储电容器194。 The storage capacitor 214 corresponds to the storage capacitor 194 in FIG. 21. 晶体管216和218对应于图21的晶体管196和198。 Transistors 216 and 218 of FIG. 21 correspond to the transistors 196 and 198. 像素电路210形成AMOLED显示器。 The pixel circuit 210 is formed AMOLED display.

驱动晶体管218的漏极端子连接到电源线VDD,且驱动晶体管218的源极端子连接到OLED 212。 The drain terminal of the driving transistor 218 is connected to the power line VDD, and the source terminal of the driving transistor 218 is connected to the OLED 212. 开关晶体管216连接在数据线VDATA和驱动晶体管218的栅极端子之间。 The switching transistor 216 is connected between the gate terminal of the driving transistor and a data line VDATA 218. 存储电容器214的一个端子连接到驱动晶体管218的栅极端子,且存储电容器214的另一端子连接到驱动晶体管218的源才及端子和OLED 212。 One terminal of the storage capacitor 214 is connected to the gate terminal of the driving transistor 218, and the other terminal of the storage capacitor 214 is connected to the source of the driving transistor 218 and a terminal before and OLED 212.

为像素电路210提供传感晶体管220。 A pixel circuit provided for the sense transistor 220,210. 晶体管220可以被包括在像素电路210中。 Transistor 220 may be included in the pixel circuit 210. 晶体管220将驱动晶体管218的源极端子和OLED 212连接到输出线VOUT。 Transistor 220 the source terminal of the drive transistor 218 and OLED 212 is connected to the output line VOUT. 晶体管220对应于图21的晶体管200。 Transistor 220 corresponds to transistor 200 of FIG. 21. 晶体管220的栅极端子连接到选择线SEL。 The gate terminal of the transistor 220 is connected to select line SEL. 通过监视输出线VOUT的电压来提取像素电路210的老化。 Aging of the pixel circuit 210 is extracted by monitoring the voltage of the output line VOUT. SEL被开关晶体管216和晶体管220共用。 SEL is a common switching transistor 220 and transistor 216.

图23A示出了在提取操作中应用于图21和22的像素电路的信号波形的示例。 23A shows an example of a signal waveform applied to FIGS. 21 and 22 of the pixel circuit in the extraction operation. 图23B示出了在正常操作中应用于图21和22的像素电路的信号波形的示例。 FIG 23B shows an example of a signal waveform applied to the pixel 21 and circuit 22 in normal operation.

参考图21、 22和图23A,提取操作包括提取周期170。 21, 22 and FIGS. 23A, operation of extracting comprises extracting 170 cycles. 在提取周期170 中,驱动晶体管(图21的198或图22的218)的栅极端子被充电到校准电 In the extraction cycle 170, the gate terminal of the driving transistor (198 of FIG. 22 or 218 in FIG. 21) is electrically charged to the calibration

压VcG。 Pressure VcG. 该校准电压VcG包括基于原先的老化数据计算出的老化预测。 The calibration voltage comprises VcG calculated based on the predicted aging aging original data. 在提 In mentioning

取周期230中,驱动晶体管(图21的198或图22的218)用作放大器,因为用通过VOUT的恒定电流将它偏置。 Fetch cycle 230, the driving transistor (198 of FIG. 22 or 218 of FIG. 21) as an amplifier, with a constant current because it is biased VOUT. 由于施加到VOUT上的电流Ic而在VOUT上产生的电压为(VCD+AVCD)。 Since the current Ic is applied to the voltage on VOUT and VOUT is generated on (VCD + AVCD). 因此,像素的老化被放大,且改变了VOUT的电压。 Thus, the pixel aging is amplified, and the voltage VOUT is changed. 因此,该方法能够提取极小量的阈值电压(VT)偏移, 从而能实现高度精确的校准。 Thus, the method can extract an extremely small amount of the threshold voltage (VT) shift, thereby achieving highly accurate calibration. VOUT中的变化被监视。 Change in VOUT is monitored. 然后,VOUT中的(一个或多个)变化用于编程数据的校准。 Then, (s) a change in VOUT programming data for calibration.

而且,通过在提取周期中向OLED施加电流/电压,系统可以提取OLED 的电压/电流和确定OLED的老化因素,并利用它来更精确地校准照明数据。 Further, the OLED can be extracted by applying a current / voltage, to the system in an extraction cycle OLED voltage / current and the factors determining the aging of an OLED, and use it to more accurately calibrate illumination data.

参考图21、 22和23B,正常操作包括编程周期240和驱动周期242。 Referring to Figure 21, 23B and 22, the normal operation includes a programming cycle and a driving cycle 240 242. 在编程周期240中,通过使用监视结果(例如,VOUT的变化),驱动晶体管(图21的198或图22的218)的栅极端子被充电到校准的编程电压VCP。 In the programming cycle 240, by using the monitoring results (e.g., change in VOUT), the gate terminal of the driving transistor (198 of FIG. 22 or 218 in FIG. 21) is charged to a calibrated programming voltage VCP. 在驱动周期242中,选择线SEL为低,且驱动晶体管(图21的198或图22 的218 )为OLED (图21的192或图22的212 )提供电流。 In the driving cycle 242, the select line SEL is low, and the drive transistor (FIG. 22 218,198 or Fig. 21) supplies a current to OLED (192 in FIG. 22 or 212 in FIG. 21).

图24示出了具有图21或22的像素电路的显示系统的示例,其中VOUT 独立于VDATA。 FIG 24 illustrates an example of a display system having the pixel circuit of FIG. 21 or 22, wherein VOUT independent VDATA. 图24的显示系统1100包括具有以行和列的形式排列的多个像素1104的像素阵列。 FIG 24 is a display system 1100 includes a pixel array having a plurality of pixels arranged in rows and columns 1104. 在图24中,示出了4个像素1104。 In FIG 24, it illustrates four pixels 1104. 不过,像素1104的数量可以根据系统设计变化,而不局限于4个。 However, the number of pixels 1104 may vary depending on the system design, without being limited to four. 像素1104可以是图21的像素电路190或图22的像素电路210。 1104 pixel may be a pixel circuit 190 of FIG. 21 or FIG. 22, the pixel circuit 210. 图24的像素阵列是有源矩阵发光显示器,且可以是AMOLED显示器。 The pixel array of FIG. 24 is an active matrix light emitting display, and may be an AMOLED display.

SEL(k) (k=i,i+l )是用于选择第k行的选择线,且对应于图21和图22 的SEL。 SEL (k) (k = i, i + l) for selecting k-th row selection line, and corresponds to the SEL 21 and 22 of FIG. VOUT(l) (l=j,j+l )是用于第l列的输出线,且对应于图21和图22 的VOUT。 VOUT (l) (l = j, j + l) is an output line of the column l, and corresponds to a VOUT of FIGS. 21 and 22. VDATA(1)是用于第1列的数据线,且对应于图21和图22的VDATA。 VDATA (. 1) is a data line for, and corresponds to VDATA of Figures 21 and 22.

20栅极驱动器1106驱动SEL(k)。 The gate driver 20 drives 1106 SEL (k). 栅极驱动器1106包括用于为SEL(k)提供地址信号的地址驱动器。 The gate driver 1106 includes a SEL (k) provides an address signal to the address driver. 数据驱动器1108产生编程数据,并驱动VATA(l)。 The data driver 1108 generates programming data, and drives VATA (l). 数据驱动器1108包括用于驱动和监视VOUT(l)的电压的监视器1110。 The data driver 1108 includes a monitor 1110 for monitoring and driving voltage VOUT (l) a. 提取器块1114基于VOUT(l)上产生的电压计算像素的老化。 Extracting block 1114 calculates the pixel aging voltage generated on VOUT (l) basis. VDATA(1)和VOUT(l) 被适当地激励,以用于图23A和23B的操作。 VDATA (1) and VOUT (l) is appropriately energized for operation in FIGS. 23A and 23B. 使用监视结果(例如,VOUT(l) 的变化)校准VDATA(1)。 Using the monitoring results (e.g., change in VOUT (l)) of the calibration VDATA (1). 监视结果可被提供给控制器1112。 Monitoring result may be provided to the controller 1112. 数据驱动器1108、 控制器1112、提取器1114或其组合可以包括用于存储监视结果的存储器。 A data driver 1108, the controller 1112, extracts, or combinations 1114 may include a memory for storing the monitoring result. 如上所述,控制器1112控制驱动器1106和1108以及^是取器1114,以驱动像素1104。 As described above, the controller 1112 controls the driver 1106 and 1108 ^ 1114 is taken, to drive the pixels 1104.

图25A和25B示出了用于驱动图24的像素阵列的正常和提取周期的两个示例。 25A and 25B illustrate two examples of normal and extraction cycle for driving the pixel array 24 of FIG. 在图25A和25B中,ROWi (i=l,2,…)其中每一个代表第i行; In FIGS. 25A and 25B, ROWi (i = l, 2, ...) each of which represents the i-th row;

"P"代表编程周期,且对应于图23B的240; "D,,代表驱动周期,且对应于图23B的242; "E1"代表第一提取周期,且对应于图23A的230。在图25A中,可以在消隐时间中在每个帧的结尾发生提取。在该时间中,可以提取若干像素的老化。而且,可在所有像素都是OFF的若干帧之间插入额外的帧。在该帧中,可以不影响图像质量地提取若干像素的老化。在图25B中, 提取和编程并行进行。 "P" on behalf of the programming cycle, and corresponds to 240 of FIG. 23B; "D ,, represents the drive period, and corresponds to 242 of FIG. 23B;" E1 "represents the first extraction period, and corresponds to FIG 230. FIG. 23A 25A, the extraction can occur at the end of the blanking time of each frame. in this time, the aging of a number of pixels may be extracted. Further, additional frames may be inserted between several frames of all pixels are OFF. in the frame can be extracted without affecting the image quality of a number of pixels of aging. in 25B, the extraction and parallel programming.

图26示出了适当地应用了根据本发明的又一实施例的像素操作技术的3T像素电路的示例。 FIG 26 shows an example of appropriate application of 3T pixel circuit of the pixel technique according to yet another embodiment of the present invention. 图26的像素电路260包括OLED262、存储电容器264、 开关晶体管266以及驱动晶体管268。 FIG 26 includes a pixel circuit 260 OLED262, a storage capacitor 264, switching transistors 266 and 268 drive transistor. 像素电路260形成AMOLED显示器。 The pixel circuit 260 is formed AMOLED display.

OLED 262对应于图21的OLED 192。 It corresponds to the OLED 262 of OLED 192 21 FIG. 电容器264对应于图21的电容器194。 Capacitor 264 corresponds to a capacitor 194 in FIG. 21. 晶体管264和268分别对应于图21的晶体管196和198。 Transistors 264 and 268 in FIG. 21 respectively correspond to the transistors 196 and 198. 开关晶体管266的栅极端子连接到第一选择线SEL1。 The gate terminal of the switching transistor 266 is connected to the first select line SEL1.

为像素电路260提供传感晶体管270。 A pixel circuit provided for the sense transistor 270,260. 晶体管270可以被包括在像素电路260中。 Transistor 270 may be included in the pixel circuit 260. 晶体管270连4妄在驱动晶体管268的漏极端子和VDATA之间。 Jump transistor 270 is connected between the driving transistor 4 and the drain terminal of the VDATA 268. 晶体管270的栅极端子连接到第二选择线SEL2。 The gate terminal of the transistor 270 is connected to the second select line SEL2.

通过监视数据线VDATA的电压来提取像素电路260的老化。 Aging of the pixel circuit 260 is extracted by monitoring the voltage of the data line VDATA. VDATA 被共享用于编程和提取像素。 VDATA is shared for programming and extracting pixels.

图27示出了适当地应用了与图26有关的像素操作技术的3T像素电路的另一示例。 FIG 27 shows another example of appropriate application of 3T pixel circuit 26 of FIG pixel operations related art. 图27的像素电路280包括OLED282、存储电容器284、开关晶体管286以及驱动晶体管288。 FIG 27 includes a pixel circuit 280 OLED282, a storage capacitor 284, switching transistors 286 and 288 drive transistor. 像素电路280形成AMOLED显示器。 The pixel circuit 280 is formed AMOLED display.

21OLED 282对应于图22的OLED 212。 21OLED 282 corresponding to FIG. 22 OLED 212. 电容器284对应于图22的电容器214。 Capacitor 284 corresponds to a capacitor 214 in FIG. 22. 晶体管286和288分别对应于图22的晶体管216和218。 Transistors 286 and 288 respectively correspond to transistor 216 of FIG. 22 and 218. 开关晶体管286的栅极端子连接到第一选择线SEL1。 The gate terminal of the switching transistor 286 is connected to the first select line SEL1.

为像素电路280提供传感晶体管290。 The pixel circuit 280 provides the sense transistor 290. 晶体管290可以被包括在像素电路280中。 Transistor 290 may be included in the pixel circuit 280. 晶体管290连接在驱动晶体管288的源极端子和VDATA之间。 Transistor 290 is connected between drive transistor 288 and a source terminal VDATA. 晶体管290对应于图26的晶体管270。 Transistor 290 corresponding to transistor 270 of FIG. 26. 晶体管290的栅极端子连接到第二选择线SEL2。 The gate terminal of the transistor 290 is connected to the second select line SEL2.

通过监视数据线VDATA的电压提取像素电路280的老化。 Aging 280 by the pixel extracting circuit monitors the voltage VDATA is a data line. VDATA被共用于编程和提取像素老化。 VDATA is common for programming and extracting pixel aging.

图28A示出了在提取操作中应用于图26和27的像素电路的信号波形的示例。 28A shows an example of a signal waveform of the pixel circuit 26 and 27 in the extraction operation applied to the FIG. 图28B示出了在正常操作中应用于图26和27的像素电路的信号波形的示例。 FIG 28B illustrates an example of a signal waveform of the pixel circuit 26 and 27 in normal operation is applied to FIG.

参考图26、27和图28A,提取操作包括第一和第二提取周期300和302。 With reference to FIGS. 26, 27 and 28A, the extraction operation comprising first and second extraction cycles 300 and 302. 在第一提取周期300中,驱动晶体管的栅极端子(图26的268或图27的288 ) 被充电到校准电压VCG。 In the first extraction cycle 300, the gate terminal of the drive transistor (268 of FIG. 27 or 288 in FIG. 26) is charged to a calibration voltage VCG. 该校准电压VCG包括基于原先的老化数据计算出的老化预测。 The calibration voltage VCG including aging prediction calculated based on the aging of the original data. 在第二提取周期302中,驱动晶体管(图26的268或图27的288 ) 用作放大器,因为用通过VDATA的恒定电流将它偏置。 In the second extraction cycle 302, the driving transistor (268 or 288 of FIG. 27 FIG. 26) as an amplifier, with a constant current because it is biased VDATA. 因此,像素的老化被放大,且VDATA的电压相应的变化。 Thus, the pixel aging is amplified, and the voltage corresponding to the variation VDATA. 因此,该方法能够提取极小量的电压阈值(VT)偏移,从而能实现高度精确的校准。 Thus, the method is capable of extracting a very small amount of a threshold voltage (VT) shift, thereby achieving highly accurate calibration. VDATA中的变化被监视。 Changes in VDATA is monitored. 然后,VDATA中的(一个或多个)变化被用于对编程数据进行校准。 Then, (s) a change in VDATA is used to calibrate the data programming.

而且,通过在提取周期中向OLED施加电流/电压,系统可以提取OLED 的电压/电流,判断OLED的老化因素并使用它进行照明数据的更精确的校准。 Further, the aging factor can extract OLED voltage / current, the OLED is determined by applying a current / voltage to the OLED during the extraction period the system and use it for a more accurate calibration of the illumination data.

参考图26、 27和28B,正常操作包括编程周期310和驱动周期312。 Referring to Figure 26, 28B and 27, the normal operation includes a programming cycle and a driving cycle 310 312. 在编程周期310中,通过使用监视结果(即,VDATA的变化),驱动晶体管(图26的268或图27的288 )的栅极端子被充电到校准的编程电压Vcp。 In the programming cycle 310, by using the monitoring result (i.e., the change VDATA), the gate terminal of the driving transistor (268 of FIG. 27 or 288 in FIG. 26) is charged to a calibrated programming voltage Vcp. 接下来, 在驱动周期312中,选择线SEL1为低,且驱动晶体管(图26的268或图27的288 )为OLED (图26的262或图27的282 ) ^是供电流。 Next, in the driving cycle 312, the select line SEL1 is low, and the drive transistor (288 of FIG. 27 or 268 in FIG. 26) of OLED (262 of FIG. 26 or 282 in FIG. 27) ^ a current supply.

图29示出了具有图26或27的像素电路的显示系统的示例。 FIG 29 shows an example of a display system having the pixel circuit of FIG. 26 or 27. 图29的显示系统1120包括具有以行和列形式排列的多个像素1124的像素阵列。 FIG 29 is a display system 1120 includes a pixel array having a plurality of pixels arranged in rows and columns of 1124. 在图29中,示出了4个像素1124。 In FIG 29, it illustrates four pixels 1124. 不过,像素1124的数量可以根据系统设计变化,而不局限于4个。 However, the number of pixels 1124 may vary depending on the system design, without being limited to four. 像素1024可以是图26的像素电路260或图27的像素电路280。 1024 may be a pixel circuit of the pixel 260 of FIG. 26 or FIG. 27, pixel circuit 280. 图29的像素阵列是有源矩阵发光显示器,且可以是AMOLED 显示器。 The pixel array of FIG. 29 is an active matrix light emitting display, and may be an AMOLED display.

SELl(k) ( k=i, i+l )是用于选择第k行的第一选择线,且对应于图26和图27的SEL1。 SELl (k) (k = i, i + l) for selecting a first k-th row selection line, and corresponds to the SEL1 in FIGS. 26 and 27. SEL2(k) ( k=i, i+l )是用于选择第k行的第二选择线,且对应于图26和图27的SEL2。 SEL2 (k) (k = i, i + l) for selecting a second k-th row selection line SEL2 and corresponds to FIG. 26 and FIG. 27. VDATA(l) (l=j, j+l )是用于第1列的数据线, 且对应于图26和图27的VDATA。 VDATA (l) (l = j, j + l) is a data line of the first column, and corresponds to VDATA of FIGS. 26 and 27.

栅极驱动器1126驱动SELl(k)和SEL2(k)。 The gate driver 1126 drives SELl (k) and SEL2 (k). 栅极驱动器1126包括用于为SELl(k)和SEL2(k)提供地址信号的地址驱动器。 The gate driver 1126 includes a SELl (k) and SEL2 (k) provides an address signal to the address driver. 数据驱动器1128产生编程数据并驱动VDATA(l)。 The data driver 1128 generates programming data and drives VDATA (l). 数据驱动器1128包括用于驱动和监视VDATA(l) 的电压的监视器1130。 The data driver 1128 includes a monitor 1130 for monitoring and driving voltage VDATA (l) a. 提取器块1134基于VDATA(1)上产生的电压计算像素的老化。 Extracting block 1134 calculates the pixel based on a voltage generated on aging (1) VDATA. VDATA(1)被适当地激励,以用于图28A和28B的操作。 VDATA (1) is appropriately energized for operation in FIGS. 28A and 28B. 使用监视结果(例如,VDATA(1)的变化)校准VDATA(l)。 Using the monitoring results (e.g., change VDATA (1)) of the calibration VDATA (l). 监视结果可被提供给控制器1132。 Monitoring result may be provided to the controller 1132. 数据驱动器1128、控制器1132、提取器1134或其组合可以包括用于存储监视结果的存储器。 A data driver 1128, the controller 1132, extracts, or combinations 1134 may include a memory for storing the result of the monitoring. 如上所述,控制器1132控制驱动器1126和1128 以及提取器1134,以驱动像素1124。 As described above, the controller 1132 controls the driver 1126 and 1128 and an extractor 1134, 1124 to drive the pixels.

图30示出用于驱动图29的像素阵列的正常和提取周期的示例。 FIG 30 illustrates an example of a normal cycle of extracting and driving the pixel array 29 of FIG. 在图30 中,ROWi (i=l, 2,...)其中每一个代表第i行;"P"代表编程周期,且对应于图28B的310; "D"代表驱动周期,且对应于图28B的312; "E1"代表第一提取周期,且对应于图28A的300;且"E2"代表第二提取周期,且对应于图28A的302。 In FIG. 30, ROWi (i = l, 2, ...) each of which represents the i-th row; "P" on behalf of the programming cycle, and corresponds to 310 of FIG. 28B; "D" represents the drive period, and corresponds to the FIG. 28B 312; "E1" represents the first extraction period, and corresponds to 300 of FIG. 28A; and "E2" represents the second extraction period, and corresponds to 302 of FIG. 28A. 提取可在消隐时间中在每个帧的结尾处发生。 Extraction can occur during the blanking time at the end of each frame. 在该时间中,可以提取若干像素的老化。 In this time, the aging of a number of pixels may be extracted. 而且,可在所有像素都是OFF的若干帧之间插入额外的帧。 Further, additional frames may be inserted between several frames of all the pixels are OFF. 在该帧中,可以不影响图像质量地提取若干像素的老化。 In the frame, a plurality of pixel aging can be extracted without compromising image quality.

根据在图1至28B中示出的本发明的实施例,像素老化被提取,且像素编程或偏置数据被校准,这提供了高度精确的操作。 According to an embodiment of the present invention in FIGS. 1 28B shown, the pixel aging is extracted, and the pixel data to be programmed or calibrated offset, which provides a highly accurate operation. 根据本发明的实施例, 对平板的编程/偏置变得高度精确,从而使误差极少。 According to an embodiment of the present invention, a flat programming / offset becomes highly accurate, so that the error is very small. 因此,有利于实现用于显示器和传感器的高分辨率大面积平板。 Thus, a high resolution is conducive to large-area flat panel displays and sensors used.

以下使用图31A至35来进一步详细描述使用共享的数据线和选择线的编程和读出^支术。 The following described in further detail using the shared data and select lines of programming and reading operation using ^ branched 31A to 35.

图31A和31B示出了在第j行和第i列具有读出能力的像素电路。 31A and 31B illustrate a pixel circuit having a reading capability in the j-th row and i-th column. 图31A 的像素包括用于驱动发光装置(例如,OLED)的驱动器电路352和用于监牙见来自于像素的采集数据(acquisition data)的感测电^各(sensing circuit )356。 FIG 31A includes a pixel for driving a light emitting device (e.g., OLED) of the driver circuit 352 and a data acquisition supervisor teeth see (acquisition data) from the sensing pixels each for electrically ^ (sensing circuit) 356. 设置晶体管354以基于选择线SEL[j]上的信号将数据线DATA[i]连接到驱动器电路352。 A transistor 354 based on the select signal line SEL [j] on the data line DATA [i] is connected to the driver circuit 352. 设置晶体管358以将监视电路356的输出端连接到读出线Readout[i]。 Transistor 358 is provided to connect the output of the monitoring circuit 356 to the readout line Readout [i]. 在图31A中,像素是经由晶体管354通过数据线DATA[i]编程的, 且采集数据经由晶体管358通过读出线Readout[i]读回。 In FIG 31A, the pixel transistor via the data line 354 through DATA [i] programming and data acquisition through the transistor 358 via a readout line Readout [i] read back.

感测电^各356可以是传感器、TFT或OLED本身。 Each of the sensing electrically ^ 356 may be a sensor, TFT or OLED itself. 图31A的系统-使用额外的线(即Readout[i])。 The system of FIG. 31A - the use of additional lines (i.e. Readout [i]).

在图31B的像素中,晶体管358连接到数据线DATA[i]或相邻的数据线, 例如DATA[il], DATA[i+l]。 In the pixel of FIG. 31B, the transistor 358 is connected to the data line DATA [i] or the adjacent data lines, e.g. DATA [il], ​​DATA [i + l]. 通过第一选择线SELl[i]来选择晶体管354, 而晶体管358通过额外的选择线SEL2[i]选择。 Transistor 354 is selected by the first select line SELl [i], and the transistor 358 by an additional select line SEL2 [i] to select. 在图31B中,像素经由晶体管354通过数据线DATA[i]编程,且采集数据经由晶体管358通过相同的数据线或用于相邻行的数据线读回。 In FIG 31B, a pixel via the transistor 354 through the data line DATA [i] programming and data acquisition via the transistor 358 via the same read data line or a data line adjacent to the back row. 然而,面板中的行数一般小于列数,图31B 的系统使用额外的选择线。 However, the number of rows in the panel is generally less than the number of columns, the system of FIG. 31B using additional selection line.

图32示出了适当地应用了根据本发明的又一实施例的像素操作技术的像素电路的示例。 FIG 32 shows an example of a pixel circuit of a pixel technique according to yet another embodiment of the present invention is suitably applied. 图32的像素电路370位于第j行和第i列。 The pixel circuit 370 of FIG. 32 located on the j-th row and i-th column. 在图32中, 数据线和读出线合并起来而不添加额外的选择线。 In Figure 32, the data merge and sense lines without adding an extra select line. 图32的像素电路370包括用于驱动发光装置(例如OLED )的驱动器电路372和用于感测来自于像素的采集数据的感测电路376。 FIG 32 includes a pixel circuit 370 for driving the light emitting device (e.g., OLED) of the driver circuit 372 and sense circuit for sensing data acquired from the pixels 376. 设置晶体管374以基于选择线SEL[i]上的信号连接数据线DATA[i]到驱动器电路372。 Based on a transistor 374 connected to the data line selection signal lines SEL [i] on the DATA [i] to the driver circuit 372. 当SEL[j]高时,像素被编程。 When SEL [j] is high, the pixel is programmed. 为感测电路376提供传感网络378。 Providing sensing circuitry to sense the network 378,376.

感测电路376感测驱动器电路352的像素电学、光学或温度信号。 Electrical sensing pixels sensing circuit 376 of the driver circuit 352, or the temperature of the optical signals. 因而, 感测电路376的输出确定随时间产生的像素老化。 Thus, the output of the sensing circuit 376 determines the pixel generated by aging over time. 监视电路376可以是传感器、TFT、像素的TFT或像素的OLED (例如,图1的14)。 The monitoring circuit 376 may be a sensor, OLED TFT, TFT or a pixel (e.g. 14, FIG. 1).

在一个示例中,感测电路376经由传感网络378连接到像素所处的列的数据线DATA[i]。 In one example, the sensing circuit 376 which is connected to a pixel sensor network 378 via column data line DATA [i]. 在另一示例中,感测电路376经由传感网络378连接到用于其中一个相邻列(例如DATA[i+l]或DATA[il])的凝:据线。 In another example, the sensing circuit 376 is connected via a sensor network 378 to the adjacent column for (e.g. DATA [i + l] or DATA [il]) condensate wherein: the data lines.

传感网络378包括晶体管380和382。 Sensor network 378 includes transistors 380 and 382. 晶体管380和382串联地连接在监一见器电^各376的4命出端与凝:据线(例如DATA[i]、 DATA[il]、 DATA[i+l]) 之间。 Transistor is connected electrically to see a monitor 376 ^ each end of the life of the coagulation 4 380 382 and in series: a data line (e.g., DATA [i], DATA [il], ​​DATA [i + l]) between. 通过相邻行的选择线(例如SEL[il], SEL[i+l])选择晶体管380。 By selecting the adjacent row line (e.g., SEL [il], ​​SEL [i + l]) select transistor 380. 通过选择线SEL[i]选择晶体管382,该选择线还连接到晶体管374的栅极端子。 By select lines SEL [i] select transistor 382, ​​the selection line is further connected to the gate terminal of the transistor 374.

驱动器电^各372、监^L器电^各376以及开关374、 380和382可以用非晶硅、多晶硅、有机半导体或CMOS技术制造。 372 ^ each electric drive, monitor ^ L ^ each electrical switches 376 and 374, 380 and 382 may be amorphous silicon, polysilicon, an organic semiconductor or CMOS technology.

图32的配置可以使用不同的时间调度。 FIG 32 may be configured to use different time schedule. 不过,图33中示出了其中的一种。 However, FIG. 33 shows one of them. 图33的操作周期包括编程周期380、驱动周期392和读回周期394。 FIG operation cycle 33 includes a programming cycle 380 and driving cycle 392 cycles 394 read back.

参考图32和33,在编程周期390中,当SEL[i]为ON时,通过DATA[i] 对像素编程。 With reference to FIGS. 32 and 33, during a programming cycle 390, when SEL [i] is ON, the DATA [i] of the pixel programming. 在驱动周期392中,SEL[i]变为OFF。 In the driving cycle 392, SEL [i] are turned OFF. 对于读出处理394, SEL[i] 和一个相邻的^亍选择线SEL[il]或SEL[i+l]为ON,所以,通过与传感网纟各378相连的DATA[i]、 DATA[il]或DATA[i+l]读回监视数据。 For read processing 394, SEL [i] ^ right foot and an adjacent select line SEL [il] or SEL [i + l] is ON, so that DATA by the sensor network 378 is connected to each of Si [I], dATA [il] or dATA [i + l] monitor data read back.

晶体管380和382可以很容易地交换而不影响读出处理。 Transistors 380 and 382 can easily be exchanged without affecting the reading process.

图34示出了适当地应用了与图32相关的像素操作技术的像素电路的另一示例。 FIG 34 shows another example of appropriate application of the 32 pixels associated with the technique of the pixel circuit of FIG. 图34的^f象素电路400位于第j行第i列。 FIG ^ f 34 of pixel circuits 400 located on the j-th row, i th column. 在图34中,lt据和读出线合并,而不添加额外的选择线。 In Figure 34, lt readout line data, and merge, without adding an extra select line. 图34的像素电路400包括OLED (未示出)、驱动器电^各372以及感测电路376。 The pixel circuit 400 of FIG. 34 includes OLED (not shown), each of the drive power ^ 372 and a sensing circuit 376. 为感测电^各376提供传感网络408。 ^ Each to sense electrical sensor 376 provides network 408. 传感网络408包括晶体管410和412。 Sensor network 408 includes transistors 410 and 412. 晶体管410和412分别与图32的晶体管380和382相同或相似。 Transistors 410 and 412, respectively, and identical or similar to transistor 380 of FIG. 32 382. 晶体管410的栅极端子连接到用于(jl)行的选择线SEL[jl]。 The gate terminal of the transistor 410 is connected to a (JL) row select line SEL [jl]. 晶体管412的栅极端子连接到用于(j+l)行的选择线SEL[j+l]。 The gate terminal of the transistor 412 is connected to a select line (j + l) line SEL [j + l]. 当SEL[i]为高时,像素被编程。 When SEL [i] is high, the pixel is programmed. 晶体管412可以被多于一个的像素共用。 Transistor 412 may be common to more than one pixel.

在一个示例中,监视电路376经由传感网络408连接到像素所处的列的数据线DATA[j]。 In one example, the monitoring circuit 376 is connected to the data line of the pixel columns located DATA [j] 408 via the sensor network. 在另一示例中,监视电路376经由传感网络408连接到用于其中一个相邻列的数据线(例如DATA[il], DATA[i+l])。 In another example, the monitoring circuit 376 which is connected to a data line (e.g., DATA [il], ​​DATA [i + l]) of an adjacent column 408 via the sensor network.

开关410和412可以以非晶硅、多晶硅、有机半导体或CMOS技术制造。 Switches 410 and 412 may be made of amorphous silicon, polycrystalline silicon, organic semiconductor or CMOS technology.

图34的配置可以使用不同的时间调度。 FIG 34 may be configured to use different time schedule. 不过,图35中示出了其中的一种。 However, in FIG. 35 shows one of them. 图35的操:作周期包括编程周期420、驱动周期422和读回周期424。 The operation of FIG. 35: 420 for the period includes a programming cycle, the driving cycle 422, and 424 read back cycle.

参考图34和35,在编程周期420中,当SEL[j]为ON时,像素通过DATA[i] 编程。 With reference to FIGS. 34 and 35, in the programming cycle 420, when SEL [j] is ON, the pixel through DATA [i] programming. 在驱动周期422中,SEL[j]变为OFF。 In the driving cycle 422, SEL [j] turned OFF. 对于读出处理424, SEL口-l] 为ON,所以,通过与传感网络408相连的DATA[i]、 DATA[il]或DATA[i+l] 读回监视数据。 Process 424, SEL port -l] is ON, therefore, DATA is connected via the sensor network 408 [i], DATA [il] or DATA [i + l] read back the monitor data for readout. 晶体管410和412可很容易交换,而不影响读出处理。 Transistors 410 and 412 can be readily exchanged without affecting the reading process.

具有图31和34的像素结构的显示系统类似于上述显示系统。 The display system having the pixel structure of FIG. 31 and 34 display systems similar to the above. 从传感网络读回的数据用于对编程数据进行校准。 Calibration data for program data read back from the sensor network.

进行编程的数据线和用于提取像素老化数据的读出线,而不会影响像素电路 Programming data lines for reading and extracting pixel aging data line, the pixel circuit without affecting the

25操作且不添加额外的控制信号。 25 operates without adding additional control signal. 与面板相连的信号数显著减小。 The number of signals coupled with the panel is significantly reduced. 因而驱动器 Thus drive

的复杂度减小。 Complexity is reduced. 在特定的AMOLED显示器中,这减小了外部驱动器的实施成本,且减小了有源矩阵发光显示器的校准束止(tourniquet)的成本。 In a particular AMOLED display, which reduces the cost of external drive embodiments, the calibration beam and reduces the active matrix light emitting display stop (Tourniquet) cost.

用图36至38详细地描述用于增强校准技术的开口率像素电路的技术。 FIGS 36 to 38 with detail enhancement technology calibration aperture ratio of the pixel circuit is described for.

图36示出了根据本发明的又一实施例的像素阵列的示例。 FIG 36 illustrates an example of a pixel array according to yet another embodiment of the present invention. 图36的像素阵列500包括以行和列的形式排列的多个像素电路510。 The pixel array 500 of FIG. 36 comprises a plurality of pixel circuit 510 arranged in rows and columns. 在图36中,示出了第j列的两个像素510。 In FIG 36, it illustrates two pixels 510 of the j-th column. 像素电路510包括OLED512、存储电容器514、开关晶体管516以及驱动晶体管518。 The pixel circuit 510 includes OLED512, a storage capacitor 514, switching transistors 516 and 518 drive transistor. OLED 512对应于图22的OLED 212。 OLED 512 of FIG. 22 corresponds to the OLED 212. 存储电容器514对应于图22的存储电容器214。 The storage capacitor 514 corresponds to the storage capacitor 21422 of FIG. 晶体管516和518对应于图22的晶体管216和218。 Transistors 516 and 518 correspond to the transistors 216 and 218 in FIG. 22.

驱动晶体管518的漏极端子连接到电源线VDD,且驱动晶体管518的源极子连接到OLED 512。 The drain terminal of the driving transistor 518 is connected to the power line VDD, and the driving source of the transistor 518 is connected to the pole of the OLED 512. 开关晶体管516连接在相应的数据线Data[j]和驱动晶体管518的栅极端子之间。 The switching transistor 516 is connected to a respective data line Data [j] between the gate terminal of the transistor 518 and the drive. 存储电容器514的一个端子连接到驱动晶体管518的栅极端子,且存储电容器514的另一端子连接到驱动晶体管518的源极端子和OLED512。 One terminal of the storage capacitor 514 is connected to the gate terminal of the driving transistor 518, and the storage capacitor 514 is connected to the other terminal of the driving transistor 518 and the source terminal OLED512.

为像素阵列500提供传感网络550。 Sensor network 550 provides a pixel array 500. 网络550包括传感晶体管534和用于每个像素的传感晶体管532。 Network 550 includes a sensing transistor 534 and sense transistor 532 for each pixel. 晶体管532可以被包括在像素500中。 Transistor 532 may be included in the pixel 500. 传感晶体管534连接到用于多个像素510的开关晶体管532。 Sense transistor 534 is connected to a switching transistor 510 of more than 532 pixels. 在图36中,传感晶体管534连接到用于第j列中的两个像素510的两个开关晶体管532。 In Figure 36, the sense transistor 534 is connected to a j-th column in the two pixels of the two switching transistors 532,510.

用于位置(i, j)处的像素510的晶体管532经由晶体管534连接到数据线DATA。 Transistor 532 for the pixel 510 at the position (i, j) is connected to the transistor 534 via the data line DATA. +1],且还连接到位置(i, j)处的^象素510中的OLED 512。 OLED 512 +1], and it is also connected to a position (i, j) at pixel 510 ^. 类似地,用于位置(ih,j)处的像素510的晶体管532经由晶体管534连接到数据线DATA[j+l],且还连接到位置(ih, j)处的像素510中的OLED 512。 Similarly, for the pixel at position (ih, j) is connected to the transistor 532510 through the transistor 534 to the data line DATA [j + l], and is also connected to a position (ih, j) OLED 512 in the pixel 510 . DATA[j+l]是用于对(j+l)列进行编程的数据线。 DATA [j + l] is used to (j + l) for programming data line column.

通过第"k"行的选择线SEL[k]选择用于位置(i,j)处的像素510的晶体管532。 By "k" th row selection line SEL [k] selected for the position (i, j) pixel of a transistor 532,510. 通过第k,行的选择线SEL[k,]选择用于位置(ih, j)处的像素510的晶体管532。 The first through k, the row selection line the SEL [k,] select the location (ih, j) pixel of a transistor 532,510. 通过第"t"行的选择线SEL[t]选择传感晶体管534。 By the second "t" row select line SEL [t] to select the sense transistor 534. 在"i"、 "ih"、 "k"、 "k,"和"t,,之间可以没有联系。不过,为了使紧凑的像素电路具有较高的分辨率,它们最好是连续。两个晶体管532通过内部线(即监视线Monitor[j, j+l])连接到晶体管534。 In the "i", "ih", "k", there may be no link between the "k," and "t ,,. However, in order to make compact the pixel circuit having a higher resolution, which is preferably continuous. Two transistors connected to the transistor 532 through the internal wire 534 (i.e., monitor line monitor [j, j + l]).

一列中的像素510被分成几个片段(每个片段具有"h"个像素)。 One of the pixels 510 is divided into several fragments (having "h" pixels). 在图36的像素P车列500中, 一列中的两个像素处于一个片段中。 In FIG 36, the pixel P vehicle train 500, two pixels in a column of a segment. 校准组件(例如 Calibration components (e.g.

晶体管534 )被这两个像素共用。 Transistor 534) is shared by two pixels.

在图36中,第j列的像素通过数据线DATA[j]编程,且采集数据通过例 In FIG. 36, pixel j-th column data line through the DATA [j] programming and data acquisition Example

如DATA[j+l](或DATA[jl])的相邻列的数据线读回。 The DATA [j + l] (or DATA [jl]) of the data read back lines of adjacent columns. 因为在编程和提取 Because in programming and extraction

过程中SEL(i)为OFF,开关晶体管516为OFF。 During SEL (i) is OFF, the switching transistor 516 is turned OFF. 传感晶体管534确保没有沖 Sense transistor 534 to ensure that no overshoot

突的读出和编程过程。 Suddenly readout and programming process.

图37示出了使用图36的像素矩阵500的RGBW结构。 FIG 37 shows a structure of the pixel RGBW array 500 of FIG 36. 在图37中,两 In Figure 37, two

个像素形成一个片段。 Pixels forming one segment. 在图37中,"CSR"、 "T1R"、 "T2R"和"T3R"是用 In FIG. 37, "CSR", "T1R", "T2R" and "T3R" is

于红色"R"像素的组件,且对应于图36的514、 518、 516和532; "CSG"、 "T1G"、 "T2G"和"T3G"是用于绿色"G"像素的组件,且对应于图36 The red "R" components of the pixel, and corresponds to FIG. 36 514, 518, 516, and 532; "CSG", "T1G", "T2G" and "T3G" is a green "G" component pixels, and 36 corresponds to FIG.

的514、 518、 516和532; "CSB"、 "T1B"、 "T2B"和"T3B"是用于蓝色"B"像素的组件,且对应于图36的514、518、516和532; "CSW"、 "T1W"、 "T2W"和"T3W"是用于白色"W"像素的组件,且对应于图36的514、 514, 518, 516, and 532; "CSB", "T1B", "T2B" and "T3B" is a blue "B" components of the pixel, and corresponds to FIG. 36, 514,518,516 and 532; "CSW", "T1W", "T2W" and "T3W" for white "W" component pixel, and corresponds to 514 of FIG. 36,

518、 516和532。 518, 516 and 532.

在图37中,"TWB,,代表被用于"W"和"B"的两个像素共享的传感晶体管,且对应于图36的传感晶体管534;且"TGR"代表被用于"G"和"R"的两个像素共享的传感晶体管,且对应于图36的传感晶体管534。 In FIG. 37, "TWB ,, represents a" W "and" B "are two pixels sharing the sense transistor, and corresponds to the sense transistor 534 of FIG. 36; and" a TGR "represents a" G "and" R "of the two pixels share a sensing transistor, and corresponds to FIG 36 of the sense transistor 534.

晶体管T3W和T3G的栅极端子连接到用于第i行的选择线SEL[i]。 T3W T3G transistor and a gate terminal connected to a select line for the i-th row SEL [i]. 晶体管T3B和T3R的栅极端子连接到用于第i行的选择线SEL[i+l]。 The gate terminals of the transistors T3B and T3R is connected to select line for the i-th row SEL [i + l]. 传感晶体管TWB的栅极端子和传感晶体管TGR的栅极端子连接到用于第i行的选择线SEL[i]。 The gate terminal of the sense transistor and the gate terminal of the sensing transistor TWB TGR is connected to select line for the i-th row SEL [i].

使用SEL[i]来感测的两个相邻片段的传感晶体管TWB和TGR被放置在使用SEL[i]来编程的像素的片段区域中,以减小版图(layout)的复杂度, 其中一个片段包括共用相同的传感晶体管的两个像素。 Sensing transistor TWB two adjacent segments using SEL [i] to sense and TGR are placed in use SEL [i] is programmed in a pixel area segment, in order to reduce the complexity of the layout (layout), wherein a fragment comprising two pixels sharing the same sense transistor.

图38示出了用于图37的像素电路的版图。 FIG 38 shows a layout of the pixel circuit 37 of FIG. 在图38中,"R"是与用于红色的像素相关的区域;"G"是与用于绿色的像素相关的区域;"B"是与用于蓝色的像素相关的区域;"W"是与用于白色的像素相关的区域。 In Figure 38, "R" is associated with the pixel for the red region; "G" for the pixel associated with the green region; "B" is associated with a pixel region of blue; "W "it is a region associated with the pixel for the white. "TWB"对应于图37的传感晶体管TWB,且被用于白色的像素和用于蓝色的像素共享。 "TWB" TWB sense transistor corresponds to FIG. 37, and is used for a white pixel and blue pixel sharing. "TGR"对应于图37的传感晶体管TGR,且被用于绿色的像素和用于红色的像素共享。 "TGR" TGR sense transistor corresponds to FIG. 37, and is used for green pixel and a red pixel sharing. 例如,像素的尺寸为208umx 208um。 For example, the pixel size is 208umx 208um. 它显示出该电路对于高分辨率显示器的极d 、像素的应用性。 It exhibits a very high resolution displays for d, the application of the pixel circuit.

27已经通过示例的方式描述了一个或多个当前优选实施例。 27 has been described by way of example one or more of the presently preferred embodiments. 对于本领域技术人员而言,很明显,可以在不偏离权利要求限定的本发明的范围的情况下做出很多变化和修改。 To those skilled in the art, it is apparent, it can be made without departing from the many variations and modifications of the present invention as defined by the scope of the claims.

Claims (18)

1. 一种显示系统,包括:一个或多个像素,每个像素具有发光装置、用于驱动所述发光装置的驱动晶体管和用于选择所述像素的开关晶体管;以及用于监视和提取所述像素的变化以校准所述像素的编程数据的电路。 1. A display system, comprising: one or a plurality of pixels, each pixel having a light emitting device, a driving transistor for driving the light emitting means and for selecting the pixel switching transistors; and means for monitoring and extracts changes said pixel circuit to calibrate the pixel data programming.
2. 根据权利要求1所述的显示系统,其中,所述电路包括传感网络, 用于将所述发光装置和所述驱动晶体管之间的路径连接到监视线。 The display system as recited in claim 1, wherein said sensor network comprises a circuit for connecting path between the light emitting device and the driving transistor to a monitor line.
3. 根据权利要求2所述的显示系统,其中,所述监视线包括直接或间接地连接到所述发光装置或所述驱动晶体管的电源线、用于提供编程数据的数据线或者连接到所述发光装置或所述驱动晶体管的输出数据线。 The display system according to claim 2, wherein said monitor line comprises directly or indirectly connected to the light emitting device driving transistor or the power supply line for providing programming or data lines connected to the data said light emitting means or the output data line driving transistors.
4. 根据权利要求2所述的显示系统,其中,通过第一选择线选择所述开关晶体管,且其中,通过第二选择线激励所述传感网络。 4. The display system of claim 2, wherein the first select line via the switching transistor, and wherein said excitation sensing network via a second select line.
5. 根据权利要求4所述的显示系统,其中,所述第二选择线是所述第一选择线。 The display system as claimed in claim 4, wherein said second select line is the first select line.
6. 根据权利要求2所述的显示系统,其中,所述传感网络包括用于将所述路径连接到所述监视线的传感晶体管。 The display system as recited in claim 2, wherein said sensor comprises a network path for connecting the transistor to the sensing of the monitor line.
7. 根据权利要求6所述的显示系统,其中,通过选择线选择所述开关晶体管,且其中,通过所述选择线选择所述传感晶体管。 The display system as recited in claim 6, wherein said select line by a switching transistor, and wherein said select line through the sensing transistor.
8. 根据权利要求2所述的显示系统,其中,所述网络包括用于将所述路径连接到所述监视线的第一传感晶体管和第二传感晶体管。 8. The display system of claim 2, wherein said network comprises a first sensing transistor and the second sensing transistor is connected to the path of the monitor line.
9. 根据权利要求8所述的显示系统,其中,通过选择线选择所述开关晶体管,且其中,通过第二选择线选择所述第一传感晶体管,且其中,通过第三选择线选择所述第二传感晶体管。 9. The display system of claim 8, wherein said select line by a switching transistor, and wherein the second select line by the first sensing transistor, and wherein the third select line selected by the said second sensing transistor.
10. 根据权利要求1所述的显示系统,其中,所述像素包括用于监视所述像素老化的感测电路,且其中,所述电路包括用于将所述感测电路连接到监^L线的传感网络。 10. The display system as recited in claim 1, wherein the pixel includes a sensing circuit for monitoring the aging of the pixels, and wherein said circuit comprises means for connecting said sensing circuit to monitor ^ L line sensor network.
11. 根据权利要求10所述的显示系统,其中,所述传感网络包括用于将所述监视电路连接到所述监视线的第一传感晶体管和第二传感晶体管。 11. The display system according to claim 10, wherein said sensor network comprises means for sensing a first sensing transistor and the second transistor is connected to the monitoring circuit of the monitor line.
12. 根据权利要求11所述的显示系统,其中,通过选择线选择所述开关晶体管,且其中,通过第二选择线选择所述第一传感晶体管,且其中,通过第三选择线选择所述第二传感晶体管。 12. The display system of claim 11, wherein said select line by a switching transistor, and wherein the second select line by the first sensing transistor, and wherein the third select line selected by the said second sensing transistor.
13. 根据权利要求8所述的显示系统,其中,所述第一传感晶体管被分配给每个像素,且其中,第二感测开关被分配给多于一个像素的多于一个的第一传感晶体管。 13. The display system according to the first claim 8, wherein said first sensing transistor is assigned to each pixel, and wherein the second sensing switch is assigned to more than one pixel more than one sense transistor.
14. 根据权利要求1所述的显示系统,其中,所述一个或多个像素形成RGBW像素阵列。 14. The display system as recited in claim 1, wherein the one or more pixels of the RGBW pixel array is formed.
15. 根据权利要求1所述的显示系统,其中,为所述像素提供编程线, 该编程线用于提供编程数据和监视所述像素的变化。 The display system as recited in claim 1, wherein the pixel line provides programming, the programming data lines for providing programming and monitoring changes in the pixel.
16. 根据权利要求1所述的显示系统,其中,基于监视结果提取所述像素的老化,且其中,基于所述像素的老化对编程数据进行校准。 16. The display system according to claim 1, wherein, based on a monitoring result of extracting the pixel aging, and wherein the aging-based programming pixel calibrating data.
17. 根据权利要求1所述的显示系统,其中,所述系统的至少一部分使用非晶硅、多晶硅、纳米/微型晶硅、有机半导体技术、TFT、 NMOS/PMOS 技术、CMOS技术、MOSFET及其组合制造。 17. The display system as recited in claim 1, wherein at least a portion of the system using amorphous silicon, polycrystalline silicon, nano / micro crystalline silicon, organic semiconductors technologies, TFT, NMOS / PMOS technology, the CMOS technology, and the MOSFET a combination of manufacturing.
18. —种用于驱动显示系统的方法,所述显示系统包括一个或多个像素, 该方法包括以下步骤:在提取周期,向所述像素提供操作信号、监视所述像素中的节点、基于监视结果提取所述像素的老化;以及在编程周期,基于对所述像素的老化的提取来对编程数据进行校准,且向所述像素提供所述编程数据。 18. - kind of method for driving a display system, said display system comprising one or a plurality of pixels, the method comprising the steps of: extraction cycle, to provide an operation signal to the pixels, the pixels monitor node based on monitoring aging of pixels of the extracted result; as well as the programming cycle, based on the extracted pixel aging of the program data is calibrated and provides the programming to the pixel data.
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Cited By (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103562989A (en) * 2011-05-27 2014-02-05 伊格尼斯创新公司 Systems and methods for aging compensation in amoled displays
CN103839517A (en) * 2012-11-22 2014-06-04 乐金显示有限公司 Organic light emitting display device
CN103903556A (en) * 2012-12-24 2014-07-02 乐金显示有限公司 Organic light emitting diode display device and method for driving the same
US9640112B2 (en) 2011-05-26 2017-05-02 Ignis Innovation Inc. Adaptive feedback system for compensating for aging pixel areas with enhanced estimation speed
CN106960658A (en) * 2015-12-02 2017-07-18 乐金显示有限公司 Organic light-emitting display device and driving method thereof
US9721512B2 (en) 2013-03-15 2017-08-01 Ignis Innovation Inc. AMOLED displays with multiple readout circuits
US9741279B2 (en) 2012-05-23 2017-08-22 Ignis Innovation Inc. Display systems with compensation for line propagation delay
US9761170B2 (en) 2013-12-06 2017-09-12 Ignis Innovation Inc. Correction for localized phenomena in an image array
US9792857B2 (en) 2012-02-03 2017-10-17 Ignis Innovation Inc. Driving system for active-matrix displays
US9799248B2 (en) 2011-05-20 2017-10-24 Ignis Innovation Inc. System and methods for extraction of threshold and mobility parameters in AMOLED displays
US9818344B2 (en) 2015-12-04 2017-11-14 Apple Inc. Display with light-emitting diodes
US9818323B2 (en) 2013-03-14 2017-11-14 Ignis Innovation Inc. Re-interpolation with edge detection for extracting an aging pattern for AMOLED displays
US9842544B2 (en) 2006-04-19 2017-12-12 Ignis Innovation Inc. Stable driving scheme for active matrix displays
US9852689B2 (en) 2003-09-23 2017-12-26 Ignis Innovation Inc. Circuit and method for driving an array of light emitting pixels
CN107710318A (en) * 2015-07-10 2018-02-16 夏普株式会社 Pixel circuit, display device, and method for driving same
US9947293B2 (en) 2015-05-27 2018-04-17 Ignis Innovation Inc. Systems and methods of reduced memory bandwidth compensation
US9970964B2 (en) 2004-12-15 2018-05-15 Ignis Innovation Inc. Method and system for programming, calibrating and driving a light emitting device display
US9997110B2 (en) 2010-12-02 2018-06-12 Ignis Innovation Inc. System and methods for thermal compensation in AMOLED displays
US10013907B2 (en) 2004-12-15 2018-07-03 Ignis Innovation Inc. Method and system for programming, calibrating and/or compensating, and driving an LED display
US10012678B2 (en) 2004-12-15 2018-07-03 Ignis Innovation Inc. Method and system for programming, calibrating and/or compensating, and driving an LED display
US10032399B2 (en) 2010-02-04 2018-07-24 Ignis Innovation Inc. System and methods for extracting correlation curves for an organic light emitting device
US10181282B2 (en) 2015-01-23 2019-01-15 Ignis Innovation Inc. Compensation for color variations in emissive devices
US10192479B2 (en) 2014-04-08 2019-01-29 Ignis Innovation Inc. Display system using system level resources to calculate compensation parameters for a display module in a portable device
US10304390B2 (en) 2009-11-30 2019-05-28 Ignis Innovation Inc. System and methods for aging compensation in AMOLED displays
US10311780B2 (en) 2015-05-04 2019-06-04 Ignis Innovation Inc. Systems and methods of optical feedback
US10319307B2 (en) 2009-06-16 2019-06-11 Ignis Innovation Inc. Display system with compensation techniques and/or shared level resources
US10325554B2 (en) 2006-08-15 2019-06-18 Ignis Innovation Inc. OLED luminance degradation compensation
US10325537B2 (en) 2011-05-20 2019-06-18 Ignis Innovation Inc. System and methods for extraction of threshold and mobility parameters in AMOLED displays
US10339860B2 (en) 2015-08-07 2019-07-02 Ignis Innovation, Inc. Systems and methods of pixel calibration based on improved reference values
US10380944B2 (en) 2011-11-29 2019-08-13 Ignis Innovation Inc. Structural and low-frequency non-uniformity compensation
US10388221B2 (en) 2005-06-08 2019-08-20 Ignis Innovation Inc. Method and system for driving a light emitting device display

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6771028B1 (en) 2003-04-30 2004-08-03 Eastman Kodak Company Drive circuitry for four-color organic light-emitting device

Cited By (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
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US10013907B2 (en) 2004-12-15 2018-07-03 Ignis Innovation Inc. Method and system for programming, calibrating and/or compensating, and driving an LED display
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US10127846B2 (en) 2011-05-20 2018-11-13 Ignis Innovation Inc. System and methods for extraction of threshold and mobility parameters in AMOLED displays
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US9640112B2 (en) 2011-05-26 2017-05-02 Ignis Innovation Inc. Adaptive feedback system for compensating for aging pixel areas with enhanced estimation speed
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US9773439B2 (en) 2011-05-27 2017-09-26 Ignis Innovation Inc. Systems and methods for aging compensation in AMOLED displays
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US10380944B2 (en) 2011-11-29 2019-08-13 Ignis Innovation Inc. Structural and low-frequency non-uniformity compensation
US9792857B2 (en) 2012-02-03 2017-10-17 Ignis Innovation Inc. Driving system for active-matrix displays
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US10269294B2 (en) 2012-12-24 2019-04-23 Lg Display Co., Ltd. Organic light emitting diode display device and method for driving the same
US9818323B2 (en) 2013-03-14 2017-11-14 Ignis Innovation Inc. Re-interpolation with edge detection for extracting an aging pattern for AMOLED displays
US10198979B2 (en) 2013-03-14 2019-02-05 Ignis Innovation Inc. Re-interpolation with edge detection for extracting an aging pattern for AMOLED displays
US9721512B2 (en) 2013-03-15 2017-08-01 Ignis Innovation Inc. AMOLED displays with multiple readout circuits
US9997107B2 (en) 2013-03-15 2018-06-12 Ignis Innovation Inc. AMOLED displays with multiple readout circuits
US9761170B2 (en) 2013-12-06 2017-09-12 Ignis Innovation Inc. Correction for localized phenomena in an image array
US10186190B2 (en) 2013-12-06 2019-01-22 Ignis Innovation Inc. Correction for localized phenomena in an image array
US10192479B2 (en) 2014-04-08 2019-01-29 Ignis Innovation Inc. Display system using system level resources to calculate compensation parameters for a display module in a portable device
US10181282B2 (en) 2015-01-23 2019-01-15 Ignis Innovation Inc. Compensation for color variations in emissive devices
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US10403230B2 (en) 2015-05-27 2019-09-03 Ignis Innovation Inc. Systems and methods of reduced memory bandwidth compensation
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CN107710318A (en) * 2015-07-10 2018-02-16 夏普株式会社 Pixel circuit, display device, and method for driving same
US10339860B2 (en) 2015-08-07 2019-07-02 Ignis Innovation, Inc. Systems and methods of pixel calibration based on improved reference values
US10366651B2 (en) 2015-12-02 2019-07-30 Lg Display Co., Ltd. Organic light-emitting display device and driving method thereof
CN106960658A (en) * 2015-12-02 2017-07-18 乐金显示有限公司 Organic light-emitting display device and driving method thereof
US9818344B2 (en) 2015-12-04 2017-11-14 Apple Inc. Display with light-emitting diodes
US10354585B2 (en) 2015-12-04 2019-07-16 Apple Inc. Display with light-emitting diodes

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