CA2536398A1 - A method for extracting the aging factor of flat panels and calibration of programming/biasing - Google Patents

A method for extracting the aging factor of flat panels and calibration of programming/biasing Download PDF

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Publication number
CA2536398A1
CA2536398A1 CA002536398A CA2536398A CA2536398A1 CA 2536398 A1 CA2536398 A1 CA 2536398A1 CA 002536398 A CA002536398 A CA 002536398A CA 2536398 A CA2536398 A CA 2536398A CA 2536398 A1 CA2536398 A1 CA 2536398A1
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CA
Canada
Prior art keywords
voltage
aging
during
t1
pixel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002536398A
Other languages
French (fr)
Inventor
G. Reza Chaji
Arokia Nathan
Original Assignee
G. Reza Chaji
Arokia Nathan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by G. Reza Chaji, Arokia Nathan filed Critical G. Reza Chaji
Priority to CA002536398A priority Critical patent/CA2536398A1/en
Priority claimed from TW096104837A external-priority patent/TWI450247B/en
Priority claimed from CA002576811A external-priority patent/CA2576811C/en
Publication of CA2536398A1 publication Critical patent/CA2536398A1/en
Application status is Abandoned legal-status Critical

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0819Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/04Maintaining the quality of display appearance
    • G09G2320/043Preventing or counteracting the effects of ageing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0693Calibration of display systems

Abstract

Disclosed is a technique to extract the pixel aging data and calibrate the pixel programming or biasing data to provide a highly accurate operation.

Description

FIELD OF THE INVENTION

'The present invention generally relates to the flat panels including light emitting device displays, and sensors.

SUMMARY OF INVENTION

Disclosed technique calibrates the programming/biasing voltages by the extracted aging factor of the pixels.

ADVANTAGES
The programming/biasing of a flat panel becomes highly accurate resulting in less error. Thus, it facilitates the realization of high-resolution large-area flat panels for displays and sensors.

FIG. 1(a) shows a 2-transistor (2T) pixel circuit in active matrix organic light emitting diode (AMOLED) displays with 'n' rows and 'm' columns in which the OLED is at the source of the drive TFT (T1). A pixel circuit in which OLED is at the drain is also depicted in FIG. 1(b). These circuits can be fabricated with any technology including poly silicon, amorphous silicon, organic, and etc. Also, the n-type transistors can be replaced with p-type transistors based on complementary circuit concept.

The signal diagram for extracting the aging of the pixel circuit shown in FIG.
I is displayed in FIG. 2(a). Here, the aging of pixel (i,j) is extracted by monitoring the voltage of VDD. During the first extraction cycle, gate of T1 at the pixel (i,j) is charged to a calibration voltage (VGC). this voltage includes the aging prediction, calculated based on the previous aging data, and a bias voltage. Also, the other pixel circuits in the ith row are programmed to zero.
During the second extraction cycle, SEL(i) goes to zero and so the gate voltage of T1(i,j) is affected by the dynamic effects such as charge injection and clock feed-through. During this cycle, T1 acts as a amplifier since it is biased with a constant current through VDD(i). Therefore, the effects of shift in the VT
of T1 (i,j) is amplified, and the voltage of the VDD changes accordingly.
Therefore, this method enables extraction of very small amount of VT shift resulting in highly accurate calibration.

During the normal operation shown in FIG. 2(b), the gate of T1 is charged to a calibrated programming voltage (Vcp). Next, during the driving cycle, SEL is low and T1 (i,j) provides current to the OLED (i,j).

FIG. 3 shows the effect of shift in the threshold voltage of T1 (VT shift) on the voltage of the VDD line. It is evident that T1 can provide a reasonable gain so that makes the extraction of small VT shift possible.

FIG. 4(a) shows a 3-transistor (3T) pixel circuit for active matrix organic light emitting diode (AMOLED). A pixel circuit in which OLED is at the drain is also depicted in FIG. 4(b). These circuits can be fabricated in any technologies including poly silicon, amorphous silicon, organic TFTs, and etc. Also, the transistors can be replaced with p-type transistors based on complementary circuit concept.

The signal diagram for extracting the aging of the pixel circuits shown in FIG. 4 is displayed in FIG. 5(a). Here, the aging of pixel is extracted by monitoring the voltage of VOUT. Moreover, VOUT can be the same as VDATA line of the physically adjacent column (row).

During the first extraction cycle, gate of T1 is charged to a calibration voltage (Vcc). This voltage includes the aging prediction, calculated based on the previous aging data. During the second extraction cycle, SELI goes to zero, and so the gate voltage of T1 is affected by the dynamic effects including the charge injection and clock feed-through. During the second extraction cycle, T1 acts as an amplifier since it is biased with a constant current through VOUT.
Therefore, the aging of the pixel is amplified, and the voltage of the VOUT
changes accordingly.
Therefore, this method enables extraction of very small amount of VT shift resulting in highly accurate calibration.

Also, applying a current/voltage to the OLED, we can extract the voltage/current of the OLED
and determines the aging factor of the OLED and use it for more accurate calibration of the luminance data.

During the normal operation shown in FIG. 5(b), the gate of TI is charged to a calibrated programming voltage (Vcp). Next, during the driving cycle, SEL is low and T1 provides current to the OLED.

FIG.6 (a) shows a 4-transistor (4T) pixel circuit for active matrix organic light emitting diode (AMOLED). A pixel circuit in which OLED is at the drain is also depicted in FIG.6 (b). These circuits can be fabricated in any technologies including poly silicon, amorphous silicon, organic TFTs, and etc. Also, the transistors can be replaced with p-type transistors based on complementary circuit concept. Also, the position of T3 and T4 can be switched without affecting the functionality of the pixel. Moreover, SEL(j-1] or SEL[j+I] can be replaced with SEL[j]. In this case, SELU] should be ON as the sum of both signal.

The signal diagram for extracting the aging of the pixel circuit shown in FIG.
6 is displayed in FIG. 7. Here, the aging of pixel is extracted by monitoring the voltage of VOUT. Moreover, VOUT can be the same as VDATA line of the physically adjacent column (row).

During the first extraction cycle, gate of T1 is charged to a calibration voltage (VGC). This voltage includes the aging prediction, calculated based on the previous aging data. During the second extraction cycle, SEL1 goes to zero and so the gate voltage of TI is affected by the dynamic effects including the charge injection and clock feed-through. During the second extraction cycle, T1 acts as an amplifier since it is biased with a constant current through VOUT.
Therefore, the aging of the pixel is amplified and change the voltage of the VOUT. Therefore, this method enables extraction of very small amount of VT shift resulting in highly accurate calibration.

Also, applying a current/voltage to the OLED, we can extract the voltage/current of the OLED
and determines the aging factor of the OLED and use it for more accurate calibration of the luminance data.

During the normal operation shown in FIG. 7(b), the gate of Tl is charged to a calibrated programming voltage (Vcp). Also, during the driving cycle, SEL is low and Tl (i,j) provides current to the OLED (i,j).

FIG.8 (a) shows a 3-transistor (3T) pixel circuit for active matrix organic light emitting diode (AMOLED). A pixel circuit in which OLED is at the drain is also depicted in FIG.8 (b). These circuits can be fabricated in any technologies including poly silicon, amorphous silicon, organic TFTs, and etc. Also, the transistors can be replaced with p-type transistors based on complementary circuit concept.

The signal diagram for extracting the aging of the pixel circuit shown in FIG.
8 is displayed in FIG. 9. Here, the aging of pixel is extracted by monitoring the voltage of VOUT. During the extraction cycle, gate of T1 is charged to a calibration voltage (VGC). This voltage includes the aging prediction which is calculated based on the previous aging data. Also, during the extraction cycle, TI acts as an amplifier since it is biased with a constant current through VOUT. Therefore, the aging of the pixel is amplified and change the voltage of the VOUT.
Therefore, this method enables extraction of very small amount of VT shift resulting in highly accurate calibration.

Also, applying a current/voltage to the OLED, we can extract the voltage/current of the OLED
and determines the aging factor of the OLED and use it for more accurate calibration of the luminance data.

During the normal operation shown in FIG. 9(b), the gate of T1 is charged to a calibrated programming voltage (VcP). Also, during the driving cycle, SEL is low and TI
(i,j) provides current to the OLED (i,j).

FIG.10 (a) shows a 3-transistor (3T) pixel circuit for active matrix organic light emitting diode (AMOLED). A pixel circuit in which OLED is at the drain is also depicted in FIG. 10(b). These circuits can be fabricated in any technologies including poly silicon, amorphous silicon, organic TFTs, and etc. Also, the transistors can be replaced with p-type transistors based on complementary circuit concept.

The signal diagram for extracting the aging of the pixel circuit shown in FIG.
10 is displayed in FIG. 11. Here, the aging of pixel is extracted by monitoring the voltage of VDATA. During the first extraction cycle gate voltage of TI is charged to a calibration voltage (VGC) this voltage includes the aging prediction which is calculated based on the previous aging data. Also, during the second extraction cycle, TI acts as an amplifier since it is biased with a constant current through VDATA. Therefore, the aging of the pixel is amplified and change the voltage on the VDATA. Therefore, this method enables extraction of very small amount of VT
shift resulting in highly accurate calibration.

Also, applying a current/voltage to the OLED, we can extract the voltage/current of the OLED
and determines the aging factor of the OLED and use it for more accurate calibration of the luminance data.

During the normal operation shown in FIG. 11(b), the gate of T1 is charged to a calibrated programming voltage (Vcp). Also, during the driving cycle, SEL is low and TI
(i,j) provides current to the OLED (i,j).

FIG.12 shows a 3-transistor (3T) pixel circuit for active matrix for sensor applications including x-ray, imagers, bio-sensors, etc. This circuit can be fabricated in any technologies including poly silicon, amorphous silicon, organic TFTs, and etc. Also, the transistors can be replaced with p-type transistors based on complementary circuit concept.

The signal diagram for extracting the aging of the pixel circuit shown in FIG.
12 is displayed in FIG. 13. Here, the aging of pixel is extracted by monitoring the voltage of VOUT. During the first extraction cycle, the gate of Tl is charged to a calibration voltage (VGC). This voltage includes the aging prediction which is calculated based on the previous aging data. During the second extraction cycle, SEL goes to zero and so the gate voltage of T1 is affected by the dynamic effects including the charge injection and clock feed-through. During the second extraction cycle, T1 acts as an amplifier since it is biased with a constant current through VOUT.
Therefore, the aging of the pixel is amplified and change the voltage of the VOUT. Therefore, this method enables extraction of very small amount of VT shift resulting in highly accurate calibration.

During the normal operation shown in FIG. 13(b), the gate of T1 is charged to a calibrated biasing voltage (Vcp). During the second operating cycle, SEL and READ signals are low and the sensor manipulates the gate voltage of T1. During the readout cycle, the voltage at the drain of TI
is read back while a constant biasing current is applied to the VOUT. The change in the gate voltage of T1 is amplified and reflected on VOUT, and so at the end of the readout cycle the pixel data is read back.

FIG.14 shows a 3-transistor (3T) pixel circuit for active matrix for sensor applications including x-ray, imagers, bio-sensors, etc. This circuit can be fabricated in any technologies including poly silicon, amorphous silicon, organic TFTs, and etc. Also, the transistors can be replaced with p-type transistors based on complementary circuit concept.

The signal diagram for extracting the aging of the pixel circuit shown in FIG.
14 is displayed in FIG. 14. Here, the aging of pixel is extracted by monitoring the voltage of VBIAS. During the first extraction cycle, the gate of T1 is charged to a calibration voltage (Vcc). This voltage includes the aging prediction which is calculated based on the previous aging data. During the second extraction cycle, SEL goes to zero and so the gate voltage of T1 is affected by the dynamic effects including the charge injection and clock feed-through. During the second extraction cycle, T1 acts as an amplifier since it is biased with a constant current through VBIAS.
Therefore, the aging of the pixel is amplified and change the voltage of the VBIAS. Therefore, this method enables extraction of very small amount of VT shift resulting in highly accurate calibration.

During the normal operation shown in FIG. 15(b), the gate of T1 is charged to a calibrated biasing voltage (Vcp). During the second operating cycle, SEL and READ signals are low and the sensor manipulates the gate voltage of T1. During the readout cycle, the voltage at the drain of T1 is read back while a constant biasing current is applied to the VBIAS. The change in the gate voltage of T1 is amplified and reflected on VBIAS, and so at the end of the readout cycle the pixel data is read back.

Claims

CA002536398A 2006-02-10 2006-02-10 A method for extracting the aging factor of flat panels and calibration of programming/biasing Abandoned CA2536398A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA002536398A CA2536398A1 (en) 2006-02-10 2006-02-10 A method for extracting the aging factor of flat panels and calibration of programming/biasing

Applications Claiming Priority (10)

Application Number Priority Date Filing Date Title
CA002536398A CA2536398A1 (en) 2006-02-10 2006-02-10 A method for extracting the aging factor of flat panels and calibration of programming/biasing
CA002541347A CA2541347A1 (en) 2006-02-10 2006-02-10 A method for driving and calibrating of amoled displays
TW096104837A TWI450247B (en) 2006-02-10 2007-02-09 Method and system for pixel circuit displays
JP2008553587A JP2009526248A (en) 2006-02-10 2007-02-09 Method and system for light emitting devices indicator
CN 200780013047 CN101449311B (en) 2006-02-10 2007-02-09 Method and system for light emitting device displays
PCT/CA2007/000192 WO2007090287A1 (en) 2006-02-10 2007-02-09 Method and system for light emitting device displays
EP20070710608 EP1987507B1 (en) 2006-02-10 2007-02-09 Method and system for electroluminescent displays
CA002576811A CA2576811C (en) 2006-02-10 2007-02-09 Method and system for light emitting device displays
KR1020087022116A KR20080098057A (en) 2006-02-10 2007-02-09 Method and system for light emitting device displays
US11/673,512 US7924249B2 (en) 2006-02-10 2007-02-09 Method and system for light emitting device displays

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Publication Number Publication Date
CA2536398A1 true CA2536398A1 (en) 2007-08-10

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CA002536398A Abandoned CA2536398A1 (en) 2006-02-10 2006-02-10 A method for extracting the aging factor of flat panels and calibration of programming/biasing
CA002541347A Abandoned CA2541347A1 (en) 2006-02-10 2006-02-10 A method for driving and calibrating of amoled displays

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CA (2) CA2536398A1 (en)

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CN101449311A (en) 2009-06-03
CA2541347A1 (en) 2007-08-10
CN101449311B (en) 2012-09-05

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