CN101443921A - High-efficiency solar cell with insulated vias - Google Patents

High-efficiency solar cell with insulated vias Download PDF

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Publication number
CN101443921A
CN101443921A CNA2007800166062A CN200780016606A CN101443921A CN 101443921 A CN101443921 A CN 101443921A CN A2007800166062 A CNA2007800166062 A CN A2007800166062A CN 200780016606 A CN200780016606 A CN 200780016606A CN 101443921 A CN101443921 A CN 101443921A
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China
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hole
insulating barrier
layer
solar cell
transparent conductor
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CNA2007800166062A
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Chinese (zh)
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D·洛坤
S·考
J·R·希茨
G·A·米勒
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Nanosolar Inc
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Nanosolar Inc
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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Abstract

Methods and devices are provided for high-efficiency solar cells. In one embodiment, the device comprises of a solar cell having a high efficiency backside electrode configuration, wherein the solar cell comprises of: at least one transparent conductor, a photovoltaic layer, at least one bottom electrode, and at least one backside electrode. The device may include a plurality of electrical conduction fingers mounted to the transparent conductor in the solar cell. The device may include a plurality of filled vias coupled to the electrical conduction fingers, wherein the vias extend through the transparent conductor, the photovoltaic layer, and the bottom electrode, wherein the vias have a conductive core that conducts charge from the transparent conductor to the backside electrode. The via insulating layer may separate the conductive core in each via from the bottom electrode, wherein the insulating layer may be formed by a variety of techniques such as but not limited to aerosol coating of the via.

Description

High performance solar batteries with insulated vias
Technical field
The present invention relates to photoelectron device, more specifically, relate to for example manufacturing of the photoelectron device of solar cell.
Background technology
Photoelectron device can convert radiant energy to electric energy, or conversely.These devices generally include and are clipped in two active layers between the electrode, electrode and rear electrode before these two electrodes sometimes are called as, and wherein at least one electrode is normally transparent.This active layer generally includes one or more semi-conducting materials., be applied to two voltages between the electrode and can cause electric current to flow through this active layer for example in the light-emitting diode (LED) at light-emitting device.This electric current causes this active layer luminous.For example in the solar cell, this active layer becomes electric energy with this power conversion then from the light absorption energy in photovoltaic device, and this electric energy shows as two voltage and/or electric currents between the electrode.The array of extensive such solar cell has the potentiality in the traditional power plant that replaces the burning that relies on fossil fuel.Yet in order to allow solar cell become the cost-efficient replacement mode that has to tradition generating, the cost of every watt of energy output must be more competitive than current electrical network expense.When coming to see, realize that also there are a large amount of technological challenges in this target.
Most of conventional solar cell rely on silicon-based semiconductor.In typical silica-based solar cell, deposition n type silicon layer (sometimes being called as emitter layer) on p type silicon layer.The radiation that knot between contiguous p type layer and the n type layer absorbs produces electronics and hole.Electronics is touched the electrode of n type layer and collects, and the hole is touched the electrode collection of p type layer.Because light must arrive this knot, so at least one electrode partially transparent at least.Many current solar cell design adopt the transparent conductive oxide (TCO) of tin indium oxide (ITO) for example as transparency electrode.
With another problem in the existing solar energy manufacturing technology be that single photoelectron device only can produce smaller voltage.Therefore, usually several devices need be electrically connected in series to obtain high voltage, thereby can utilization and high pressure, low current (for example operate, utilization is than the power delivery of higher voltage through circuit, and it reduces the resistive loss that can take place during circuit carries out power delivery than higher electric current utilizing) validity that is associated.
Developed some kinds designs solar cell interconnect is become module before.For example, early stage photovoltaic module manufacturers attempts to adopt " stacked tile type is arranged (shingline) " scheme to come interconnect solar cells, and the bottom of one of them battery is placed on the apical margin of next battery, and this is similar to puts on the roof watt.Unfortunately, scolder and silicon wafer material are incompatible.Between silicon and the scolder rigidity of different thermal coefficient of expansion and wafer cause the scolder contact with temperature cycles premature damage.
Another problem of interconnected in series photoelectron device be derived from transparency electrode in the related high resistivity of TCO that adopts.This high resistivity has limited the size of series-connected individual cells.In order to carry the electric current from a battery to next battery, transparency electrode can be augmented the bus that is formed on the tco layer and the conductive grids (grid) of finger (finger) usually.Yet this finger and bus produce covers, thereby reduces the overall efficiency of battery.In order to reduce because of resistance and cover the efficiency losses that causes, battery must be relatively little.Therefore, a large amount of baby batteries must be linked together, this need be provided with a large amount of interconnection and greater room between battery.Make the array relative difficult and the costliness of a large amount of baby batteries.And, utilizing flexible solar modules, stacked tile type is arranged also inadvisable, because a large amount of watts interconnection is relatively complicated, consuming time and the consumption labour, therefore can increase cost in the module installation process.
In order to overcome this defective, utilized electric isolate conductive contact exploitation photoelectron device, wherein should electricity isolate conductive contact according to following circuit through battery: from transparent " preceding " electrode, through active layer and " after " electrode, electric isolated electrode below being positioned at rear electrode.United States Patent (USP) 3,903,427 disclose a kind of example of using this contact in silica-based solar cell.Though the overall efficiency that this technology does not reduce resistive loss and can improve solar battery apparatus, but the cost of silica-based solar cell is still higher, this is because adopt the vacuum treatment technology when making battery, and adopts the cost of thick silicon monocrystal wafer higher.
This causes solar cell researchers and producer to develop dissimilar solar cells, so that compare with traditional silica-based solar cell, and can be with cheaper cost and bigger scale manufacturing solar cell.The example of this solar cell comprises: the battery of active absorbent layer with dye-sensitized TiOx nano particle (being used for the Graetzel battery), Copper Indium Gallium Selenide (being used for the CIG solar cell) of the silicon of comprising (for example, being used for amorphous, microcrystal or polycrystalline silicon battery), organic oligomer or polymer (being used for organic solar batteries), bilayer or interposed layer (interpenetrating) or inorganic and organic material (being used to mix organic/inorganic solar cell), liquid or gel base electrolyte; Its active layer comprises the battery of CdSe, CdTe and above-mentioned composition, and wherein active material exists with arbitrary form of some forms of including, but are not limited to following form: block (bulk) material, microparticle, nano particle or quantum dot.The battery of many these types can be configured on the flex substrate (for example, stainless steel paillon foil).Though can make the active layer of these types in non-vacuum environment, being electrically connected in the battery and between battery needs the one or more metal conducting layers of vacuum moulding machine usually.
For example, Figure 1A illustrates the part of prior art solar battery array 1.This array 1 is configured on the flexible dielectric base 2.Pass substrate 2 and form series interconnect holes 4, and for example by sputtering technology, deposited bottom electrode layer 6 on the sidewall in the front surface of substrate and hole.Pass bottom electrode and substrate formation current collection holes 8 at select location then, follow above bottom electrode 6 and the one or more semiconductor layers 10 of the side wall deposition of series interconnect holes 4 and current collection holes 8.Utilize the means of shadow mask deposition transparent conductor layer 12 that covers series interconnect holes 4 then.On the rear side of substrate 2, deposit second metal level 14 then, thereby electrically contact, and between battery, provide interconnected in series through series interconnect holes through current collection holes and transparent conductor layer 12.Laser scribing 16,18 on this front side and rear side is separated into each battery with single unit system.
Figure 1B illustrates another kind of prior art array 20, and it is the modification of array 1.Array 20 also is configured on the flexible dielectric base 22.Pass substrate 22 and form series interconnect holes 24, and for example by sputtering technology, deposited bottom electrode layer 26 on the sidewall in the front and rear surfaces of substrate 22 and hole 24.Pass bottom electrode and substrate at select location then and form current collection holes 28, then above the bottom electrode 26 of front side and series interconnect holes 24 and current collection holes 28 and sidewall on one or more semiconductor layers 30 of deposition and transparency conducting layer 32.Utilize the shadowing mask that covers other all parts except that current collection holes 28 then, deposition second metal level 34 on the rear side of substrate 22, thus electrically contact with transparent conductor layer 32.Laser scribing 36,38 on this front side and rear side is separated into each battery with single unit system.
Shown in Figure 1A-1B, make solar battery array and have two significant deficiency.At first, by the sputtering technology depositing metal layers, and sputtering technology belongs to vacuum technique.Under extensive rolling type (roll-to-roll) manufacturing environment, implement relatively slow, the difficulty and expensive of vacuum technique.The second, manufacture process produces integral array, and can not classify to each battery for output (yield).This means that only bad battery seldom can damage this array, therefore increase cost.In addition, manufacture process is very responsive for the form and the size in hole.Because the sidewall in vertical conductive rim hole carries out, can not increase enough conductances even the hole done greatly.Therefore, have narrow bottleneck (process window), it can increase manufacturing cost and reduce the output of useful assembly.And, though adopt vacuum moulding machine realistic for the amorphous si semiconductor layer, actual for for for example high performance solar batteries of the composition of copper, indium, gallium and selenium or sulphur (sometimes being also referred to as " CIGS battery "), not meeting.In order to deposit cigs layer, must deposit three kinds or four kinds of elements according to the ratio of accurate control.This just extremely difficulty utilize vacuum deposition process to realize.
Therefore, need a kind of overcome the photoelectron device structure of above-mentioned defective and the corresponding method that is used to make this battery in the art.
Summary of the invention
Embodiments of the invention have solved to the above-mentioned defective of small part.The present invention uses a kind of through the improved structure that overcomes the known devices shortcoming, thereby uses insulating material in the through hole that forms in photovoltaic device.By different embodiments of the invention, the part of these and other purposes described herein will be implemented at least.
In one embodiment of the invention, this device comprises a solar cell with efficient rear electrode configuration, and wherein this solar cell comprises: at least one transparent conductor, photovoltaic layer, at least one bottom electrode and at least one rear electrode.This device can comprise the conductive fingers on a plurality of transparent conductors that are installed in the solar cell.This device can comprise a plurality of filling vias that are connected to conductive fingers, wherein this through hole passes at least one transparent conductor, a photovoltaic layer and at least one bottom electrode, and wherein this through hole has a conductive core that electric charge is conducted to rear electrode from transparent conductor.The through hole insulating barrier can separate conductive core in each through hole and bottom electrode, wherein forms this insulating barrier by spraying coating through hole.
Should be appreciated that, back conductor can with the bottom electrode electric insulation, and be connected by filling vias, these through hole each intervals are enough near, thereby reduced the conductance requirement of upper electrode, and no longer need be to cover the area of bus.Optionally, can form this insulating barrier by spraying coating through hole.This thickness of insulating layer can be between about 20 to about 100 microns.By non-limiting example, this insulating barrier can be made by at least a following material: vinylacetic acid ethene fat (EVA), polyvinyl alcohol (PVOH), polyvinyl acetate (PVA), polyvinylpyrrolidone (PVP) and/or a kind of Tg are lower than about 150 ℃ thermoplastic polymer.Optionally, also can use other electrical insulating materials.Photovoltaic layer can be made of two discrete layers that form the P-N knot at least, and wherein at least one layer comprises the material based on CIS.Each filling vias diameter separately is substantially about 1mm or littler.This insulating barrier can cover the part of transparent conductor around the sidewall of through hole and each through hole, and wherein this part is positioned at from the scope of the about 2 times of through-hole diameters in through hole edge.
In another embodiment of the present invention, provide a kind of method that forms with the solar cell of efficient rear electrode configuration, wherein this solar cell comprises: at least one transparent conductor, a photovoltaic layer and at least one bottom electrode.Can form a plurality of through holes that pass this transparent conductor, photovoltaic layer and bottom electrode.Can be coated with through hole to form insulating barrier on the sidewall in each hole.This method can comprise with a conductive core fills each through hole, and this core and transparent conductor are electrically connected, and by the insulating barrier in the through hole with the bottom electrode electric insulation.Can be provided with a rear electrode, and link to each other with conductive core in each through hole in fact.
Should be appreciated that this application step can comprise uses a source, with spraying insulating material below solar cell, thereby avoids being coated with insulating material basically fully on transparent conductor.Coating also can comprise spraying insulating material below solar cell, reduces to minimum so that need not cover with the material that transparent conductor can will be deposited on the transparent conductor.Coating also can comprise spraying insulating material above solar cell, and covers with transparent conductor and reduce to minimum with the material that will be deposited on the transparent conductor.Optionally, this application step can comprise the insulating material that sprays sufficient amount with the covering through-hole wall, and not exclusively fills up through hole.Coating also can comprise the insulating material that sprays sufficient amount with the covering through-hole wall, and the bottom surface of covering bottom electrode is to form a bottom insulation layer.Coating also can comprise by use spray in through hole and forms an insulating barrier.
In another embodiment of the present invention, coating comprises by using a kind of insulation spray and forms an insulating barrier that this insulation spray is made up of a kind of composition and a kind of gluing component of pure electric Jie's character.Coating can be included in that using gases impacts on the almost completely consistent coating of solar cell one side, so that insulating material is introduced in each through hole.Using gases impacted any through hole that is insulated clogged with material with removing after coating also can be included in the spraying through hole.Coating can comprise by the almost completely consistent insulating material of side printing last layer at solar cell, and the using gases impact is introduced this insulating material in each through hole, and in consistent insulating barrier, produce opening, thereby in each through hole, form insulating barrier corresponding to each through hole.Thereby also can comprising, this method use the hole punched device puncture to form a plurality of through holes by at least one transparent conductor, a photovoltaic layer and at least one bottom electrode.And this method can be included in and form a plurality of conductive fingers on the transparent conductor in the solar cell.Coating also can comprise by the almost completely consistent insulating material of side printing last layer at solar cell, and use suction that the insulating material of consistent coating is drawn in each through hole at the opposite side of solar cell, and in consistent insulating barrier, produce opening, thereby in each through hole, form insulating barrier corresponding to each through hole.
Remainder and accompanying drawing by the reference specification are further understood that character of the present invention and advantage.
Description of drawings
Figure 1A is the schematic cross-section according to the part of the solar battery array of prior art;
Figure 1B is the schematic cross-section according to the part of the replacement solar battery array of prior art;
Fig. 2 A is the vertical cross-section schematic diagram of the part of the array of photoelectron device according to an embodiment of the invention.
Fig. 2 B is the floor map of the array of Figure 1A.
Fig. 2 C-2E is the floor map of replacement trace graphics that is used for the photoelectron device of diagram Fig. 2 A-2B shown type.
Fig. 3 is used to illustrate a series of schematic diagrames of the manufacture process of photoelectron device array according to an embodiment of the invention.
Fig. 4 is the decomposing schematic representation that is used to illustrate according to the manufacture process of the photoelectron device array of alternative embodiment of the present invention.
Fig. 5 A is the decomposing schematic representation that is used to illustrate according to the manufacture process of the photoelectron device array of another alternative embodiment of the present invention.
Fig. 5 B is the schematic cross-section of a part that the array of Fig. 5 A is shown.
Fig. 6 A-6I is used to illustrate the schematic cross-section of the forming process of electric contact piece according to an embodiment of the invention.
Fig. 7-9 shows different tracks figure according to an embodiment of the invention.
Figure 10 shows the device that forms through hole according to an embodiment of the invention.
Figure 11 A-11D shows a kind of method that forms insulating barrier according to embodiments of the invention.
Figure 12 A-12C shows a kind of method that forms insulating barrier according to embodiments of the invention.
Figure 13 A-13C shows a kind of method that forms insulating barrier according to embodiments of the invention.
Figure 14 A-14C shows a kind of method that forms insulating barrier according to embodiments of the invention.
Figure 15 A-15C shows a kind of method that forms insulating barrier according to embodiments of the invention.
Figure 16 A-16B shows a kind of method that forms insulating barrier according to embodiments of the invention.
Embodiment
Should be appreciated that aforementioned general description and following specific descriptions only are exemplary and indicative, right of the presently claimed invention are not applied any restriction.It should be noted that as used in this specification and the appended claims, singulative " " (" a ", " an " and " the ") comprises its plural form, is not like this unless context offers some clarification on.Therefore, when for example mentioning " a kind of material ", it can comprise the mixing of multiple material, and when mentioning " a kind of compound ", it can comprise multiple compound, or similar or the like.Except the conflicting part of content that they and this specification are clearly stated, the document of being quoted is incorporated into this by reference fully here.
In this specification and claims thereafter, will mention a plurality of terms that must be defined as having following implication:
" optionally " or " optionally " mean subsequently situation about describing and may or may not take place so that this description comprises the example that example that this situation takes place and this situation do not take place.For example, if a kind of device optionally comprises a kind of feature of voltage barrier film, this means this voltage barrier film feature possibility or may not exist, and therefore, this description had both comprised that device wherein has the structure of this voltage barrier film feature, also comprised the non-existent structure of this voltage barrier film feature.
Fig. 2 A-2B illustrates the array 100 of photoelectron device according to an embodiment of the invention.In certain embodiments, can consider in photoelectron device array 100, to carry out interconnected in series.Array 100 comprises first apparatus module 101 and second apparatus module 111.These apparatus modules 101,111 can be photovoltaic device, for example solar cell, perhaps light-emitting device, for example light-emitting diode.In a preferred embodiment, apparatus module the 101, the 111st, solar cell.First and second apparatus modules 101,111 are connected to insulating carrier substrate 103, and insulating carrier substrate 103 can be made by for example plastic material of about 50 micron thickness, for example PETG (PET).This carrier substrates 103 can and then be connected to thicker structure dividing plate 105, so that array 100 is installed to for example outdoor locations on roof, structure dividing plate 105 is for example made by the polymerization roof curtain material of TPO (TPO) or ethylene propylene diene rubber (EPDM) and so on.
Can from comprise several layers stacked together than about 4 inches long 12 inches wide apparatus modules 101,111 of lengthy motion picture intercepting.Each apparatus module 101,111 generally includes device layer 102,112 and the insulating barrier 106,116 between bottom electrode 104,114 and conductive soleplate 108,118 that touches bottom electrode 104,114.Should be understood that in some embodiments of the invention, base plate 108,118 can be described as backside top electrode 108,118.Bottom electrode 104,114; Insulating barrier 106,116 and base plate 108,118 constitute substrate S 1, S 2With supportive device layer 102,112.
Different with the battery of the prior art that forms substrate by deposition of thin metal level on dielectric base, embodiments of the invention adopt based on the substrate S of flexible bulk electric conducting material such as paillon foil 1, S 2Though for example the block materials of paillon foil is thicker than the vacuum deposited metal layer of prior art, they are cheap more, easier acquisition and be easier to processing.Preferably, at least bottom electrode 104,114 by tinsel for example aluminium foil make.In addition, can adopt copper, stainless steel, titanium, molybdenum or other suitable tinsel.As example, bottom electrode 104,114 and base plate 108,118 can be made by about 1 micron aluminium foil to about 200 micron thickness, be preferably about 25 microns to about 100 micron thickness; Insulating barrier 106,116 can by about 1 micron to the plastic foil material of about 200 micron thickness for example PETG (PET) make, be preferably about 10 microns to about 50 micron thickness.Optionally, base plate 108,118 can be made up of the gold-plated form of the silver-plated form of the copper facing form of stainless steel, copper, titanium, molybdenum, steel, aluminium, any previous materials, any previous materials, any previous materials or any combination wherein.In one embodiment, except other, bottom electrode 104,114; Insulating barrier 106,116 and base plate 108,118 are stacked together, form initial substrate S 1, S 2Though bottom electrode 104,114 and base plate 108,118 can use paillon foil to make, can also adopt net grid on the back side of insulating barrier 106,116 as base plate.Utilize conductive ink or coating this grid can be printed on the back side of insulating barrier 106,116.Wherein, a suitable conductive ink or an example of coating are Dow
Figure A200780016606D0015091523QIETU
The high conductive silver ink of PI-2000, it can be from the available city Dow Corning company of (midland michigan) obtain.Dow It is the registered trade mark of the Dow Corning company in available city.And, by the surface of anodic oxidation, perhaps, form insulating barrier 106,116 by spraying well known in the art, coating or printing technology coating insulating coating as the paillon foil of bottom electrode 104,114 and/or base plate 108,118.
Device layer 102,112 generally includes the active layer 107 that is arranged between transparency conducting layer 109 and the bottom electrode 104.As example, device layer 102,112 can be about 2 micron thickness.At least the first device 101 one or more electric contact pieces 120 that comprise between transparency conducting layer 109 and the base plate 108.Electric contact piece 120 forms and passes transparency conducting layer 109, active layer 107, bottom electrode 104 and insulating barrier 106.Electric contact piece 120 provides the conductive path between transparency conducting layer 109 and the base plate 108.Electric contact piece 120 is isolated with active layer 107, bottom electrode 104 and insulating barrier 106 electricity.
Contact 120 all can comprise the through hole that passes active layer 107, transparency conducting layer 109, bottom electrode 104 and insulating barrier 106.The diameter of each through hole can be about 0.1 millimeter to about 1.5 millimeters, is preferably 0.5 millimeter to about 1 millimeter.By punching or boring,, perhaps, form above-mentioned through hole by the combination of these technologies for example by machinery, laser or electron-beam drilling.Insulating material 122 is coated to the sidewall of through hole, thereby is formed into the passage of base plate 108 by insulating material 122.The thickness of insulating material 122 can be about 1 micron to about 200 microns, is preferably about 10 microns to about 200 microns.
Insulating material 122 should be preferably at least 10 micron thickness, to guarantee the covering conductive surface that it exposes later fully.Can for example comprise and carry out ink jet printing or distribution by multiple typography, form insulating material 122 through nozzle ring.Partially filled at least this passage of connector 124 of making by electric conducting material, and between transparency conducting layer 109 and base plate 108, form and electrically contact.Can print this electric conducting material similarly.Suitable material and method for example are that (be called as " solder jetting (solderjet) ", it is by Texas Pu Lainuo city (equipment that is used for this purpose is sold by the said firm for Plano, Microfab company manufacturing Texas)) in the scolder ink jet printing.If the time allows to remove subsequently possibility or non-existent solvent of possibility and curing, then can also adopt the printing that is used for the electrically conductive binding material of Electronic Packaging known in this field.Connector 124 can have about 5 microns to about 500 microns diameter, be preferably between about 25 microns to about 100 microns.
As non-limiting example, in other embodiments, device layer 102,112 can be about 2 micron thickness, and bottom electrode 104,114 can be made by the aluminium foil of about 100 micron thickness; Insulating barrier 106,116 can be made by plastic material, the PETG of for example about 25 micron thickness (PET); And backside top electrode 108,118 can be formed by the aluminium foil of about 25 micron thickness.Device layer 102,112 can comprise the active layer 107 that is arranged between transparency conducting layer 109 and the bottom electrode 104.In this embodiment, at least the first device 101 one or more electric contact pieces 120 that comprise between transparency conducting layer 109 and the backside top electrode 108.Electric contact piece 120 forms and passes transparency conducting layer 109, active layer 107, bottom electrode 104 and insulating barrier 106.Electric contact piece 120 provides the conductive path between transparency conducting layer 109 and the backside top electrode 108.Electric contact piece 120 is isolated with active layer 107, bottom electrode 104 and insulating barrier 106 electricity.
Can by utilize other interface form technology for example supersonic welding fetch the good contact of assisting to form between conductive plunger 124 and the substrate 108.A kind of useful process example is to form principal column piece (stud bump), described among " the 3-D ChipScale with Lead-Free Process (3D chip scale) " that for example in " SemiconductorInternational (the semiconductor world) " on October 1st, 2003, delivers, by reference this article is incorporated into here with unleaded process by author J.Jay Wimer.Can be at printed on top ordinary solder or the conductive ink or the bonding agent of this post piece.
In the process that forms through hole, it is important avoiding the short circuit between top electrodes 109 and the bottom electrode 104.Therefore, by laser ablation near the small quantity of material of through hole antelabium (lip), promptly several microns dark and several microns wide, can advantageously replenish and for example hole or the mechanically cutting technology of punching.In addition, can adopt chemical etching process to remove the diameter transparent conductor more bigger than through hole.Can locate etching for example by utilizing ink jet printing or stencil printing to drip at correct position printing etchant.
Avoid the another kind of method of short circuit to be, before deposit transparent conductive layer 109, at the thin layer of the top of active layer 107 deposition of insulative material.This insulating barrier is preferably several micron thickness, can be 1 to 100 micron scope.Because only (and the zone that surpasses the through hole border slightly) deposits on the zone of through hole forming for it, so the operation that its appearance can the stray light electronic installation.In some embodiments of the invention, this layer can be similar to u.s. patent application serial number No.10/810 that submit to, that authorize Karl Pichler on March 25th, 2004, and the structure described in 072 is incorporated this United States Patent (USP) here into by reference.When getting out by this structure or punching when portalling, between transparency conducting layer 109 and bottom electrode 104, there is insulating barrier, to compare with the precision of these layers and mechanically cutting technology, this insulating barrier is thicker relatively, therefore short circuit can not occur.
The material that is used for this layer can be any insulator easily, be preferably can the numeral (for example ink-jet) printing insulator.Thermoplastic polymer for example nylon PA6 (223 degrees centigrade of fusing points (m.p.)), acetal (m.p.165 degree centigrade), (similar is in PET for PBT, just having substituted ethyl with butyl) (m.p.217 degree centigrade) and polypropylene (m.p.165 degree centigrade) all are the examples of these insulators, but above-mentioned example all is not the exclusive list of Available Material.These materials can also be used for insulating barrier 122.Though ink jet printing is the Perfected process that forms insulator islands, other method (comprising conventional photolithography) of printing or deposition also falls within the scope of the present invention.
In the process that forms through hole, the structure photoelectron device is useful at least two initial isolated parts, one of them initial isolated part is made of the layer 102 of insulating barrier 106, bottom electrode 104 and its top, and second initial isolated part is made of base plate 108.After forming through hole and before the filling vias, together with these two stacking parts by composite construction 106/104/102.After forming this lamination and through hole, base plate 108 is laminated to this compound, and filling vias as mentioned above.
Though jet printing scolder or electrically conducting adhesive comprise the useful materials that is used to form conductive via plug 124, also can form this connector by mechanical device.Therefore, for example, the lead of suitable diameter can be arranged in this through hole, is forced to touch base plate 108, and in the Desired Height excision, thereby forming connector 124, this is similar to and forms the principal column piece.Alternatively, can the pre-formation pin of this size be inserted in this hole by the robots arm.This pin or lead can be secured in place, and by the extremely thin electrically conducting adhesive layer of printing before pin is set, with auxiliary or guarantee that they arrive the electrical connection of substrate.In this way, eliminated long problem drying time of the thick connector of electrically conducting adhesive.Can be provided with top-end or the sawtooth of punching slightly in the base plate 108 above this pin, this further helps contact.This pin can be provided with the insulation that has existed, as insulated conductor or be coated with layer conductor (for example, by steam deposition or oxidation).Before being coated with coating insulation material, they can being arranged in the through hole, thereby being easier to import this material.
If this pin is made by the metal of suitable hardness, and have the top-end of taper slightly, then it can be used for forming through hole in the punching step.Substitute and adopt punching or bore process, this pin is inserted in the compound 106/104/102, insertion depth is for making this top-end just penetrate the bottom; Then, when substrate 108 was laminated to this compound, this top-end passed wherein slightly, and formed good contact.For example by mechanical pressure or the air pressure of guiding by the just adaptive pipeline of pin, these pins can be inserted in the not punching substrate.
On the transparency conducting layer 109 that electrically contacts with electric conducting material 124, one or more conductive traces 126 of for example being made by aluminium, nickel or silver are set.Shown in Fig. 2 B, a plurality of contacts 120 of track 126 interconnection, thus reduce total sheet resistance.As example, contact 120 spacing each other is approximately 1 centimetre, and wherein track 126 is connected each contact with hithermost contact, perhaps is connected with its transparent conductor on every side in some cases.Preferably, select quantity, width and the spacing of track 126, so that contact 120 and track 126 cover less than about 1% of the surface of apparatus module 101.The width of track 126 can be preferably between about 5 microns to about 50 microns between about 1 micron to about 200 microns.The center distance of track 126 is between about 0.1 millimeter to about 10 millimeters, is preferably between about 0.5 millimeter to about 2 millimeters.Wideer lead needs bigger interval to avoid excessive obstruction loss.Can adopt the multiple figure or the orientation of track 126, as long as these lines each other roughly equidistantly (for example, at factor 2 with interior (within a factor of two)).Replacement figure at the track 126 that scatters from contact 120 shown in Fig. 2 C.Replace in figure at shown in Fig. 2 D another, track 126 forms " watershed " figures, wherein gives off thick track from contact 120, branches out thin track 126 again from thick track.In another replacement figure shown in Fig. 2 E, track 126 forms the rectangular graph that scatters from contact 120.Should be appreciated that in some embodiments of the invention, vertical line can be thinner than horizontal line.The quantity that is connected to the track 126 of each contact can be greater than or less than the quantity shown in Fig. 2 E.Some embodiment have many one, many two again, many three or the like more again.Trace graphics shown in the example shown in Fig. 2 B, 2C, 2D and the 2E only is used for example, and is not limited in other possibility trace graphics that adopts in the embodiments of the invention.Notice, because the electric current of conductive soleplate 108,118 carryings from an apparatus module to next apparatus module avoided so conductive traces 126 can comprise " finger " thick " bus ".This has reduced the masking amount that causes because of bus, and provides outward appearance more attractive in appearance for apparatus array 100.
At the substrate S that constitutes by thick relatively, high conductivity, flexible bulk conductor bottom electrode 104,114 and base plate 108,118 1, S 2Last constructing apparatus module 101,111, and pass the electric contact piece 120 that transparency conducting layer 109, active layer 130, bottom electrode 104,114 and insulating barrier 106,116 form isolation, make that apparatus module 101,111 is relatively large.Therefore, array 100 can the still less apparatus module of interconnected in series constitutes by needing still less than prior art array.For example, apparatus module 101,111 can for about 1 centimetre to about 30 centimeter length, about 1 centimetre to about 30 centimetres wide.Can also make littler battery (for example, length less than 1 centimetre and/or width less than 1 centimetre) as required.
Notice, because the electric current of base plate 108,118 carryings from an apparatus module to next apparatus module, so needn't as prior art, make the figure of track 126 comprise thick bus.On the contrary, the figure of track 126 only needs to provide " finger " of enough conductions to come loaded current to contact 120 to get final product.Do not having under the situation of bus, exposing more most active layer 102,112, this can increase efficient.In addition, there is not the figure of the track 126 of bus can be more attractive in appearance.
By returning the base plate 118 cut second apparatus module and insulating barrier 116 a part, can realize electrically contacting between the bottom electrode 114 of the base plate 108 of first apparatus module 101 and second apparatus module 111 with exposed bottom electrode 114.Fig. 2 B illustrates the example of a kind of mode that is used for back cutting base plate 118 and insulating barrier 116.Particularly, form groove 117 at the edge of insulating barrier 116.Similar bigger groove 119 in groove 117 and the base plate 118 is aimed at.The part that groove 117,119 is aimed at the bottom electrode 114 that has exposed second apparatus module 111.
Can between the expose portion of the bottom electrode 114 of the base plate 108 of first apparatus module 101 and second apparatus module 111, realize electrically contacting by different modes.For example, shown in Fig. 2 A, can above the part of carrier substrates 103, thin conductive layer 128 be set the figure with alignment indentation 117,119.
This thin conductive layer can for example be conduction (filling) polymer or silver-colored ink.This conductive layer can be as thin as a wafer, for example about 1 micron thickness.The universal standard that is used for measuring the minimum thickness of thin conductive layer 128 is part power (fractional power) p=(J/V) ρ (L that dissipates at this layer 0 2/ d) approximately be 10 -4Or littler, wherein J is a current density, V is a voltage, L 0Be the length (width that is about gap between first and second apparatus modules) of thin conductive layer 128, and ρ and d are respectively the resistivity and the thickness of thin conductive layer 128.Under this kind situation, therefore and the power of loss much smaller than being produced 1% of power, so can ignore.By the mode of numerical example,, (J/V) be about 0.06A/Vcm for many application scenarios 2If L 0=400 microns=0.04 centimetre, then p approximates 10 -4(ρ/d).Therefore, even the electricalresistivity is about 10 -5Ohmcm (approximately than little ten times of good bulk conductor), d is less than about 1 micron (10 -4Centimetre) thickly also can satisfy standard.Therefore, the relative resistance polymer conductor of most of any possibility print thickness also can be used.
First apparatus module 101 can be attached to carrier substrates 103, so that base plate 108 electrically contacts with thin conductive layer 128, is exposed and stay a part of thin conductive layer 128.Between the expose portion of the bottom electrode 114 of the expose portion of thin conductive layer 128 and second apparatus module 111, realize electrically contacting then.For example, on thin conductive layer 128 and the position aimed at of the expose portion of bottom electrode 114, the projection of electric conducting material 129 (for example, more the bonding agent of conduction) is set.The projection of this electric conducting material 129 is enough high, thereby can touch the expose portion of bottom electrode 114 when second apparatus module 111 is attached to carrier substrates.Can select the size of groove 117,119, so that thin conductive layer 128 can not touch the base plate 118 of second apparatus module 111 basically, this contact is not wished to take place.For example, the edge of bottom electrode 114 can be cut for 116 times with respect to insulating barrier, returns the amount of cutting CB 1Be approximately 400 microns.Base plate 118 can be cut for 116 times with respect to insulating barrier, returns the amount of cutting CB 2Be far longer than CB 1
Device layer 102,112 is preferably the type that can make on a large scale, for example can make on a large scale in reel-to-reel (roll to roll) system of processing.There are a large amount of dissimilar apparatus structures can be used for device layer 102,112.As example, and loss of generality not, the illustration among Figure 1A illustrates the CIGS active layer 107 in the device layer 102 and the structure of relevant layers.As example, active layer 107 can comprise the absorber layer 130 based on the material that comprises IB, IIIA and VIA family element.Preferably, absorber layer 130 comprise copper (Cu) as IB family element, gallium (Ga) and/or indium (In) and/or aluminium as IIIA family element, and selenium (Se) and/or sulphur (S) are as VIA family element.Be to authorize July 31 calendar year 2001 people's examples that submit to, that disclosed these materials (sometimes being called the CIGS material) among laid-open U.S. Patents application publication number on the 4th No.US 2004-0219730 A1 in November in 2004 such as people's such as Eberspacher United States Patent (USP) 6268014 and Bulent Basol, by reference these United States Patent (USP)s be incorporated into this.Window layer 132 is usually as the connection auxiliary section between absorber layer 130 and the transparency conducting layer 109.As example, window layer 132 can comprise two or more combination of cadmium sulfide (CdS), zinc sulphide (ZnS) or zinc selenide (ZnSe) or these compounds.The layer that can be for example deposits these materials by chemical bath deposition or chemical surface reaches the thickness of about 50 nanometers to about 100 nanometers.The metal level 134 that is different from bottom electrode can be arranged between bottom electrode 104 and the absorber layer 130, to suppress the diffusion of metal from bottom electrode 104.For example, if bottom electrode 104 is made of aluminum, then layer 134 can be a molybdenum layer.This can help to carry the electronics load and specific protection quality is provided.And another layer 135 of the materials similar of its material and layer 13 also can be located between layer 134 and the aluminium lamination 104.This material can be the same with the material of layer 13, and perhaps it can be from the another kind of material for selecting the layer 13 listed material list.Optionally, another layer 137 also can be located at the opposite side of layer 104.This material can be the same with the material of layer 135, and perhaps it can be from the another kind of material for selecting the layer 13 listed material list.Be similar to layer 135 and/or 137 protective layer and can be located at around the paillon foil on any embodiment as described herein, be such as but not limited to shown in Fig. 5 and 6.
Though described the CIGS solar cell, one skilled in the art will recognize that the embodiment of series interconnection technique can be applied to the solar battery structure of nearly all type for example.The example of this solar cell includes but not limited to: based on the battery of amorphous silicon, Graetzel battery structure (wherein, the optical clear film that utilizes charge transfer dye individual layer coating to constitute by the titanium dioxide granule of a few nanometer sizes, think light harvesting and this film of sensitization), wherein (for example have inorganic porous semiconductor die by the nanostructured layers of organic semiconducting materials filler opening, referring to U.S. Patent Application Publication No. US2005-0121068 A1, by reference this patent application is incorporated into this), polymer/mixture battery structure, organic dyestuff and/or C 60Molecule and/or other micromolecule, microcrystal silicon battery structure, the nano rod that is provided with at random and/or be dispersed in the quadrangular pyramid body of the inorganic material in the organic substrate, quantum dot-based battery or above-mentioned combination.And the embodiment of series interconnection technique described here can be used for the photoelectron device except that solar cell.
Replacedly, photoelectron device 101,111 can be a light-emitting device, for example Organic Light Emitting Diode (OLED).The example of OLED comprises the device based on light emitting polymer (LEP).In this case, active layer 107 can comprise poly--3, (poly (3 for 4-ethylenedioxy-thiophene, 4) Ethylendioxythiophene): Polystyrene Sulronate (PEDOT:PSS), it can deposit to the thickness that is generally between 50 to 200 nanometers by technologies such as for example wet coatings on the bottom electrode 104,114, toast then to remove moisture.PEDOT:PSS can (Leverkusen, Bayer Germany) (bayer) company obtains from Leverkusen Germany.To gather the basic LEP of fluorenes (polyfluorene) then and be deposited on the PEDOT:PSS layer thickness that (by for example wet coating) reaches about 60-70 nanometer.Suitable poly-fluorenyl LEP can obtain from Dow ChemicalsCompany (Dow chemicals) company.
Transparency conducting layer 109 can for example be a transparent conductive oxide (TCO), such as zinc oxide (ZnO) or be doped with the zinc oxide (ZnO:Al) of aluminium, it can utilize several different methods to deposit, and includes but not limited to sputter, evaporation, CBD, plating, CVD, PVD, ALD or the like.Replacedly, transparency conducting layer 109 can comprise transparent conductive polymeric layer, the hyaline layer of doped P EDOT (poly--3,4--ethylenedioxy-thiophene) for example, and it can deposit by technologies such as spin coating, dipping or sprayings.PSS:PEDOT is based on the conductive doped polymer by the thiophene heterocycle of diether bridge joint (heterocyclic thiophene ring bridged by a diether).Being doped with that the aqueous dispersion of Polystyrene Sulronate (poly (styrenesulfonate)) PEDOT (PSS) can be produced by the H.C.Starck in Massachusetts newton city, trade mark is
Figure A200780016606D00221
Product obtain.
Figure A200780016606D00222
It is the registered trade mark of Bayer Aktiengesellschaft (Beyer Co., Ltd hereinafter referred to as) company of Leverkusen Germany.Except its conductive characteristic, PSS:PEDOT can also be used as complanation layer, and this can the modifying device performance.Use the latent defect of PEDOT to be the sour characteristic of typical coating, this can be used as makes other material in can the chemical attack solar cell of PEDOT, reacts with it or makes the reason of its degeneration.Can remove acid ingredient among the PEDOT by anion exchange procedures.No acidic PEDOT can buy from the market.In addition, can buy similar material from the TDA material of the Wheat Ridge in the many states of Corolla, for example Oligotron TMAnd Aedotron TM
For example epoxy resin or silane are filled gap between first apparatus module 101 and second apparatus module 111 can to utilize curable polymer.Optionally the sealant (not shown) can cover array 100, so that the environment repellence to be provided, for example, prevents to be exposed to water or air.The sealing layer can also absorb ultraviolet light, thus the layer below the protection.Suitable sealant examples of material comprises one or more fluoropolymer layers, for example THV (for example, the THV220 of Dyneon fluoridizes terpolymer, i.e. the fluorinated thermoplastic of tetrafluoroethene, hexafluoropropylene and vinylidene fluoride (fluorothermoplastic) polymer), (DuPont), Tefdel, vinylacetic acid ethene fat (EVA, ethylene vinyl acetate), thermoplastics, polyimides, polyamide, the nano-stack compound of plastics and glass (for example, what be commonly assigned, Brian Sagar and Martin Roscheisen's, be entitled as the voltage barrier film described in the common unsettled U.S. Patent Application Publication US 2005-0095422 A1 of " INORGANIC/ORGANICHYBRID NANOLAMINATE BARRIER FILM (inorganic/organic nano-stack voltage barrier film that mixes) ", by reference this U.S. Patent application is incorporated into this), and the combination of above-mentioned material.
There are many kinds to be used to make the distinct methods of interconnection device according to an embodiment of the invention.For example, Fig. 3 illustrates a kind of such method.In the method, this device construction is on continuous apparatus sheet material 202, and this continuous apparatus sheet material comprises the active layer between bottom electrode and the transparency conducting layer, and is for example, as above described with reference to Fig. 2 A-2B.Device sheet material 202 also is patterned to form has contact 203, is similar to the contact 120 shown in Fig. 2 A.Can be electrically connected contact 203 by aforesaid conductive traces (not shown).Insulating barrier 204 and base plate 206 also are configured to continuous sheet.In the example depicted in fig. 3, returned and cut insulating barrier 204, with for example form and backplane level 206 in the groove 205 of similar groove 207 alignings.Groove in the backplane level 206 is greater than the groove in the insulating barrier 204.Device sheet material 202, insulating barrier 204 and backplane level are stacked together, form lamination 208, and wherein insulating barrier 204 is between device sheet material 202 and base plate 206.The edge is cut into two or more apparatus modules A, B with the dotted line that groove 205,207 intersects with lamination 208 then.The figure of electrically conducting adhesive 210 (for example, conducting polymer or silver-colored ink) is set on carrier substrates 211 then.Module adheres on the carrier substrates 211.The base plate 206 of bigger regional 212 and modules A of electrically conducting adhesive 210 electrically contacts.The finger 214 of electrically conducting adhesive 210 bigger regional 212 is stretched out from this.The groove 205,207 of finger 214 and module B is aimed at.Extra electrically conducting adhesive can be set, so that electrically contact through the bottom electrode of groove 205,207 and module B on finger 214.Preferably, finger 214 is narrower than the groove 207 of base plate 206, thereby electrically conducting adhesive 210 can not electrically contact undesirably with the base plate 206 of module B.
In the embodiment shown in fig. 3, device sheet material, insulating barrier and base plate are stacked together before being cut into each module.In alternative embodiment, at first cut these layers, and then be assembled into module (for example, by stacked).For example, as shown in Figure 4, the first and second apparatus module A ', B ' can be respectively by precut device layer 302A, 302B; Insulating barrier 304A, 304B and base plate 306A, 306B stacked formation respectively.Each device layer 302A, 302B comprise the active layer between transparency conducting layer and the bottom electrode.At least one device layer 302A comprises the electric contact piece 303A (with optional conductive traces) of the above-mentioned type.
In this example, by making the backplane level 306B of module B be shorter than insulating barrier 304B simply, make the edge of the protruding backplane level 306B of insulating barrier 304B, thereby return the backplane level 306B that cuts module B.Similarly,, perhaps more specifically, be shorter than the bottom electrode of device layer 302B, cut insulating barrier 304B thereby return by making insulating barrier 304B be shorter than device layer 302B.Be electrically connected between the bottom electrode of the device layer 302B of form modules A will cutting in advance to stack the layer by layer base plate 306A of ', B ' afterwards, these modules are attached to carrier substrates 308, and in modules A ' and module B '.In the example depicted in fig. 4, connect with ledge 312 by electrically conducting adhesive 310, this ledge touches bottom electrode, avoids unnecessarily touching the base plate 306B of module B ' simultaneously.
Fig. 5 A-5B illustrates the modification of method shown in Figure 4, and it has reduced the utilization of electrically conducting adhesive.First and second modules A ", B " by precut device layer 402A, 402B; Insulating barrier 404A, 404B and backplane level 406A, 406B are assembled, and are attached to carrier substrates 408 then.The electric contact piece 403A that isolates passes device layer 402A, bottom electrode 405A and insulating barrier 406A realizes electrically contacting, shown in Fig. 5 B.Module B " insulating barrier 404B and the leading edge of base plate 406B returned with respect to device layer 402B and cut, as above described with reference to Fig. 4.Yet, for the ease of electrically contacting modules A " the trailing edge of base plate 406A extend beyond the trailing edge of device layer 402A and insulating barrier 404A.Therefore, module B " device layer 402B and modules A " base plate 406A overlapping.The one ridge 412 of the electrically conducting adhesive on the expose portion 407A of base plate 406A electrically contacts with the expose portion of the bottom electrode 405B of device layer 402B, shown in Fig. 5 B.
In the preferred embodiment of said method, can for example construct each module as mentioned above, press domain classification then.For example, can test one or more performance characteristicses of two or more apparatus modules, for example optoelectronic efficiency, open circuit voltage, short circuit current, activity coefficient or the like.The apparatus module that satisfies or surpass the acceptance criteria of performance characteristics can be used for array, and those do not satisfy then being abandoned of acceptance criteria.The example of acceptance criteria comprises the threshold value or the tolerance interval of optoelectronic efficiency or open circuit voltage.By separately apparatus module being classified and they being formed array, can obtain higher output than unitary construction apparatus array.
In discussion to the electric contact piece between transparency conducting layer and the base plate 120, form through hole, it is coated with insulating material and is filled with electric conducting material.In alternative embodiment, utilize the part of the part of bottom electrode as electric contact piece, can be implemented to the connection between transparency conducting layer and the base plate.Fig. 6 A-6H illustrates the example that how to realize this point.Particularly, structure during beginning is structure 500 (as shown in Figure 6A), it (for example has transparency conducting layer 502, Al:ZnO, i:ZnO), (for example, CIGS), (for example, 100umAl), insulating barrier 508 (for example for bottom electrode 506 for active layer 504,50um PET) and base plate 510 (for example, 25um Al).Preferably, base plate 510 is forms of thin aluminium strip, utilizes insulating adhesive as insulating barrier 508 it to be laminated to bottom electrode 506.This can simplify manufacture process greatly and reduce material cost.
In the one or more positions shown in Fig. 6 B, between bottom electrode 506 and base plate, realize electrical connection section 512.For example, utilize laser welding, pass insulating barrier 508 and form spot welding.Fetch by in single step, being electrically connected and to make that this process is attractive.Replacedly, pass base plate 510 and insulating barrier 508 blind hole to bottom electrode by getting out, utilize then electric conducting material for example scolder or electrically conducting adhesive fill this blind hole, form electrical connection section 512.
Shown in Fig. 6 C, around electrical connection section 512, form the groove 514 of closed loop (for example, circle) form.Transparency conducting layer 502, active layer 504 and bottom electrode 506 are passed in these closed-loop trench 514 cuttings, arrive base plate 510.Groove 514 is isolated the part of bottom electrode 506, active layer 504 and transparency conducting layer 502 and the other parts of structure 500.Can adopt the technology of for example laser processing to form groove 514.Form electrical connection section 512 if utilize a laser beam to carry out laser welding, and utilize second laser beam to form groove 514, these two laser beams can be from the two opposite sides of structure 500 prealignment each other.Under the situation of two bundle laser prealignments, can in single step, form electrical connection section 512 and groove 514, thereby strengthen overall process velocity.
The process of formation isolated groove can cause the electrical short 511,517 between transparency conducting layer 502 and the bottom electrode 506.Isolate the short circuit of not expecting 511 on the lateral wall 513 be formed on groove 514 for electricity, pass transparency conducting layer and active layer to bottom electrode 506 and form isolated grooves 516, shown in Fig. 6 D.Isolated groove 516 is around closed-loop trench 514, and the short circuit 511 on the lateral wall 513 of this groove is isolated with the other parts electricity of structure 500.Utilize laser grooving and scribing technology to form isolated groove 516.The material that the quilt of less thickness is delineated can reduce because of forming the possibility of the short circuit of not expecting that isolated groove 516 causes.
Notice, and all short circuits between non-transparent conductive layer 502 and the bottom electrode 506 are not expected.Can be provided to the part of the expectation power path of electrical connection section 512 along the electrical short 517 of the madial wall 515 of groove 514.If there is abundant expectation short circuit, then can realize the electric contact piece shown in Fig. 6 E-6F.At first, insulating material 518 deposits in closed-loop trench 514 and the isolated groove 516, for example, is deposited as middle porose " annular " figure, shown in Fig. 6 E.Then, comprise that in structure 500 depositing electrically conductive finger 520 is shown in Fig. 6 F above those parts of the isolated part that centered on by groove 514 and non-isolated part.Can be so that provide the surface of enough complanations so that be applicable to the mode deposition of insulative material 518 that forms conductive fingers 520.Then between the transparency conducting layer 502 and base plate 510 in the non-isolated part of groove 514 outsides, the part of the bottom electrode 506 of the electrical short 517 on the madial wall of the transparency conducting layer in finger 520, isolated part, groove 514, groove 514 inside and electrical connection section 512, formation electrically contacts.
In addition, if short circuit 517 does not provide enough electrically contacting, then boring and filling process can provide electrically contacting between the isolated part of finger 520 and bottom electrode 506.In the alternative embodiment shown in Fig. 6 G-6I, when insulating material 518 ' deposited shown in Fig. 6 G, this insulating material 518 ' covered this isolated part.Cover the insulating material 518 ' of isolated part can be for example mechanical process by laser processing or for example boring or punching remove, remove the counterpart of transparency conducting layer 502 and active layer 504 simultaneously, thereby through opening 519 exposed bottom electrodes 506, shown in Fig. 6 H.Electric conducting material 520 ' forms conductive fingers, as mentioned above.This electric conducting material touches the bottom electrode 506 of exposure through opening 519, and realizes that the expectation shown in Fig. 6 I electrically contacts.
Notice multiple modification to be arranged with reference to the above-mentioned technology of Fig. 6 A-6I.For example, in certain embodiments, forming closed-loop trench and utilizing insulating material to realize that electrical connection section 512 is desirable after it is filled.Be used to form the said process that electrically contacts and have some advantages.Procedure of processing is simplified.Be more prone to depositing insulating layer, and do not worry to cover base plate.This process produces and is used to deposit finger 520,520 ' flat surfaces.Through laser welding, can between bottom electrode 506 and base plate 510, obtain reliable electrical contact.And, can isolate electrical short, and entail dangers to 100% output not.
Now, now another embodiment of the present invention will be described referring to Fig. 7.This embodiment of the present invention is related to the photovoltaic battery low cost structure and material is provided, and this battery produces low covering and resistive loss towards the conductor of injecting sunlight, and promotes interconnected in series.
Traditionally, transparent conductor (TC) the layer electric loss that particularly has the resistivity of the TC layer of solution coat to cause in photovoltaic device is too high.A kind of known method that solves this resistivity problem is to add the thin conductive traces of last layer on TC.This track can be made such as the high-conductive metal about about 1-50 x 10-6 ohmcm with resistivity.In using the known devices of conventional track, the area in so optimizing structure (covering) loss is approximately 11%, and the TC sheet resistance is when being 40 ohm-sq, and total losses is approximately 19%.Unfortunately, even track, finger or the grid of printing still have two reasons to cause loss in efficiency.At first, finger is opaque, therefore forms on the photovoltaic material in its lower section and covers.The second, the resistance that finger is limited can cause some power losss.These factors have an optimum, reduce to minimum and mean narrower finger because will cover, and resistance drop is meaned bigger finger to minimum.And it is unpractical making very little finger, because they need expensive technology.Although can obtain the track of maximum conductivity with vacuum-deposited metal, this method requires expensive depositing system and figure.
Now referring to Fig. 1 and 7, although structure of the present invention has greatly reduced the requirement of TC to conductance, bigger reduction will be favourable, and this can use the finger of narrower (therefore less obstruction light) to reach by providing than routine.By the size and the shape of this type of finger of suitable configuration, track or grid, to the TC of sheet resistance, can obtain being approximately 10% or small loss still less, and this resistance 10 times big that conventional structure requires have been surpassed up to about 200 ohm-sq.In another embodiment, to cover the total losses that causes with resistance approximately be 5% or still less to finger.The thickness of ZnO or TC can be reduced to~50-250nm.
Referring to Fig. 7, track 626 can interconnect to reduce total sheet resistance with a plurality of through holes 620 of EWT structure.Should be appreciated that, can be as shown in Figure 7, and use the multiple figure or the orientation of track 626 as described above shown in Fig. 2 B-2D.By non-limiting example, through hole 620 can be each other at a distance of about 1 centimetre, and track 626 then links to each other each contact with hithermost contact, perhaps in some cases, links to each other with the transparent conductor that centers on it.The width of track 626 can be between about 1 micron and about 200 microns, preferably between about 5 microns and about 50 microns.The line of broad means bigger separation, so that avoid excessive eclipsing loss.
Calculating shows, the trace material that can get typical commercial, such as but not limited to the conductive epoxy resin of resistivity in 1-10 x 10-5 ohmcm scope, live width is a key factor, preferably little of about 25 microns width, this will bring about 2.5% eclipsing loss when the 1mm interval.The vertical thickness of line segment can be at the height between about 1 to 20 micron.In one embodiment of the invention, line segment is desirably about about 1 to about 2mm at interval, and length is approximately 0.5mm.The sheet resistance of track can be lower than about 150m ohm-sq, and is desirably and is no more than about 50m ohm-sq.Track width about these values, at interval, the multiple combination of length, thickness and resistivity can be used to realize quite little total losses.As non-limiting example, have among the embodiment of big live width at other, the size of the area of section of finger, track or grid makes them obtain about 10% or total losses still less.Covering of bringing increases relevant loss to the diminishbb electric loss adequate remedy of total cross-sectional area with any live width increase.In one embodiment, the size of the area of section of track is set the sheet resistance that makes finger in about 150m ohm-sq with approximately between the 50m ohm-sq.Under all situations substantially, the advantage of printing this type of track is that desired transparent conductor thickness and/or conductance significantly reduce, and has brought the great minimizing of material and manufacturing equipment cost and transparent conductor optics % transmission loss thus.
In another embodiment of the present invention, in order to obtain 25 microns live width in suitably prepd substrate, multiple technologies are such as but not limited to intaglio printing and can be used to provide the live width of being wanted.Also can use silk screen printing to provide from about 5 to about 25 microns or bigger line height, thereby when keeping conductance, cause the third dimension variability of live width.In one embodiment, in the scope of non-silk screen printing track, this line height can be from about 1 to about 10 microns.In another embodiment, in the scope of non-silk screen printing track, this line height can be from about 2 to about 6 microns.And in another embodiment, this line height can from about 3 to about 5 microns scope.Because the material of viscosity higher is typically used in silk screen printing, it can obtain thicker deposition than other technologies, and when suitably using, can provide the narrow line less than 50 microns wide.
Fig. 8 and Fig. 9 illustrate other possible locus configurations.For example, Fig. 8 illustrates a plurality of cross track 626 and converges at through hole 620.Hexagon track 630 also can be used to and intersect from through hole 620 extended a plurality of tracks 626.Live width can be in the value of being wanted to obtain in the scope discussed above.In a non-limiting example, it is the wide lines of about 60 ì m that line segment can be set as nominal width, but can be wide to about about 200 ì m of 150-.Sheet resistance is about 1 ohm-sq.Figure also can comprise having wideer live width to be used for the projection 632 of track 626 particular segments.Optionally, some trace graphics can be with projection 632.Fig. 9 illustrates a kind of figure, and wherein a plurality of tracks 626 are radiation shape from through hole 620 and stretch away.Should be appreciated that, use the live width of the embodiments of the invention of these figures can be to about 50 microns scope about 5.In another embodiment, live width can about 70 and about 110 microns between; Sheet resistance is about 50 ohm-sq.The live width of some embodiment can be between about 20 to about 30 microns to provide about 10% or still less total losses.
Now, now an alternative embodiment of the invention will be described referring to Figure 10.Should be appreciated that,, need a kind of method of in substrate, making a large amount of small through hole fast in order to make EWT solar cell configuration economically feasible.Article one, the actual production line requires to reach the output of about per minute number square metre.So do in silicon wafer to be very unpractical.In an embodiment of the present invention, can in the thick tinsel of several mils, advantageously make through hole with the mechanical punching apparatus of going out many through holes simultaneously or with laser burn with these speed.Figure 10 illustrates the embodiment that is used for a kind of punching apparatus 650 of the present invention.It comprises punching apparatus 650, and it can comprise that a plurality of puncture components 652 are to produce a plurality of through holes simultaneously.In other embodiments, laser aid 654 (shown in broken lines) can optionally be used to burn a plurality of through holes in substrate 656.And another embodiment can include but not limited to individually rather than produce punching, laser or other hole-forming devices of each through hole with the while batch mode.
The top conductor of thin-film solar cells often is made up of a kind of doped forms of ZnO, and it is a kind of more frangible material, and when being subjected to a kind of shearing of piercer, it splits very neatly, and indeformable.Electrically contact if property that this kind or any other used TC are out of shape so that there is a strong possibility forms between TC and bottom conductor (it is only far away for 1-2 micron vertical range), then be necessary before punching, to remove TC.In the situation of ZnO, this can by the gentle acid of of short duration contact for example acetic acid (although also can use other acid) finish.By a drop dispenser acid is printed in the hole in the polymeric screen, this silk screen temporarily is attached to the top of device paillon foil, and is maintained at original position up to removing acid by cleaning by tension force.If form through hole by laser burn, then should the removal process particularly useful, because LASER HEATING is easy to melt simultaneously ZnO and all materials around it, and may cause short circuit.
Although be not limited to following scope, when a scope of several parameter values can be selected, the diameter of through hole preferably should not surpass 1mm, and should be preferably littler.For example, be spaced apart 10mm if the diameter of through hole is 1mm and through hole, the partial loss that is caused by via area is 0.8%, and when diameter was 0.5mm, it was 0.2%.But when diameter was 1.5mm, this loss was 1.8%.
Now, now another aspect of the present invention will be described referring to Figure 11 A-11D.Figure 11 A is a schematic cross-section, and transparent conductor 700, photovoltaic layer 702, bottom electrode 704, insulating barrier 706 and bed course 708 are shown.For being easy to diagram, photovoltaic layer 702 is represented as a simple layer, but should be appreciated that, it can comprise a plurality of layers, is such as but not limited to the device shown in Fig. 2 A.This device among Figure 11 A is one and has the not middle device of insulated vias 710.Figure 11 A-11D illustrates a kind of method of the insulated vias 710 according to the present invention.Shown in Figure 11 A, arrow 712 illustrates the direction that will spray insulating material.This spraying can be used multiple technologies, includes but not limited to that spray technique finishes.Arrow 712 illustrates spraying in fact from " downside " of this intermediate solar cell device.In this specific embodiment, whole device is turned over so that carry out spray procedure (being that transparent conductor 700 is in the bottom of piling up).Should be appreciated that in other embodiments, spraying can be carried out in order or simultaneously from other directions or from both sides.Also can be not as whole piling up being turned and carry out the spraying of insulating material shown in Figure 11 A.Insulating material can be EVA, PVOH, PVA, PVP and/or another kind of insulating material, such as any thermoplastic polymer that tinsel 704 and 718 is had excellent adhering.EVA is preferably with the approximately emulsion of 40-65% weight ratio use in water.After spraying, 60-90 degree about 90 seconds with Tg<150 ℃ drying.
Now referring to Figure 11 B, the insulating material spraying shown in arrow 712 generates the insulating barrier 714 that covers through hole 710 sidewalls at least.Insulating barrier 714 can be optionally by excessive spraying covering some part of transparent conductor 700, thereby guarantee that insulating barrier is insulated the sidewall of through hole 710 fully.Excessive spraying part 716 also can be improved the viscosity that 714 pairs of layers of insulating barrier pile up.
Figure 11 C illustrates bed course 708 and can be removed to remove the bottom of insulating material 714.Optionally, should be appreciated that in fact layer 708 can comprise a plurality of discrete layers, is such as but not limited to a bed course, a tack coat and a bed course.This can produce a bed course that the material that is in contact with it is had better disengaging and/or adhesive property.A kind of course can with a kind of certain material, rather than other materials has better interaction.This makes bed course can be optimized to obtain the character of being wanted.In addition, layer 708 can have a plurality of discrete layers, comprises the configuration of a bed course, tack coat, PET or electric insulation layer, a tack coat and a bed course, and it guarantees electric insulation by containing this PET or electric insulation layer.
Figure 11 D illustrates after bed course 708 is removed, and rear electrode 718 can be located at the downside that piles up.Solidifying this now piles up so that rear electrode and insulating barrier have good bonding.Under the situation of EVA, carry out this about 20 minutes curing at 150C.Should be appreciated that in some embodiments of the invention, rear electrode 718 can be the paillon foil that covers a kind of material of whole back.Through hole 710 is filled by a kind of electric conducting material 720, and finger 722 links to each other with electric conducting material 720.
Now, now another embodiment of the present invention will be described referring to Figure 12 A-12C.Shown in Figure 12 A, the bed course 708 shown in Figure 11 A before the layer that will be sprayed insulating material pile up and not comprise.In the present embodiment, this insulating material also has a kind of viscosity.Therefore, after forming insulating barrier 740, do not need it is removed from downside, and no longer need bed course 708 and insulating barrier 706.Arrow 712 illustrates and can use one or more technology, is such as but not limited to spray technique, sprays this insulating material with the sidewall of covering through hole 710 and the downside of layer 706.
Figure 12 B illustrates, a layer of the sidewall of insulating barrier 740 formation covering through holes 710 and the whole rear side basically of edge layer 706.This has simplified number of steps, because the insulating barrier that no longer needs step to remove bed course or be provided with in the past.Rear electrode layer 718 (Figure 12 C) can directly be located on the layer 740.
Figure 12 C illustrates, in case rear electrode layer 718 can be set and increase electric conducting material 720 to form an electrical connection by track 722, transparent conductor layer 700 is connected to rear electrode 718, simultaneously by insulating barrier 740 and bottom electrode 704 insulation.
Now, now another embodiment of the present invention will be described referring to Figure 13 A-13B.This embodiment of the present invention describes the another kind of method that forms insulating barrier along the sidewall of through hole.As shown in FIG. 13A, the rear side along layer 704 forms almost completely consistent insulation material layer 750.Optionally, this layer 750 has viscosity so that enclose rear electrode layer 770.Layer 750 flows into through hole and covers its sidewall, and cladding thickness is suitable with its thickness on bottom electrode 704.The precise thickness of sidewall coatings depends on the aspect ratio (ratio of through-hole diameter and foil thickness) of through hole and the viscosity of coating solution to a certain extent.In one embodiment, there is sufficient material to provide the layer of thickness between about 20 to about 100 microns along the wall of through hole 710.Should be appreciated that, from some materials of layer 750 also can filling vias 710 partly or entirely.For being easy to diagram, layer 750 is depicted as the extend through through hole.Can be used to guiding or this material that flows enters through hole 710 from layer 750 by a gas source of arrow 752 indication.Optionally, this source inflatable body, inert gas or air.In addition, should be appreciated that vacuum source 754 (showing with dotted line) can be used to replace blowing or being used in combination with this gas source.
Can make layer 750 be formed with enough thickness, so that sufficient material inflow through hole is arranged and cover sidewall, and can too thin and not fill up whole through hole.In one embodiment, the layer thickness of device can be in the scope of about 50-100 micron.In another embodiment, the layer thickness of device can be in the scope of about 50-100 micron.On the other hand, layer has in 750 enough materials to form insulation coating with about 20 to about 100 microns thickness on the sidewall of through hole.
Shown in Figure 13 B, when the sidewall by material being pulled to through hole 710 when forming insulating barrier 750, through hole 710 keeps clear.Through hole 710 keeps clear to allow electric conducting material 720 to be received in the through hole 710.The method of the consistent layer of this printing can allow to form thicker insulating barrier 750 along through-hole wall.
Figure 13 C illustrates, and rear electrode layer 770 can be connected to layer 750.Through hole 710 is filled by electric conducting material 720, and is connected to finger 722, and this finger is electrically connected to rear electrode 770 to transparent conductor 700.
Certainly should be appreciated that, use the method for spraying and use air blast method (by just and/or negative pressure) can make up by single or multiple steps.As non-limiting example, the paint application of insulating material can be subsequently with air blast handled (by just and/or negative pressure), to guarantee that any material that may inaccessible through hole is directed to this through-hole side wall of coating or guarantees that sidewall is coated with fully in this paint application.Optionally, in another non-limiting example,, can replenish to the sidewall of through hole at least by the spraying insulating material and use consistent the coating and insulating material that the air blast technology is employed if insulating barrier does not reach the thickness of wanting.In another non-limiting example, an initiation layer of insulating material can be sprayed on the sidewall of through hole, can use the air blast technology to add a consistent coating to thicken this insulating barrier then.In other embodiments, can use two spraying steps to reach layer thickness.Another embodiment uses two application step (using air blast after each coating) to reach the layer thickness of wanting.
Now, now an alternative embodiment of the invention will be described referring to Figure 14 A-14B.Figure 14 A illustrates, and adds an insulation material layer 760 on layer 704.In this embodiment, the mode of adding material layer 760 is clogged with material of nearly all through hole tegillum 760 or partially filled at least.In other embodiments, only some is blocked for through hole.By non-limiting example, layer 760 material can be that EVA, PVOH, PVA, PVP, UV solidify dielectric ink, and Tg is less than about 150 ℃ thermoplastic polymer, the perhaps combination of these materials.The thickness of this material can be substantially with Figure 12-13 in institute to put forward scope identical.Can use multiple coating technique based on solution with deposition materials 760, include but not limited to wet be coated with, spraying, spin coating, scraper coating, contact print, top input reverse printed, bottom input reverse printed, nozzle input reverse printed, intaglio printing, microphotograph intaglio printing, oppositely microphotograph intaglio printing, directly printing, roller coating, the coating of slit die formula, the coating of meyer rod, die lip directly are coated with, the bimodulus lip directly is coated with, capillary coating, ink jet printing, jet deposition, spray deposited or the like, and the combination of above and/or correlation technique.
Optionally, the shower nozzle that can be used to deposit film comprises for example ultrasonic nozzle shower nozzle, air atomizer spray nozzle shower nozzle and atomizer shower nozzle.In ultrasonic nozzle, discoidal piezoelectric ceramics transducer converts electric energy to mechanical energy.This transducer is from accepting the electricity input of high-frequency signal form as the power supply of oscillator/amplifier combination.In the air atomizing shower nozzle, nozzle mixing air and flow of liquid are to generate the injection of atomizing fully.In atomizer, nozzle uses the energy of fluid under pressure with this liquid that atomizes, and generates injection subsequently.
Shown in Figure 14 A, through hole 710 can be stopped up by material 760 to small part.In this embodiment, the part of this through hole is blocked in provides excess material to guarantee having enough materials 760 to cover the sidewall of through hole 710 in the through hole 710.Gas and/or steam can by by force by through hole 710 with " emptying " blocked through hole, but still on the sidewall of through hole 710, stay some materials 760.But source 752 blow gas, inert gas or air generate a perforate in by inaccessible through hole.In some embodiments of the invention, air knife, lasting air injection, jet air, pulse of air, non-pulse air and/or other air blast technology can be used to open the obturation of through hole 710.In above any technology, the gas of other types is such as but not limited to inert gas, can be used to replace air.Optionally, source 752 can be positioned on the target surface or below it.Optionally, can use two or more sources.As non-limiting example, can be on target surface and below provide simultaneously in order, simultaneously or with the source 752 and 753 of other times arrangement operation.The gas of identical or different type can be used in source 752 and 753.Optionally, can there be different orientations in source 752 and/or 753.In the embodiment that only uses a source, this source can be oriented as with quadrature or an angle and blow to target.Similarly, this single source can be on target surface or below it.Having some embodiment that surpass a source can actively blow to the target quadrature, blows to target with an angle in other sources, simultaneously some embodiment source that can use an orthogonally oriented source and a non-orthogonal orientations simultaneously.
Figure 14 B illustrates, and when through hole 710 is not blocked, material 760 will extend into through hole 710 and cover wherein at least a portion sidewall.Optionally, material 760 will cover sidewall nearly all in the through hole 710.As shown in the figure, empty through hole 710 will be on through hole and below all stay material 760.As shown in the figure, empty the part 762 that through hole 710 can generate material 760, this part covers around the through hole 710.This provides extra material to prevent undesired electric short circuit.
Figure 14 C illustrates the layers of additional materials that is added to finish this embodiment of the present invention.Through hole 710 is filled by electric conducting material 720, and conductive fingers 722 is connected to electric conducting material 720.Rear electrode layer 770 can be connected to layer 760.Electric conducting material 720 is connected to finger 722, and it is electrically connected to rear electrode 770 with transparent conductor 700.Should be appreciated that rear electrode 770 can be made up of one or more following materials: the gold-plated form of the silver-plated form of the copper facing form of stainless steel, copper, titanium, molybdenum, steel, aluminium, any previous materials, any previous materials, any previous materials or any combination wherein.
Now, now another embodiment of the present invention will be described referring to Figure 15 A-15C.This embodiment illustrates, and insulating barrier 780 can be added on the electrode layer 704.Figure 15 A illustrates the whole bag of tricks that adds insulating barrier 780, shown in similar Figure 14 A.Figure 15 B illustrates extra insulation material layer 784 (showing with dotted line) can optionally be added into insulating barrier 780.In one embodiment, extra layer 784 can be made up of the material the same with layer 780.Alternatively, in other embodiments, layer 784 can be made up of different materials.Optionally, layer 784 can solidify dielectric ink and/or a kind of Tg by vinylacetic acid ethene fat (EVA), polyvinyl alcohol (PVOH), polyvinyl acetate (PVA), polyvinylpyrrolidone (PVP), UV and be lower than about 150 ℃ thermoplastic polymer and form.Figure 15 C illustrates other layers that can be added.In one embodiment, UV printing ink can be a kind of UV cured urethane artificial rubber, is such as but not limited to the Master Bond UV15X-5 of Master Bond Inc..Through hole 710 is filled by electric conducting material 720, and conductive fingers 722 is connected to electric conducting material 720.Rear electrode layer 770 can be connected to layer 780.
Now, now another embodiment of the present invention will be described referring to Figure 16 A-16B.Figure 16 A illustrates a kind of mechanical means of opening blocked through hole.This can comprise mechanical probe, syringe needle, pin, rod or other protrusions are stretched into or pass by the through hole 710 of obturation.Figure 16 A illustrates a whirligig 788 that is used to penetrate inaccessible probe 789 with a plurality of.Any by inaccessible through hole shown in this type of mechanical technique can be used to open here comprises described in Figure 13-15 those.Figure 16 A also illustrates, and insulating material 790 can come filling vias 710 in one way and cover circumferential surface hardly.This can allow more precise material use.By non-limiting example, can material 790 be deposited in the through hole 710 by ink-jet technology, pin deposition, squeegee, scraper, drop technology or combination wherein.
Figure 16 B illustrates, and in this embodiment, empties obturation and will stay layer of material 790 along the sidewall of through hole 710.In certain embodiments, this can provide enough electric insulations.Optionally, also can use extra insulating material in other embodiments.By non-limiting example, extra insulating material can be with method shown in Figure 13,14 or 15 by solution deposition on material 790.This with cladding material 790 to guarantee proof voltage enough between the different conductive layers.This second kind of material can be identical with material 790.Alternatively, they can be different materials, are preferably both and are electric insulation.Alternatively, can now use one of following: vinylacetic acid ethene fat (EVA), polyvinyl alcohol (PVOH), polyvinyl acetate (PVA), polyvinylpyrrolidone (PVP), UV solidify dielectric ink and/or a kind of Tg is lower than about 150 ℃ thermoplastic polymer.After this, different with above-mentioned listed material a kind of materials (or other electrical insulators) can be used on the layer 790.
Although the present invention is carried out description and explanation by the specific embodiment here, it will be understood to those of skill in the art that and can make various changes, change, modification, replacement, deletion or interpolation program and agreement, and without departing from the spirit and scope of the present invention.For example, to any the foregoing description, the use of spraying insulating material also can be made up to add various material layers on solar cell with other printing technologies.In one embodiment, insulating material can be provided by spraying technology, and filling vias can be finished by printing simultaneously, and vice versa.Should be appreciated that method and apparatus of the present invention can be by repacking for use in other devices, its through hole passes one or more layers this type of device.For being easy to diagram, the through hole here is illustrated as circle, but in other embodiments, and they can be square, rectangle, polygon, ellipse, triangle, other shapes, the perhaps combination of aforementioned shapes.Should be appreciated that also any spraying, air blast or coating technique here all can be arranged to substrate or the paillon foil treatment system from the roller to the roll shape.
And concentration, quantity and other numeric datas can here be represented by a kind of range format.Should be appreciated that, such range format only is to use for convenience and succinctly, should understand these scopes neatly not only to comprise the numerical value that clearly is expressed as range limit, also comprise simultaneously all single numerical value or underranges in this scope, all clearly expressed as each numerical value or underrange.For example, approximately the size range of the extremely about 200nm of 1nm should be understood that not only to comprise about 1nm and the about 200nm that clearly is expressed as range limit, also comprises each single size, such as 2nm, 3nm, 4nm and underrange, such as 10nm to 50nm, 20nm to 100nm, or the like ...
The open source literature that provides discussed herein or quote is only just for the prior art disclosure before the submission day that is listed in the application.Any content here all should not be construed as admits that the present invention does not have qualification open prior to this of previous invention.And the date of the open source literature that provides may be different from the actual open date, and this needs individual authentication.Here all open source literatures that relate to are all incorporated herein by reference, with disclosure and description with the structure and/or the relevant content of method of these open source literatures citation.For example, the U.S. Patent application No.11/207157 that submits in the U.S. Patent application No.11/039053 that submitted on January 20th, 2005 and on August 16th, 2005 is incorporated into this by reference fully for all purposes.The U.S. Provisional Patent Application No.60/781 that is entitled as " high performance solar batteries " that on March 10th, 2006 submitted to insulated vias, the U.S. Patent application No.11/278 that on April 4th, 165 and 2006 submitted to, 645 (lawyer's archival number NSL-061) also are incorporated into this by reference fully for all purposes.
Though foregoing has carried out complete description to the preferred embodiments of the present invention, can carry out multiple change, modification and equivalence.Therefore, scope of the present invention should not determined with reference to foregoing description, but should determine with reference to the four corner of claims and equivalent thereof.Any feature, no matter whether preferred, can combine with any further feature, no matter whether these these further features are preferred.In the claim below, indefinite article " " (" a " or " an ") is meant the quantity of one or more these parts behind this article, unless special declaration is arranged.Claim not should be understood to comprise that device adds the qualification of function, unless in given claim, adopt phrase " be used for ... device " clearly state this qualification.

Claims (32)

1. device comprises:
A kind of solar cell comprises at least one transparent conductor, a photovoltaic layer and a plurality of through hole.
2. device comprises:
A kind of solar cell has efficient rear electrode configuration, and wherein this solar cell comprises: at least one transparent conductor, photovoltaic layer, at least one bottom electrode and at least one rear electrode;
Conductive fingers on a plurality of transparent conductors that are installed in this solar cell;
A plurality of filling vias that link to each other with this conductive fingers, wherein this filling vias is by at least one transparent conductor, photovoltaic layer and at least one bottom electrode;
Wherein each filling vias has a conductive core that electric charge is conducted to rear electrode from transparent conductor; With
Insulating barrier with conductive core in each filling vias and bottom electrode insulation.
3. device according to claim 2 wherein forms this insulating barrier by coating that through hole is sprayed.
4. device according to claim 2 is wherein by using a kind of cohesive material to form this insulating barrier.
5. device according to claim 2, wherein the back conductor can with the bottom electrode electric insulation, and be connected by filling vias, these through hole each intervals are enough near, thereby reduced the conductance requirement of upper electrode, and no longer need be to cover the area of bus.
6. device according to claim 2, wherein this thickness of insulating layer is between about 20 to about 100 microns.
7. device according to claim 2, wherein this insulating barrier can be made by at least a following material: EVA, PVOH, PVA, PVP and/or a kind of Tg are lower than about 150 ℃ thermoplastic polymer.
8. device according to claim 2, wherein this photovoltaic layer is made of two discrete layers that form the P-N knot at least, and wherein at least one layer comprises the material based on CIS.。
9. device according to claim 2, wherein the filling vias diameter is about 1mm or littler.
10. device according to claim 2, wherein the filling vias diameter is about 650 microns or littler.
11. device according to claim 2, wherein this insulating barrier covers the part of transparent conductor around the sidewall of through hole and each through hole, and wherein this part is positioned at from the scope of the about 2 times of through-hole diameters in through hole edge.
12. a method comprises:
Formation comprises the solar cell of at least one transparent conductor, a photovoltaic layer and at least one bottom electrode;
Form a plurality of through holes by at least one transparent conductor, a photovoltaic layer and at least one bottom electrode; With
The coating through hole is to form insulating barrier on the sidewall in each hole.
13. method according to claim 12, wherein coating comprises that spraying a kind of material that is bonded on the sidewall by spraying forms this insulating barrier.
14. method according to claim 12 wherein has a kind of efficient rear electrode configuration.
15. method according to claim 12, other comprises:
Fill each through hole with a conductive core, this core and transparent conductor are electrically connected, and by the insulating barrier in the through hole with the bottom electrode electric insulation; With
Basically forming a rear electrode that links to each other with conductive core in each through hole.
16. method according to claim 12, wherein coating comprises the source of using a spraying insulating material below solar cell, to avoid being coated with insulating material basically fully on transparent conductor.
17. method according to claim 12, wherein coating comprises spraying insulating material below solar cell, reduces to minimum so that need not cover with the material that transparent conductor can will be deposited on the transparent conductor.
18. method according to claim 12, wherein coating comprises spraying insulating material above solar cell, and covers with transparent conductor and reduce to minimum with the material that will be deposited on the transparent conductor.
19. method according to claim 12, wherein coating comprises the insulating material that sprays sufficient amount with the covering through-hole wall, and not exclusively fills up through hole.
20. method according to claim 12, wherein coating comprises the insulating material that sprays sufficient amount with the covering through-hole wall, and the bottom surface of covering bottom electrode is to form a bottom insulation layer.
21. method according to claim 12 is wherein by using a kind of cohesive material to form this insulating barrier.
22. method according to claim 12, wherein coating comprises by use spray in through hole and forms an insulating barrier.
23. method according to claim 12, wherein coating comprises by using a kind of insulation spray and forms an insulating barrier, and this insulation spray is made up of a kind of composition and a kind of gluing component of pure electric Jie's character.
24. method according to claim 12, wherein coating is included in any through hole with insulating material sprays through hole and the using gases impact is insulated clogged with material with removing after spraying.
25. method according to claim 12 wherein is coated with using gases impact on the almost completely consistent coating that is included in solar cell one side, so that insulating material is introduced in each through hole.
26. method according to claim 12, wherein coating comprises by the almost completely consistent insulating material of side printing last layer at solar cell, and the using gases impact is introduced this insulating material in each through hole, and in consistent insulating barrier, produce opening, thereby in each through hole, form insulating barrier corresponding to each through hole.
27. method according to claim 12, other is included in and forms a plurality of conductive fingers on the transparent conductor in the solar cell.
28. method according to claim 12, wherein coating comprises by the almost completely consistent insulating material of side printing last layer at solar cell, and use suction that the insulating material of consistent coating is drawn in each through hole at the opposite side of solar cell, and in consistent insulating barrier, produce opening, thereby in each through hole, form insulating barrier corresponding to each through hole.
29. a method comprises:
Formation comprises the solar cell of at least one transparent conductor, a photovoltaic layer and a plurality of through holes;
The coating through hole is to form insulating barrier on the sidewall in each hole.
30. method according to claim 29, wherein this insulating barrier can be made by at least a following material: EVA, PVOH, PVA, PVP, UV solidify dielectric ink and/or a kind of Tg is lower than about 150 ℃ thermoplastic polymer.
31. method according to claim 30, the material that wherein forms one second insulating barrier and this second insulating barrier on insulating barrier is different with the material of insulating barrier.
32. method according to claim 30, the material that wherein forms one second insulating barrier and this second insulating barrier on insulating barrier is different with the material of insulating barrier, and from by selecting the following material: EVA, PVOH, PVA, PVP, UV curing dielectric ink and/or a kind of Tg are lower than about 150 ℃ thermoplastic polymer.
CNA2007800166062A 2006-03-10 2007-03-10 High-efficiency solar cell with insulated vias Pending CN101443921A (en)

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CN102610666A (en) * 2011-01-20 2012-07-25 无锡尚德太阳能电力有限公司 MWT (metal wrap through) back-contact solar cell, preparation method and module thereof
CN102714253A (en) * 2009-12-11 2012-10-03 弗劳恩霍弗应用技术研究院 Epitaxy wrap-through solar cells having longitudinally shaped perforations and method for the production thereof
CN102713026A (en) * 2010-08-31 2012-10-03 秋山信之 Production method for silicon thin film, production method for silicon thin-film solar cell, silicon thin film, and silicon thin-film solar cell
CN102844880A (en) * 2010-03-24 2012-12-26 Lg伊诺特有限公司 Solar power generating apparatus and method for manufacturing same
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CN107785442A (en) * 2016-08-31 2018-03-09 北京铂阳顶荣光伏科技有限公司 Solar film battery and preparation method thereof
CN115939240A (en) * 2022-12-01 2023-04-07 隆基绿能科技股份有限公司 Back contact battery, manufacturing method thereof and photovoltaic module

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CN102714253A (en) * 2009-12-11 2012-10-03 弗劳恩霍弗应用技术研究院 Epitaxy wrap-through solar cells having longitudinally shaped perforations and method for the production thereof
CN102844880A (en) * 2010-03-24 2012-12-26 Lg伊诺特有限公司 Solar power generating apparatus and method for manufacturing same
CN102713026A (en) * 2010-08-31 2012-10-03 秋山信之 Production method for silicon thin film, production method for silicon thin-film solar cell, silicon thin film, and silicon thin-film solar cell
CN102610666A (en) * 2011-01-20 2012-07-25 无锡尚德太阳能电力有限公司 MWT (metal wrap through) back-contact solar cell, preparation method and module thereof
CN103999235A (en) * 2011-10-18 2014-08-20 Lg伊诺特有限公司 Solar cell apparatus and method of fabricating the same
CN103999235B (en) * 2011-10-18 2016-11-23 Lg伊诺特有限公司 Solar battery apparatus and manufacture method thereof
US9559223B2 (en) 2011-10-18 2017-01-31 Lg Innotek Co., Ltd. Solar cell apparatus and method of fabricating the same
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CN107785442A (en) * 2016-08-31 2018-03-09 北京铂阳顶荣光伏科技有限公司 Solar film battery and preparation method thereof
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Application publication date: 20090527